WO2009008659A2 - Plasma etching apparatus and method of etching wafer - Google Patents

Plasma etching apparatus and method of etching wafer Download PDF

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Publication number
WO2009008659A2
WO2009008659A2 PCT/KR2008/004026 KR2008004026W WO2009008659A2 WO 2009008659 A2 WO2009008659 A2 WO 2009008659A2 KR 2008004026 W KR2008004026 W KR 2008004026W WO 2009008659 A2 WO2009008659 A2 WO 2009008659A2
Authority
WO
WIPO (PCT)
Prior art keywords
wafer
plasma
chamber
gas
region
Prior art date
Application number
PCT/KR2008/004026
Other languages
French (fr)
Other versions
WO2009008659A3 (en
Inventor
Kwan Goo Rha
Jung Hee Lee
Chul Hee Jang
Gil Hun Lee
Young Ki Han
Original Assignee
Sosul Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020070069705A external-priority patent/KR20090006401A/en
Priority claimed from KR1020070069704A external-priority patent/KR101372356B1/en
Priority claimed from KR1020070076695A external-priority patent/KR101423554B1/en
Application filed by Sosul Co., Ltd. filed Critical Sosul Co., Ltd.
Publication of WO2009008659A2 publication Critical patent/WO2009008659A2/en
Publication of WO2009008659A3 publication Critical patent/WO2009008659A3/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • H01L21/67063Apparatus for fluid treatment for etching
    • H01L21/67069Apparatus for fluid treatment for etching for drying etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/7684Smoothing; Planarisation

Definitions

  • the present invention relates to a plasma etching apparatus and a method of etching a wafer, and more particularly, to a plasma etching equipment and a method of etching a wafer for removing thin layers and particles from a bevel region of the wafer.
  • ⁇ 2> devices or circuit patterns are not formed on an edge region of a wafer since the edge region is used for the transfer of the wafer, and the edge region is called a bevel region.
  • undesired layers or particles can be deposited on the bevel region of the wafer during a manufacturing process for forming semiconductor devices and circuit patterns on the wafer. If the manufacturing process is continued for forming the semiconductor devices and circuit patterns on the wafer without removing the undesired layers or particles from the bevel region of the wafer, many problems may occur: for example, the wafer can be deformed, the manufacturing yield can be reduced because the undesired layers or particles may cause defects in subsequent processes, or it may be difficult to align the wafer.
  • Such a conventional wafer bevel region plasma etching process is performed using, for example, chlorine (Cl) containing gas.
  • the chlorine which is a corrosive gas, remains all over the surface of a wafer. If the chlorine is exposed to the atmosphere, the chlorine reacts with moisture contained in the air and thus corrodes a layer, particularly, a metal layer formed on the wafer. Therefore, a post etch treatment process should be performed to remove the chlorine remaining on the wafer after the wafer bevel region etching process.
  • a wafer edge etching chamber and a post etch treatment chamber are formed in the same cluster so as not to expose the wafer to the atmosphere.
  • the temperature of the wafer edge etching chamber is lowered after the wafer etching process and the wafer is moved to the post etch treatment chamber. Then, the temperature of the post etch treatment chamber is increased to perform the post etch treatment process. Due to these procedures, the cluster should be configured with a post etch treatment chamber that can be separately heated, resulting in wasting the space of the cluster and increasing manufacturing costs.
  • the conventional wafer bevel region plasma etching process has a low etching rate due to low plasma density, requires a long processing time due to the low etching rate, and cannot etch some layers in the bevel region.
  • a copper layer is not readily etched, and although the copper layer is etched, copper ions are not completely removed.
  • Such copper ions remaining on the bevel region of the wafer may react with a underlying anti-diffusion layer, or diffuse into a center portion of the wafer and permeate into, e.g., an interlayer insulation layer, so that the reliability of devices may be deteriorated.
  • the present invention provides a plasma etching equipment and a method of etching a wafer, which allow a wafer bevel region etching process and a post-processing process to be performed in the same etching equipment by using an existing plasma generating device or a remote plasma generating system.
  • the present invention also provides a plasma etching equipment and a method of etching a wafer, capable of easily removing a metal layer from the bevel region of a wafer by generating high-density plasma, concentrating the plasma onto the bevel region, and heating the inside of a chamber including a wafer support.
  • the present invention also provides a plasma etching equipment and a method of etching a wafer, which remove a predetermined thickness of layers remaining on the bevel region or etch the layers until the wafer is exposed so as to completely remove copper ions.
  • a plasma etching equipment includes: a chamber having a plasma reaction compartment configured to be closed; a wafer support disposed inside the chamber and configured to support a wafer and move the wafer vertically, thereby carrying the wafer into or out of the chamber; an etch gas supply unit configured to supply an etch gas into the chamber to etch a certain region of the wafer; a plasma generation unit configured to generate plasma of the etch gas to the chamber; and a heating unit disposed at a wall of the chamber for heating one of the plasma reaction compartment, the wafer and both to a temperature at which a plasma reaction is activated.
  • the heating unit may be disposed at a given wall or lateral surface of the reaction compartment.
  • the plasma etching equipment may further include a wafer support heating unit disposed in the wafer support for heating the wafer support.
  • the heating unit may include a heating wire and a power supply configured to supply power to the heating wire.
  • the temperature at which a plasma reaction is activated may range from room temperature to approximately 350 ° C .
  • the certain region of the wafer may include a bevel region on which a thin layer including a metal layer is formed.
  • the wafer may be heated by the heating unit before the plasma is generated.
  • the metal layer may be one of a copper layer, an aluminum layer, and a tungsten layer.
  • the wafer may be heated to the temperature ranging from approximately 250°C to approximately 350 ° C if the metal layer is the copper layer, from approximately 40 ° C to approximately 80 ° C if the metal layer is the aluminum layer, and from approximately 30 ° C to approximately 50 ° C if the metal layer is the tungsten layer.
  • the plasma etching equipment may further include a remote plasma generation unit configured to excite a post-process gas into a plasma state and supply the plasma-state post-process gas into the chamber.
  • the remote plasma generation unit may include a post-process gas tank configured to store the post-process gas, a plasma generator configured to excite the post-process gas into the plasma state, and a power supply configured to supply high-frequency power to the plasma generator of the remote plasma generation unit.
  • the remote plasma generator may further include a vaporizer configured to vaporize a liquid-state post-process material.
  • a method of etching a wafer includes: placing a wafer on a wafer support in a chamber; supplying an etch gas into the chamber; and etching a predeterimed region of the wafer by generating plasma in the chamber, wherein the wafer is heated before the plasma is generated.
  • the predetermined region of the wafer may include a bevel region.
  • the wafer may be heated to the temperature ranging from room temperature to approximately 350 ° C.
  • the wafer may be heated by performing one of a process of heating the wafer support, a process of heating the inside of the chamber, and both.
  • a metal layer and an insulation layer may be stacked on the bevel region.
  • the method may further include: removing the metal layer from the bevel region; and removing a portion of the insulation layer from the bevel region through a local etching process using plasma so as to remove metal ions or particles remaining in the bevel region.
  • the insulation layer may be removed by plasma generated using CF 4 , SF 6 , O 2 , and He gases.
  • the metal layer may be one of a copper layer, an aluminum layer, and a tungsten layer.
  • the copper layer may be etched using CI 2 and BCI 3 as a reaction gas and
  • the aluminum layer may be etched using CI2, BCI3, and O 2 as a reaction gas and Ar as an inert gas, and the tungsten layer may be etched using SFQ or NF 3 as a reaction gas and Ar as an inert gas.
  • the method may further include: removing residues from an entire top surface of the wafer using a plasma-state post-process gas in the chamber; and discharging a remaining gas after the residues are removed.
  • the plasma-state post-process gas may be generated by performing a remote plasma process.
  • the post-process gas may be prepared by mixing an inert gas and one of H 2 O, H 2 O 2 , NH 3 and a mixed gas of H 2 and N 2 .
  • a post process for removing chlorine can be performed in the same etching equipment used for a bevel region etching process after the bevel region etching process is performed, so that processing time can be reduced.
  • a post-process chamber is not required to be included in one cluster, so that the space of the cluster can be saved and manufacturing costs can be reduced.
  • FIG. 1 is a schematic cross-sectional view illustrating a plasma etching equipment in accordance with an embodiment of the present invention.
  • FIG. 2 is a flowchart for explaining a method of etching a wafer using the plasma etching equipment of FIG. 1 in accordance with an embodiment of the present invention.
  • FIG. 3 is a schematic cross-sectional view illustrating a plasma etching equipment in accordance with another embodiment of the present invention.
  • FIG. 4 is a flowchart for explaining a method of etching a wafer using the plasma etching equipment of FIG. 3 in accordance with another embodiment of the present invention.
  • FIG. 5 is a schematic view illustrating a cluster including the plasma etching equipments in accordance with another embodiment of the present invention.
  • FIGs. 6 to 10 are cross-sectional views for explaining a bevel region etching method in accordance with an embodiment of the present invention.
  • FIG. 11 is a cross-sectional view for explaining a bevel region etching method in accordance with still another embodiment of the present invention.
  • FIG. 12 is a plan image of a wafer taken before a bevel region etching process is performed in accordance with an embodiment of the present invention.
  • FIG. 13 is a plan image of the wafer taken after the bevel region etching process is performed to expose the wafer in accordance with the embodiment of the present invention.
  • FIG. 14 is a plan image of the wafer taken after a portion of the bevel region of the wafer is etched in accordance with the embodiment of the present invention.
  • FIG. 1 is a schematic cross-sectional view illustrating a plasma etching equipment in accordance with an embodiment of the present invention.
  • the plasma etching equipment includes a chamber 100, a shield part 200, a mask part 300, a plasma generator 400, and a wafer support 500.
  • the shield part 200 divides the chamber 100 into a reaction compartment (A) and a separate compartment (D).
  • the mask part 300 is disposed in the reaction compartment (A) of the shield part 200.
  • the plasma generator 400 is disposed in the separate compartment (D) of the shield part 200.
  • the wafer support 500 is disposed under the mask part 300. A center region of a wafer 10 is shielded by the mask part 300 and the wafer support 500, and a bevel region of the wafer 10 is exposed.
  • the plasma etching equipment further includes a faraday shield 600 between the mask part 300 and the plasma generator 400, and an etch gas supply unit 700 configured to supply reaction gas during a bevel region etching process.
  • the chamber 100 includes a lower chamber 110 having a lower heating unit 112 and an upper chamber 120 having an upper heating unit 122.
  • the lower chamber 110 includes a lower body 111, the lower heating unit 112, and a penetration opening 113.
  • the lower body 111 has a hollow rectangular box shape.
  • the lower heating unit 112 is disposed in at least a sidewall of the lower body 111.
  • the penetration opening 113 is formed through a top wall of the lower body 111. That is, the lower body 111 is shaped like a rectangular post having rectangular top and bottom surfaces and four sidewalls.
  • the lower body 111 is not limited to the rectangular post shape.
  • the lower body 111 can be shaped like a cylinder or polyhedron, and each surface of the lower body 111 can have a polygonal shape.
  • the wafer support 500 configured to support the wafer 10 is vertically moved within an inner space of the lower body 111.
  • a gate valve 130 is disposed on a side of the lower body 111 for loading and unloading the wafer 10.
  • a discharge part 140 is disposed on another side of the lower body 111 for discharging contaminants from the chamber 100.
  • the gate valve 130 is located at a sidewall of the lower body 111.
  • the lower chamber 110 can be connected to another chamber (not shown) through the gate valve 130.
  • the lower heating unit 112 is disposed at a portion of the sidewall of the lower body 111 for heating the chamber 100.
  • the lower heating unit 112 is disposed in the sidewall of the lower body 111.
  • the lower heating unit 112 can be used to heat the lower body 111, and the inner temperature of the lower body 111 can be stably maintained without being suddenly changed by an external environmental condition since the lower heating unit 112 can control the inner temperature.
  • An electric heater can be used as the lower heating unit 112.
  • the electric heater includes a plurality of heating wires 112a disposed along inner lateral surfaces of the lower body 111 or through the sidewall of the lower body 111, and a power supply 112b configured to supply electricity to the plurality of heating wires 112a.
  • the lower heating unit 112 is not limited to the electric heater.
  • a lamp heater may be used as the lower heating unit 112.
  • the lower heating unit 112 is disposed on or through the sidewall of the lower body 111, it is possible to intensively heat the bevel region of the wafer 10 from the time of loading the wafer 10. By this, the bevel region of the wafer 10 can be etched more efficiently. Particularly, an undesired metal layer formed on the bevel region of the wafer 10 can be easily removed since the reactivity between the metal layer and reaction gas increases when the bevel region of the wafer 10 is heated. Furthermore, byproducts of the etch reaction are not easily deposited on the bevel region of the wafer 10 again, and thus the byproducts can be easily discharged.
  • the lower heating unit 112 can be disposed at the top and/or bottom wall of the lower body 111. It is preferable that the penetration opening 113 formed through the top wall of the lower body 111 has a diameter greater than that of the wafer 10 to allow the wafer support 500 to move up to the outside of the lower body 111 through the penetration opening 113.
  • the upper chamber 120 includes an upper body 121, the upper heating unit 122, and a concave unit 123.
  • the upper body 121 has a rectangular box shape, and the upper heating unit 122 is disposed at the upper body 121.
  • the concave unit 123 is formed in the upper body 121.
  • the upper body 121 can have other shapes.
  • the upper body 121 can have a shape similar to the shape of the lower body 111 of the lower chamber 110.
  • the upper body 121 may be shaped to cover the penetration opening 113 of the lower body 111. That is, the bottom surface of the upper body 121 is in tight contact with the top surface of the lower body 111.
  • the concave unit 123 formed in the upper body 121 communicates with the penetration opening 113 of the lower body 111.
  • the concave unit 123 has an opening at a bottom wall of the upper body 121 and is formed to be recessed toward a top wall of the upper body 121.
  • a diameter of the recess 123 may be greater than the diameter of the penetration opening 113.
  • the wafer 10 can be disposed in the concave unit 123 by transporting the wafer 10 using the wafer support 500. Therefore, undesired layers or particles can be removed from the bevel region of the wafer 10 by intensivley generating plasma within the concave unit 123.
  • the upper heating unit 122 is disposed at a portion of the periphery of the concave unit 123.
  • the upper heating unit 122 is disposed in a portion of a top wall of the upper body 121.
  • the upper heating unit 122 is used to heat the wafer 10 for facilitating plasma reaction in the bevel region of the wafer 10. It is preferable that the heating temperature of the lower and the upper heating units 112 and 122 is approximately 80°C. In accordance with another embodiment, the heating temperature can be in the range of approximately 30 ° C to approximately 350 ° C. In the drawing, heating wires are uniformly disposed in the top wall of the upper body 121 as the upper heating unit 122.
  • the heating wires may be mainly disposed at a region corresponding to the wafer bevel region.
  • the upper heating unit 122 may receive power from a power supply (not shown) different from that of the lower heating unit 112. By this, the upper and lower regions of the chamber 100 can be kept at different temperatures.
  • the upper heating unit 122 and the lower heating unit 112 may receive power from the same power supply.
  • the chamber 100 further includes a door unit (not shown) as opening/closing means between the upper body 121 of the upper chamber 120 and the lower body 111 of the lower chamber 110.
  • a door unit (not shown) as opening/closing means between the upper body 121 of the upper chamber 120 and the lower body 111 of the lower chamber 110.
  • the shield part 200 has a ring shape extending from the top wall of the lower chamber 110 to the top wall of the upper chamber 120 through the inside of the concave unit 123.
  • the shield part 200 is disposed along the periphery of the penetration opening 113 to divide the chamber 100 including the lower and upper chambers 110 and 120 into the separate compartment (D) and the reaction compartment (A).
  • the wafer 10 is disposed, and plasma is generated to etch the bevel region of the wafer 10.
  • the separate compartment (D) accommodates a portion of the plasma generator 400.
  • the reaction compartment (A) and the separate compartment (D) may be isolated from each other by the shield part 200.
  • the separate compartment (D) can be kept at atmospheric pressure, and a vacuum can be formed in the reaction compartment (A).
  • the reaction compartment (A) includes a space formed by the top wall of the upper chamber 120 and the shield part 200 and an inner space of the lower chamber 110.
  • the separate compartment (D) includes a space surrounded by the shield part 200, the top and lateral walls of the upper chamber 120, and the top wall of the lower chamber 110.
  • the shield part 200 may be formed of a material capable of transmitting high-frequency energy for generating plasma therein.
  • the shield part 200 may be formed of an insulation material such as alumina (AI 2 O3).
  • the bevel region of the wafer 10 can be etched by generating plasma in the inner region of the shield part 200, i.e., a space between the shield part 200 and the wafer support 500.
  • the shield part 200 includes a ring-shaped body 210, an upper extension 220 on an upper portion of the body 210, and a lower extension 230 on a lower portion of the body 210.
  • the upper extension 220 is coupled to the top wall of the upper chamber 120
  • the lower extension 230 is coupled to the top wall of the lower chamber 110.
  • the body 210 has a ring shape corresponding to the shape of the wafer 10 so that the distance between the shield part 200 and the wafer 10 can be uniform. Therefore, plasma can be uniformly supplied to the bevel region of the wafer 10.
  • the body 210 may have a circular ring shape.
  • the lower extension 230 is formed at the lower portion of the body 210 to extend outward from the body 210, and the upper extension 220 is formed at the upper portion of the body 210 to extend inward from the body 210.
  • the lower extension 230 can extend inward from the lower portion of the body 210, and the upper extension 220 can extend outward from the upper portion of the body 210.
  • the lower and upper extensions 220 and 230 are in tight contact with the lower chamber 110 and the upper chamber 120, respectively, so that the reaction compartment (A) and the separate compartment (D) can be kept at different pressures. That is, the upper extension 220 and the lower extension 230 function as sealing members for hermetically seal the reaction compartment (A).
  • the shield part 200 can be fixed to the lower chamber 110 through the lower extension 230 or the upper chamber 120 through the upper extension 220. Sealing members (not shown) such as o-rings can be additionally disposed between the shield part 200 and the lower chamber 110 and between the shield part 200 and the upper chamber 120 so as to securely seal the reaction compartment (A).
  • the shield part 200 is disposed on flat surfaces of the lower chamber 110 and the upper chamber 120.
  • the shield part 200 can be disposed on recessed surfaces of the lower chamber 110 and the upper chamber 120. In this case, the reaction compartment (A) can be sealed more reliably.
  • the shield part 200, the lower chamber 110, and the upper chamber 120 are described as separate parts. However, in another embodiment, the shield part 200, the lower chamber 110, and the upper chamber 120 can be formed in one piece.
  • the mask part 300 prevents generation of plasma in the non-etch region, i.e., the center region of the wafer 10 disposed on the wafer support 500 so that the non-etch region of the wafer 10 is not etched.
  • the mask part 300 has a shape similar to the shape of the wafer 10.
  • the mask part 300 has a circular plate shape. It is preferable that the mask part 300 has a size smaller than that of the wafer 10.
  • the bevel region of the wafer 10 can be selectively exposed.
  • the bevel region of the wafer 10 exposed outside the mask part 300 may be approximately 0.1 mm to approximately 5 mm wide. By this, the wafer bevel region where a layer or a semiconductor pattern is not formed can be exposed.
  • the exposed bevel region of the wafer 10 is less wide than approximately 0.1 mm, the exposed bevel region of the wafer 10 is too small to remove undesired layers or particles from the bevel region of the wafer 10 by plasma etching. If the exposed bevel region of the wafer 10 is greater than approximately 5 mm, layers or patterns formed on the non-etch region (the center region) of the wafer 10 may be exposed.
  • the mask part 300 may have a size equal to or greater than that of the wafer 10 depending on process conditions.
  • inert gas can be injected from an inner region of the mask part 300 so as to prevent penetration of plasma-state etch gas into the center region of the wafer 10 disposed inside the mask part 300.
  • the mask part 300 is disposed in the reaction compartment inside the shield part 200. Furthermore, the mask part 300 is disposed on a bottom surface of the concave unit 123 of the upper chamber 120, that is, on a bottom surface of the top wall of the upper chamber 120. After the mask part 300 is separately formed, the mask part 300 may be attached to the bottom surface of the concave unit 123 using a coupling member. Alternatively, the mask part 300 and the upper chamber 120 may be formed in one piece.
  • An upper electrode 310 may be disposed on an outside portion of the mask part 300. A ground voltage is applied to the upper electrode 310. Alternatively, the upper electrode 310 can be disposed inside the mask part 300. Instead of forming the upper electrode 310, the mask part 300 can be used as an upper electrode. In this case, an insulation layer can be formed on a predetermined portion of the mask part 300.
  • the upper electrode 310 is used to induce coupling of a bias voltage applied to the wafer support 500 to increase plasma density and an etch rate at the bevel region of the wafer 10.
  • the plasma generator 400 includes an antenna part 410 and a plasma power supply 420.
  • the antenna part 410 is disposed in the separate compartment (D) surrounded by the shield part 200, the upper chamber 120, and the lower chamber 110.
  • the antenna part 410 includes at least one coil winding around the shield part 200 N times. In addition, the coil can be wound to be vertically and/or horizontally overlapped, accumulated or crossed. When the wafer 10 is spaced apart from the antenna part 410 by approximately 2 cm to approximately 10 cm, plasma can be efficiently generated at the bevel region of the wafer 10.
  • the wafer 10 is spaced apart from the antenna part 410 by less than approximately 2 cm, plasma may be applied to the center region of the wafer 10, and thus the center region of the wafer 10 can be undesirably etched. If the wafer 10 is spaced apart from the antenna part 410 by more than approximately 10 cm, it is difficult to obtain sufficient plasma density at the bevel region of the wafer 10.
  • the plasma power supply 420 supplies power such as radio frequency (RF) power to the antenna part 410.
  • the plasma power supply 420 may supply high-frequency power to the antenna part 410.
  • the plasma power supply 420 may be disposed outside the chamber 100. That is, only the antenna part 410 of the plasma generator 400 may be disposed in the separate compartment (D) of the chamber 100, and other components of the plasma generator 400 may be disposed outside the chamber 100. In this embodiment, since the antenna part 410 is disposed in the separate compartment (D) close to the reaction compartment (A), plasma can be densely generated in a region of the reaction compartment (A) close to the antenna part 410.
  • plasma can be generated in a circular ring shape in the reaction compartment (A) inside the ring-shaped shield part 200.
  • the antenna part 410 can be formed integral with the chamber 100 to simplify the plasma etching equipment and reduce the size of the plasma etching equipment.
  • Power supplied from the plasma power supply 420 to the antenna part 410 may range from approximately 100 W to approximately 3.0 KW.
  • the frequency of power supplied from the plasma power supply 420 to the antenna part 410 may range from approximately 2 MHz to approximately 13.56 MHz.
  • Plasma is generated in the reaction compartment (A) inside the shield part 200 in response to the power supplied to the antenna part 410. That is, high-density plasma is generated inside the shield part 200 by the power supplied to the antenna part 410. Since the mask part 300 is disposed inside the shield part 200, the generation of plasma is concentrated in a region between the shield part 200 and the mask part 300 and a region between the shield part 200 and the lifted wafer support 500.
  • the antenna part 410 is disposed to enclose the wafer 10 on the wafer support 500 when the wafer support 500 is lifted, and ground electrodes, i.e., the upper electrode 310 and a lower electrode 510, are disposed at upper and lower sides of the antenna part 410. Therefore, high-density plasma can be uniformly generated and concentrated in the bevel region of the wafer 10 so that the bevel region of the wafer 10 can be etched more efficiently.
  • the plasma generator 400 includes a capacitively coupled plasma (CCP) generator, a hybrid type plasma generator, an electron cyclotron resonance (ECR) plasma generator, or a surface wave plasma (SWP) generator.
  • CCP capacitively coupled plasma
  • ECR electron cyclotron resonance
  • SWP surface wave plasma
  • a connection hole (not shown) is formed at the upper chamber 120 to connect the plasma power supply 420 and the antenna part 410.
  • a power line can be connected from the plasma power supply 420 through the connection hole to the antenna part 410 disposed in the reaction compartment inside the upper chamber 120.
  • An impedance matching unit (not shown) can be further disposed between the plasma power supply 420 and the antenna part 410.
  • a cooling unit (not shown) can be disposed at a side of the antenna part 410 to prevent the antenna part 410 from being damaged by the heating units 112 and 122 disposed inside the chamber 100.
  • the faraday shield 600 is disposed on an outer surface of the shield part 200 for concentrating plasma generated inside the shield part 200 into the bevel region of the wafer 10.
  • the faraday shield 600 may be disposed between the shield part 200 and the antenna part 410.
  • the faraday shield 600 prevents concentration of plasma to the coil of the antenna part 410 by the Faraday Effect so that plasma can be uniformly formed inside the chamber 100.
  • the faraday shield 600 prevents etch byproducts and polymers from being deposited mainly on the inner surface of the shield part 200 adjacent to the antenna part 410 by a sputtering phenomenon so that the etch byproducts and polymers can be uniformly deposited in the chamber 100, and thus the growing rate of deposition layers of the byproducts and polymers can be lowered. Therefore, the lifetime of the plasma etching equipment can increase, and the generation of particles due to contaminants accumulated on the inner surface of the chamber can decrease.
  • the faraday shield 600 may include a ring shaped body and a plurality of vertical slits (not shown) formed in the body.
  • the uniformity of plasma inside the shield part 200 can be controlled by adjusting the width and pitch of the slits.
  • the faraday shield 600 is connected to a ground point of the plasma etching equipment so that when plasma is generated inside the shield part 200, the occurrence of an undesired voltage between the plasma and the coil of the antenna part 410 can be minimized and the plasma can be uniformly distributed throughout the inside of the shield part 200.
  • An insulation member (not shown) can be disposed between the faraday shield 600 and the antenna part 410.
  • the faraday shield 600 may be spaced a predetermined distance from the coil of the antenna part 410 and disposed outside the shield part 200 for generating plasma.
  • the wafer support 500 is disposed in the reaction compartment (A) of the chamber 100 for supporting the wafer 10.
  • the wafer support 500 is used to move the wafer 10 loaded into the lower chamber 110 to the concave unit 123 of the upper chamber 120 where the mask part 300 and the shield part 200 are disposed, or to move the wafer 10 from the concave unit 123 of the upper chamber 120 down to the lower chamber 110.
  • the wafer support 500 includes a wafer support chuck 520 configured to support the wafer 10, a driving unit 540 configured to vertically move the wafer support chuck 520, and a bias power supply 550 configured to supply bias power to the wafer support chuck 520.
  • the wafer support 500 further includes a lift pin (not shown), and the wafer support chuck 520 includes a penetration hole in which the lift pin moves vertically.
  • the wafer support chuck 520 has a plate shape corresponding to the shape of the wafer 10 and a size smaller than that of the wafer 10. Therefore, when the wafer 10 is placed on the wafer support chuck 520, a backside bevel region of the wafer 10 can be exposed to plasma.
  • a wafer heating unit 530 is disposed inside the wafer support chuck 520 for heating the wafer 10.
  • the wafer heating unit 530 includes a heating wire 531 disposed inside the wafer support chuck 520, and a power supply 532 for supplying power to the heating wire 531.
  • the heating wires of the wafer heating unit 530 may be disposed densely in an edge region of the wafer support chuck 520.
  • the bevel region of the wafer 10 placed on the wafer support chuck 520 can be effectively heated, and thus the reactivity of the bevel region of the wafer 10 to the plasma can be increased.
  • the heating temperature of the wafer heating unit 530 may range from approximately 150 ° C to approximately 550 ° C. In this embodiment, the wafer heating unit 530 may heat the wafer support chuck 520 to approximately 350°C.
  • the power supplied from the bias power supply 550 to the wafer support chuck 520 may range from approximately 10 W to approximately 1000 W.
  • a frequency of the power supplied from the bias power supply 550 to the wafer support chuck 520 may range from approximately 2 MHz to approximately 13.56 MHz.
  • the bias power supply 550 supplies bias power to the wafer support chuck 520 to provide bias power to the wafer 10 placed on the wafer support chuck 520. Owing to the bias power, plasma moves to the bevel region of the wafer 10 exposed outside the mask part 300 and the wafer support chuck 520.
  • the lower electrode 510 may be disposed on an end of the wafer support chuck 520.
  • the lower electrode 510 is grounded.
  • the lower electrode 510 is used to induce coupling of the bias power supplied to the wafer support 500 to increase plasma density and an etch rate at the bevel region of the wafer 10.
  • an insulation layer 511 is disposed between the wafer support chuck 520 and the lower electrode 510.
  • the insulation layer 511 may be disposed around the wafer support chuck 520.
  • the size of the wafer support 500 is determined by the sizes of the wafer support chuck 520 and the insulation layer 511. Therefore, when the wafer 10 is placed on the wafer support 500, the wafer 10 may protrude from an edge of the insulation layer 511 by approximately 0.1 mm to approximately 5 mm.
  • the insulation layer 511 is disposed only between the wafer support chuck 520 and the lower electrode 510, that is, when the insulation layer 511 does not make contact with the wafer 10, the wafer 10 placed on the wafer support 500 may protrude from an edge of the wafer support chuck 520 by approximately 0.1 mm to approximately 5 mm.
  • the lower electrode 510 may not be formed and thus the insulation layer 511 is also omitted.
  • the driving unit 540 includes a driving shaft 541 and a driving member 542.
  • the driving shaft 541 extends to inside the chamber 100 for vertically moving the wafer support chuck 520.
  • the driving member 542 actuates the driving shaft 541.
  • the etch gas supply unit 700 supplies etch gas to a plasma generation region, that is, a region among the shield part 200, the mask part 300, and the wafer support 500.
  • the etch gas supply unit 700 includes a gas injector 710 injecting process gas into the reaction compartment (A) of the chamber 100, a gas pipe 720 supplying the process gas to the injector 710, a gas tank 730 supplying the process gas to the gas pipe 720, and a valve 740 configured to allow and cut off supply of the process gas to the chamber 100.
  • the injector 710 may include a plurality of nozzles disposed in the upper chamber 120 around the mask part 300. Therefore, the process gas can be supplied to the chamber 100 uniformly around the mask part 300. As described above, since the lower heating unit 112 and the upper heating unit 122 are disposed in the chamber 100, the process gas can be heated using the lower heating unit 112 and the upper heating unit 122 before supplying the process gas into the chamber 100.
  • the etch gas supply unit 700 can be connected to the plasma generating region of the chamber 100 through the shield part 200. That is, the nozzles of the injector 710 can be uniformly formed in the shield part 200, and the gas pipe 720 can be connected to the nozzles through the upper chamber 120 so as to supply the process gas to the plasma generating region through the shield part 200.
  • the gas pipe 720 can be connected to the nozzles through the upper chamber 120 so as to supply the process gas to the plasma generating region through the shield part 200.
  • step SIlO the gate valve 130 disposed on the sidewall of the chamber 100 is opened, and the wafer 10 is introduced into the chamber 100, i.e., into the reaction compartment (A).
  • a metal layer has been formed on the wafer 10 for forming semiconductor devices on the wafer 10 through a certain previous process and thus the metal layer has also been formed on the bevel region of the wafer 10.
  • step S120 the introduced wafer 10 is placed on the wafer support 500.
  • the chamber 100 can be heated up to a predetermined temperature using the lower heating unit 112 and the upper heating unit 122 that are disposed at the chamber 100 and the wafer support 500.
  • the purpose of the heating is to heat the bevel region of the wafer 10 for increasing etch reactivity of the bevel region of the wafer 10.
  • the heating temperature of the chamber 100 may vary according to the material of the chamber 100. In general, the heating temperature may be 100 ° C or less to prevent thermal deformation of the chamber 100.
  • the gate valve 130 is closed, and the pressure of the reaction compartment (A) of the chamber 100 is adjusted to a desired level.
  • the wafer support 500 is moved upward into the concave unit 123 of the upper chamber 120 close to the mask part 300.
  • the distance between the wafer support 500 and the mask part 300 disposed in the concave unit 123 is adjusted to approximately 0.1 mm to approximately 10 mm. In the range, the generation of plasma can be prevented in a region between the mask part 300 and the wafer support 500.
  • the wafer 10, the wafer support 500 and the mask part 300 are formed in a circular shape and centers of the wafer 10, the wafer support 500, and the mask part 300 are aligned.
  • the bevel region of the wafer 10 can be exposed outside the closely spaced wafer support 500 and mask part 300.
  • the possibility of plasma being generated in a region of the wafer 10 disposed under the mask part 300 can be reduced by decreasing the distance between the mask part 300 and the wafer 10.
  • etch gas including, e.g., chlorine (Cl)
  • the gas supply unit 700 to the reaction compartment (A)
  • the etch gas supplied to the reaction compartment (A) is excited into a plasma state by using the plasma generator 400 so as to produce plasma-state etch gas. That is, high-frequency power is applied to the antenna part 410 disposed at the separate compartment (D), and ground power is applied to the upper electrode 310 disposed at a side of the mask part 300 and the lower electrode 510 disposed at a side of the wafer support 500, thereby generating plasma at a region therebetween, i.e., at a region inside the shield part 200.
  • etch gas including, e.g., chlorine (Cl)
  • the process pressure may be kept in the range of approximately 5 mTorr to approximately 500 mTorr.
  • the plasma-state etch gas is uniformly injected along the periphery of the mask part 300, and owing to the faraday shield 600 disposed on the inner surface of the shield part 200, the plasma-state etch gas can be concentrated onto the bevel region.
  • a bias voltage is applied to the upper electrode 310 disposed around the mask part 300 and the lower electrode 510 disposed around the wafer support 500 in order to remove undesired layers and particles on the bevel region of the wafer 10.
  • the wafer 10 can be heated using the heating units disposed on the inner surface or in the sidewall of the chamber 100 and within the wafer support 500. Therefore, even when a metal layer is deposited on the bevel region of the wafer 10, the metal layer can be etched away from the bevel region of the wafer 10 using the plasma after the metal layer is heated. If it is required, the wafer 10 can be heated from the room temperature to a heating temperature of approximately 350 ° C before the etch process. The heating temperature can vary according to the material deposited on the bevel region of the wafer 10.
  • the wafer 10 when copper (Cu) is deposited on the bevel region of the wafer 10, the wafer 10 can be heated to a temperature of approximately 250°C to approximately 350 °C .
  • aluminum (Al) is deposited on the bevel region of the wafer 10
  • the wafer 10 can be heated to a temperature of approximately 40°C to approximately 80 ° C.
  • tungsten (W) is deposited on the bevel region of the wafer 10 can be heated to a temperature of approximately 30 °C to approximately 50°C .
  • the heating temperature of the wafer 10 may be kept constant while a material layer is etched away from the bevel region of the wafer 10.
  • the wafer 10 may be kept constant in a temperature range corresponding to a currently etched material layer, and then the wafer 10 is heated or cooled to a temperature range corresponding to the next material layer and kept constant in that temperature range while the next material layer is etched away.
  • the process gas includes inert gas and reaction gas.
  • the inert gas may be a group 18 element such as argon (Ar) and helium (He), or a gas that does not chemically react with the inner surface of the chamber 100 or the wafer 10 such as nitrogen gas (N 2 ).
  • the reaction gas may be oxygen (O2) based gas or a group 17 element based gas such as chlorine (Cl) based gas and fluorine (F) based gas.
  • Other gases can be used as the reaction gas according to a material to be removed from the bevel region of the wafer 10.
  • fluorine (F) based gas include CF4, CHF 4 , SF 6 , C 2 F 6 , NF3, F 2 , F 2 N 2 , and C4F8.
  • Examples of the chlorine (Cl) based gas include BCI 3 and Cl 2 .
  • Cl 2 or BCI3 can be used as the reaction gas, and argon (Ar) can be used as the inert gas.
  • argon (Ar) can be used as the inert gas.
  • aluminum (Al) is removed from the bevel region of the wafer 10, Cl 2 , BCI3, or
  • O 2 can be used as the reaction gas
  • argon (Ar) can be used as the inert gas.
  • tungsten (W) is removed from the bevel region of the wafer 10
  • SF 6 or NF 3 can be used as the reaction gas
  • argon (Ar) can be used as the inert gas.
  • copper (Cu) is removed from the bevel region of the wafer 10
  • the reaction gas may be more reactive in a temperature range of approximately 250°C to approximately 350 ° C .
  • aluminum (Al) is removed from the bevel region of the wafer 10
  • the reaction gas may be more reactive in a temperature range of approximately 40 ° C to approximately 80 ° C.
  • tungsten (W) is removed from the bevel region of the wafer 10
  • the reaction gas may be more reactive in a temperature range of approximately 30 ° C to approximately 50 ° C .
  • step S140 after the bevel region of the wafer 10 is etched, the plasma generation and the supply of etch gas are terminated, and remaining gas and byproducts are discharged from the chamber 100.
  • step S150 the wafer support 500 is moved down to the lower chamber 110.
  • additional gas can be supplied into the chamber 100, and the supply of the high-frequency power to the antenna part 410 can be gradually reduced to maintain the plasma state until the remaining gas is fully discharged or the wafer support 500 is moved down so as to reduce defects and the generation of particles.
  • the gate valve 130 is opened and the wafer 10 is carried out of the chamber 100.
  • FIG. 3 is a schematic cross-sectional view illustrating a plasma etching equipment in accordance with another embodiment of the present invention.
  • the plasma etching equipment of this embodiment includes a chamber 100, a shield part 200 dividing the inside of the chamber 100 into a reaction compartment (A) and a separate compartment (D), a mask part 300 disposed at the reaction compartment (A) inside the shield part 200, a plasma generator 400 disposed at the separate compartment (D) outside the shield part 200, a wafer support 500 disposed under the mask part 300, a faraday shield 600 disposed between the mask part 300 and the plasma generator 400, and an etch gas supply unit 700 configured to supply reaction gas during a bevel region etch process.
  • the plasma etching equipment further includes a remote plasma generator 800 configured to change a state of reaction gas into a plasma state and supply the plasma-state reaction gas during a post process.
  • the plasma etching equipment of this embodiment further includes the remote plasma generator 800 as compared with the plasma etching equipment of FIG. 1.
  • the remote plasma generator 800 will be mainly described in detail.
  • the remote plasma generator 800 is configured to excite post-process gas into a plasma state and supply the plasma-state post-process gas to the front surface of a wafer 10.
  • the remote plasma generator 800 includes a post- process gas tank 810 configured to store the post-process gas, a plasma generator 820 configured to receive the post-process gas from the post- process gas tank 810 and excite the post-process gas into a plasma state, a power supply 830 configured to supply high-frequency power to the plasma generator 820, a gas supply unit 840 configured to supply the plasma-state post-process gas to the inside of the chamber 100 through a gas pipe 720 and an injector 710, and a value 850 configured to control the supply of the plasma-state post-process gas.
  • the plasma-state post-process gas from the plasma generator 820 is supplied to the inside of the chamber 100 through the gas supply unit 840, the gas pipe 720, and the injector 710.
  • a wafer support chuck 520 of the wafer support 500 is moved down to the low side of the chamber 100.
  • the remote plasma supplied from the remote plasma generator 800 can be injected to the front surface of the wafer 10.
  • etch residues such as chlorine can be removed from the front surface of the wafer 10.
  • the plasma etching equipment can use another remote plasma system capable of generating plasma outside the chamber 100 in various methods such as a method using microwaves.
  • the post-process gas stored in the post-process gas tank 810 includes a mixture gas of H 2 O, NH 3 , H 2 O 2 , H 2 , and N 2 , and H 2 O and H 2 O 2 are stored in a gas state.
  • a vaporizing device (not shown) is additionally provided to vaporize the H2O or H 2 O 2 .
  • an inert gas supply device (not shown) is provided to supply inert gas such as argon (Ar). The inert gas is supplied together with the post-process gas and is excited into a plasma state.
  • FIG. 4 is a flowchart for explaining a method of etching a wafer using the plasma etching equipment of FIG. 3 in accordance with another embodiment of the present invention.
  • the wafer etching method of this embodiment further includes, after discharging the etch gas and reaction byproducts in the step S140, a wafer post processing operation S250 using the remote plasma and a reaction byproduct discharging operation S260.
  • the wafer etching method of this embodiment includes a wafer introducing operation S210, a wafer heating and lifting operation S220, a bevel region etching operation S230, an etch gas and reaction byproduct discharging operation S240, the wafer post processing operation S250 using the remote plasma, the reaction byproduct discharging operation S260, and a wafer discharging operation S270.
  • the additional operations i.e., the wafer post processing operation S250 using the remote plasma and the reaction byproduct discharging operation S260, will be mainly described.
  • step S250 in order to remove components of the etch gas such as chlorine (Cl) remaining on the front surface of the wafer 10 after the bevel region of the wafer 10 is etched, the plasma-state post-process gas is supplied to the front surface of the wafer 10 from the remote plasma generator 800.
  • the wafer support 500 is moved downward to locate the wafer 10 at the low side of the chamber 100.
  • predetermined power is supplied to the plasma generator 820 from the power supply 830, and the post-process gas is supplied to the plasma generator 820 from the post-process gas tank 810.
  • the inside of the chamber 100 is kept at a pressure of approximately 5 mTorr to approximately 500 mTorr.
  • the plasma-state post- process gas prepared in this way is injected into the chamber 100 through the gas supply unit 840, the gas pipe 720, and the injector 710.
  • a hydrogen- containing gas such as one of H 2 O, H 2 O 2 , NH 3 and a mixed gas of H 2 and N 2 is mixed with an inert gas and the mixed gas of the hydrogen-containing gas and the inert gas is supplied as the post-process gas.
  • bias power may be applied to an upper electrode 310 and a lower electrode 510 to facilitate the post processing.
  • the plasma-state, hydrogen-containing, post- process gas supplied in this way reacts with chlorine (Cl) remaining on the wafer 10 and, as a result, HCl is generated.
  • the HCl is in gas phase under a vacuum and high-temperature state.
  • step S260 after the post processing operation, plasma generation and post-process gas supply by the remote plasma generator 800 are suspended and gas remaining in the chamber 100, i.e., the HCl gas, is exhausted.
  • step S270 a gate valve 130 is opened and the processed wafer 10 is discharged from the chamber 100.
  • FIG. 5 is a schematic view illustrating a cluster including the plasma etching equipments in accordance with another embodiment of the present invention.
  • the cluster includes a plurality of plasma etching equipments capable of performing both the bevel region etching process and the post process.
  • the cluster of this embodiment includes a plurality of wafer loaders 910, transfer devices 920a and 920b, buffer chambers 930, a transfer chamber 940, and a plurality of plasma etching equipments 950a, 950b, 950c, and 95Od disposed at sidewalls of the transfer chamber 940.
  • Each of the plasma etching equipments 950a, 950b, 950c, and 95Od has the same structure as that illustrated in FIG. 3 and operates in the same manner as that described in FIG. 4 so as to perform both the wafer bevel region etching process and the post process.
  • the transfer device 920a transfers a wafer from the wafer loader 910 to the buffer chamber 930, and the transfer device 920b disposed at the buffer chamber 940 may transfer the wafer from the buffer chamber 930 sequentially to the plasma etching equipments 950a, 950b, 950c, and 95Od.
  • the bevel region of the wafer is etched using plasma and residual substances are removed from the wafer using remote plasma.
  • the cluster of this embodiment includes the plurality of plasma etching equipments, so that a post processing chamber is not necessary while a conventional cluster includes both a bevel region etching apparatus and a post processing chamber. Therefore, the cluster of this embodiment is advantageous in saving space and reducing manufacturing costs. Furthermore, since the bevel region etching process and the post process are successively performed in one apparatus, processing time can be reduced.
  • FIGs. 6 to 10 are cross-sectional views for explaining a bevel region etching method in accordance with another exemplary embodiment of the present invention.
  • a method of forming a copper line using a dual damascene process is taken as an example for explaining a semiconductor device manufacturing method, and reference numerals 20 and 30 denote a chip region and a bevel region, respectively.
  • a first insulation layer 11, an etch stop layer 12, and a second insulation layer 13 are sequentially formed on a top surface of a wafer 10 where a predetermined structure is formed.
  • the etch stop layer 12 may be formed using a silicon nitride layer.
  • the first and second insulation layers 11 and 13 are formed of a material having an etch rate different from that of the etch stop layer 12.
  • the first and second insulation layers 11 and 13 are formed of an oxide-containing material such as TEOS (tetra ethyl ortho silicate).
  • TEOS tetra ethyl ortho silicate
  • ⁇ ioo> Referring to FIG. 7, through a photolithography process using a trench mask, a predetermined region of the second insulation layer 13 is etched to form a trench 14 and, at the same time, an exposed region of the first insulation layer 11 is etched to form a via hole 15. As a result, a dual damascene pattern including the trench 14 and the via hole 15 is formed.
  • the first insulation layer 11, the etch stop layer 12, and the second insulation layer 13 remain on the front, lateral, and back surfaces of the bevel region 30.
  • an ant i-diffusion layer 16 is formed on the entire surface of the wafer 10.
  • the anti-diffusion layer 16 is formed of Ta, TaN, Ti, TiN, W, or WN.
  • the ant i-diffusion layer 16 is formed by an electroplating method.
  • the anti-diffusion layer 16 may be thicker at the bottoms of the via hole 15 and the trench 14 than at the lateral sides of the via hole 15 and the trench 14, and overhangs may be present at upper corners of the trench 14 and the via hole 15.
  • nitrogen plasma is generated at the same time with argon sputtering so as to etch the anti- diffusion layer 16 at the bottoms of the trench 14 and the via hole 15 and re-deposit the anti-diffusion layer 16 at the lateral sides of the trench 14 and the via hole 15.
  • a copper layer 17 is formed by an electroplating method.
  • CVD chemical vapor deposition
  • PVD physical vapor deposition
  • the copper layer 17 and the anti-diffusion layer 16 are planarized by a chemical mechanical polishing (CMP) process until the second insulation layer 13 is exposed.
  • CMP chemical mechanical polishing
  • the copper line is formed at a predetermined region of the chip region 20.
  • the anti- diffusion layer 16 and the copper layer 17 may be partially removed from the bevel region 30.
  • the copper layer 17 remaining in the bevel region 30 is removed.
  • the copper layer 17 remaining in the bevel region 30 may be removed using a kind of chemical.
  • the anit-diffusion layer 16 and the second insulation layer 13 in the bevel region 30 are removed using one of the bevel region etching equipments described above.
  • CF4 SF ⁇ , O2, and He gases are introduced into the bevel region etching equipment and predetermined bias power and pressure are applied for a predetermined processing time.
  • This bevel region etching process is performed while varying processing conditions according to the thicknesses of layers deposited on the bevel region 30 within safe processing condition ranges in which the chip region 20 or the wafer is not deformed or damaged.
  • the copper layer 17, the ant i-diffusion layer 16 and the second insulation layer 13 remaining in the wafer bevel region 30 may be successively removed using the bevel region etching equipment.
  • the bevel region etching equipment including a heating device disposed at a chamber wall may be used.
  • the process is performed under processing conditions partially different from the processing conditions for removing the anti- diffusion layer 14 and the second insulation layer 13.
  • the process is performed by supplying CF 4 , SF 6 , O 2 , and He gases and then applying predetermined bias power and pressure to the bevel region etching equipment for a processing time longer than the processing time for removing the anti- diffusion layer 16 and the second insulation layer 13.
  • the process is also preformed as varying processing conditions according to the thicknesses of layers deposited on the bevel region 30 within safe processing condition ranges in which the chip region 20 or the wafer is not deformed or damaged.
  • FIG. 12 is a plan image of a wafer taken before a bevel region etching process is performed in accordance with an embodiment of the present invention
  • FIG. 13 is a plan image of the wafer taken after the bevel region etching process is performed to expose the wafer in accordance with the embodiment of the present invention
  • FIG. 14 is a plan image of the wafer taken after a portion of the bevel region of the wafer is etched in accordance with the embodiment of the present invention.
  • the images of FIGs. 12 to 14 were taken from the right side of the wafer and reference numerals 20, 30, and 40 denote a chip region, a bevel region, and a stage, respectively.
  • a TEOS layer, a silicon nitride layer, and a TEOS layer were formed on the wafer to thicknesses of approximately 2000 A, 300 A and 1000 A, respectively.
  • a Ta layer was formed to a thickness of approximately 100 A.
  • a copper layer was formed and then an edge bead remove (EBR) process was performed.
  • EBR edge bead remove
  • SF ⁇ , O2, and He gases to the bevel region etching equipment at flow rates of approximately 90 seem, 90 seem, 20 seem, and 180 seem, respectively, and applying bias power of approximately 600 W and pressure of 1.5 Torr to the bevel region etching equipment. That is, under the same processing conditions, the process was performed for 10 seconds to etch a portion of the bevel region of the wafer and for 20 seconds to expose the wafer at the bevel region.
  • a stacked structure remains in the chip region 20 and an EBR line 40 is present in the bevel region 30 as a result of the copper layer being removed by the EBR process.
  • a reference numeral 60 denotes a curved lateral side region of the bevel region 30.
  • residues such as copper ions exist in the bevel region 30.
  • the second insulation layer 13 is exposed at a region adjacent to the curved lateral side region 60, i.e, at a region denoted by a reference numeral 80, and the anti-diffusion layer 16 is exposed at a region 70 between the chip region 20 and the exposed region 60 of the second insulation layer 13. In this case, the second insulation layer 13 is also exposed at the curved lateral side region 60.
  • a plasma etching equipment including an inductively coupled plasma (ICP) source and a heating unit is taken as an example.
  • ICP inductively coupled plasma
  • the present invention is not limited thereto.
  • the present invention can be applied to various plasma etching equipments for etching a bevel region using plasma.
  • the present invention can be applied to a plasma etching equipment configured to etch a certain region of a wafer as well as the plasma etching equipment configured to etch the bevel region.
  • the present invention can be used in a semiconductor device manufacturing process to etch a wafer, for example, the bevel region of the wafer, so as to completely remove layers and particles deposited on the bevel region of the wafer.

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Abstract

Provided is a plasma etching equipment and a method of etching a wafer using the plasma etching equipment. The plasma etching equipment includes a chamber, a wafer support disposed in the chamber and configured to support a wafer and move the wafer vertically, a plasma generation unit configured to generate plasma in the chamber, an etch gas supply unit configured to supply an etch gas into the chamber, and a remote plasma generation unit configured to excite a post-process gas into a plasma state and supply it into the chamber.

Description

[DESCRIPTION] [Invention Title]
PLASMA ETCHING APPARATUS AND METHOD OF ETCHING WAFER [Technical Field]
<i> The present invention relates to a plasma etching apparatus and a method of etching a wafer, and more particularly, to a plasma etching equipment and a method of etching a wafer for removing thin layers and particles from a bevel region of the wafer. [Background Art]
<2> Generally, devices or circuit patterns are not formed on an edge region of a wafer since the edge region is used for the transfer of the wafer, and the edge region is called a bevel region. However, undesired layers or particles can be deposited on the bevel region of the wafer during a manufacturing process for forming semiconductor devices and circuit patterns on the wafer. If the manufacturing process is continued for forming the semiconductor devices and circuit patterns on the wafer without removing the undesired layers or particles from the bevel region of the wafer, many problems may occur: for example, the wafer can be deformed, the manufacturing yield can be reduced because the undesired layers or particles may cause defects in subsequent processes, or it may be difficult to align the wafer.
<3> For these reasons, it is required to remove the undesired layers or particles through a certain post process. In a recent method, plasma is selectively supplied to the edge region of the wafer to remove the undesired layers or particles from the edge region of the wafer.
<4> Such a conventional wafer bevel region plasma etching process is performed using, for example, chlorine (Cl) containing gas. However, the chlorine, which is a corrosive gas, remains all over the surface of a wafer. If the chlorine is exposed to the atmosphere, the chlorine reacts with moisture contained in the air and thus corrodes a layer, particularly, a metal layer formed on the wafer. Therefore, a post etch treatment process should be performed to remove the chlorine remaining on the wafer after the wafer bevel region etching process. A wafer edge etching chamber and a post etch treatment chamber are formed in the same cluster so as not to expose the wafer to the atmosphere. In addition, the temperature of the wafer edge etching chamber is lowered after the wafer etching process and the wafer is moved to the post etch treatment chamber. Then, the temperature of the post etch treatment chamber is increased to perform the post etch treatment process. Due to these procedures, the cluster should be configured with a post etch treatment chamber that can be separately heated, resulting in wasting the space of the cluster and increasing manufacturing costs.
<5> Moreover, the conventional wafer bevel region plasma etching process has a low etching rate due to low plasma density, requires a long processing time due to the low etching rate, and cannot etch some layers in the bevel region. In addition, due to a low processing temperature, it is difficult to remove a metal layer from the bevel region of a wafer. Particularly, a copper layer is not readily etched, and although the copper layer is etched, copper ions are not completely removed. Such copper ions remaining on the bevel region of the wafer may react with a underlying anti-diffusion layer, or diffuse into a center portion of the wafer and permeate into, e.g., an interlayer insulation layer, so that the reliability of devices may be deteriorated. [Disclosure] [Technical Problem]
<6> The present invention provides a plasma etching equipment and a method of etching a wafer, which allow a wafer bevel region etching process and a post-processing process to be performed in the same etching equipment by using an existing plasma generating device or a remote plasma generating system.
<7> The present invention also provides a plasma etching equipment and a method of etching a wafer, capable of easily removing a metal layer from the bevel region of a wafer by generating high-density plasma, concentrating the plasma onto the bevel region, and heating the inside of a chamber including a wafer support. <8> The present invention also provides a plasma etching equipment and a method of etching a wafer, which remove a predetermined thickness of layers remaining on the bevel region or etch the layers until the wafer is exposed so as to completely remove copper ions.
[Technical Solution] <9> In accordance with an embodiment of the present invention, a plasma etching equipment includes: a chamber having a plasma reaction compartment configured to be closed; a wafer support disposed inside the chamber and configured to support a wafer and move the wafer vertically, thereby carrying the wafer into or out of the chamber; an etch gas supply unit configured to supply an etch gas into the chamber to etch a certain region of the wafer; a plasma generation unit configured to generate plasma of the etch gas to the chamber; and a heating unit disposed at a wall of the chamber for heating one of the plasma reaction compartment, the wafer and both to a temperature at which a plasma reaction is activated.
<io> The heating unit may be disposed at a given wall or lateral surface of the reaction compartment.
<ii> The plasma etching equipment may further include a wafer support heating unit disposed in the wafer support for heating the wafer support.
<i2> The heating unit may include a heating wire and a power supply configured to supply power to the heating wire.
<13> The temperature at which a plasma reaction is activated may range from room temperature to approximately 350°C .
<i4> The certain region of the wafer may include a bevel region on which a thin layer including a metal layer is formed.
<i5> The wafer may be heated by the heating unit before the plasma is generated.
<16> The metal layer may be one of a copper layer, an aluminum layer, and a tungsten layer.
<i7> The wafer may be heated to the temperature ranging from approximately 250°C to approximately 350°C if the metal layer is the copper layer, from approximately 40°C to approximately 80°C if the metal layer is the aluminum layer, and from approximately 30°C to approximately 50°C if the metal layer is the tungsten layer.
<i8> The plasma etching equipment may further include a remote plasma generation unit configured to excite a post-process gas into a plasma state and supply the plasma-state post-process gas into the chamber.
<i9> The remote plasma generation unit may include a post-process gas tank configured to store the post-process gas, a plasma generator configured to excite the post-process gas into the plasma state, and a power supply configured to supply high-frequency power to the plasma generator of the remote plasma generation unit.
<20> The remote plasma generator may further include a vaporizer configured to vaporize a liquid-state post-process material.
<2i> In accordance with another embodiment of the present invention, a method of etching a wafer includes: placing a wafer on a wafer support in a chamber; supplying an etch gas into the chamber; and etching a predeterimed region of the wafer by generating plasma in the chamber, wherein the wafer is heated before the plasma is generated.
<22> The predetermined region of the wafer may include a bevel region.
<23> The wafer may be heated to the temperature ranging from room temperature to approximately 350°C.
<24> The wafer may be heated by performing one of a process of heating the wafer support, a process of heating the inside of the chamber, and both.
<25> A metal layer and an insulation layer may be stacked on the bevel region.
<26> The method may further include: removing the metal layer from the bevel region; and removing a portion of the insulation layer from the bevel region through a local etching process using plasma so as to remove metal ions or particles remaining in the bevel region.
<27> The insulation layer may be removed by plasma generated using CF4, SF6, O2, and He gases.
<28> The metal layer may be one of a copper layer, an aluminum layer, and a tungsten layer. <29> The copper layer may be etched using CI2 and BCI3 as a reaction gas and
Ar as an inert gas, the aluminum layer may be etched using CI2, BCI3, and O2 as a reaction gas and Ar as an inert gas, and the tungsten layer may be etched using SFQ or NF3 as a reaction gas and Ar as an inert gas.
<30> After etching the predetermined region of the wafer, the method may further include: removing residues from an entire top surface of the wafer using a plasma-state post-process gas in the chamber; and discharging a remaining gas after the residues are removed.
<3i> The plasma-state post-process gas may be generated by performing a remote plasma process.
<32> The post-process gas may be prepared by mixing an inert gas and one of H2O, H2O2, NH3 and a mixed gas of H2 and N2.
[Advantageous Effects]
<34> According to the present invention, by using a plasma generating device already included in a plasma etching equipment used for etching a bevel region of a wafer using plasma, or a remote plasma generating system, a post process for removing chlorine can be performed in the same etching equipment used for a bevel region etching process after the bevel region etching process is performed, so that processing time can be reduced. In addition, a post-process chamber is not required to be included in one cluster, so that the space of the cluster can be saved and manufacturing costs can be reduced.
<35> Moreover, by generating high-density plasma and concentrating uniform, high-density plasma onto the bevel region, the bevel region can be etched more efficiently and metal ions remaining on the bevel region can be completely removed, so that the deterioration of the reliability of devices can be prevented. [Description of Drawings]
<36> FIG. 1 is a schematic cross-sectional view illustrating a plasma etching equipment in accordance with an embodiment of the present invention.
<37> FIG. 2 is a flowchart for explaining a method of etching a wafer using the plasma etching equipment of FIG. 1 in accordance with an embodiment of the present invention.
<38> FIG. 3 is a schematic cross-sectional view illustrating a plasma etching equipment in accordance with another embodiment of the present invention.
<39> FIG. 4 is a flowchart for explaining a method of etching a wafer using the plasma etching equipment of FIG. 3 in accordance with another embodiment of the present invention.
<40> FIG. 5 is a schematic view illustrating a cluster including the plasma etching equipments in accordance with another embodiment of the present invention.
<4i> FIGs. 6 to 10 are cross-sectional views for explaining a bevel region etching method in accordance with an embodiment of the present invention. <42> FIG. 11 is a cross-sectional view for explaining a bevel region etching method in accordance with still another embodiment of the present invention.
<43> FIG. 12 is a plan image of a wafer taken before a bevel region etching process is performed in accordance with an embodiment of the present invention.
<44> FIG. 13 is a plan image of the wafer taken after the bevel region etching process is performed to expose the wafer in accordance with the embodiment of the present invention.
<45> FIG. 14 is a plan image of the wafer taken after a portion of the bevel region of the wafer is etched in accordance with the embodiment of the present invention. [Mode for Invention]
<46> Hereinafter, specific embodiments will be described in detail with reference to the accompanying drawings. The present invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present invention to those skilled in the art.
<47> FIG. 1 is a schematic cross-sectional view illustrating a plasma etching equipment in accordance with an embodiment of the present invention.
<48> Referring to FIG. 1, the plasma etching equipment includes a chamber 100, a shield part 200, a mask part 300, a plasma generator 400, and a wafer support 500. The shield part 200 divides the chamber 100 into a reaction compartment (A) and a separate compartment (D). The mask part 300 is disposed in the reaction compartment (A) of the shield part 200. The plasma generator 400 is disposed in the separate compartment (D) of the shield part 200. The wafer support 500 is disposed under the mask part 300. A center region of a wafer 10 is shielded by the mask part 300 and the wafer support 500, and a bevel region of the wafer 10 is exposed. The plasma etching equipment further includes a faraday shield 600 between the mask part 300 and the plasma generator 400, and an etch gas supply unit 700 configured to supply reaction gas during a bevel region etching process.
<49> The chamber 100 includes a lower chamber 110 having a lower heating unit 112 and an upper chamber 120 having an upper heating unit 122.
<50> The lower chamber 110 includes a lower body 111, the lower heating unit 112, and a penetration opening 113. The lower body 111 has a hollow rectangular box shape. The lower heating unit 112 is disposed in at least a sidewall of the lower body 111. The penetration opening 113 is formed through a top wall of the lower body 111. That is, the lower body 111 is shaped like a rectangular post having rectangular top and bottom surfaces and four sidewalls. However, the lower body 111 is not limited to the rectangular post shape. Alternatively, the lower body 111 can be shaped like a cylinder or polyhedron, and each surface of the lower body 111 can have a polygonal shape. The wafer support 500 configured to support the wafer 10 is vertically moved within an inner space of the lower body 111. A gate valve 130 is disposed on a side of the lower body 111 for loading and unloading the wafer 10. A discharge part 140 is disposed on another side of the lower body 111 for discharging contaminants from the chamber 100. The gate valve 130 is located at a sidewall of the lower body 111. The lower chamber 110 can be connected to another chamber (not shown) through the gate valve 130. The lower heating unit 112 is disposed at a portion of the sidewall of the lower body 111 for heating the chamber 100. The lower heating unit 112 is disposed in the sidewall of the lower body 111. Thus, the lower heating unit 112 can be used to heat the lower body 111, and the inner temperature of the lower body 111 can be stably maintained without being suddenly changed by an external environmental condition since the lower heating unit 112 can control the inner temperature. An electric heater can be used as the lower heating unit 112. The electric heater includes a plurality of heating wires 112a disposed along inner lateral surfaces of the lower body 111 or through the sidewall of the lower body 111, and a power supply 112b configured to supply electricity to the plurality of heating wires 112a. However, the lower heating unit 112 is not limited to the electric heater. For example, a lamp heater may be used as the lower heating unit 112. Since the lower heating unit 112 is disposed on or through the sidewall of the lower body 111, it is possible to intensively heat the bevel region of the wafer 10 from the time of loading the wafer 10. By this, the bevel region of the wafer 10 can be etched more efficiently. Particularly, an undesired metal layer formed on the bevel region of the wafer 10 can be easily removed since the reactivity between the metal layer and reaction gas increases when the bevel region of the wafer 10 is heated. Furthermore, byproducts of the etch reaction are not easily deposited on the bevel region of the wafer 10 again, and thus the byproducts can be easily discharged. The lower heating unit 112 can be disposed at the top and/or bottom wall of the lower body 111. It is preferable that the penetration opening 113 formed through the top wall of the lower body 111 has a diameter greater than that of the wafer 10 to allow the wafer support 500 to move up to the outside of the lower body 111 through the penetration opening 113.
<5i> The upper chamber 120 includes an upper body 121, the upper heating unit 122, and a concave unit 123. The upper body 121 has a rectangular box shape, and the upper heating unit 122 is disposed at the upper body 121. The concave unit 123 is formed in the upper body 121. The upper body 121 can have other shapes. The upper body 121 can have a shape similar to the shape of the lower body 111 of the lower chamber 110. The upper body 121 may be shaped to cover the penetration opening 113 of the lower body 111. That is, the bottom surface of the upper body 121 is in tight contact with the top surface of the lower body 111. The concave unit 123 formed in the upper body 121 communicates with the penetration opening 113 of the lower body 111. For this, the concave unit 123 has an opening at a bottom wall of the upper body 121 and is formed to be recessed toward a top wall of the upper body 121. A diameter of the recess 123 may be greater than the diameter of the penetration opening 113. In this embodiment, the wafer 10 can be disposed in the concave unit 123 by transporting the wafer 10 using the wafer support 500. Therefore, undesired layers or particles can be removed from the bevel region of the wafer 10 by intensivley generating plasma within the concave unit 123. The upper heating unit 122 is disposed at a portion of the periphery of the concave unit 123. For example, the upper heating unit 122 is disposed in a portion of a top wall of the upper body 121. Like the lower heating unit 112 of the lower body 111, the upper heating unit 122 is used to heat the wafer 10 for facilitating plasma reaction in the bevel region of the wafer 10. It is preferable that the heating temperature of the lower and the upper heating units 112 and 122 is approximately 80°C. In accordance with another embodiment, the heating temperature can be in the range of approximately 30°C to approximately 350°C. In the drawing, heating wires are uniformly disposed in the top wall of the upper body 121 as the upper heating unit 122. Alternatively, the heating wires may be mainly disposed at a region corresponding to the wafer bevel region. The upper heating unit 122 may receive power from a power supply (not shown) different from that of the lower heating unit 112. By this, the upper and lower regions of the chamber 100 can be kept at different temperatures. Alternatively, the upper heating unit 122 and the lower heating unit 112 may receive power from the same power supply.
<52> Although it is not shown in the drawing, the chamber 100 further includes a door unit (not shown) as opening/closing means between the upper body 121 of the upper chamber 120 and the lower body 111 of the lower chamber 110. By separately making upper and lower bodies of the chamber 100 and assembling the lower and upper bodies to form the chamber 100, maintenance of the chamber 100 can be performed more easily.
<53> The shield part 200 has a ring shape extending from the top wall of the lower chamber 110 to the top wall of the upper chamber 120 through the inside of the concave unit 123. The shield part 200 is disposed along the periphery of the penetration opening 113 to divide the chamber 100 including the lower and upper chambers 110 and 120 into the separate compartment (D) and the reaction compartment (A). In the reaction compartment (A), the wafer 10 is disposed, and plasma is generated to etch the bevel region of the wafer 10. The separate compartment (D) accommodates a portion of the plasma generator 400. The reaction compartment (A) and the separate compartment (D) may be isolated from each other by the shield part 200. For example, the separate compartment (D) can be kept at atmospheric pressure, and a vacuum can be formed in the reaction compartment (A).
<54> The reaction compartment (A) includes a space formed by the top wall of the upper chamber 120 and the shield part 200 and an inner space of the lower chamber 110. The separate compartment (D) includes a space surrounded by the shield part 200, the top and lateral walls of the upper chamber 120, and the top wall of the lower chamber 110. The shield part 200 may be formed of a material capable of transmitting high-frequency energy for generating plasma therein. For example, the shield part 200 may be formed of an insulation material such as alumina (AI2O3). In this embodiment, after lifting the wafer
10 to the inner region of the shield part 200 using the wafer support 500, the bevel region of the wafer 10 can be etched by generating plasma in the inner region of the shield part 200, i.e., a space between the shield part 200 and the wafer support 500.
<55> The shield part 200 includes a ring-shaped body 210, an upper extension 220 on an upper portion of the body 210, and a lower extension 230 on a lower portion of the body 210. The upper extension 220 is coupled to the top wall of the upper chamber 120, and the lower extension 230 is coupled to the top wall of the lower chamber 110. The body 210 has a ring shape corresponding to the shape of the wafer 10 so that the distance between the shield part 200 and the wafer 10 can be uniform. Therefore, plasma can be uniformly supplied to the bevel region of the wafer 10. The body 210 may have a circular ring shape.
<56> The lower extension 230 is formed at the lower portion of the body 210 to extend outward from the body 210, and the upper extension 220 is formed at the upper portion of the body 210 to extend inward from the body 210. Alternatively, the lower extension 230 can extend inward from the lower portion of the body 210, and the upper extension 220 can extend outward from the upper portion of the body 210. The lower and upper extensions 220 and 230 are in tight contact with the lower chamber 110 and the upper chamber 120, respectively, so that the reaction compartment (A) and the separate compartment (D) can be kept at different pressures. That is, the upper extension 220 and the lower extension 230 function as sealing members for hermetically seal the reaction compartment (A).
<57> The shield part 200 can be fixed to the lower chamber 110 through the lower extension 230 or the upper chamber 120 through the upper extension 220. Sealing members (not shown) such as o-rings can be additionally disposed between the shield part 200 and the lower chamber 110 and between the shield part 200 and the upper chamber 120 so as to securely seal the reaction compartment (A). In the drawing, the shield part 200 is disposed on flat surfaces of the lower chamber 110 and the upper chamber 120. However, the shield part 200 can be disposed on recessed surfaces of the lower chamber 110 and the upper chamber 120. In this case, the reaction compartment (A) can be sealed more reliably. In this embodiment, the shield part 200, the lower chamber 110, and the upper chamber 120 are described as separate parts. However, in another embodiment, the shield part 200, the lower chamber 110, and the upper chamber 120 can be formed in one piece.
<58> The mask part 300 prevents generation of plasma in the non-etch region, i.e., the center region of the wafer 10 disposed on the wafer support 500 so that the non-etch region of the wafer 10 is not etched. For this, the mask part 300 has a shape similar to the shape of the wafer 10. For example, the mask part 300 has a circular plate shape. It is preferable that the mask part 300 has a size smaller than that of the wafer 10. In this case, the bevel region of the wafer 10 can be selectively exposed. For example, the bevel region of the wafer 10 exposed outside the mask part 300 may be approximately 0.1 mm to approximately 5 mm wide. By this, the wafer bevel region where a layer or a semiconductor pattern is not formed can be exposed. That is, if the exposed bevel region of the wafer 10 is less wide than approximately 0.1 mm, the exposed bevel region of the wafer 10 is too small to remove undesired layers or particles from the bevel region of the wafer 10 by plasma etching. If the exposed bevel region of the wafer 10 is greater than approximately 5 mm, layers or patterns formed on the non-etch region (the center region) of the wafer 10 may be exposed. In another embodiment, the mask part 300 may have a size equal to or greater than that of the wafer 10 depending on process conditions. In addition, inert gas can be injected from an inner region of the mask part 300 so as to prevent penetration of plasma-state etch gas into the center region of the wafer 10 disposed inside the mask part 300.
<59> The mask part 300 is disposed in the reaction compartment inside the shield part 200. Furthermore, the mask part 300 is disposed on a bottom surface of the concave unit 123 of the upper chamber 120, that is, on a bottom surface of the top wall of the upper chamber 120. After the mask part 300 is separately formed, the mask part 300 may be attached to the bottom surface of the concave unit 123 using a coupling member. Alternatively, the mask part 300 and the upper chamber 120 may be formed in one piece.
<60> An upper electrode 310 may be disposed on an outside portion of the mask part 300. A ground voltage is applied to the upper electrode 310. Alternatively, the upper electrode 310 can be disposed inside the mask part 300. Instead of forming the upper electrode 310, the mask part 300 can be used as an upper electrode. In this case, an insulation layer can be formed on a predetermined portion of the mask part 300. The upper electrode 310 is used to induce coupling of a bias voltage applied to the wafer support 500 to increase plasma density and an etch rate at the bevel region of the wafer 10.
<6i> The plasma generator 400 includes an antenna part 410 and a plasma power supply 420. The antenna part 410 is disposed in the separate compartment (D) surrounded by the shield part 200, the upper chamber 120, and the lower chamber 110. The antenna part 410 includes at least one coil winding around the shield part 200 N times. In addition, the coil can be wound to be vertically and/or horizontally overlapped, accumulated or crossed. When the wafer 10 is spaced apart from the antenna part 410 by approximately 2 cm to approximately 10 cm, plasma can be efficiently generated at the bevel region of the wafer 10. If the wafer 10 is spaced apart from the antenna part 410 by less than approximately 2 cm, plasma may be applied to the center region of the wafer 10, and thus the center region of the wafer 10 can be undesirably etched. If the wafer 10 is spaced apart from the antenna part 410 by more than approximately 10 cm, it is difficult to obtain sufficient plasma density at the bevel region of the wafer 10.
<62> The plasma power supply 420 supplies power such as radio frequency (RF) power to the antenna part 410. For example, the plasma power supply 420 may supply high-frequency power to the antenna part 410. The plasma power supply 420 may be disposed outside the chamber 100. That is, only the antenna part 410 of the plasma generator 400 may be disposed in the separate compartment (D) of the chamber 100, and other components of the plasma generator 400 may be disposed outside the chamber 100. In this embodiment, since the antenna part 410 is disposed in the separate compartment (D) close to the reaction compartment (A), plasma can be densely generated in a region of the reaction compartment (A) close to the antenna part 410. That is, plasma can be generated in a circular ring shape in the reaction compartment (A) inside the ring-shaped shield part 200. The antenna part 410 can be formed integral with the chamber 100 to simplify the plasma etching equipment and reduce the size of the plasma etching equipment. Power supplied from the plasma power supply 420 to the antenna part 410 may range from approximately 100 W to approximately 3.0 KW. The frequency of power supplied from the plasma power supply 420 to the antenna part 410 may range from approximately 2 MHz to approximately 13.56 MHz.
<63> Plasma is generated in the reaction compartment (A) inside the shield part 200 in response to the power supplied to the antenna part 410. That is, high-density plasma is generated inside the shield part 200 by the power supplied to the antenna part 410. Since the mask part 300 is disposed inside the shield part 200, the generation of plasma is concentrated in a region between the shield part 200 and the mask part 300 and a region between the shield part 200 and the lifted wafer support 500.
<64> As described above, in this embodiment, the antenna part 410 is disposed to enclose the wafer 10 on the wafer support 500 when the wafer support 500 is lifted, and ground electrodes, i.e., the upper electrode 310 and a lower electrode 510, are disposed at upper and lower sides of the antenna part 410. Therefore, high-density plasma can be uniformly generated and concentrated in the bevel region of the wafer 10 so that the bevel region of the wafer 10 can be etched more efficiently.
<65> The plasma generator 400 includes a capacitively coupled plasma (CCP) generator, a hybrid type plasma generator, an electron cyclotron resonance (ECR) plasma generator, or a surface wave plasma (SWP) generator.
<66> A connection hole (not shown) is formed at the upper chamber 120 to connect the plasma power supply 420 and the antenna part 410. A power line can be connected from the plasma power supply 420 through the connection hole to the antenna part 410 disposed in the reaction compartment inside the upper chamber 120. An impedance matching unit (not shown) can be further disposed between the plasma power supply 420 and the antenna part 410. A cooling unit (not shown) can be disposed at a side of the antenna part 410 to prevent the antenna part 410 from being damaged by the heating units 112 and 122 disposed inside the chamber 100.
<67> The faraday shield 600 is disposed on an outer surface of the shield part 200 for concentrating plasma generated inside the shield part 200 into the bevel region of the wafer 10. The faraday shield 600 may be disposed between the shield part 200 and the antenna part 410. The faraday shield 600 prevents concentration of plasma to the coil of the antenna part 410 by the Faraday Effect so that plasma can be uniformly formed inside the chamber 100. Furthermore, the faraday shield 600 prevents etch byproducts and polymers from being deposited mainly on the inner surface of the shield part 200 adjacent to the antenna part 410 by a sputtering phenomenon so that the etch byproducts and polymers can be uniformly deposited in the chamber 100, and thus the growing rate of deposition layers of the byproducts and polymers can be lowered. Therefore, the lifetime of the plasma etching equipment can increase, and the generation of particles due to contaminants accumulated on the inner surface of the chamber can decrease.
<68> The faraday shield 600 may include a ring shaped body and a plurality of vertical slits (not shown) formed in the body. The uniformity of plasma inside the shield part 200 can be controlled by adjusting the width and pitch of the slits. The faraday shield 600 is connected to a ground point of the plasma etching equipment so that when plasma is generated inside the shield part 200, the occurrence of an undesired voltage between the plasma and the coil of the antenna part 410 can be minimized and the plasma can be uniformly distributed throughout the inside of the shield part 200.
<69> An insulation member (not shown) can be disposed between the faraday shield 600 and the antenna part 410. The faraday shield 600 may be spaced a predetermined distance from the coil of the antenna part 410 and disposed outside the shield part 200 for generating plasma.
<70> The wafer support 500 is disposed in the reaction compartment (A) of the chamber 100 for supporting the wafer 10. The wafer support 500 is used to move the wafer 10 loaded into the lower chamber 110 to the concave unit 123 of the upper chamber 120 where the mask part 300 and the shield part 200 are disposed, or to move the wafer 10 from the concave unit 123 of the upper chamber 120 down to the lower chamber 110.
<7i> The wafer support 500 includes a wafer support chuck 520 configured to support the wafer 10, a driving unit 540 configured to vertically move the wafer support chuck 520, and a bias power supply 550 configured to supply bias power to the wafer support chuck 520. The wafer support 500 further includes a lift pin (not shown), and the wafer support chuck 520 includes a penetration hole in which the lift pin moves vertically.
<72> The wafer support chuck 520 has a plate shape corresponding to the shape of the wafer 10 and a size smaller than that of the wafer 10. Therefore, when the wafer 10 is placed on the wafer support chuck 520, a backside bevel region of the wafer 10 can be exposed to plasma. A wafer heating unit 530 is disposed inside the wafer support chuck 520 for heating the wafer 10. The wafer heating unit 530 includes a heating wire 531 disposed inside the wafer support chuck 520, and a power supply 532 for supplying power to the heating wire 531. The heating wires of the wafer heating unit 530 may be disposed densely in an edge region of the wafer support chuck 520. In this case, the bevel region of the wafer 10 placed on the wafer support chuck 520 can be effectively heated, and thus the reactivity of the bevel region of the wafer 10 to the plasma can be increased. The heating temperature of the wafer heating unit 530 may range from approximately 150°C to approximately 550°C. In this embodiment, the wafer heating unit 530 may heat the wafer support chuck 520 to approximately 350°C.
<73> The power supplied from the bias power supply 550 to the wafer support chuck 520 may range from approximately 10 W to approximately 1000 W. A frequency of the power supplied from the bias power supply 550 to the wafer support chuck 520 may range from approximately 2 MHz to approximately 13.56 MHz. The bias power supply 550 supplies bias power to the wafer support chuck 520 to provide bias power to the wafer 10 placed on the wafer support chuck 520. Owing to the bias power, plasma moves to the bevel region of the wafer 10 exposed outside the mask part 300 and the wafer support chuck 520.
<74> The lower electrode 510 may be disposed on an end of the wafer support chuck 520. The lower electrode 510 is grounded. The lower electrode 510 is used to induce coupling of the bias power supplied to the wafer support 500 to increase plasma density and an etch rate at the bevel region of the wafer 10.
<75> Since the bias power is supplied to the wafer support chuck 520, an insulation layer 511 is disposed between the wafer support chuck 520 and the lower electrode 510. The insulation layer 511 may be disposed around the wafer support chuck 520. In this case, the size of the wafer support 500 is determined by the sizes of the wafer support chuck 520 and the insulation layer 511. Therefore, when the wafer 10 is placed on the wafer support 500, the wafer 10 may protrude from an edge of the insulation layer 511 by approximately 0.1 mm to approximately 5 mm. However, when the insulation layer 511 is disposed only between the wafer support chuck 520 and the lower electrode 510, that is, when the insulation layer 511 does not make contact with the wafer 10, the wafer 10 placed on the wafer support 500 may protrude from an edge of the wafer support chuck 520 by approximately 0.1 mm to approximately 5 mm. In another embodiment, the lower electrode 510 may not be formed and thus the insulation layer 511 is also omitted.
<76> The driving unit 540 includes a driving shaft 541 and a driving member 542. The driving shaft 541 extends to inside the chamber 100 for vertically moving the wafer support chuck 520. The driving member 542 actuates the driving shaft 541.
<77> The etch gas supply unit 700 supplies etch gas to a plasma generation region, that is, a region among the shield part 200, the mask part 300, and the wafer support 500. The etch gas supply unit 700 includes a gas injector 710 injecting process gas into the reaction compartment (A) of the chamber 100, a gas pipe 720 supplying the process gas to the injector 710, a gas tank 730 supplying the process gas to the gas pipe 720, and a valve 740 configured to allow and cut off supply of the process gas to the chamber 100. The injector 710 may include a plurality of nozzles disposed in the upper chamber 120 around the mask part 300. Therefore, the process gas can be supplied to the chamber 100 uniformly around the mask part 300. As described above, since the lower heating unit 112 and the upper heating unit 122 are disposed in the chamber 100, the process gas can be heated using the lower heating unit 112 and the upper heating unit 122 before supplying the process gas into the chamber 100.
<78> In another embodiment, the etch gas supply unit 700 can be connected to the plasma generating region of the chamber 100 through the shield part 200. That is, the nozzles of the injector 710 can be uniformly formed in the shield part 200, and the gas pipe 720 can be connected to the nozzles through the upper chamber 120 so as to supply the process gas to the plasma generating region through the shield part 200. <79> A method of etching a wafer using the above-described plasma etching equipment will be described with reference to FIG. 2 in accordance with an exemplary embodiment of the present invention.
<80> In step SIlO, the gate valve 130 disposed on the sidewall of the chamber 100 is opened, and the wafer 10 is introduced into the chamber 100, i.e., into the reaction compartment (A). A metal layer has been formed on the wafer 10 for forming semiconductor devices on the wafer 10 through a certain previous process and thus the metal layer has also been formed on the bevel region of the wafer 10.
<8i> In step S120, the introduced wafer 10 is placed on the wafer support 500. Here, before or during the introducing of the wafer 10, the chamber 100 can be heated up to a predetermined temperature using the lower heating unit 112 and the upper heating unit 122 that are disposed at the chamber 100 and the wafer support 500. The purpose of the heating is to heat the bevel region of the wafer 10 for increasing etch reactivity of the bevel region of the wafer 10. The heating temperature of the chamber 100 may vary according to the material of the chamber 100. In general, the heating temperature may be 100°C or less to prevent thermal deformation of the chamber 100. Thereafter, the gate valve 130 is closed, and the pressure of the reaction compartment (A) of the chamber 100 is adjusted to a desired level. The
-3 pressure of the reaction compartment (A) may be 1x10 Torr or less. Then, the wafer support 500 is moved upward into the concave unit 123 of the upper chamber 120 close to the mask part 300. Here, the distance between the wafer support 500 and the mask part 300 disposed in the concave unit 123 is adjusted to approximately 0.1 mm to approximately 10 mm. In the range, the generation of plasma can be prevented in a region between the mask part 300 and the wafer support 500. Here, the wafer 10, the wafer support 500 and the mask part 300 are formed in a circular shape and centers of the wafer 10, the wafer support 500, and the mask part 300 are aligned. Thus, the bevel region of the wafer 10 can be exposed outside the closely spaced wafer support 500 and mask part 300. The possibility of plasma being generated in a region of the wafer 10 disposed under the mask part 300 can be reduced by decreasing the distance between the mask part 300 and the wafer 10.
<82> In step S130, etch gas including, e.g., chlorine (Cl), is supplied from the gas supply unit 700 to the reaction compartment (A), and the etch gas supplied to the reaction compartment (A) is excited into a plasma state by using the plasma generator 400 so as to produce plasma-state etch gas. That is, high-frequency power is applied to the antenna part 410 disposed at the separate compartment (D), and ground power is applied to the upper electrode 310 disposed at a side of the mask part 300 and the lower electrode 510 disposed at a side of the wafer support 500, thereby generating plasma at a region therebetween, i.e., at a region inside the shield part 200. Here, for example, 2 MHz, 1.5 KW high-frequency power is supplied to the antenna part 410 to generate plasma at the bevel region of the wafer 10. At this time, the process pressure may be kept in the range of approximately 5 mTorr to approximately 500 mTorr. The plasma-state etch gas is uniformly injected along the periphery of the mask part 300, and owing to the faraday shield 600 disposed on the inner surface of the shield part 200, the plasma-state etch gas can be concentrated onto the bevel region. At this time, a bias voltage is applied to the upper electrode 310 disposed around the mask part 300 and the lower electrode 510 disposed around the wafer support 500 in order to remove undesired layers and particles on the bevel region of the wafer 10. For example, 13.56 MHz, 500 W bias power is supplied to the wafer support 500 to etch away undesired layers and particles on the bevel region of the wafer 10 exposed to the plasma. In this embodiment, the wafer 10 can be heated using the heating units disposed on the inner surface or in the sidewall of the chamber 100 and within the wafer support 500. Therefore, even when a metal layer is deposited on the bevel region of the wafer 10, the metal layer can be etched away from the bevel region of the wafer 10 using the plasma after the metal layer is heated. If it is required, the wafer 10 can be heated from the room temperature to a heating temperature of approximately 350°C before the etch process. The heating temperature can vary according to the material deposited on the bevel region of the wafer 10. For example, when copper (Cu) is deposited on the bevel region of the wafer 10, the wafer 10 can be heated to a temperature of approximately 250°C to approximately 350 °C . When aluminum (Al) is deposited on the bevel region of the wafer 10, the wafer 10 can be heated to a temperature of approximately 40°C to approximately 80°C. When tungsten (W) is deposited on the bevel region of the wafer 10, the wafer 10 can be heated to a temperature of approximately 30 °C to approximately 50°C . The heating temperature of the wafer 10 may be kept constant while a material layer is etched away from the bevel region of the wafer 10. In the case where a plurality of material layers are sequentially etched away from the bevel region of the wafer 10, the wafer 10 may be kept constant in a temperature range corresponding to a currently etched material layer, and then the wafer 10 is heated or cooled to a temperature range corresponding to the next material layer and kept constant in that temperature range while the next material layer is etched away. The process gas includes inert gas and reaction gas. The inert gas may be a group 18 element such as argon (Ar) and helium (He), or a gas that does not chemically react with the inner surface of the chamber 100 or the wafer 10 such as nitrogen gas (N2). The reaction gas may be oxygen (O2) based gas or a group 17 element based gas such as chlorine (Cl) based gas and fluorine (F) based gas. Other gases can be used as the reaction gas according to a material to be removed from the bevel region of the wafer 10. Examples of the fluorine (F) based gas include CF4, CHF4, SF6, C2F6, NF3, F2, F2N2, and C4F8.
Examples of the chlorine (Cl) based gas include BCI3 and Cl2. When copper (Cu) is removed from the bevel region of the wafer 10, Cl2 or BCI3 can be used as the reaction gas, and argon (Ar) can be used as the inert gas. When aluminum (Al) is removed from the bevel region of the wafer 10, Cl2, BCI3, or
O2 can be used as the reaction gas, and argon (Ar) can be used as the inert gas. When tungsten (W) is removed from the bevel region of the wafer 10, SF6 or NF3 can be used as the reaction gas, and argon (Ar) can be used as the inert gas. When copper (Cu) is removed from the bevel region of the wafer 10, the reaction gas may be more reactive in a temperature range of approximately 250°C to approximately 350°C . When aluminum (Al) is removed from the bevel region of the wafer 10, the reaction gas may be more reactive in a temperature range of approximately 40°C to approximately 80°C. When tungsten (W) is removed from the bevel region of the wafer 10, the reaction gas may be more reactive in a temperature range of approximately 30°C to approximately 50°C .
<83> In step S140, after the bevel region of the wafer 10 is etched, the plasma generation and the supply of etch gas are terminated, and remaining gas and byproducts are discharged from the chamber 100.
<84> In step S150, the wafer support 500 is moved down to the lower chamber 110. Here, additional gas can be supplied into the chamber 100, and the supply of the high-frequency power to the antenna part 410 can be gradually reduced to maintain the plasma state until the remaining gas is fully discharged or the wafer support 500 is moved down so as to reduce defects and the generation of particles. Thereafter, the gate valve 130 is opened and the wafer 10 is carried out of the chamber 100.
<85> FIG. 3 is a schematic cross-sectional view illustrating a plasma etching equipment in accordance with another embodiment of the present invention.
<86> Referring to FIG. 3, the plasma etching equipment of this embodiment includes a chamber 100, a shield part 200 dividing the inside of the chamber 100 into a reaction compartment (A) and a separate compartment (D), a mask part 300 disposed at the reaction compartment (A) inside the shield part 200, a plasma generator 400 disposed at the separate compartment (D) outside the shield part 200, a wafer support 500 disposed under the mask part 300, a faraday shield 600 disposed between the mask part 300 and the plasma generator 400, and an etch gas supply unit 700 configured to supply reaction gas during a bevel region etch process. The plasma etching equipment further includes a remote plasma generator 800 configured to change a state of reaction gas into a plasma state and supply the plasma-state reaction gas during a post process.
<87> That is, the plasma etching equipment of this embodiment further includes the remote plasma generator 800 as compared with the plasma etching equipment of FIG. 1. Thus, in the following description, the remote plasma generator 800 will be mainly described in detail.
<88> The remote plasma generator 800 is configured to excite post-process gas into a plasma state and supply the plasma-state post-process gas to the front surface of a wafer 10. The remote plasma generator 800 includes a post- process gas tank 810 configured to store the post-process gas, a plasma generator 820 configured to receive the post-process gas from the post- process gas tank 810 and excite the post-process gas into a plasma state, a power supply 830 configured to supply high-frequency power to the plasma generator 820, a gas supply unit 840 configured to supply the plasma-state post-process gas to the inside of the chamber 100 through a gas pipe 720 and an injector 710, and a value 850 configured to control the supply of the plasma-state post-process gas. The plasma-state post-process gas from the plasma generator 820 is supplied to the inside of the chamber 100 through the gas supply unit 840, the gas pipe 720, and the injector 710. At this post process, a wafer support chuck 520 of the wafer support 500 is moved down to the low side of the chamber 100. Thus, the remote plasma supplied from the remote plasma generator 800 can be injected to the front surface of the wafer 10. By this, etch residues such as chlorine can be removed from the front surface of the wafer 10. Instead of the remote plasma generator 800, the plasma etching equipment can use another remote plasma system capable of generating plasma outside the chamber 100 in various methods such as a method using microwaves.
<89> The post-process gas stored in the post-process gas tank 810 includes a mixture gas of H2O, NH3, H2O2, H2, and N2, and H2O and H2O2 are stored in a gas state. In the case where H2O or H2O2 is used as the post-process gas, a vaporizing device (not shown) is additionally provided to vaporize the H2O or H2O2. In addition, an inert gas supply device (not shown) is provided to supply inert gas such as argon (Ar). The inert gas is supplied together with the post-process gas and is excited into a plasma state.
<90> FIG. 4 is a flowchart for explaining a method of etching a wafer using the plasma etching equipment of FIG. 3 in accordance with another embodiment of the present invention. As compared with the wafer etching method of FIG. 2, the wafer etching method of this embodiment further includes, after discharging the etch gas and reaction byproducts in the step S140, a wafer post processing operation S250 using the remote plasma and a reaction byproduct discharging operation S260. That is, the wafer etching method of this embodiment includes a wafer introducing operation S210, a wafer heating and lifting operation S220, a bevel region etching operation S230, an etch gas and reaction byproduct discharging operation S240, the wafer post processing operation S250 using the remote plasma, the reaction byproduct discharging operation S260, and a wafer discharging operation S270. In the following description of this embodiment, the additional operations, i.e., the wafer post processing operation S250 using the remote plasma and the reaction byproduct discharging operation S260, will be mainly described.
<9i> In step S250, in order to remove components of the etch gas such as chlorine (Cl) remaining on the front surface of the wafer 10 after the bevel region of the wafer 10 is etched, the plasma-state post-process gas is supplied to the front surface of the wafer 10 from the remote plasma generator 800. At the same time with or before the supply of the plasma- state post-process gas, the wafer support 500 is moved downward to locate the wafer 10 at the low side of the chamber 100. To supply the plasma-state post-process gas, predetermined power is supplied to the plasma generator 820 from the power supply 830, and the post-process gas is supplied to the plasma generator 820 from the post-process gas tank 810. At this time, for example, approximately 2 MHz, 1.5 KW high-frequency power is supplied from the power supply 830, and the inside of the chamber 100 is kept at a pressure of approximately 5 mTorr to approximately 500 mTorr. The plasma-state post- process gas prepared in this way is injected into the chamber 100 through the gas supply unit 840, the gas pipe 720, and the injector 710. A hydrogen- containing gas such as one of H2O, H2O2, NH3 and a mixed gas of H2 and N2 is mixed with an inert gas and the mixed gas of the hydrogen-containing gas and the inert gas is supplied as the post-process gas. At this time, bias power may be applied to an upper electrode 310 and a lower electrode 510 to facilitate the post processing. The plasma-state, hydrogen-containing, post- process gas supplied in this way reacts with chlorine (Cl) remaining on the wafer 10 and, as a result, HCl is generated. The HCl is in gas phase under a vacuum and high-temperature state.
<92> In step S260, after the post processing operation, plasma generation and post-process gas supply by the remote plasma generator 800 are suspended and gas remaining in the chamber 100, i.e., the HCl gas, is exhausted.
<93> In step S270, a gate valve 130 is opened and the processed wafer 10 is discharged from the chamber 100.
<94> FIG. 5 is a schematic view illustrating a cluster including the plasma etching equipments in accordance with another embodiment of the present invention. The cluster includes a plurality of plasma etching equipments capable of performing both the bevel region etching process and the post process.
<95> Referring to FIG. 5, the cluster of this embodiment includes a plurality of wafer loaders 910, transfer devices 920a and 920b, buffer chambers 930, a transfer chamber 940, and a plurality of plasma etching equipments 950a, 950b, 950c, and 95Od disposed at sidewalls of the transfer chamber 940. Each of the plasma etching equipments 950a, 950b, 950c, and 95Od has the same structure as that illustrated in FIG. 3 and operates in the same manner as that described in FIG. 4 so as to perform both the wafer bevel region etching process and the post process.
<96> The transfer device 920a transfers a wafer from the wafer loader 910 to the buffer chamber 930, and the transfer device 920b disposed at the buffer chamber 940 may transfer the wafer from the buffer chamber 930 sequentially to the plasma etching equipments 950a, 950b, 950c, and 95Od. At the plasma etching equipments 950a, 950b, 950c, and 95Od, the bevel region of the wafer is etched using plasma and residual substances are removed from the wafer using remote plasma.
<97> As described above, the cluster of this embodiment includes the plurality of plasma etching equipments, so that a post processing chamber is not necessary while a conventional cluster includes both a bevel region etching apparatus and a post processing chamber. Therefore, the cluster of this embodiment is advantageous in saving space and reducing manufacturing costs. Furthermore, since the bevel region etching process and the post process are successively performed in one apparatus, processing time can be reduced.
<98> FIGs. 6 to 10 are cross-sectional views for explaining a bevel region etching method in accordance with another exemplary embodiment of the present invention. In FIGs. 6 to 10, a method of forming a copper line using a dual damascene process is taken as an example for explaining a semiconductor device manufacturing method, and reference numerals 20 and 30 denote a chip region and a bevel region, respectively.
<99> Referring to FIG. 6, a first insulation layer 11, an etch stop layer 12, and a second insulation layer 13 are sequentially formed on a top surface of a wafer 10 where a predetermined structure is formed. For example, the etch stop layer 12 may be formed using a silicon nitride layer. The first and second insulation layers 11 and 13 are formed of a material having an etch rate different from that of the etch stop layer 12. For example, the first and second insulation layers 11 and 13 are formed of an oxide-containing material such as TEOS (tetra ethyl ortho silicate). Through a photolithography process using a via hole mask, the second insulation layer 13 is etched and the etch stop layer 12 is exposed. As a result, the first insulation layer 11, the etch stop layer 12, and the second insulation layer 13 are deposited on the front, lateral, back surfaces of the bevel region 30 as well as the front surface of the chip region 20.
<ioo> Referring to FIG. 7, through a photolithography process using a trench mask, a predetermined region of the second insulation layer 13 is etched to form a trench 14 and, at the same time, an exposed region of the first insulation layer 11 is etched to form a via hole 15. As a result, a dual damascene pattern including the trench 14 and the via hole 15 is formed. Here, the first insulation layer 11, the etch stop layer 12, and the second insulation layer 13 remain on the front, lateral, and back surfaces of the bevel region 30.
<ioι> Referring to FIG. 8, an ant i-diffusion layer 16 is formed on the entire surface of the wafer 10. The anti-diffusion layer 16 is formed of Ta, TaN, Ti, TiN, W, or WN. For example, the ant i-diffusion layer 16 is formed by an electroplating method. The anti-diffusion layer 16 may be thicker at the bottoms of the via hole 15 and the trench 14 than at the lateral sides of the via hole 15 and the trench 14, and overhangs may be present at upper corners of the trench 14 and the via hole 15. In this case, nitrogen plasma is generated at the same time with argon sputtering so as to etch the anti- diffusion layer 16 at the bottoms of the trench 14 and the via hole 15 and re-deposit the anti-diffusion layer 16 at the lateral sides of the trench 14 and the via hole 15. By repeating this deposition of the ant i-diffusion layer 16 and the argon sputtering, the thickness of the ant i-diffusion layer 16 can be uniformly controlled across the lateral sides and the bottoms of the trench 14 and the via hole 15. Thereafter, after forming a copper seed layer (not shown) by a chemical vapor deposition (CVD) or physical vapor deposition (PVD) method, a copper layer 17 is formed by an electroplating method. As a result, the ant i-diffusion layer 16 and the copper layer 17 are also formed on the bevel region 30.
<iO2> Referring to FIG. 9, the copper layer 17 and the anti-diffusion layer 16 are planarized by a chemical mechanical polishing (CMP) process until the second insulation layer 13 is exposed. In this way, the copper line is formed at a predetermined region of the chip region 20. Here, the anti- diffusion layer 16 and the copper layer 17 may be partially removed from the bevel region 30.
<iO3> Referring to FIG. 10, the copper layer 17 remaining in the bevel region 30 is removed. The copper layer 17 remaining in the bevel region 30 may be removed using a kind of chemical. Then, the anit-diffusion layer 16 and the second insulation layer 13 in the bevel region 30 are removed using one of the bevel region etching equipments described above. To remove the anti- diffusion layer 16 and the second insulation layer 13, CF4, SFβ, O2, and He gases are introduced into the bevel region etching equipment and predetermined bias power and pressure are applied for a predetermined processing time. This bevel region etching process is performed while varying processing conditions according to the thicknesses of layers deposited on the bevel region 30 within safe processing condition ranges in which the chip region 20 or the wafer is not deformed or damaged.
<iO4> Alternatively, without performing the process of removing the copper layer 17 remaining in the bevel region 30 using the chemical, the copper layer 17, the ant i-diffusion layer 16 and the second insulation layer 13 remaining in the wafer bevel region 30 may be successively removed using the bevel region etching equipment. For this, the bevel region etching equipment including a heating device disposed at a chamber wall may be used.
<iO5> Alternatively, as shown in FIG. 11, after the copper layer 17 remaining in the wafer bevel region 30 is removed, the anti-diffusion layer 16, the second insulation layer 13, the etch stop layer 12, and the first insulation layer 11 may be removed using the bevel region etching equipment so as to expose the wafer 10. To expose the wafer 10 at the bevel region 30 as described above, the process is performed under processing conditions partially different from the processing conditions for removing the anti- diffusion layer 14 and the second insulation layer 13. For example, the process is performed by supplying CF4, SF6, O2, and He gases and then applying predetermined bias power and pressure to the bevel region etching equipment for a processing time longer than the processing time for removing the anti- diffusion layer 16 and the second insulation layer 13. In this case, the process is also preformed as varying processing conditions according to the thicknesses of layers deposited on the bevel region 30 within safe processing condition ranges in which the chip region 20 or the wafer is not deformed or damaged.
<iO6> FIG. 12 is a plan image of a wafer taken before a bevel region etching process is performed in accordance with an embodiment of the present invention; FIG. 13 is a plan image of the wafer taken after the bevel region etching process is performed to expose the wafer in accordance with the embodiment of the present invention; and FIG. 14 is a plan image of the wafer taken after a portion of the bevel region of the wafer is etched in accordance with the embodiment of the present invention. The images of FIGs. 12 to 14 were taken from the right side of the wafer and reference numerals 20, 30, and 40 denote a chip region, a bevel region, and a stage, respectively.
<iO7> To compare states of the wafer before and after the bevel region etching process is performed in accordance with the embodiment of the present invention, as the first insulation layer 11, the etch stop layer 12, and the second insulation layer 13, a TEOS layer, a silicon nitride layer, and a TEOS layer were formed on the wafer to thicknesses of approximately 2000 A, 300 A and 1000 A, respectively. As the ant i-diffusion layer 16, a Ta layer was formed to a thickness of approximately 100 A. Next, a copper layer was formed and then an edge bead remove (EBR) process was performed. The bevel region etching process was performed using one of the above-described bevel region etching equipments for 10 seconds and 20 seconds while supplying CF4,
SFΘ, O2, and He gases to the bevel region etching equipment at flow rates of approximately 90 seem, 90 seem, 20 seem, and 180 seem, respectively, and applying bias power of approximately 600 W and pressure of 1.5 Torr to the bevel region etching equipment. That is, under the same processing conditions, the process was performed for 10 seconds to etch a portion of the bevel region of the wafer and for 20 seconds to expose the wafer at the bevel region.
<i08> Before the bevel region etching process is performed, as shown in Fig. 12, a stacked structure remains in the chip region 20 and an EBR line 40 is present in the bevel region 30 as a result of the copper layer being removed by the EBR process. A reference numeral 60 denotes a curved lateral side region of the bevel region 30. Here, residues such as copper ions exist in the bevel region 30.
<iO9> After the bevel region etching process is partially performed on the bevel region 30, as shown in Fig. 13, the second insulation layer 13 is exposed at a region adjacent to the curved lateral side region 60, i.e, at a region denoted by a reference numeral 80, and the anti-diffusion layer 16 is exposed at a region 70 between the chip region 20 and the exposed region 60 of the second insulation layer 13. In this case, the second insulation layer 13 is also exposed at the curved lateral side region 60. By this partial etching, copper ions remaining on the anti-diffusion layer 16 can be completely removed.
<iio> After the bevel region etching process is performed to expose the wafer at the bevel region 30, as shown in FIG. 14, the wafer is exposed at a region adjacent to the curved lateral side region 60 of the bevel region 30, i.e, at a region denoted by a reference numeral 90, and the anti-diffusion layer 16 and the second insulation layer 13 are exposed at regions 70 and 80 between the chip region 20 and the wafer exposed region 90, respectively. By this bevel region etching process, copper ions remaining in the bevel region 30 can be completely removed.
<iii> In the above-described embodiment, the explanation is given on the bevel region etching process for removing the copper ions remaining on the bevel region 30 after forming the copper layer and performing the EBR process. However, besides removing the copper ions, various layers and particles deposited on the bevel region 30 during a semiconductor manufacturing process can be removed according to the embodiment .
<ii2> In the above-described embodiment, a plasma etching equipment including an inductively coupled plasma (ICP) source and a heating unit is taken as an example. However, the present invention is not limited thereto. The present invention can be applied to various plasma etching equipments for etching a bevel region using plasma.
<ii3> In addition, the present invention can be applied to a plasma etching equipment configured to etch a certain region of a wafer as well as the plasma etching equipment configured to etch the bevel region. [Industrial Applicability]
<ii4> The present invention can be used in a semiconductor device manufacturing process to etch a wafer, for example, the bevel region of the wafer, so as to completely remove layers and particles deposited on the bevel region of the wafer.
<115> <116>

Claims

[CLAIMS] [Claim 1]
<ii8> A plasma etching equipment, comprising:
<ii9> a chamber having a plasma reaction compartment configured to be closed; <i20> a wafer support disposed inside the chamber and configured to support a wafer and move the wafer vertically, thereby carrying the wafer into or out of the chamber; <i2i> an etch gas supply unit configured to supply an etch gas into the chamber to etch a certain region of the wafer; <122> a plasma generation unit configured to generate plasma of the etch gas to the chamber; and
<123> a heating unit disposed at a wall of the chamber for heating one of the plasma reaction compartment, the wafer and both to a temperature at which a plasma reaction is activated.
[Claim 2]
<124> The plasma etching equipment of claim 1, wherein the heating unit is disposed at a given wall or a lateral surface of the reaction compartment.
[Claim 3]
<125> The plasma etching equipment of claim 1, further comprising a wafer support heating unit disposed in the wafer support for heating the wafer support .
[Claim 4] <126> The plasma etching equipment of claim 2 or 3, wherein the heating unit comprises:
<i27> a heating wire! and <128> a power supply configured to supply power to the heating wire.
[Claim 5]
<129> The plasma etching equipment of claim 1, wherein the temperature at which the plasma reaction is activated ranges from room temperature to approximately 350°C.
[Claim 6] <i3o> The plasma etching equipment of claim 1, wherein the certain region of the wafer comprises a bevel region on which a thin layer including a metal layer is formed.
[Claim 7]
<i3i> The plasma etching equipment of claim 6, wherein the wafer is heated by the heating unit before the plasma is generated.
[Claim 8]
<i32> The plasma etching equipment of claim 7, wherein the metal layer is one of a copper layer, an aluminum layer and a tungsten layer.
[Claim 9]
<133> The plasma etching equipment of claim 8, wherein the wafer is heated to the temperature ranging from approximately 250°C to approximately 350°C if the metal layer is the copper layer, from approximately 40°C to approximately 80°C if the metal layer is the aluminum layer, and from approximately 30°C to approximately 50°C if the metal layer is the tungsten layer.
[Claim 10]
<I34> The plasma etching equipment of claim 1, further comprising a remote plasma generation unit configured to excite a post-process gas into a plasma state and supply the plasma-state post-process gas into the chamber.
[Claim 11]
<135> The plasma etching equipment of claim 10, wherein the remote plasma generation unit comprises:
<i36> a post-process gas tank configured to store the post-process gas;
<i37> a plasma generator configured to excite the post-process gas into the plasma state; and
<i38> a power supply configured to supply high-frequency power to the plasma generator of the remote plasma generation unit.
[Claim 12]
<139> The plasma etching equipment of claim 11, wherein the remote plasma generation unit further comprises a vaporizer configured to vaporize a liquid-state post-process material.
[Claim 13]
<i40> A method of etching a wafer, the method comprising: <i4i> placing a wafer on a wafer support in a chamber; <142> supplying an etch gas into the chamber! and <i43> etching a predeterimed region of the wafer by generating plasma in the chamber , <i44> wherein the wafer is heated before the plasma is generated.
[Claim 14]
<145> The method of claim 13, wherein the predetermined region of the wafer comprises a bevel region.
[Claim 15]
<i46> The method of claim 13, wherein the wafer is heated to the temperature ranging from room temperature to approximately 350°C.
[Claim 16]
<i47> The method of claim 15, wherein the wafer is heated by performing one of a process of heating the wafer support, a process of heating the inside of the chamber, and both.
[Claim 17]
<148> The method of claim 14, wherein a metal layer and an insulation layer are stacked on the bevel region.
[Claim 18]
<149> The method of claim 17, further comprising: <i50> removing the metal layer from the bevel region; and
<i5i> removing a portion of the insulation layer from the bevel region through a local etching process using plasma so as to remove metal ions or particles remaining in the bevel region.
[Claim 19]
<152> The method of claim 18, wherein the insulation layer is removed by plasma generated using CF4, SF6, O2, and He gases.
[Claim 20] <153> The method of claim 18, wherein the metal layer is one of a copper layer, an aluminum layer, and a tungsten layer.
[Claim 21] <154> The method of claim 20, wherein the copper layer is etched using CI2 and
BCI3 as a reaction gas and Ar as an inert gas, the aluminum layer is etched using CI2, BCI3, and O2 as a reaction gas and Ar as an inert gas, and the tungsten layer is etched using SFΘ or NF3 as a reaction gas and Ar as an inert gas.
[Claim 22] <i55> The method of claim 13, wherein, after etching the predetermined region of the wafer, the method further comprises: <i56> removing residues from an entire top surface of the wafer using a plasma-state post-process gas in the chamber; and <157> discharging a remaining gas after the residues are removed.
[Claim 23]
<158> The method of claim 22, wherein the plasma-state post-process gas is generated using a remote plasma process.
[Claim 24]
<159> The method of claim 23, wherein the post-process gas is prepared by mixing an inert gas and one of H2O, H2O2, NH3 and a mixed gas of H2 and N2.
PCT/KR2008/004026 2007-07-11 2008-07-09 Plasma etching apparatus and method of etching wafer WO2009008659A2 (en)

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KR1020070069705A KR20090006401A (en) 2007-07-11 2007-07-11 Method of etching a wafer bevel and method of manufacturing a semiconductor device using the same
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KR1020070069704A KR101372356B1 (en) 2007-07-11 2007-07-11 Method for plasma-treatment
KR10-2007-0069704 2007-07-11
KR1020070076695A KR101423554B1 (en) 2007-07-31 2007-07-31 Plasma etching equipment and method of etching a wafer using the same
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