WO2008149496A1 - 情報セキュリティ装置 - Google Patents

情報セキュリティ装置 Download PDF

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Publication number
WO2008149496A1
WO2008149496A1 PCT/JP2008/001252 JP2008001252W WO2008149496A1 WO 2008149496 A1 WO2008149496 A1 WO 2008149496A1 JP 2008001252 W JP2008001252 W JP 2008001252W WO 2008149496 A1 WO2008149496 A1 WO 2008149496A1
Authority
WO
WIPO (PCT)
Prior art keywords
security device
information security
squaring
random number
authentication
Prior art date
Application number
PCT/JP2008/001252
Other languages
English (en)
French (fr)
Inventor
Yuichi Futa
Masao Nonaka
Natsume Matsuzaki
Original Assignee
Panasonic Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corporation filed Critical Panasonic Corporation
Priority to JP2008558132A priority Critical patent/JPWO2008149496A1/ja
Priority to US12/376,494 priority patent/US8265267B2/en
Publication of WO2008149496A1 publication Critical patent/WO2008149496A1/ja

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/723—Modular exponentiation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/002—Countermeasures against attacks on cryptographic mechanisms
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/30—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy
    • H04L9/3006—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy underlying computational problems or public-key parameters
    • H04L9/302—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy underlying computational problems or public-key parameters involving the integer factorization problem, e.g. RSA or quadratic sieve [QS] schemes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/30—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy
    • H04L9/3066—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy involving algebraic varieties, e.g. elliptic or hyper-elliptic curves
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
    • G06F2207/7219—Countermeasures against side channel or fault attacks
    • G06F2207/7261—Uniform execution, e.g. avoiding jumps, or using formulae with the same power profile

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Computer Security & Cryptography (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computational Mathematics (AREA)
  • Algebra (AREA)
  • General Engineering & Computer Science (AREA)
  • Storage Device Security (AREA)

Abstract

　秘密の通信又は認証を行う際に算出されるべき演算の処理の時間を従来よりも小さくすることのできる情報セキュリティ装置を提供することを目的とする。 　対象データＸと秘密の値ｄとからウィンドウ法を用いてべき乗値Ｘ＾ｄを算出することにより、秘密の通信又は認証を行う情報セキュリティ装置であって、べき乗値Ｘ＾ｄを算出する過程において、乗算による演算にて出現した乱数Ｒに対して２乗演算を所定回数、例えば２５６回繰り返した直後の乗算にて、乱数除去数Ｓ（＝Ｒ＾（－２＾２５６））を用いて、乱数Ｒに対する２乗演算による演算結果をキャンセルすることで、従来のキャンセル処理を不要とする。
PCT/JP2008/001252 2007-05-30 2008-05-20 情報セキュリティ装置 WO2008149496A1 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2008558132A JPWO2008149496A1 (ja) 2007-05-30 2008-05-20 情報セキュリティ装置
US12/376,494 US8265267B2 (en) 2007-05-30 2008-05-20 Information security device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007143243 2007-05-30
JP2007-143243 2007-05-30

Publications (1)

Publication Number Publication Date
WO2008149496A1 true WO2008149496A1 (ja) 2008-12-11

Family

ID=40093330

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/001252 WO2008149496A1 (ja) 2007-05-30 2008-05-20 情報セキュリティ装置

Country Status (4)

Country Link
US (1) US8265267B2 (ja)
JP (1) JPWO2008149496A1 (ja)
CN (1) CN101542557A (ja)
WO (1) WO2008149496A1 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016510914A (ja) * 2013-03-15 2016-04-11 クリプトグラフィ リサーチ， インコーポレイテッド 非対称マスク済み乗算
JP6973677B1 (ja) * 2021-03-22 2021-12-01 富士電機株式会社 逆数算出方法、装置、およびプログラム

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8102998B2 (en) * 2007-05-02 2012-01-24 King Fahd University Of Petroleum And Minerals Method for elliptic curve scalar multiplication using parameterized projective coordinates
US8935532B2 (en) * 2010-10-21 2015-01-13 Qumu Corporation Content distribution and aggregation
CN103746804B (zh) * 2014-01-17 2017-01-18 哈尔滨工业大学 基于多参数分数傅里叶变换和星座图加扰的保密通信方法
JP2015136390A (ja) * 2014-01-20 2015-07-30 キヤノン株式会社 制御装置、断層撮影装置
US9264221B2 (en) * 2014-01-31 2016-02-16 Google Inc. Systems and methods for faster public key encryption using the associated private key portion
US9645794B2 (en) * 2014-09-23 2017-05-09 Texas Instruments Incorporated Homogeneous atomic pattern for double, add, and subtract operations for digital authentication using elliptic curve cryptography
US9813232B2 (en) * 2015-03-17 2017-11-07 Cypress Semiconductor Corporation Device and method for resisting non-invasive attacks
CN108242994B (zh) * 2016-12-26 2021-08-13 阿里巴巴集团控股有限公司 密钥的处理方法和装置
WO2018217535A1 (en) * 2017-05-26 2018-11-29 Microchip Technology Incorporated System, method, and apparatus for obfuscating device operations

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006077651A1 (ja) * 2005-01-24 2006-07-27 Fujitsu Limited 電力解析攻撃に対する耐タンパ性を持った暗号化処理装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6408075B1 (en) * 1998-11-30 2002-06-18 Hitachi, Ltd. Information processing equipment and IC card
JP2000165375A (ja) 1998-11-30 2000-06-16 Hitachi Ltd 情報処理装置、ｉｃカード
EP1548687B1 (en) * 2002-12-18 2013-01-09 Fujitsu Limited Tamper-resistant elliptical curve encryption using secret key

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006077651A1 (ja) * 2005-01-24 2006-07-27 Fujitsu Limited 電力解析攻撃に対する耐タンパ性を持った暗号化処理装置

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
KOUICHI ITOH ET AL.: "DPA Countermeasures by Improving the Window Method", CHES2002, LNCS, 2523, 17 April 2003 (2003-04-17), pages 303 - 317, XP001160529 *
MASAHIRO KAMINAGA ET AL.: "Shohi Denryoku Hakei Template o Riyo shita Kogeki Shuho ni Tsuite", PROCEEDINGS OF THE 2003 IEICE CONFERENCE, ENGINEERING SCIENCES SOCIETY, THE INSTITUTE OF ELECTRONICS, INFORMATION AND COMMUNICATION ENGINEERS, 10 September 2003 (2003-09-10), pages 138 *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016510914A (ja) * 2013-03-15 2016-04-11 クリプトグラフィ リサーチ， インコーポレイテッド 非対称マスク済み乗算
JP6973677B1 (ja) * 2021-03-22 2021-12-01 富士電機株式会社 逆数算出方法、装置、およびプログラム
JP2022146258A (ja) * 2021-03-22 2022-10-05 富士電機株式会社 逆数算出方法、装置、およびプログラム

Also Published As

Publication number Publication date
CN101542557A (zh) 2009-09-23
JPWO2008149496A1 (ja) 2010-08-19
US20100177886A1 (en) 2010-07-15
US8265267B2 (en) 2012-09-11

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