Classifications

• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04J—MULTIPLEX COMMUNICATION
  • H04J3/00—Time-division multiplex systems
  • H04J3/02—Details
  • H04J3/06—Synchronising arrangements
  • H04J3/0635—Clock or time synchronisation in a network
  • H04J3/0679—Clock or time synchronisation in a network by determining clock distribution path in a network
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04Q—SELECTING
  • H04Q11/00—Selecting arrangements for multiplex systems
  • H04Q11/0001—Selecting arrangements for multiplex systems using optical switching
  • H04Q11/0062—Network aspects
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04Q—SELECTING
  • H04Q11/00—Selecting arrangements for multiplex systems
  • H04Q11/0001—Selecting arrangements for multiplex systems using optical switching
  • H04Q11/0062—Network aspects
  • H04Q2011/0077—Labelling aspects, e.g. multiprotocol label switching [MPLS], G-MPLS, MPAS
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04Q—SELECTING
  • H04Q11/00—Selecting arrangements for multiplex systems
  • H04Q11/0001—Selecting arrangements for multiplex systems using optical switching
  • H04Q11/0062—Network aspects
  • H04Q2011/0079—Operation or maintenance aspects

Definitions

• a computer readable storage medium comprising computer program code, the computer program code being implemented by a clock source access node, wherein the step of triggering the clock source access node to perform comprises: calculating a clock source access node of the network to other The shortest path tree of the node;
• Embodiment 1 of the present invention is a schematic structural diagram of an example network in Embodiment 1 of the present invention.
• FIG. 2 a network consisting of 8 nodes of nodes 0 to 7 is assumed, using two building integrated clock supply systems (BITS: Building Integrated Timing System ) as external clock sources, namely BITS1 and BITS2.
• BITS1 and BITS2 building integrated clock supply systems
• Node 0 is the access node of BITS1
• node 5 is the access node of BITS2.
• Each node has a topological relationship represented by the line in Fig. 2, and the number on the line represents the path distance, and the larger the number, the farther the distance.
• the SPT calculated by taking node 0 and node 5 as roots is shown in Fig. 3 and Fig. 4 respectively.
• Fig. 3 The SPT calculated by taking node 0 and node 5 as roots is shown in Fig. 3 and Fig. 4 respectively.
• a node belongs to multiple SPTs, it indicates that the node can be connected to multiple clock sources and can track any clock source. To optimize the tracking relationship, while using partial centralized calculation, ensure that each clock source is connected.
• the node obtains the same jurisdiction partition result, and can determine a clock source access node that governs the node for the node belonging to multiple SPTs according to a preset selection rule.
• the following selection rules can be used:
• a node in the network is not in any calculated SPT, it means that the node is separated and disconnected from all clock sources in the network topology, so the node does not belong to any clock source access node "jurisdiction".
• the node performing the calculation may need to be based on the relevant clock source information, including the quality level and priority, etc., and the information may also pass the flood.
• the general approach is issued by the clock source access node to the entire network.
• the method further includes:
• step C4 when receiving updated network topology information and/or clock source information, determining whether the updated network topology information and/or clock source information has an impact on the current clock tracking relationship, and if yes, executing step C5; Otherwise, step C6 is performed;
• the third embodiment of the present invention provides a clock-tracking relationship computing device 10, which is provided in an independent computing node according to the first embodiment of the present invention.
• the clock tracking relationship computing device 10 is provided in an independent computing node. , including:
• the path calculation unit 11 is configured to calculate a shortest path tree of the clock source access node of the network to other nodes;
• the source selecting unit 22 is configured to select, according to the shortest path tree calculated by the path calculating unit 21 and the clock source information corresponding to the shortest path tree, the node that is controlled by the clock source access node;
• the triggering sub-unit 242 is configured to, when the control sub-unit 241 determines YES, re-trigger the path calculation unit to perform calculation of the shortest path tree and the selection by the source selection unit for the node under the control of the clock source access node.

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• Engineering & Computer Science (AREA)
• Computer Networks & Wireless Communication (AREA)
• Signal Processing (AREA)
• Data Exchanges In Wide-Area Networks (AREA)

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Cited By (1)

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Citations (6)

Family Cites Families (6)

• 2007
  • 2007-05-17 CN CN200710107043XA patent/CN101309122B/zh not_active Expired - Fee Related
• 2008
  • 2008-05-16 WO PCT/CN2008/070984 patent/WO2008141574A1/zh active Application Filing
  • 2008-05-16 EP EP08748590A patent/EP2148459B1/en not_active Not-in-force
  • 2008-05-16 ES ES08748590T patent/ES2384537T3/es active Active
• 2009
  • 2009-11-17 US US12/619,895 patent/US20100135189A1/en not_active Abandoned

Patent Citations (7)

Non-Patent Citations (1)

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