WO2008139563A1 - Electronic device and its manufacturing method, and electronic equipment equipped with the electronic device - Google Patents

Electronic device and its manufacturing method, and electronic equipment equipped with the electronic device Download PDF

Info

Publication number
WO2008139563A1
WO2008139563A1 PCT/JP2007/059447 JP2007059447W WO2008139563A1 WO 2008139563 A1 WO2008139563 A1 WO 2008139563A1 JP 2007059447 W JP2007059447 W JP 2007059447W WO 2008139563 A1 WO2008139563 A1 WO 2008139563A1
Authority
WO
WIPO (PCT)
Prior art keywords
electronic device
semiconductor component
manufacturing
electronic
equipment equipped
Prior art date
Application number
PCT/JP2007/059447
Other languages
French (fr)
Japanese (ja)
Inventor
Hideaki Yoshimura
Original Assignee
Fujitsu Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Limited filed Critical Fujitsu Limited
Priority to PCT/JP2007/059447 priority Critical patent/WO2008139563A1/en
Publication of WO2008139563A1 publication Critical patent/WO2008139563A1/en

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0271Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10409Screws
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10734Ball grid array [BGA]; Bump grid array
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2009Reinforced areas, e.g. for a specific part of a flexible printed circuit
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2036Permanent spacer or stand-off in a printed circuit or printed circuit assembly
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0058Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3436Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

An electronic device (100) is characterized in that it comprises a wiring board (120) which is mounted with a semiconductor component (110) via bumps (115) and has a coefficient of thermal expansion different from that of the semiconductor component (110), a load reducing portion (130) which keeps the distance between the semiconductor component (110) and the wiring board (120) and reduces load applied to the bumps (115) of the semiconductor component (110), and a fixing portion (140) for fixing the load reducing portion (130), the semiconductor component (110), and the wiring board (120) to each other.
PCT/JP2007/059447 2007-05-07 2007-05-07 Electronic device and its manufacturing method, and electronic equipment equipped with the electronic device WO2008139563A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/059447 WO2008139563A1 (en) 2007-05-07 2007-05-07 Electronic device and its manufacturing method, and electronic equipment equipped with the electronic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/059447 WO2008139563A1 (en) 2007-05-07 2007-05-07 Electronic device and its manufacturing method, and electronic equipment equipped with the electronic device

Publications (1)

Publication Number Publication Date
WO2008139563A1 true WO2008139563A1 (en) 2008-11-20

Family

ID=40001796

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/059447 WO2008139563A1 (en) 2007-05-07 2007-05-07 Electronic device and its manufacturing method, and electronic equipment equipped with the electronic device

Country Status (1)

Country Link
WO (1) WO2008139563A1 (en)

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0437087A (en) * 1990-05-31 1992-02-07 Toshiba Corp Printed-wiring board device, eyelet therefor and mounting thereof
JPH0686393U (en) * 1993-05-19 1994-12-13 本田技研工業株式会社 Ceramic substrate structure
JPH09213743A (en) * 1996-02-05 1997-08-15 Hitachi Ltd Electronic component and manufacture thereof
JP2000216527A (en) * 1999-01-26 2000-08-04 Nec Corp Electronic component package assembly
JP2001168562A (en) * 1999-12-13 2001-06-22 Toshiba Corp Cooling device of circuit module, and electronic equipment therewith
JP2002246512A (en) * 2001-02-16 2002-08-30 Nec Corp Structure of bga package and structure of mount substrate
JP2003229515A (en) * 2002-02-06 2003-08-15 Nec Saitama Ltd Bga part, method for mounting same and semiconductor device
JP2005026683A (en) * 2003-07-02 2005-01-27 Hewlett-Packard Development Co Lp Method for supporting circuit package and electronic component system

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0437087A (en) * 1990-05-31 1992-02-07 Toshiba Corp Printed-wiring board device, eyelet therefor and mounting thereof
JPH0686393U (en) * 1993-05-19 1994-12-13 本田技研工業株式会社 Ceramic substrate structure
JPH09213743A (en) * 1996-02-05 1997-08-15 Hitachi Ltd Electronic component and manufacture thereof
JP2000216527A (en) * 1999-01-26 2000-08-04 Nec Corp Electronic component package assembly
JP2001168562A (en) * 1999-12-13 2001-06-22 Toshiba Corp Cooling device of circuit module, and electronic equipment therewith
JP2002246512A (en) * 2001-02-16 2002-08-30 Nec Corp Structure of bga package and structure of mount substrate
JP2003229515A (en) * 2002-02-06 2003-08-15 Nec Saitama Ltd Bga part, method for mounting same and semiconductor device
JP2005026683A (en) * 2003-07-02 2005-01-27 Hewlett-Packard Development Co Lp Method for supporting circuit package and electronic component system

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