WO2008129423A3 - Conductive via formation - Google Patents

Conductive via formation Download PDF

Info

Publication number
WO2008129423A3
WO2008129423A3 PCT/IB2008/001612 IB2008001612W WO2008129423A3 WO 2008129423 A3 WO2008129423 A3 WO 2008129423A3 IB 2008001612 W IB2008001612 W IB 2008001612W WO 2008129423 A3 WO2008129423 A3 WO 2008129423A3
Authority
WO
WIPO (PCT)
Prior art keywords
layer
thickening layer
seed layer
via formation
conductive via
Prior art date
Application number
PCT/IB2008/001612
Other languages
French (fr)
Other versions
WO2008129423A2 (en
Inventor
John Trezza
Original Assignee
Cufer Asset Ltd. L.L.C.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cufer Asset Ltd. L.L.C. filed Critical Cufer Asset Ltd. L.L.C.
Priority to CN200880012984A priority Critical patent/CN101663418A/en
Priority to KR1020097023967A priority patent/KR20100023805A/en
Priority to EP08762929A priority patent/EP2142683A2/en
Publication of WO2008129423A2 publication Critical patent/WO2008129423A2/en
Publication of WO2008129423A3 publication Critical patent/WO2008129423A3/en

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601—Process or apparatus
    • C23C18/1603—Process or apparatus coating on selected surface areas
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601—Process or apparatus
    • C23C18/1633—Process of electroless plating
    • C23C18/1646—Characteristics of the product obtained
    • C23C18/165—Multilayered product
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601—Process or apparatus
    • C23C18/1633—Process of electroless plating
    • C23C18/1646—Characteristics of the product obtained
    • C23C18/165—Multilayered product
    • C23C18/1653—Two or more layers with at least one layer obtained by electroless plating and one layer obtained by electroplating
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/18—Pretreatment of the material to be coated
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/31—Coating with metals
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02—Electroplating of selected surface areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76868—Forming or treating discontinuous thin films, e.g. repair, enhancement or reinforcement of discontinuous thin films
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H01L21/76873—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/10—Applying interconnections to be used for carrying current between separate components within a device
    • H01L2221/1068—Formation and after-treatment of conductors
    • H01L2221/1073—Barrier, adhesion or liner layers
    • H01L2221/1084—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H01L2221/1089—Stacks of seed layers

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrochemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

A method involves depositing a first electrically conductive material, using a deposition technique, into a via formed in a material, the via having a diameter at a surface of the material of less than about 10µm and a depth of greater than about 50µm, so as to form a seed layer within the via, then creating a thickening layer on top of the seed layer by electrolessly plating the seed layer with a second electrically conductive material without performing any activation process within the via between via formation and the creating the thickening layer, and then electroplating a conductor metal onto the thickening layer until a volume bounded by the thickening layer within the via is filled with the conductor metal.
PCT/IB2008/001612 2007-04-23 2008-06-19 Conductive via formation WO2008129423A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN200880012984A CN101663418A (en) 2007-04-23 2008-06-19 Conductive via formation
KR1020097023967A KR20100023805A (en) 2007-04-23 2008-06-19 Conductive via formation
EP08762929A EP2142683A2 (en) 2007-04-23 2008-06-19 Conductive via formation

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/738,748 2007-04-23
US11/738,748 US20080261392A1 (en) 2007-04-23 2007-04-23 Conductive via formation

Publications (2)

Publication Number Publication Date
WO2008129423A2 WO2008129423A2 (en) 2008-10-30
WO2008129423A3 true WO2008129423A3 (en) 2009-09-17

Family

ID=39767090

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2008/001612 WO2008129423A2 (en) 2007-04-23 2008-06-19 Conductive via formation

Country Status (5)

Country Link
US (1) US20080261392A1 (en)
EP (1) EP2142683A2 (en)
KR (1) KR20100023805A (en)
CN (1) CN101663418A (en)
WO (1) WO2008129423A2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20110126994A (en) 2010-05-18 2011-11-24 삼성전자주식회사 Semiconductor device and methods for fabricating the same
US9029258B2 (en) * 2013-02-05 2015-05-12 Lam Research Corporation Through silicon via metallization
KR102656701B1 (en) 2018-10-04 2024-04-11 삼성전자주식회사 Methods for manufacturing semiconductor devices

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2285174A (en) * 1993-12-27 1995-06-28 Mitsubishi Electric Corp Via-hole and production method of via-hole
US6136707A (en) * 1999-10-02 2000-10-24 Cohen; Uri Seed layers for interconnects and methods for fabricating such seed layers
US20050009334A1 (en) * 2003-07-07 2005-01-13 Semiconductor Technology Academic Research Center Method of producing multilayer interconnection structure
US20070066081A1 (en) * 2005-09-21 2007-03-22 Chin-Chang Cheng Catalytic activation technique for electroless metallization of interconnects

Family Cites Families (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5399898A (en) * 1992-07-17 1995-03-21 Lsi Logic Corporation Multi-chip semiconductor arrangements using flip chip dies
US5603847A (en) * 1993-04-07 1997-02-18 Zycon Corporation Annular circuit components coupled with printed circuit board through-hole
US5587119A (en) * 1994-09-14 1996-12-24 E-Systems, Inc. Method for manufacturing a coaxial interconnect
US5973396A (en) * 1996-02-16 1999-10-26 Micron Technology, Inc. Surface mount IC using silicon vias in an area array format or same size as die array
US6310484B1 (en) * 1996-04-01 2001-10-30 Micron Technology, Inc. Semiconductor test interconnect with variable flexure contacts
JP2790122B2 (en) * 1996-05-31 1998-08-27 日本電気株式会社 Laminated circuit board
US7052941B2 (en) * 2003-06-24 2006-05-30 Sang-Yun Lee Method for making a three-dimensional integrated circuit structure
JP3176307B2 (en) * 1997-03-03 2001-06-18 日本電気株式会社 Mounting structure of integrated circuit device and method of manufacturing the same
US6620731B1 (en) * 1997-12-18 2003-09-16 Micron Technology, Inc. Method for fabricating semiconductor components and interconnects with contacts on opposing sides
US6075710A (en) * 1998-02-11 2000-06-13 Express Packaging Systems, Inc. Low-cost surface-mount compatible land-grid array (LGA) chip scale package (CSP) for packaging solder-bumped flip chips
US5962922A (en) * 1998-03-18 1999-10-05 Wang; Bily Cavity grid array integrated circuit package
US6222276B1 (en) * 1998-04-07 2001-04-24 International Business Machines Corporation Through-chip conductors for low inductance chip-to-chip integration and off-chip connections
US6380023B2 (en) * 1998-09-02 2002-04-30 Micron Technology, Inc. Methods of forming contacts, methods of contacting lines, methods of operating integrated circuitry, and integrated circuits
US6122187A (en) * 1998-11-23 2000-09-19 Micron Technology, Inc. Stacked integrated circuits
US6316737B1 (en) * 1999-09-09 2001-11-13 Vlt Corporation Making a connection between a component and a circuit board
JP3386029B2 (en) * 2000-02-09 2003-03-10 日本電気株式会社 Flip chip type semiconductor device and manufacturing method thereof
US6446317B1 (en) * 2000-03-31 2002-09-10 Intel Corporation Hybrid capacitor and method of fabrication therefor
JP2001338947A (en) * 2000-05-26 2001-12-07 Nec Corp Flip chip type semiconductor device and its manufacturing method
TW525417B (en) * 2000-08-11 2003-03-21 Ind Tech Res Inst Composite through hole structure
US6720245B2 (en) * 2000-09-07 2004-04-13 Interuniversitair Microelektronica Centrum (Imec) Method of fabrication and device for electromagnetic-shielding structures in a damascene-based interconnect scheme
US6740576B1 (en) * 2000-10-13 2004-05-25 Bridge Semiconductor Corporation Method of making a contact terminal with a plated metal peripheral sidewall portion for a semiconductor chip assembly
JP2002134545A (en) * 2000-10-26 2002-05-10 Oki Electric Ind Co Ltd Semiconductor integrated circuit chip, board and their manufacturing method
US6645060B2 (en) * 2000-12-20 2003-11-11 3M Innovative Properties Company Expandable wheel for supporting an endless abrasive belt
US6512300B2 (en) * 2001-01-10 2003-01-28 Raytheon Company Water level interconnection
US7218349B2 (en) * 2001-08-09 2007-05-15 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US6747347B2 (en) * 2001-08-30 2004-06-08 Micron Technology, Inc. Multi-chip electronic package and cooling system
JP3495727B2 (en) * 2001-11-07 2004-02-09 新光電気工業株式会社 Semiconductor package and manufacturing method thereof
US6599778B2 (en) * 2001-12-19 2003-07-29 International Business Machines Corporation Chip and wafer integration process using vertical connections
US6590278B1 (en) * 2002-01-08 2003-07-08 International Business Machines Corporation Electronic package
US6770822B2 (en) * 2002-02-22 2004-08-03 Bridgewave Communications, Inc. High frequency device packages and methods
US7135777B2 (en) * 2002-05-03 2006-11-14 Georgia Tech Research Corporation Devices having compliant wafer-level input/output interconnections and packages using pillars and methods of fabrication thereof
US6939789B2 (en) * 2002-05-13 2005-09-06 Taiwan Semiconductor Manufacturing Co., Ltd. Method of wafer level chip scale packaging
SG111069A1 (en) * 2002-06-18 2005-05-30 Micron Technology Inc Semiconductor devices including peripherally located bond pads, assemblies, packages, and methods
JP3679786B2 (en) * 2002-06-25 2005-08-03 松下電器産業株式会社 Manufacturing method of semiconductor device
ITTO20030269A1 (en) * 2003-04-08 2004-10-09 St Microelectronics Srl PROCEDURE FOR THE MANUFACTURE OF A DEVICE
US6897148B2 (en) * 2003-04-09 2005-05-24 Tru-Si Technologies, Inc. Electroplating and electroless plating of conductive materials into openings, and structures obtained thereby
US20050046034A1 (en) * 2003-09-03 2005-03-03 Micron Technology, Inc. Apparatus and method for high density multi-chip structures
US7345350B2 (en) * 2003-09-23 2008-03-18 Micron Technology, Inc. Process and integration scheme for fabricating conductive components, through-vias and semiconductor components including conductive through-wafer vias
US20050104027A1 (en) * 2003-10-17 2005-05-19 Lazarev Pavel I. Three-dimensional integrated circuit with integrated heat sinks
US7265038B2 (en) * 2003-11-25 2007-09-04 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming a multi-layer seed layer for improved Cu ECP
US7276787B2 (en) * 2003-12-05 2007-10-02 International Business Machines Corporation Silicon chip carrier with conductive through-vias and method for fabricating same
US7230318B2 (en) * 2003-12-24 2007-06-12 Agency For Science, Technology And Research RF and MMIC stackable micro-modules
US7157310B2 (en) * 2004-09-01 2007-01-02 Micron Technology, Inc. Methods for packaging microfeature devices and microfeature devices formed by such methods
DE102006001253B4 (en) * 2005-12-30 2013-02-07 Advanced Micro Devices, Inc. A method of forming a metal layer over a patterned dielectric by wet-chemical deposition with an electroless and a power controlled phase

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2285174A (en) * 1993-12-27 1995-06-28 Mitsubishi Electric Corp Via-hole and production method of via-hole
US6136707A (en) * 1999-10-02 2000-10-24 Cohen; Uri Seed layers for interconnects and methods for fabricating such seed layers
US20050009334A1 (en) * 2003-07-07 2005-01-13 Semiconductor Technology Academic Research Center Method of producing multilayer interconnection structure
US20070066081A1 (en) * 2005-09-21 2007-03-22 Chin-Chang Cheng Catalytic activation technique for electroless metallization of interconnects

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
J-J. SUN ET AL: "High-Aspect-Ratio Copper Via Filling Used for Three-Dimensional Chip Stacking", JOURNAL OF THE ELECTROCHEMICAL SOCIETY, vol. 150, no. 6, 28 April 2003 (2003-04-28), pages G355 - G358, XP002538042 *

Also Published As

Publication number Publication date
WO2008129423A2 (en) 2008-10-30
KR20100023805A (en) 2010-03-04
US20080261392A1 (en) 2008-10-23
EP2142683A2 (en) 2010-01-13
CN101663418A (en) 2010-03-03

Similar Documents

Publication Publication Date Title
WO2011066055A3 (en) Formation of electrically conductive pattern by surface energy modification
EP2367967A1 (en) Surface metalizing method, method for preparing plastic article and plastic article made therefrom
WO2009063744A1 (en) Method for producing metal nanowire, metal nanowire and transparent conductor
WO2011153095A3 (en) Metal gate structures and methods for forming thereof
TW200736415A (en) Electroform, methods of making electroforms, and products made from electroforms
WO2011156349A3 (en) Methods for forming interconnect structures
EP1887107A3 (en) A method of forming a component on a substrate
WO2009054371A1 (en) Method for formation of metal coating film, and electrically conductive particle
EP2562294A3 (en) Plating bath and method
WO2010059857A3 (en) Bottom up plating by organic surface passivation and differential plating retardation
WO2008118222A3 (en) Selective electroless deposition for solar cells
PH12015500543A1 (en) Method for metallization of solar cell substrates
WO2008027856A3 (en) Multi-phase coatings for inhibiting tin whisker growth and methods of making and using the same
WO2012004137A3 (en) Method to form solder deposits on substrates
TW200746199A (en) Laminated electronic component and method for manufacturing the same
EP2366686A3 (en) Copper electroplating bath and method
WO2003014426A1 (en) Method for producing electroconductive particles
CA2886690A1 (en) Method for manufacturing hot-dip zn alloy-plated steel sheet
PL2145986T3 (en) Solution and method for electrochemically depositing a metal on a substrate
WO2008029376A3 (en) Deposition of conductive polymer and metallization of non-conductive substrates
TW200737474A (en) Leadframe comprising tin plating or an intermetallic layer formed therefrom
WO2009133969A3 (en) Method of producing circuit board by additive method, and circuit board and multilayer circuit board obtained by the method
DE602006011335D1 (en) METHOD FOR PRODUCING PATTERN-BASED METAL STRUCTURES ON A SUPPORTING SUBSTRATE
WO2010057652A8 (en) Nanowires on substrate surfaces, method for producing same and use thereof
WO2008048925A3 (en) Wafer via formation

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 200880012984.8

Country of ref document: CN

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 08762929

Country of ref document: EP

Kind code of ref document: A2

WWE Wipo information: entry into national phase

Ref document number: 2010504905

Country of ref document: JP

NENP Non-entry into the national phase

Ref country code: DE

WWE Wipo information: entry into national phase

Ref document number: 2008762929

Country of ref document: EP

ENP Entry into the national phase

Ref document number: 20097023967

Country of ref document: KR

Kind code of ref document: A