WO2008120342A1 - 電子機器およびプリント基板ユニット - Google Patents

電子機器およびプリント基板ユニット Download PDF

Info

Publication number
WO2008120342A1
WO2008120342A1 PCT/JP2007/056802 JP2007056802W WO2008120342A1 WO 2008120342 A1 WO2008120342 A1 WO 2008120342A1 JP 2007056802 W JP2007056802 W JP 2007056802W WO 2008120342 A1 WO2008120342 A1 WO 2008120342A1
Authority
WO
WIPO (PCT)
Prior art keywords
terminal
electronic part
signal
transmitted
electronic device
Prior art date
Application number
PCT/JP2007/056802
Other languages
English (en)
French (fr)
Inventor
Rikizo Nakano
Original Assignee
Fujitsu Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Limited filed Critical Fujitsu Limited
Priority to PCT/JP2007/056802 priority Critical patent/WO2008120342A1/ja
Publication of WO2008120342A1 publication Critical patent/WO2008120342A1/ja

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/117Pads along the edge of rigid circuit boards, e.g. for pluggable connectors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09218Conductive traces
    • H05K2201/09254Branched layout
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/0949Pad close to a hole, not surrounding the hole
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/0979Redundant conductors or connections, i.e. more than one current path between two points
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15Position of the PCB during processing
    • H05K2203/1572Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Endoscopes (AREA)

Abstract

 第1電子部品(23)および第2電子部品(22)の間で信号がやり取りされる。例えば第1電子部品(23)から第2電子部品(22)に向かって信号が伝送される。第1電子部品(23)から出力される信号は第1単線配線パターン(29a)から第1複線配線パターン(29b)に伝送される。信号は第1端子(25)から第2端子(27)を介して第2複線配線パターン(28b)に出力される。その後、信号は第1単線配線パターン(28a)を介して第2電子部品(22)に伝送される。こうして信号は2組の第1端子(25)および第2端子(27)を介して並列に伝送される。たとえ一方の第1端子(25)および第2端子(27)の間で接触不良が発生しても、他方の第1端子(25)および第2端子(27)に基づき信号の伝送は継続される。電子機器(11)では致命的なエラーの発生は抑制される。
PCT/JP2007/056802 2007-03-29 2007-03-29 電子機器およびプリント基板ユニット WO2008120342A1 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/056802 WO2008120342A1 (ja) 2007-03-29 2007-03-29 電子機器およびプリント基板ユニット

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/056802 WO2008120342A1 (ja) 2007-03-29 2007-03-29 電子機器およびプリント基板ユニット

Publications (1)

Publication Number Publication Date
WO2008120342A1 true WO2008120342A1 (ja) 2008-10-09

Family

ID=39807935

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/056802 WO2008120342A1 (ja) 2007-03-29 2007-03-29 電子機器およびプリント基板ユニット

Country Status (1)

Country Link
WO (1) WO2008120342A1 (ja)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0536455A (ja) * 1991-07-31 1993-02-12 Fujitsu Ten Ltd 電子回路基板のコネクタ接続機構
JP2002324959A (ja) * 2001-04-24 2002-11-08 Furukawa Electric Co Ltd:The 基板の端子接続構造
JP2004152131A (ja) * 2002-10-31 2004-05-27 Elpida Memory Inc メモリモジュール、メモリチップ、及びメモリシステム

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0536455A (ja) * 1991-07-31 1993-02-12 Fujitsu Ten Ltd 電子回路基板のコネクタ接続機構
JP2002324959A (ja) * 2001-04-24 2002-11-08 Furukawa Electric Co Ltd:The 基板の端子接続構造
JP2004152131A (ja) * 2002-10-31 2004-05-27 Elpida Memory Inc メモリモジュール、メモリチップ、及びメモリシステム

Similar Documents

Publication Publication Date Title
WO2009007286A3 (de) Anschlusseinheit für eine druckmesszelle
WO2009143293A3 (en) Transceiver module with dual printed circuit boards
WO2007050429A3 (en) Array interconnect for improved directivity
WO2006110526A3 (en) Orthogonal backplane connector
WO2013036865A3 (en) Via structure for transmitting differential signals
ATE405010T1 (de) Leiterplattensteckverbinder für differenzielle signalübertragung
TW200742163A (en) Differential layout
WO2005081595A3 (en) Preferential assymmetrical via positioning for printed circuit boards
WO2007005598A3 (en) Electrical connector for interconnection assembly
WO2009028683A1 (ja) 電子部品
WO2008157143A3 (en) Edge connection structure for printed circuit boards
WO2006138301A3 (en) Electronic signal splitters
EP2012571A3 (en) Connection structure between printed circuit board and electronic component
WO2007010182A8 (en) Optical network monitor pcb
TW200610110A (en) LSI package possessing interface function with exterior, circuit device including the same, and manufacturing method of circuit device
WO2007089885A3 (en) Passive impedance equalization of high speed serial links
TW200708239A (en) Electronic system
US7764068B2 (en) Test board for testing PCBS
WO2007081928A3 (en) 360 degree viewable light emitting apparatus
TW200710810A (en) Signal transmission circuit, electro-optical device, and electronic apparatus
HK1158382A1 (en) Plug connector for circuit boards
GB2444294B (en) Camera module and assembling process thereof
WO2008135142A3 (de) Verfahren zur herstellung einer leiterplatte mit einer kavität für die integration von bauteilen und leiterplatte und anwendung
WO2008120342A1 (ja) 電子機器およびプリント基板ユニット
WO2003096777A3 (en) Adapter for surface mount devices to through hole applications

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 07740240

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 07740240

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: JP