WO2008111267A1 - 接続構造体および情報処理装置 - Google Patents

接続構造体および情報処理装置 Download PDF

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Publication number
WO2008111267A1
WO2008111267A1 PCT/JP2007/072729 JP2007072729W WO2008111267A1 WO 2008111267 A1 WO2008111267 A1 WO 2008111267A1 JP 2007072729 W JP2007072729 W JP 2007072729W WO 2008111267 A1 WO2008111267 A1 WO 2008111267A1
Authority
WO
WIPO (PCT)
Prior art keywords
cards
connection structure
information processing
processing device
housing
Prior art date
Application number
PCT/JP2007/072729
Other languages
English (en)
French (fr)
Inventor
Ichiro Hatakeyama
Shigeyuki Yanagimachi
Youichi Hidaka
Ichiro Ogura
Original Assignee
Nec Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corporation filed Critical Nec Corporation
Priority to US12/526,335 priority Critical patent/US20100321902A1/en
Priority to CN2007800520930A priority patent/CN101641624B/zh
Priority to JP2009503890A priority patent/JPWO2008111267A1/ja
Publication of WO2008111267A1 publication Critical patent/WO2008111267A1/ja

Links

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/43—Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16—Constructional details or arrangements
    • G06F1/18—Packaging or power distribution
    • G06F1/183—Internal mounting support structures, e.g. for printed circuit boards, internal connecting means
    • G06F1/186—Securing of expansion boards in correspondence to slots provided at the computer enclosure
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16—Constructional details or arrangements
    • G06F1/18—Packaging or power distribution
    • G06F1/189—Power distribution

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Computer Hardware Design (AREA)
  • Optics & Photonics (AREA)
  • Mounting Of Printed Circuit Boards And The Like (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Mechanical Coupling Of Light Guides (AREA)

Abstract

　本発明は、回路基板上に電子部品が実装されてなる複数のＣＰＵカード６、スイッチカード７が挿脱される複数の挿脱口１１ａ，１２ａを有する筐体１０と、各カード６，７が電気的に接続されるバックプレーン１３と、各カード６，７がバックプレーン１３に電気的に接続された状態で挿脱口１１ａ，１２ａから筐体１０の外部に臨ませるように各カード６，７に配置されている光コネクタ１６と光学的に接続される光配線板１４とを備える。
PCT/JP2007/072729 2007-03-09 2007-11-26 接続構造体および情報処理装置 WO2008111267A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
US12/526,335 US20100321902A1 (en) 2007-03-09 2007-11-26 Connection structure and information processing apparatus
CN2007800520930A CN101641624B (zh) 2007-03-09 2007-11-26 连接结构和信息处理设备
JP2009503890A JPWO2008111267A1 (ja) 2007-03-09 2007-11-26 接続構造体および情報処理装置

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-060407 2007-03-09
JP2007060407 2007-03-09

Publications (1)

Publication Number Publication Date
WO2008111267A1 true WO2008111267A1 (ja) 2008-09-18

Family

ID=39759211

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/072729 WO2008111267A1 (ja) 2007-03-09 2007-11-26 接続構造体および情報処理装置

Country Status (4)

Country Link
US (1) US20100321902A1 (ja)
JP (1) JPWO2008111267A1 (ja)
CN (1) CN101641624B (ja)
WO (1) WO2008111267A1 (ja)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002258064A (ja) * 2001-03-05 2002-09-11 Nippon Telegr & Teleph Corp <Ntt> 光ファイバ配線板およびこれを使用する配線方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11113033A (ja) * 1997-10-03 1999-04-23 Nippon Telegr & Teleph Corp <Ntt> 装置実装構造
US6144561A (en) * 1998-12-01 2000-11-07 Scientific-Atlanta, Inc. Connectorization panel assembly for circuit board housing rack
US6582133B2 (en) * 2001-05-30 2003-06-24 Tropic Networks Inc. Module and method for interconnecting optoelectronic cards
US6533463B2 (en) * 2001-07-31 2003-03-18 Pluris, Inc. Adjustable and modular backplane assembly for providing a fiber-optics communication backplane
US6822874B1 (en) * 2002-11-12 2004-11-23 Wooshcom Corporation Modular high availability electronic product architecture with flexible I/O
DE10335036A1 (de) * 2003-08-01 2005-03-03 Siemens Ag Modulares System
US7083422B2 (en) * 2004-04-13 2006-08-01 Intel Corporation Switching system
US20090148116A1 (en) * 2004-11-18 2009-06-11 Nec Corporation Communication apparatus for communication between housing slots, wiring change unit and wiring method
US7326067B2 (en) * 2005-10-18 2008-02-05 Vadatech Inc. Method and apparatus for minimizing the installation height of electrical components

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002258064A (ja) * 2001-03-05 2002-09-11 Nippon Telegr & Teleph Corp <Ntt> 光ファイバ配線板およびこれを使用する配線方法

Also Published As

Publication number Publication date
CN101641624A (zh) 2010-02-03
CN101641624B (zh) 2011-07-06
US20100321902A1 (en) 2010-12-23
JPWO2008111267A1 (ja) 2010-06-24

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