WO2008078591A1 - カレントミラー回路 - Google Patents

カレントミラー回路 Download PDF

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Publication number
WO2008078591A1
WO2008078591A1 PCT/JP2007/074229 JP2007074229W WO2008078591A1 WO 2008078591 A1 WO2008078591 A1 WO 2008078591A1 JP 2007074229 W JP2007074229 W JP 2007074229W WO 2008078591 A1 WO2008078591 A1 WO 2008078591A1
Authority
WO
WIPO (PCT)
Prior art keywords
transistor
mirror circuit
current mirror
base
current
Prior art date
Application number
PCT/JP2007/074229
Other languages
English (en)
French (fr)
Inventor
Fuminori Hashimoto
Original Assignee
Sanyo Electric Co., Ltd.
Sanyo Semiconductor Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd. filed Critical Sanyo Electric Co., Ltd.
Priority to US12/376,133 priority Critical patent/US20090315618A1/en
Publication of WO2008078591A1 publication Critical patent/WO2008078591A1/ja

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26—Current mirrors
    • G05F3/267—Current mirrors using both bipolar and field-effect technology
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/34—DC amplifiers in which all stages are DC-coupled
    • H03F3/343—DC amplifiers in which all stages are DC-coupled with semiconductor devices only

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)
  • Control Of Electrical Variables (AREA)

Abstract

【課題】カレントミラー回路の精度を向上する。 【解決手段】ベース・コレクタ間が短絡されたトランジスタＱ１と、トランジスタＱ１のベースにベースが接続されたトランジスタＱ２とを含み、トランジスタＱ１のコレクタにゲートが接続され、ソースが第１および第２トランジスタのベースに接続され、ドレインが電源に接続されたＭＯＳ型の補償トランジスタを有する。これによって、トランジスタＱ１に流れる電流に応じた電流をトランジスタＱ２に流すが、補償トランジスタＱ５には、ベース電流が不要となる。
PCT/JP2007/074229 2006-12-27 2007-12-17 カレントミラー回路 WO2008078591A1 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US12/376,133 US20090315618A1 (en) 2006-12-27 2007-12-17 Current mirror circuit

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2006351119A JP2008166905A (ja) 2006-12-27 2006-12-27 カレントミラー回路
JP2006-351119 2006-12-27

Publications (1)

Publication Number Publication Date
WO2008078591A1 true WO2008078591A1 (ja) 2008-07-03

Family

ID=39562385

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/074229 WO2008078591A1 (ja) 2006-12-27 2007-12-17 カレントミラー回路

Country Status (3)

Country Link
US (1) US20090315618A1 (ja)
JP (1) JP2008166905A (ja)
WO (1) WO2008078591A1 (ja)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9563223B2 (en) 2015-05-19 2017-02-07 Avago Technologies General Ip (Singapore) Pte. Ltd. Low-voltage current mirror circuit and method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02290311A (ja) * 1989-04-29 1990-11-30 Nec Corp 定電流回路
JPH03244207A (ja) * 1990-02-20 1991-10-31 Precision Monolithics Inc ベース電流補償を備えた電流ミラー
JPH11284448A (ja) * 1998-03-31 1999-10-15 Nec Corp 差動増幅器

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3500322B2 (ja) * 1999-04-09 2004-02-23 シャープ株式会社 定電流駆動装置および定電流駆動半導体集積回路

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02290311A (ja) * 1989-04-29 1990-11-30 Nec Corp 定電流回路
JPH03244207A (ja) * 1990-02-20 1991-10-31 Precision Monolithics Inc ベース電流補償を備えた電流ミラー
JPH11284448A (ja) * 1998-03-31 1999-10-15 Nec Corp 差動増幅器

Also Published As

Publication number Publication date
US20090315618A1 (en) 2009-12-24
JP2008166905A (ja) 2008-07-17

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