WO2008069174A1 - Surface-emitting device - Google Patents

Surface-emitting device Download PDF

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Publication number
WO2008069174A1
WO2008069174A1 PCT/JP2007/073319 JP2007073319W WO2008069174A1 WO 2008069174 A1 WO2008069174 A1 WO 2008069174A1 JP 2007073319 W JP2007073319 W JP 2007073319W WO 2008069174 A1 WO2008069174 A1 WO 2008069174A1
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WO
WIPO (PCT)
Prior art keywords
light emitting
electrode
emitting device
planar light
emitting layer
Prior art date
Application number
PCT/JP2007/073319
Other languages
French (fr)
Japanese (ja)
Inventor
Eiichi Satoh
Shogo Nasu
Reiko Taniguchi
Toshiyuki Aoyama
Masayuki Ono
Kenji Hasegawa
Masaru Odagiri
Original Assignee
Panasonic Corporation
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Publication of WO2008069174A1 publication Critical patent/WO2008069174A1/en

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    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09K—MATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
    • C09K11/00—Luminescent, e.g. electroluminescent, chemiluminescent materials
    • C09K11/08—Luminescent, e.g. electroluminescent, chemiluminescent materials containing inorganic luminescent materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/16—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
    • H01L33/18—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous within the light emitting region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/28—Materials of the light emitting region containing only elements of Group II and Group VI of the Periodic Table

Definitions

  • the present invention relates to a planar light emitting device using an electoric luminescence element (hereinafter abbreviated as EL).
  • EL electoric luminescence element
  • a display device using this EL element has features such as self-luminous property, excellent visibility, wide viewing angle, and quick response.
  • currently developed EL devices include inorganic EL devices that use inorganic materials as light emitters and organic EL devices that use organic materials as light emitters.
  • inorganic EL elements for example, an inorganic phosphor such as zinc sulfide is used as a light emitter, and electrons accelerated by a high electric field of 10 6 V / cm collide and excite the emission center of the phosphor to relax them. When it emits light.
  • inorganic EL elements have a light-emitting layer in which phosphor powder is dispersed in a polymer organic material, etc., and two layers between the pair of electrodes.
  • a thin-film EL element provided with a dielectric layer and a thin-film light emitting layer sandwiched between two dielectric layers.
  • the former distributed EL element is easy to manufacture, but its use has been limited due to its low brightness and short lifetime.
  • the double insulation structure element proposed by Higuchi et al. In 1974 showed high brightness and long life, and was put into practical use for in-vehicle displays (for example, And Patent Document 1).
  • FIG. 37 is a cross-sectional view perpendicular to the light emitting surface of the thin-film EL element 50 having a double insulation structure.
  • This EL element 50 has a structure in which a transparent electrode 52, a first dielectric layer 53, a light emitting layer 54, a second dielectric layer 55, a back electrode 56 and 1S are laminated in this order on a substrate 51. Yes.
  • An AC voltage is applied from the AC voltage source 57 between the transparent electrode 52 and the back electrode 56 to extract light emission from the transparent electrode 52 side.
  • the dielectric layers 53 and 55 have a function of limiting the current flowing in the light emitting layer 54, and prevent dielectric breakdown of the EL element 50.
  • the transparent electrode 52 and the back electrode 56 are patterned on the stripe so as to be orthogonal to each other, and a voltage is applied to a specific pixel selected by the matrix, thereby performing a passive matrix that displays an arbitrary pattern.
  • Drive-type display devices are known.
  • the dielectric material used as the dielectric layers 53 and 55 has a high dielectric constant, high insulation resistance, and high withstand voltage.
  • Dielectric material with perovskite structure such as iO, PbTiO, CaTiO, Sr (Zr, Ti) 0
  • the inorganic fluorescent material used as the light-emitting layer 54 is generally a material in which an insulator crystal is used as a base crystal and an element serving as a light emission center is doped therein. Since this host crystal is physically and chemically stable, inorganic EL devices are highly reliable and have a lifetime of more than 30,000 hours.
  • the emission luminance is improved by doping the light emitting layer mainly with ZnS and doping with transition metal elements such as Mn, Cr, Tb, Eu, Tm, and Yb or rare earth elements (for example, patents). (Ref. 2).
  • a Group 12-Group 16 compound semiconductor such as ZnS used for the light-emitting layer 54 is composed of a polycrystal. Therefore, many crystal grain boundaries exist in the light emitting layer 54. This grain boundary acts as a scatterer for electrons accelerated by the application of an electric field, so that the excitation efficiency of the emission center is significantly reduced. In addition, there are many non-radiative recombination centers that are harmful to EL emission due to large lattice distortions due to misalignment of crystal orientation at the grain boundaries. For these reasons, the light emission luminance of inorganic EL elements is low and practically insufficient.
  • Patent Document 2 Japanese Patent Publication No. 54-8080
  • Patent Document 3 Japanese Patent Laid-Open No. 6-36876
  • Patent Document 4 JP-A-6-196262
  • the inorganic EL element as described above is used as a backlight for a high-quality display device such as a television, a luminance of about 300 cd / m 2 is required.
  • the light emission luminance of 150 cd / m 2 is still insufficient.
  • there are problems such as the need to apply an AC voltage at a high frequency of several tens of kHz.
  • An object of the present invention is to provide a planar light emitting device using a light emitting element having a long lifetime and high light emission luminance.
  • a planar light emitting device includes a substrate,
  • a planar back electrode provided on the substrate
  • a planar transparent electrode provided facing the back electrode
  • At least one planar light-emitting layer sandwiched between the back electrode and the transparent electrode;
  • the light emitting layer has a polycrystalline structure made of a first semiconductor material, and a second semiconductor material different from the first semiconductor material is segregated at a grain boundary of the polycrystalline structure.
  • a planar light emitting device includes a first electrode and a second electrode respectively provided on two parallel virtual planes facing each other;
  • a light emitting layer provided between the first and second electrodes
  • the light emitting layer has a polycrystalline structure made of a first semiconductor material, and a second semiconductor material different from the first semiconductor material is segregated at a grain boundary of the polycrystalline structure.
  • a planar light emitting device includes a substrate,
  • a first electrode and a second electrode provided apart from each other in the same plane on the substrate; a light emitting layer provided on the first electrode and the second electrode;
  • the light emitting layer has a polycrystalline structure made of a first semiconductor material, and a second semiconductor material different from the first semiconductor material is segregated at a grain boundary of the polycrystalline structure.
  • the planar light emitting device includes first and second electrodes respectively provided on two parallel virtual planes facing each other,
  • a dielectric layer provided with at least a portion sandwiched between the first and second electrodes facing each other;
  • a light emitting layer electrically connected to the first and second electrodes and having a light emitting surface exposed
  • the light emitting layer has a polycrystalline structure made of a first semiconductor material, and a second semiconductor material different from the first semiconductor material is segregated at a grain boundary of the polycrystalline structure.
  • the first semiconductor material and the second semiconductor material may have semiconductor structures of different conductivity types.
  • the first semiconductor material may have an n-type semiconductor structure
  • the second semiconductor material may have a p-type semiconductor structure! /.
  • each of the first semiconductor material and the second semiconductor material may be a compound semiconductor. Still further, the first semiconductor material may be a Group 12 Group 16 compound semiconductor. The first semiconductor material may have a cubic structure. [0017] Further, the first semiconductor material is Cu, Ag, Au, Ir, Al, Ga, In, Mn, Cl, Br, I, Li, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb may contain at least one element selected from the group of forces!
  • the average crystal particle size of the polycrystalline structure made of the first semiconductor material is 5 to
  • the second semiconductor material may be ZnS, ZnSe, ZnSSe, ZnSeTe, ZnTe, GaN, or InGaN! /.
  • the first semiconductor substance may be a zinc-based material containing zinc.
  • at least one of the electrodes is preferably made of a material containing zinc.
  • the zinc-containing material constituting the one electrode is composed mainly of zinc oxide and includes at least one selected from the group consisting of aluminum, gallium, titanium, niobium, tantalum, tungsten, copper, silver, and boron. It may be included.
  • a planar light emitting device includes a substrate,
  • a planar back electrode provided on the substrate
  • a planar transparent electrode provided facing the back electrode
  • At least one planar light-emitting layer sandwiched between the back electrode and the transparent electrode;
  • the light-emitting layer includes a P-type semiconductor and an n-type semiconductor.
  • the planar light emitting device includes first and second electrodes respectively provided on two parallel virtual planes facing each other,
  • a light emitting layer provided between the first and second electrodes
  • the first electrode and the projection of the second electrode of the virtual plane on which the first electrode is provided must overlap each other! /
  • the light-emitting layer includes a P-type semiconductor and an n-type semiconductor.
  • a planar light emitting device comprises a substrate,
  • First and second electrodes spaced apart from each other in the same plane on the substrate; A light emitting layer provided on the first and second electrodes;
  • the light-emitting layer includes a P-type semiconductor and an n-type semiconductor.
  • the planar light emitting device includes first and second electrodes respectively provided on two parallel virtual planes facing each other,
  • a dielectric layer provided with at least a portion sandwiched between the first and second electrodes facing each other;
  • a light emitting layer electrically connected to the first and second electrodes and having a light emitting surface exposed
  • the light-emitting layer includes a P-type semiconductor and an n-type semiconductor.
  • the light emitting layer may be formed by dispersing n-type semiconductor particles in a p-type semiconductor medium.
  • the light emitting layer may be composed of an aggregate of n-type semiconductor particles, and a p-type semiconductor may be segregated between the particles.
  • the n-type semiconductor particles are electrically bonded to the first and second electrodes via the p-type semiconductor!
  • the n-type semiconductor and the p-type semiconductor may each be a compound semiconductor. Still further, the n-type semiconductor may be a Group 12 Group 16 compound semiconductor. Further, the n-type semiconductor may be a Group 13-Group 15 compound semiconductor. Further, the n-type semiconductor may be a chalcopyrite type compound semiconductor. Furthermore, the n-type semiconductor may be V of ZnS, ZnSe, ZnSSe, ZnSeTe, ZnTe, GaN, or InGaN!
  • the n-type semiconductor may be a zinc-based material containing zinc! /.
  • the first electrode and the second electrode is made of a material force containing zinc.
  • the material containing zinc constituting the one electrode includes zinc oxide as a main component and at least one selected from the group consisting of aluminum, gallium, titanium, niobium, tantalum, tandastain, copper, silver, and boron. You may go out.
  • a support substrate may be further provided that faces and supports at least one of the electrodes.
  • a color conversion layer is further provided facing the electrode and in front of the light emission extraction direction. May be.
  • FIG. 1 is a schematic perspective view showing a configuration of a planar light emitting device according to Embodiment 1 of the present invention.
  • FIG. 2 is a cross-sectional view of the cross section S of FIG. 1 as viewed from the direction of the arrow.
  • FIG. 3 is a plan view of the planar light emitting device of FIG. 1.
  • FIG. 4 is a cross-sectional view showing a detailed configuration of a light emitting layer of the planar light emitting device of FIG.
  • FIG. 5 (a) is a schematic diagram of the vicinity of the interface between the light-emitting layer made of ZnS and the transparent electrode (or back electrode) made of AZO, and (b) shows the displacement of potential energy in (a).
  • FIG. 5 (a) is a schematic diagram of the vicinity of the interface between the light-emitting layer made of ZnS and the transparent electrode (or back electrode) made of AZO, and (b) shows the displacement of potential energy in (a).
  • FIG. 6 (a) is a schematic diagram of an interface between a light-emitting layer made of ZnS and a transparent electrode made of ITO as a comparative example, and (b) is a schematic diagram for explaining the potential energy displacement of (a).
  • a is a schematic diagram of an interface between a light-emitting layer made of ZnS and a transparent electrode made of ITO as a comparative example
  • (b) is a schematic diagram for explaining the potential energy displacement of (a).
  • FIG. 7 is a schematic view showing current density non-uniformity depending on terminal positions of the planar light emitting device.
  • FIG. 8 is a schematic perspective view showing a configuration of a planar light emitting device according to Embodiment 2 of the present invention.
  • FIG. 9 is a cross-sectional view of the cross section S of FIG. 8 as viewed from the direction of the arrow.
  • FIG. 10 is a plan view of the planar light emitting device of FIG.
  • FIG. 11 (a) is a schematic cross-sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 2 of the present invention.
  • FIG. 11 (b) is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 2 of the present invention.
  • FIG. 11 (c) is a schematic cross-sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 2 of the present invention.
  • FIG. 11 (d) is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 2 of the present invention.
  • FIG. 11 (e) shows one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 2 of the present invention.
  • FIG. 11 (e) shows one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 2 of the present invention.
  • FIG. 11 (f)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 2 of the present invention.
  • FIG. 11 (g)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 2 of the present invention.
  • FIG. 11 (h)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 2 of the present invention.
  • FIG. 11 is a cross-sectional view of the planar light emitting device according to the second embodiment of the present invention. 12] A sectional view showing the structure of the planar light emitting device according to the third embodiment of the present invention. 13] A sectional view showing the structure of the planar light emitting device according to the fourth embodiment of the present invention.
  • FIG. 14 (a) is a schematic cross-sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 4 of the present invention.
  • FIG. 14 (b) is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 4 of the present invention.
  • FIG. 14 (c)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 4 of the present invention.
  • FIG. 14 (d) is a schematic cross-sectional view showing one of the steps of a method for manufacturing a planar light emitting device according to Embodiment 4 of the present invention.
  • FIG. 14 (e) is a schematic cross-sectional view showing one of the steps of a method for manufacturing a planar light emitting device according to Embodiment 4 of the present invention.
  • FIG. 14 (f)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 4 of the present invention.
  • FIG. 14 (g) is a schematic cross-sectional view showing one of the steps of a method for manufacturing the planar light emitting device according to Embodiment 4 of the present invention.
  • FIG. 14 (h) is a schematic cross-sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 4 of the present invention.
  • 14 (i)] is a cross-sectional view of the manufactured planar light emitting device according to Embodiment 4 of the present invention.
  • 15] A sectional view showing the structure of the planar light emitting device according to Embodiment 5 of the present invention.
  • 16 (a)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 5 of the present invention.
  • FIG. 16 (c)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 5 of the present invention.
  • FIG. 16 (d)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 5 of the present invention.
  • FIG. 16 (e)] is a schematic cross-sectional view showing one of the steps of a method for manufacturing the planar light emitting device according to Embodiment 5 of the present invention.
  • FIG. 16 is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 5 of the present invention.
  • FIG. 16 (g)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 5 of the present invention.
  • FIG. 16 (h)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 5 of the present invention.
  • FIG. 16 (i)] is a cross-sectional view of the surface light-emitting device according to Embodiment 5 of the present invention that was manufactured.
  • 17] A sectional view showing the structure of the planar light emitting device according to the sixth embodiment of the present invention.
  • 18] It is a schematic perspective view showing the configuration of the planar light emitting device according to Embodiment 7 of the present invention.
  • 19] is a cross-sectional view of section S of FIG. 18 as viewed from the direction of the arrow.
  • FIG. 20 is a plan view of the planar light emitting device of FIG.
  • 21 is a cross-sectional view showing a detailed configuration of a light emitting layer of the planar light emitting device of FIG.
  • FIG. 22 is a cross-sectional view of another example of a planar light emitting device.
  • FIG. 23 is a cross-sectional view of yet another example of a planar light emitting device.
  • FIG. 24 (a) is a schematic diagram of the vicinity of the interface between the light-emitting layer made of ZnS and the transparent electrode (or back electrode) made of AZO, and (b) shows the displacement of potential energy in (a).
  • FIG. [FIG. 25] (a) is a schematic diagram of an interface between a light-emitting layer made of ZnS and a transparent electrode made of ITO as a comparative example, and (b) is a schematic diagram for explaining the potential energy displacement of (a).
  • ITO a transparent electrode made of ITO
  • FIG. 26 is a schematic view showing current density non-uniformity depending on terminal positions of the planar light emitting device.
  • FIG. 27 is a schematic perspective view showing the configuration of the planar light emitting device according to Embodiment 8 of the present invention.
  • FIG. 28 is a sectional view of section S of FIG. 27 as viewed from the direction of the arrow.
  • FIG. 29 is a plan view of the planar light emitting device of FIG. 27.
  • FIG. 30 (a) is a schematic sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 8 of the present invention.
  • FIG. 30 (b) is a schematic sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 8 of the present invention.
  • FIG. 30 (c) is a schematic cross-sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 8 of the present invention.
  • FIG. 30 (d) is a schematic sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 8 of the present invention.
  • FIG. 30 (e) is a schematic sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 8 of the present invention.
  • FIG. 30 (f) is a schematic sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 8 of the present invention.
  • FIG. 30 (g) is a schematic cross-sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 8 of the present invention.
  • FIG. 30 (h) is a schematic cross-sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 8 of the present invention.
  • FIG. 31 is a cross-sectional view showing a configuration of a planar light emitting device according to Embodiment 9 of the present invention.
  • FIG. 32 A sectional view showing the structure of the planar light emitting device according to the tenth embodiment of the present invention.
  • FIG. 33 (a) shows one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 10 of the present invention.
  • FIG. 33 (a) shows one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 10 of the present invention.
  • FIG. 33 (b)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 10 of the present invention.
  • FIG. 33 (d)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 10 of the present invention.
  • FIG. 33 (e) is a schematic sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 10 of the present invention.
  • FIG. 33 (g) is a schematic sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 10 of the present invention.
  • FIG. 33 (h)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 10 of the present invention.
  • FIG. 35 (a) is a schematic sectional view showing one of steps in a method for manufacturing a planar light emitting device according to Embodiment 11 of the present invention.
  • FIG. 35 (b)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 11 of the present invention.
  • FIG. 35 (c)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 11 of the present invention.
  • FIG. 35 (d)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 11 of the present invention.
  • FIG. 35 (e) is a schematic sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 11 of the present invention.
  • FIG. 35 (f) shows one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 11 of the present invention.
  • FIG. 35 (f) shows one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 11 of the present invention.
  • FIG. 35 (g) is a schematic cross-sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 11 of the present invention.
  • FIG. 35 (h) is a schematic cross-sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 11 of the present invention.
  • FIG. 35 (i) is a cross-sectional view of a manufactured planar light emitting device according to Embodiment 11 of the present invention.
  • FIG. 36 is a cross-sectional view showing a configuration of a planar light emitting device according to Embodiment 12 of the present invention.
  • FIG. 37 is a schematic sectional view seen from a direction perpendicular to the light emitting surface of a conventional inorganic EL element.
  • FIG. 1 is a schematic perspective view showing a schematic configuration of a planar light emitting device 10 according to Embodiment 1 of the present invention.
  • FIG. 2 is a schematic cross-sectional view showing the configuration of the cross section S in FIG.
  • FIG. 3 is a plan view of the planar light emitting device 10.
  • the planar light emitting device 10 includes a substrate 1, a planar back electrode 4 provided on the substrate 1, a planar transparent electrode 2 provided to face the back electrode 4, and a back electrode 4 A planar light emitting layer 3 sandwiched between the transparent electrode 2 and the transparent electrode 2.
  • the transparent electrode 2 and the back electrode 4 are electrically connected via a DC power source 5.
  • the transparent electrode 2 connected to the negative electrode side functions as an electron injection electrode (second electrode), and the back electrode 4 connected to the positive electrode side serves as a hole injection electrode (first electrode).
  • the force for explaining the case where the back electrode 4 is provided on the substrate 1 is not limited to this.
  • the transparent electrode 2 is provided on the substrate 1, and the light emitting layer 3 and the back electrode 4 are sequentially provided thereon.
  • FIG. 4 is an enlarged schematic view of the light emitting layer 3.
  • the light emitting layer 3 is
  • the first semiconductor material 21 is an n-type semiconductor material
  • the second semiconductor material 23 is a p-type semiconductor material.
  • the p-type semiconductor material segregated at the grain boundary of the n-type semiconductor material improves the hole injection property, efficiently generates recombination light emission of electrons and holes, and can emit light at a low voltage.
  • the planar light emitting device 10 that emits light with high luminance can be realized.
  • the transparent electrode 2 and the back electrode 4 are electrically connected via a DC power supply 5.
  • a potential difference is generated between the transparent electrode 2 and the back electrode 4, and a voltage is applied to the light emitting layer 3.
  • the light emitting layer 3 disposed between the transparent electrode 2 and the back electrode 4 emits light, and the light passes through the transparent electrode 2 and is extracted outside the planar light emitting device 10.
  • the present invention is not limited to the above configuration, and a plurality of thin dielectric layers are provided between the electrode and the light emitting layer for the purpose of current limitation, driven by an AC power source, the back electrode is made transparent, and the back electrode is Change as appropriate, including a black electrode, a structure that seals all or part of the planar light emitting device 10, and a structure that converts the color of light emitted from the light emitting layer 3 in front of the light emission direction.
  • a white planar light emitting device can be formed by combining a blue light emitting layer and a color conversion layer that converts blue into green and red.
  • the substrate 1 one that can support each layer formed thereon is used. Further, it is required to be a material having light transmittance with respect to the wavelength of light emitted from the light emitting body of the light emitting layer 3.
  • a material for example, glass such as Couting 1737, quartz, ceramic, etc. can be used. It may be non-alkali glass or soda lime glass coated with alumina or the like as an ion barrier layer on the glass surface so that alkali ions contained in ordinary glass do not affect the light emitting element.
  • Polyesterol, polyethylene terephthalate, a combination of polychloroethylene and nylon 6, fluororesin materials, resin films of polyethylene, polypropylene, polyimide, polyamide, and the like can also be used.
  • the resin film a material having excellent durability, flexibility, transparency, electrical insulation and moisture resistance is used. These are merely examples, and the material of the substrate 1 is not particularly limited thereto. [0038] Further, in the case of a configuration in which light is not extracted from the substrate side, the above-described light transmittance is unnecessary, and it has light transmittance!
  • the electrodes there are a transparent electrode 2 on the light extraction side and a back electrode 4 on the other side.
  • the force for explaining the case where the back electrode 4 is provided on the substrate 1 is not limited to this.
  • the transparent electrode 2 is provided on the substrate 1, and the light emitting layer 3 and the back electrode 4 are sequentially provided thereon.
  • a stacked structure may be used.
  • both the transparent electrode 2 and the back electrode 4 may be transparent electrodes.
  • the material of the transparent electrode 2 preferably has a high transmittance particularly in the visible light region as long as it has a light transmitting property so that the light generated in the light emitting layer 3 can be extracted to the outside. Further, it is preferable that the electrode has a low resistance, and further, it is preferable that the electrode 1 has excellent adhesion to the substrate 1 and the light emitting layer 3.
  • a particularly suitable material for the transparent electrode 2 is ITO (InO doped with SnO.
  • These transparent electrodes 2 can be formed by a film forming method such as a sputtering method, an electron beam evaporation method, an ion plating method, etc. for the purpose of improving the transparency or reducing the resistivity. Further, after film formation, surface treatment such as plasma treatment may be performed for the purpose of resistivity control.
  • the film thickness of the transparent electrode 2 is determined from the required sheet resistance value and visible light transmittance.
  • the carrier concentration of the transparent electrode 2 is preferably in the range of lE17 ⁇ lE22cm_ 3.
  • the transparent electrode 2 has a volume resistivity of 1E-3 ⁇ 'cm or less and a transmittance of 75% or more at a wavelength of 380 to 780 nm.
  • the refractive index of the transparent electrode 2 is preferably 1.85 to 1.95.
  • the film thickness of the transparent electrode 2 is generally preferably about 100 to 200 nm.
  • a film having a dense and stable characteristic can be realized at 30 nm or less.
  • the back electrode 4 can be any conductive material that is generally well-known. it can. Furthermore, it is preferable that the adhesiveness with the light emitting layer 3 is excellent. Suitable examples include, for example, metal oxides such as ITO, InZnO, ZnO, SnO, Pt, Au, Pd, Ag, Ni, Cu,
  • Metals such as Al, Ru, Rh, Ir, Cr, Mo, W, Ta, Nb, laminated structures of these, or polyaniline, polypyrrole, PEDOT [poly (3,4-ethylenedioxythiophene) ] / Use of conductive polymer such as PSS (polystyrene sulfonic acid) or conductive carbon.
  • PSS polystyrene sulfonic acid
  • FIG. 4 is a schematic configuration diagram enlarging a part of the cross section of the light emitting layer 3.
  • the light emitting layer 3 has a polycrystalline structure made of the first semiconductor material 21 and has a structure in which the second semiconductor material 23 is prayed at the grain boundary 22 of the polycrystalline structure.
  • the first semiconductor material 21 a semiconductor material in which majority carriers are electrons and exhibits n-type conduction is used.
  • the second semiconductor material 23 is a semiconductor material in which majority carriers are holes and exhibits p-type conduction. Further, the first semiconductor material 21 and the second semiconductor material 23 are electrically joined.
  • the first semiconductor material 21 has a band gap size from the near ultraviolet region to the visible light region.
  • Inter-group 16 compounds and mixed crystals thereof for example, CaSSe
  • Group 13-15 compounds such as A1P, AlAs, GaN, GaP, and mixed crystals thereof (for example, In GaN), ZnMgS, CaSSe, CaSrS A mixed crystal of the above-described compound can be used.
  • a chalcopyrite type compound such as CuAlS may be used.
  • the first chalcopyrite type compound such as CuAlS may be used.
  • the polycrystalline body made of the semiconductor material 21 preferably has a cubic structure in the main part. Furthermore, Cu, Ag, Au, Ir, Al, Ga, In, Mn, Cl, Br, I, Li, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm
  • One or more kinds of atoms or ions selected from the group consisting of Yb may be contained as an additive. The color of light emitted from the light emitting layer 3 is also determined by the type of these elements.
  • Cu S, ZnS, ZnSe, ZnSSe, ZnSeTe, ZnTe GaN, InGaN can be used as the second semiconductor material 23.
  • These materials may contain one or more elements from N, Cu, and In as additives for imparting p-type conduction.
  • the planar light emitting device 10 is characterized in that the light emitting layer 3 has a polycrystalline structure made of an n-type semiconductor material 21, and the grain boundary 22 of this polycrystalline structure has a p-type.
  • the semiconductor material 23 has a segregated structure.
  • ZnS, ZnSe, etc. generally show n-type conduction. High-brightness light emission due to recombination of electrons and holes that cannot be sufficiently supplied cannot be expected.
  • the present inventor has a light emitting layer 3 having a polycrystalline structure composed of an n-type semiconductor material 21, and a p-type semiconductor material 23 is present at the grain boundary 22 of the polycrystalline structure. It was found that by using a segregated structure, the hole injection property is improved by the p-type semiconductor material segregated at the grain boundary.
  • the recombination-type emission of electrons and holes is efficiently generated by segregating segregation portions in the light emitting layer 3 at a high density.
  • a light emitting element that emits light with high luminance at a low voltage can be realized, and the present invention has been achieved.
  • by introducing a donor or acceptor recombination of free electrons and holes captured by the acceptor, recombination of electrons captured by free holes and donors, and emission of a donor-acceptor pair are also performed. Is possible.
  • light emission by energy transfer is possible as well because other ion species are nearby.
  • the transparent electrode 2 and the back electrode 4 are, for example, ZnO, AZO (for example, zinc oxide) It is preferable to use an electrode made of a metal oxide containing zinc, such as one doped with aluminum) or GZO (zinc oxide doped with gallium, for example).
  • a zinc-based material such as ZnS
  • AZO for example, zinc oxide
  • the present inventor has found that light can be emitted with high efficiency by employing a combination of specific n-type semiconductor particles 21 and specific transparent electrode 2 (or back electrode 4).
  • FIG. 5 (a) is a schematic view of the vicinity of the interface between the light emitting layer 3 made of ZnS and the transparent electrode 2 (or the back electrode 4) made of AZO.
  • Fig. 5 (b) is a schematic diagram for explaining the potential energy displacement of Fig. 5 (a).
  • FIG. 6A is a schematic diagram of an interface between the light emitting layer 3 made of ZnS and the transparent electrode made of ITO as a comparative example.
  • Fig. 6 (b) is a schematic diagram for explaining the displacement of the potential energy in Fig. 6 (a).
  • the n-type semiconductor particles constituting the light emitting layer 3 are used.
  • the oxide that forms at the interface is zinc oxide (ZnO). Further, at the interface, the doping material (A1) diffuses during film formation, and a low-resistance oxide film is formed.
  • the zinc oxide-based (AZO) transparent electrode 2 (or back electrode 4) has a hexagonal crystal structure, but is a zinc-based material (ZnS) that is the n-type semiconductor material 21 constituting the light-emitting layer 3. ) Also has a hexagonal or cubic crystal structure, so the strain is small and the energy barrier is small at the interface between the two. As a result, the displacement of potential energy is small as shown in Fig. 5 (b).
  • the transparent electrode is ITO which is not a zinc-based material, so that the oxide film (ZnO) formed at the interface has a crystal structure different from that of ITO. Therefore, the energy barrier at the interface increases. Therefore, as shown in FIG. 6 (b), the displacement of potential energy increases at the interface, and the light emission efficiency of the light emitting element decreases.
  • the transparent electrode 2 (or the back electrode 4) made of a zinc oxide-based material is used. By combining them, a planar light emitting device with high luminous efficiency can be provided.
  • the transparent electrode 2 (or the back electrode 4) containing zinc, aluminum alloy is used.
  • AZO doped with gallium and GZO doped with gallium As examples. At least one of S, aluminum, gallium, titanium, niobium, tantalum, tungsten, copper, silver and boron. The same applies to the use of doped zinc oxide.
  • Embodiment 1 an example of a method for manufacturing the planar light emitting device 10 according to Embodiment 1 will be described.
  • the same manufacturing method can be used for the light emitting layer made of the other materials described above.
  • a planar back electrode 4 is formed on the substrate 1. For example, using A1, it is formed by the photolithographic method.
  • the film thickness is 200 nm.
  • a planar light emitting layer 3 is formed on the back electrode 4. ZnS and Cu S in multiple evaporation sources
  • the light emitting layer 3 is obtained by baking at 700 ° C. for about 1 hour in a sulfur atmosphere.
  • a polycrystalline structure of minute ZnS grains and a segregation part of Cu S at the grain boundary are observed. Although details are not clear, it is considered that phase separation of ZnS and Cu S occurs and the segregation structure is formed.
  • planar transparent electrode 2 is formed using, for example, ITO.
  • the film thickness is 200 ⁇ m.
  • a transparent insulator layer such as silicon nitride is formed on the light emitting layer 3 and the transparent electrode 2 as a protective layer (not shown).
  • planar light emitting device 10 of the first embodiment is obtained.
  • the transparent electrode 2 and the back electrode 4 are connected to the DC power source 5, and a DC voltage is applied between them to perform the light emission evaluation. It started to emit light at a voltage of 15V, and showed an emission luminance of about 600cd / m 2 at 35V.
  • FIG. 8 is a schematic perspective view showing the configuration of the planar light emitting device 10a according to Embodiment 2 of the present invention.
  • FIG. 9 is a schematic cross-sectional view showing the configuration of the cross section S of FIG. Figure 8 shows this planar light emission. It is a top view of the apparatus 10a.
  • the planar light emitting device 10a has the first and second electrodes 2a and 2b in a striped shape on two parallel virtual planes facing each other.
  • the first electrode 2a and the first electrode 2a are provided! /
  • the projection of the second electrode 2b onto the virtual plane does not overlap each other! / It is a feature.
  • the portion of the light emitting layer sandwiched between the first electrode 2a and the second electrode 2b is a place where the current density is high, and this part force also emits light.
  • the first electrode 2a and the second electrode 2b are arranged so as to be shifted from each other, the first electrode 2a and the second electrode 2b that emit light are Most of the light emitted from the light emitting layer sandwiched between them can be extracted outside without being shielded by the electrodes.
  • the light emitting layer 3 has a polycrystalline structure made of an n-type semiconductor material 21, and this The p-type semiconductor material 23 has a segregated structure at the grain boundaries 22 of the crystal structure.
  • the first and second electrodes 2a, 2b are respectively provided in stripes on two parallel virtual planes facing each other.
  • the first electrode 2a and the projection of the second electrode 2b on the imaginary plane on which the first electrode is provided should not overlap each other! /.
  • the present inventor has found a problem regarding the electrode position in the planar light emitting device, and has conceived the electrode arrangement as described above. That is, in the planar light emitting device as in Embodiment 1, the resistance of the light emitting layer is low. On the other hand, when a flat transparent electrode film is used on the light emitting surface side, the resistance of the transparent electrode is relatively large. The inventor has found that the voltage drop occurs according to the distance from the terminal in the transparent electrode due to the resistance of the transparent electrode being low and the resistance of the light emitting layer being low. For example, FIG. As shown in the figure, it has been found that there is a problem that uneven light emission occurs in a plane.
  • the metal electrodes can be provided in stripes to form a light emitting surface.
  • the metal electrodes can be provided in stripes to form a light emitting surface.
  • the light emitting layer 3 emits light at a position sandwiched between the upper and lower metal electrodes 2a and 2b, the emitted light is blocked by the metal electrode, and the emitted light is efficiently extracted outside. I can't.
  • the inventor further provided the first and second electrodes 2a and 2b in stripes on two parallel virtual planes facing each other, and the first electrode 2a and the first electrode
  • the present invention has been conceived of the configuration of the present invention in which the second electrode 2b is projected so as not to overlap the virtual plane on which the first electrode 2a is provided.
  • the stripe-shaped first light formed on the substrate 1 is used.
  • the light emitting layer 3 in the region between the electrodes 2a and 2b emits light by applying a voltage between the electrodes 2a and 2b.
  • a transparent electrode material for the electrode it is not necessary to use a transparent electrode material for the electrode, so that uniform planar light emission can be obtained and the cost can be reduced.
  • light can be extracted from both the front and back sides.
  • a metal film such as molybdenum (Mo), tungsten (W), or titanium (Ti) is formed on the substrate 1 by a method such as vapor deposition or sputtering (FIG. 11 (a)).
  • the film is formed by irradiation with a long beam.
  • the substrate temperature is 200 ° C and ZnS and Cu S are co-evaporated.
  • the light emitting layer 3 is obtained by baking at 700 ° C. for about 1 hour in a sulfur atmosphere (FIG. l l (e)).
  • a polycrystalline structure of minute ZnS grains and a segregation part of Cu S at the grain boundary are observed. Although details are not clear, it is considered that phase separation of ZnS and Cu S occurs and the segregation structure is formed.
  • a metal such as molybdenum (Mo), tungsten (W) or titanium (Ti) is deposited on the light emitting layer 3 by a method such as vapor deposition or sputtering (FIG. 11 (f)).
  • any force conductive material using metal as the material of the first electrode 2a and the second electrode 2b may be used, and an oxide such as ZnO may be used.
  • any force can be used for patterning the electrodes using a photolithographic technique as long as the pattern can be patterned in stripes without being limited thereto.
  • a pattern jung method such as pattern jung by printing may be used.
  • FIG. 12 is a cross-sectional view showing the configuration of the planar light emitting device 10b according to Embodiment 3 of the present invention.
  • the planar light emitting device 10b is different from the planar light emitting device according to Embodiment 2 in that the first electrode 2a is embedded in the substrate 1 side and the force S is different from that of the embodiment. Same as state 2. [0066] (Embodiment 4)
  • the planar light-emitting device has a small amount of time between the first and second electrodes provided on two parallel virtual planes facing each other and the first and second electrodes facing each other.
  • a dielectric layer provided with at least a part interposed therebetween, and a light emitting layer electrically connected to the first and second electrodes and having a light emitting surface exposed, the light emitting layer comprising: 1.
  • FIG. 13 is a schematic cross-sectional view showing the configuration of the planar light emitting device 10c according to Embodiment 4 of the present invention.
  • a planar light emitting device 10c according to the fourth embodiment includes a planar first electrode 2a formed on a substrate 1, a dielectric layer 4 and a dielectric layer 4 formed on the first electrode 2a. And a light emitting layer 3 embedded in the dielectric layer in the same plane as the dielectric layer 4.
  • the striped second electrode 2b is provided on a virtual plane parallel to the plane on which the first electrode 2a is provided.
  • the first electrode 2a and the second electrode 2b have opposing portions. That is, the flat electrode 2a as the first electrode and a portion where the projection of the second electrode 2b on the virtual plane on which the first electrode 2a is provided overlap.
  • the dielectric layer 4 is formed while the first electrode 2a and the second electrode 2b face each other.
  • the light emitting layer 3 is formed in a portion where the first electrode 2a and the second electrode 2b are not opposed to each other.
  • the light emitting layer 3 and the dielectric layer 4 are formed in the same plane, that is, in the same layer.
  • the dielectric layer 4 may be provided so that at least a part is sandwiched between the first electrode 2a and the second electrode 2b facing each other.
  • the light emitting layer 3 is electrically connected to the first electrode 2a and the second electrode 2b, respectively.
  • the light emitting layer 3 protrudes to the layer of the striped second electrode 2b, and is in contact therewith.
  • the side surface of the striped second electrode 2 b is in contact with the light emitting layer 3.
  • the side surface of the striped second electrode 2b is a surface perpendicular to the virtual plane on which the side surface of the striped second electrode 2b is provided among the surfaces of the striped second electrode 2b. That is. With such a configuration, the light emitting layer 3 is exposed.
  • the light emitting layer 3 emits light in the region between the electrodes 2a and 2b by applying a voltage between the electrodes 2a and 2b.
  • the light emitting layer 3 is exposed without being blocked by the second electrode 2b, and the light emitted from the light emitting layer 3 can be easily extracted to the outside. And since it is not necessary to use a transparent electrode material for an electrode, uniform plane light emission can be obtained and cost reduction is attained.
  • a metal such as molybdenum (Mo), tungsten (W), or titanium (Ti) is formed on the substrate 1 by a method such as vapor deposition or sputtering, and further on the vapor-deposited metal film.
  • a dielectric film is formed (Fig. 14 (a)).
  • the light emitting layer 3 is formed on the substrate 1 and the first electrode 2a in the opening.
  • ZnS and Cu S powders are put into multiple evaporation sources, and each material is used in vacuum (10_ 6 T OT r)
  • the film is irradiated with an electron beam.
  • the substrate temperature is 200 ° C., and ZnS and Cu S are co-evaporated.
  • the phosphor layer 3 is obtained by baking at 700 ° C. for about 1 hour in a sulfur atmosphere (FIG. 14 (e)).
  • a polycrystalline structure of minute ZnS grains and a segregation part of Cu S at the grain boundary are observed. Although details are not clear, it is considered that phase separation of ZnS and Cu S occurs and the segregation structure is formed.
  • a metal such as molybdenum (Mo), tungsten (W) or titanium (Ti) is deposited on the light emitting layer 3 and the dielectric layer 4 by a method such as vapor deposition or sputtering (FIG. 14). (f)).
  • Embodiment 4 of the present invention force S using a metal as the material of the first electrode 2a and the second electrode 2b, any conductive material may be used, and an oxide such as ZnO may be used. Good.
  • pattern jung is performed using a photolithographic technique. However, if the pattern jung can be formed in a stripe shape, a pattern jung method such as pattern jung by printing may be used! /.
  • FIG. 15 is a schematic cross-sectional view showing the configuration of the planar light emitting device 10d according to the fifth embodiment.
  • This planar light emitting device 10d is different in that a force light emitting layer 3 having substantially the same configuration as that of the planar light emitting device according to Embodiment 4 is provided through the first electrode 2a. Also in this case, since the light emitting layer 3 and the second electrode 2b are connected by the side surface of the electrode 2b, the light emitting layer 3 is exposed without being blocked by the second electrode 2b. The ability to easily extract the emitted light to the outside.
  • FIGS. 16 (a) to 16 (i) are schematic cross-sectional views illustrating steps of a method for manufacturing the planar light emitting device 10d according to Embodiment 5.
  • the light emitting layer 3 is provided through the first electrode 2a as in the fifth embodiment, or the light emitting layer 3 is disposed on the first electrode 2a as shown in the fourth embodiment. Whether it is provided may be appropriately selected according to the characteristics of the material.
  • FIG. 17 is a schematic cross-sectional view showing the configuration of the planar light emitting device 10e according to the sixth embodiment.
  • the planar light emitting device 10e according to the sixth embodiment of the present invention is different from the planar light emitting devices according to the first to fifth embodiments in that the first and second electrodes are separated from each other in the same plane on the substrate. It is different in that it is provided.
  • the first and second electrodes 2a and 2b are provided on the same surface of the substrate, and the light emitting layer is provided on both the electrodes 2a and 2b. It can be exposed as a surface, and light emitted from the light emitting layer 3 can be easily taken out.
  • FIG. 18 is a schematic perspective view showing a schematic configuration of planar light-emitting device 10 according to Embodiment 7 of the present invention.
  • FIG. 19 is a schematic cross-sectional view showing the configuration of the cross section S of FIG.
  • FIG. 20 is a plan view of the planar light emitting device 10.
  • the planar light emitting device 10 includes a substrate 1, a planar back electrode 4 provided on the substrate 1, a planar transparent electrode 2 provided to face the back electrode 4, a back electrode 4, A planar light emitting layer 3 sandwiched between the transparent electrode 2 and the transparent electrode 2.
  • the transparent electrode 2 and the back electrode 4 are electrically connected via a DC power source 5.
  • the transparent electrode 2 connected to the negative electrode side functions as an electron injection electrode (second electrode)
  • the back electrode 4 connected to the positive electrode side functions as a hole injection electrode (first electrode).
  • first electrode hole injection electrode
  • the light emitting layer 3 is composed of an aggregate of n-type semiconductor particles 21 as shown in FIG. 21, and the p-type semiconductor 23 is segregated between the particles.
  • the force for explaining the case where the back electrode 4 is provided on the substrate 1 is not limited to this.
  • the transparent electrode 2 may be provided on the substrate 1, and the light emitting layer 3 and the back electrode 4 may be laminated on the transparent electrode 2 in this order.
  • the light emitting layer 3 is characterized in that the n-type semiconductor particles 21 are dispersed in the medium of the p-type semiconductor 23.
  • the n-type semiconductor particles 21 are dispersed in the medium of the p-type semiconductor 23.
  • hole injection properties are improved, recombination light emission of electrons and holes is efficiently generated, and high luminance is achieved at low voltage.
  • a planar light emitting device that emits light can be realized.
  • light emission efficiency is improved by adopting a configuration in which n-type semiconductor particles are electrically connected to the electrode through a p-type semiconductor.
  • a planar light emitting device capable of emitting light at a low voltage and emitting light with high luminance is obtained.
  • the transparent electrode 2 and the back electrode 4 are electrically connected via a DC power supply 5.
  • a potential difference is generated between the transparent electrode 2 and the back electrode 4, and a voltage is applied to the light emitting layer 3.
  • the light emitting layer 3 disposed between the transparent electrode 2 and the back electrode 4 emits light, and the light passes through the transparent electrode 2 and is extracted outside the planar light emitting device 10.
  • the present invention is not limited to the above configuration, and a plurality of thin dielectric layers are provided between the electrode and the light emitting layer for the purpose of current limitation, driven by an AC power source, the back electrode is made transparent, and the back electrode is Change as appropriate, including a black electrode, a structure that seals all or part of the planar light emitting device 10, and a structure that converts the color of light emitted from the light emitting layer 3 in front of the light emission direction.
  • a white planar light emitting device can be formed by combining a blue light emitting layer and a color conversion layer that converts blue into green and red.
  • each component of the planar light emitting device according to the seventh embodiment is substantially the same as each component of the planar light emitting device according to the first embodiment, except that the features thereof are described. The same can be used.
  • the light emitting layer 3 is sandwiched between the transparent electrode 2 and the back electrode 4 and has one of the following two structures.
  • n-type semiconductor particles 21 are dispersed in a medium of p-type semiconductor 23 (FIG. 23). Further, it is preferable that each n-type semiconductor particle 21 constituting the light emitting layer 3 is electrically joined to the electrodes 2 and 4 via the p-type semiconductor 23! /.
  • the material of the n-type semiconductor particles 21 is an n-type semiconductor material in which majority carriers are electrons and exhibit n-type conduction.
  • the material may be a Group 12-Group 16 compound semiconductor. Further, it may be a Group 13 Group 15 Group 15 compound semiconductor.
  • the color of light emitted from the light emitting layer 3 is also determined by the type of these elements.
  • the material of the p-type semiconductor 23 is a p-type semiconductor material in which majority carriers are holes and exhibits p-type conduction. As this p-type semiconductor material, if you line up, Cu S ZnS ZnSe ZnSS
  • ZnSeTe Compounds such as ZnTe, and nitrides such as GaN and InGaN.
  • p-type semiconductor materials Cu S and the like inherently show p-type conduction, but other materials are added.
  • one or more elements selected from nitrogen and Ag Cu In are added and used.
  • a chalcopyrite type compound such as CuGaS CuAlS exhibiting p-type conduction may be used.
  • the planar light emitting device 10 is characterized in that the light emitting layer 3 is (i) a structure in which a p-type semiconductor 23 is segregated between n-type semiconductor particles 21 (FIG. 21), ii) It has one of the structures (FIG. 23) in which the n-type semiconductor particles 21 are dispersed in the medium of the p-type semiconductor 23.
  • the medium electrically connected to the semiconductor particles 61 is indium tin oxide 63
  • the force that allows the electrons to reach the semiconductor particles 61 to emit light is indium tin tin. Since the hole concentration of the oxide is small, holes for recombination are insufficient.
  • the present inventor has focused on a structure in which holes can be efficiently injected together with the injection of electrons in the light emitting layer 3 in order to obtain continuous light emission with particularly high brightness and high efficiency.
  • a large number of holes reach the inside or the interface of the phosphor particles, and the holes are rapidly injected from the electrode facing the electron injection electrode, and the phosphor It is necessary to reach the particle or interface. Therefore, as a result of intensive studies, the present inventor has made the structure of the light emitting layer 3 one of the above (i) and (ii), thereby injecting the inside of the n-type semiconductor particles or the interface electrons.
  • holes can be injected efficiently. That is, according to the light-emitting layer 3 having each structure described above, electrons injected from the electrode reach the n-type semiconductor particles 21 through the p-type semiconductor 23, and more from the other electrode. Holes reach the phosphor particles, and light can be efficiently emitted by recombination of electrons and holes. Thus, a planar light emitting device that emits light with high luminance at a low voltage can be realized, and the present invention has been achieved. In addition, by introducing a donor or acceptor, recombination of free electrons and holes captured by the acceptor, recombination of free holes and electrons captured by the donor, and donor-acceptor pair emission are also possible. It is. Furthermore, light emission by energy transfer is also possible due to the proximity of other ion species.
  • the transparent electrode 2 and the back electrode 4 are, for example, ZnO, AZO (for example, zinc oxide) It is preferable to use an electrode made of a metal oxide containing zinc, such as one doped with aluminum) or GZO (zinc oxide doped with gallium, for example).
  • a zinc-based material such as ZnS
  • AZO for example, zinc oxide
  • the present inventor has found that light can be emitted with high efficiency by employing a combination of specific n-type semiconductor particles 21 and specific transparent electrode 2 (or back electrode 4).
  • the work function of Z ⁇ is 5.8 eV
  • ITO indium oxide
  • the work function of tin is 7. OeV.
  • the work function of the zinc-based material that is the n-type semiconductor particle 21 of the light-emitting layer 3 is 5 to 6 eV
  • the work function of ZnO is closer to the work function of the zinc-based material than that of ITO.
  • electron injection into layer 3 is good.
  • AZO and GZO which are zinc-based materials, are used as the transparent electrode 2 (or the back electrode 4).
  • FIG. 24 (a) is a schematic view of the vicinity of the interface between the light-emitting layer 3 made of ZnS and the transparent electrode 2 (or the back electrode 4) made of AZO.
  • Fig. 24 (b) is a schematic diagram illustrating the displacement of potential energy in Fig. 24 (a).
  • FIG. 25 (a) is a schematic diagram of an interface between the light emitting layer 3 having ZnS force and the transparent electrode made of ITO as a comparative example.
  • FIG. 25 (b) is a schematic diagram for explaining the displacement of potential energy in FIG. 25 (a).
  • the n-type semiconductor particles 21 constituting the light emitting layer 3 are zinc-based material (ZnS) and the transparent electrode 2 (or the back electrode) Since 4) is a zinc oxide-based material (AZO), it can be used at the interface between transparent electrode 2 (or back electrode 4) and light-emitting layer 3.
  • the resulting oxide is zinc oxide (ZnO).
  • the doping material (A1) diffuses during film formation, and a low-resistance oxide film is formed.
  • the zinc oxide-based (AZO) transparent electrode 2 (or the back electrode 4) has a hexagonal crystal structure, but is a zinc-based material (ZnS) that is the n-type semiconductor substance 21 constituting the light-emitting layer 3. ) Also has a hexagonal or cubic crystal structure, so the strain is small and the energy barrier is small at the interface between the two. As a result, as shown in FIG. 24 (b), the displacement of potential energy is small.
  • the transparent electrode is ITO which is not a zinc-based material, so the oxide film (ZnO) formed at the interface has a different crystal structure from that of ITO. This increases the energy barrier at the interface. Therefore, as shown in FIG. 25 (b), the displacement of the potential energy increases at the interface, and the light emission efficiency of the light emitting element decreases.
  • the transparent electrode 2 (or the back electrode 4) made of a zinc oxide-based material is used. By combining them, a planar light emitting device with high luminous efficiency can be provided.
  • the transparent electrode 2 (or the back electrode 4) containing zinc
  • the force described by taking AZO doped with aluminum and GZO doped with gallium as examples.
  • Embodiment 7 an example of a method for manufacturing the planar light emitting device 10 according to Embodiment 7 will be described.
  • the same manufacturing method can be used for the light emitting layer made of the other materials described above.
  • a planar back electrode 4 is formed on the substrate 1. For example, using A1, it is formed by the photolithographic method.
  • the film thickness is 200 nm.
  • a planar light emitting layer 3 is formed on the back electrode 4. ZnS and Cu S in multiple evaporation sources
  • planar transparent electrode 2 is formed using, for example, ITO.
  • the film thickness is 200 ⁇ m.
  • a transparent insulator layer such as silicon nitride is formed on the light emitting layer 3 and the transparent electrode 2 as a protective layer (not shown).
  • planar light emitting device 10 of the seventh embodiment is obtained.
  • the transparent electrode 2 and the back electrode 4 are connected to the direct current power source 5, and the direct current voltage is applied between them to perform the light emission evaluation. It started to emit light at a voltage of 15V, and showed an emission luminance of about 600cd / m 2 at 35V.
  • FIG. 27 is a schematic perspective view showing the configuration of the planar light emitting device 10c according to Embodiment 8 of the present invention.
  • FIG. 28 is a schematic cross-sectional view showing the configuration of the cross section S of FIG.
  • FIG. 29 is a plan view of the planar light emitting device 10c.
  • the planar light emitting device 10c has the first and second electrodes 2a and 2b in a striped shape on two parallel virtual planes facing each other. The first electrode 2a and the projection of the second electrode 2b on the virtual plane on which the first electrode 2a is provided do not overlap with each other.
  • the portion of the light emitting layer sandwiched between the first electrode 2a and the second electrode 2b is a place where the current density is high, and light emission occurs from this place.
  • the first electrode 2a and the second electrode 2b are arranged so as to be shifted from each other, so that the first electrode 2a and the second electrode 2b that emit light are generated. Most of the light emitted from the light emitting layer sandwiched between the two can be extracted outside without being shielded by the electrodes.
  • the light emitting layer 3 includes (i) the p-type semiconductor 23 between the n-type semiconductor particles 21. Segregated structure (Fig. 21), (ii) Structure in which n-type semiconductor particles 21 are dispersed in the medium of p-type semiconductor 23 (Fig. 23) It has a structure of either.
  • the first and second electrodes 2a, 2b are respectively provided in stripes on two parallel virtual planes facing each other.
  • the first electrode 2a and the projection of the second electrode 2b on the virtual plane on which the first electrode 2a is provided should not overlap each other! /.
  • the inventor has found a problem regarding the electrode position in the planar light emitting device, and has come up with the electrode arrangement as described above. That is, in the planar light emitting device as in Embodiment 7, the resistance of the light emitting layer is low. On the other hand, when a flat transparent electrode film is used on the light emitting surface side, the resistance of the transparent electrode is relatively large. The inventor has found that the voltage drop occurs according to the distance from the terminal in the transparent electrode due to the resistance of the transparent electrode being low and the resistance of the light emitting layer being low. For example, FIG. As shown in the figure, it has been found that there is a problem that uneven light emission occurs in a plane.
  • the metal electrodes can be provided in stripes to form a light emitting surface.
  • voltage drop in the plane is prevented and the light emitting layer is exposed between the striped electrodes. Can do.
  • the inventor further provided the first and second electrodes 2a and 2b in stripes on two parallel virtual planes facing each other, and the first electrode 2a and the first electrode
  • the present invention has been conceived of the configuration of the present invention in which the second electrode 2b is projected so as not to overlap the virtual plane on which the first electrode 2a is provided.
  • the stripe-shaped first electrode 2a formed on the substrate 1 is parallel to the first electrode 2a and is perpendicular to the substrate. If you look at It has a striped second electrode 2b provided so as not to overlap the first electrode 2a, and a light emitting layer 3 interposed between the second electrode 2b and the first electrode 2a. Both striped electrodes 2a and 2b are metal electrodes.
  • the light emitting layer 3 in the region between the electrodes 2a and 2b emits light by applying a voltage between the electrodes 2a and 2b.
  • a transparent electrode material for the electrode so that uniform planar light emission can be obtained and the cost can be reduced.
  • light can be extracted from both the front and back sides.
  • a metal film such as molybdenum (Mo), tungsten (W), or titanium (Ti) is formed on the substrate 1 by a method such as vapor deposition or sputtering (FIG. 30 (a)).
  • the light emitting layer 3 is formed on the substrate 1 and the first electrode 2a.
  • a long beam is irradiated to form a light emitting layer 3 on the substrate 1.
  • the substrate temperature is 200 ° C., and ZnS and Cu S are co-evaporated.
  • a metal such as molybdenum (Mo), tungsten (W) or titanium (Ti) is deposited on the light emitting layer 3 by a method such as vapor deposition or sputtering (FIG. 30 (f)).
  • any force conductive material using metal as the material of the first electrode 2a and the second electrode 2b may be used, and an oxide such as ZnO may be used.
  • any force can be used as long as the pattern can be patterned into a stripe shape without being limited to the force of patterning the electrode using a photolithographic technique.
  • a pattern jung method such as pattern jung by printing may be used.
  • FIG. 31 is a cross-sectional view showing a configuration of a planar light emitting device 10d according to Embodiment 9 of the present invention.
  • the planar light emitting device 10d is different from the planar light emitting device according to the eighth embodiment in that the force S, which is different in that the first electrode 2a is embedded on the substrate 1 side, and other features Same as in state 8.
  • the planar light emitting device includes the first and second electrodes provided on two parallel virtual planes facing each other, and the first and second electrodes facing each other.
  • a dielectric layer provided at least partially sandwiched, and a light emitting layer electrically connected to the first and second electrodes and having a light emitting surface exposed, the light emitting layer comprising: It is characterized in that n-type semiconductor particles are dispersed in a p-type semiconductor medium.
  • FIG. 32 is a schematic cross-sectional view showing a configuration of a planar light emitting device 10e according to Embodiment 10 of the present invention.
  • the planar light emitting device 10e according to the tenth embodiment includes a planar first electrode 2a formed on the substrate 1, a dielectric layer 4 and a dielectric layer formed on the first electrode 2a. Striped second electrode 2b formed on top of 4 and dielectric in the same plane as dielectric layer 4 And a light emitting layer 3 embedded between body layers.
  • the striped second electrode 2b is provided on a virtual plane parallel to the plane on which the first electrode 2a is provided.
  • the first electrode 2a and the second electrode 2b have opposing portions. That is, the flat electrode 2a as the first electrode and a portion where the projection of the second electrode 2b on the virtual plane on which the first electrode 2a is provided overlap.
  • the dielectric layer 4 is formed while the first electrode 2a and the second electrode 2b face each other.
  • the light emitting layer 3 is formed in a portion where the first electrode 2a and the second electrode 2b are not opposed to each other.
  • the light emitting layer 3 and the dielectric layer 4 are formed in the same plane, that is, in the same layer.
  • the dielectric layer 4 may be provided so that at least a part is sandwiched between the first electrode 2a and the second electrode 2b facing each other.
  • the light emitting layer 3 is electrically connected to the first electrode 2a and the second electrode 2b, respectively.
  • the light emitting layer 3 protrudes to the layer of the striped second electrode 2b, and is in contact therewith.
  • the side surface of the striped second electrode 2 b is in contact with the light emitting layer 3.
  • the side surface of the striped second electrode 2b is a surface perpendicular to the virtual plane on which the side surface of the striped second electrode 2b is provided among the surfaces of the striped second electrode 2b. That is. With such a configuration, the light emitting layer 3 is exposed.
  • the light emitting layer 3 in the region between the electrodes 2a and 2b emits light by applying a voltage between the electrodes 2a and 2b.
  • the light emitting layer 3 is exposed without being blocked by the second electrode 2b, and the light emitted from the light emitting layer 3 can be easily extracted to the outside. And since it is not necessary to use a transparent electrode material for an electrode, uniform plane light emission can be obtained and cost reduction is attained.
  • a metal such as molybdenum (Mo), tungsten (W), or titanium (Ti) is formed on the substrate 1 by a method such as vapor deposition or sputtering, and further on the vapor-deposited metal film.
  • a dielectric film is formed (Fig. 33 (a)).
  • the light emitting layer 3 is formed on the substrate 1 and the first electrode 2a in the opening.
  • ZnS and Cu S powders are put into multiple evaporation sources, and each material is used in vacuum (10_ 6 T OT r)
  • the substrate temperature is set to 200 ° C, and ZnS and CuS are co-evaporated.
  • a metal such as molybdenum (Mo), tungsten (W) or titanium (Ti) is deposited on the light emitting layer 3 and the dielectric layer 4 by a method such as vapor deposition or sputtering (FIG. 33). (f)).
  • any conductive material may be used, and an oxide such as ZnO may be used.
  • pattern jung is performed using a photolithographic technique. However, if the pattern jung can be formed in a stripe shape, a pattern jung method such as pattern jung by printing may be used! /.
  • FIG. 34 is a schematic sectional view showing the structure of the planar light emitting device 10f according to the eleventh embodiment.
  • This planar light emitting device 10f has substantially the same configuration as the planar light emitting device according to the tenth embodiment. The difference is that the light-emitting layer 3 having a power is provided through the first electrode 2a. Also in this case, since the light-emitting layer 3 and the second electrode 2b are connected at the side surface of the electrode 2b, the light-emitting layer 3 is exposed without being blocked by the second electrode 2b, and the light-emitting layer 3 The light emitted from can be easily taken out.
  • FIGS. 35 (a) to 35 (i) are schematic cross-sectional views showing respective steps of the method for manufacturing planar light emitting device 10f according to Embodiment 11. Compared with the manufacturing method of the planar light emitting device according to Embodiment 4, the manufacturing method of the planar light emitting device 10f is as follows for step (c) as shown in FIG.
  • the force for providing the light emitting layer 3 through the first electrode 2a and as shown in the fourth embodiment, the light emitting layer 3 is disposed on the first electrode 2a. It may be appropriately selected depending on the characteristics of the material.
  • FIG. 36 is a schematic sectional view showing the structure of the planar light emitting device 10g according to the twelfth embodiment.
  • the first and second electrodes are separated from each other in the same plane on the substrate as compared with the planar light emitting devices according to Embodiments 7 to 11. Are different in that they are provided.
  • the first and second electrodes 2a and 2b are provided on the same surface of the substrate, and the light emitting layer is provided on both the electrodes 2a and 2b. It can be exposed as a surface, and light emitted from the light emitting layer 3 can be easily taken out.
  • planar light emitting device is useful as a planar light emitting device, and particularly useful as a backlight for a liquid crystal display device or the like.

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Abstract

A surface-emitting device comprises first and second electrodes provided on two parallel virtual opposed planes and a light-emitting layer interposed between the first and second electrodes. The projection of the second electrode onto the virtual plane where the first electrode is provided does not overlap with the first electrode. The light-emitting layer has a polycrystalline structure made of a first semiconductor material. A second semiconductor material different from the first semiconductor material is precipitated at the grain boundaries of the polycrystalline structure.

Description

明 細 書  Specification
面状発光装置  Planar light emitting device
技術分野  Technical field
[0001] 本発明は、エレクト口ルミネッセンス素子（以下、 ELと略記する。）を用いた面状発 光装置に関する。  TECHNICAL FIELD [0001] The present invention relates to a planar light emitting device using an electoric luminescence element (hereinafter abbreviated as EL).
背景技術  Background art
[0002] 近年、多くの種類の平面型の表示装置の中でも、エレクト口ルミネッセンス素子を用 いた表示装置に期待が集まっている。この EL素子を用いた表示装置は、自発光性 を有し、視認性に優れ、視野角が広ぐ応答性が速いなどの特徴を持つ。また、現在 開発されている EL素子には、発光体として無機材料を用いた無機 EL素子と、発光 体として有機材料を用いた有機 EL素子とがある。  [0002] In recent years, among many types of flat display devices, there has been an expectation for display devices using electoluminescence elements. A display device using this EL element has features such as self-luminous property, excellent visibility, wide viewing angle, and quick response. Also, currently developed EL devices include inorganic EL devices that use inorganic materials as light emitters and organic EL devices that use organic materials as light emitters.
[0003] 無機 EL素子では、例えば硫化亜鉛等の無機蛍光体を発光体として用い、 106V/ cmもの高電界で加速された電子が蛍光体の発光中心を衝突励起し、それらが緩和 する際に発光する。さらに、無機 EL素子には、蛍光体粉末を高分子有機材料等に 分散させた発光層を形成し、その上下に電極を設けた構造の分散型 EL素子と、一 対の電極間に二層の誘電体層と、更に二層の誘電体層の間に挟まれた薄膜発光層 とを設けた薄膜型 EL素子がある。これらのうち、前者の分散型 EL素子は、製造が容 易ではあるが、輝度が低く寿命が短いため、その利用は限られてきた。一方、後者の 薄膜型 EL素子では、 1974年に猪口らによって提案された二重絶縁構造の素子が 高い輝度と長寿命を持つことを示し、車載用ディスプレイ等への実用化がなされた（ 例えば、特許文献 1参照。）。 [0003] In inorganic EL elements, for example, an inorganic phosphor such as zinc sulfide is used as a light emitter, and electrons accelerated by a high electric field of 10 6 V / cm collide and excite the emission center of the phosphor to relax them. When it emits light. In addition, inorganic EL elements have a light-emitting layer in which phosphor powder is dispersed in a polymer organic material, etc., and two layers between the pair of electrodes. There is a thin-film EL element provided with a dielectric layer and a thin-film light emitting layer sandwiched between two dielectric layers. Of these, the former distributed EL element is easy to manufacture, but its use has been limited due to its low brightness and short lifetime. On the other hand, in the latter thin-film EL element, the double insulation structure element proposed by Higuchi et al. In 1974 showed high brightness and long life, and was put into practical use for in-vehicle displays (for example, And Patent Document 1).
[0004] 図 37を用いて、従来の無機 EL素子について説明する。図 37は、二重絶縁構造の 薄膜型 EL素子 50の発光面に垂直な断面図である。この EL素子 50は、基板 51上に 透明電極 52と、第 1誘電体層 53と、発光層 54と、第 2誘電体層 55と、背面電極 56と 1S この順に積層された構造となっている。透明電極 52と背面電極 56との間に交流 電圧源 57から交流電圧を印加して透明電極 52側より発光を取り出す。誘電体層 53 、 55は、発光層 54内を流れる電流を制限する機能を有し、 EL素子 50の絶縁破壊を 抑えることが可能であり、且つ安定な発光特性が得られるように作用する。また、透明 電極 52と、背面電極 56とを、互いに直交するようにストライプ上にパターユングし、マ トリックスで選択された特定の画素に電圧を印加することにより、任意のパターン表示 を行うパッシブマトリックス駆動方式の表示装置が知られている。 A conventional inorganic EL element will be described with reference to FIG. FIG. 37 is a cross-sectional view perpendicular to the light emitting surface of the thin-film EL element 50 having a double insulation structure. This EL element 50 has a structure in which a transparent electrode 52, a first dielectric layer 53, a light emitting layer 54, a second dielectric layer 55, a back electrode 56 and 1S are laminated in this order on a substrate 51. Yes. An AC voltage is applied from the AC voltage source 57 between the transparent electrode 52 and the back electrode 56 to extract light emission from the transparent electrode 52 side. The dielectric layers 53 and 55 have a function of limiting the current flowing in the light emitting layer 54, and prevent dielectric breakdown of the EL element 50. It can be suppressed and acts so that stable light emission characteristics can be obtained. In addition, the transparent electrode 52 and the back electrode 56 are patterned on the stripe so as to be orthogonal to each other, and a voltage is applied to a specific pixel selected by the matrix, thereby performing a passive matrix that displays an arbitrary pattern. Drive-type display devices are known.
[0005] 前記誘電体層 53、 55として用いられる誘電体材料は、高誘電率で絶縁抵抗、耐電 圧が高いことが好ましぐ一般的には、 Y O 、 Ta O、 Al O、 Si N、 BaTiO 、 SrT [0005] It is preferable that the dielectric material used as the dielectric layers 53 and 55 has a high dielectric constant, high insulation resistance, and high withstand voltage. Generally, YO, TaO, AlO, SiN, BaTiO, SrT
2 3 2 5 2 3 3 4 3 iO 、 PbTiO 、 CaTiO 、 Sr (Zr、 Ti) 0等のぺロブスカイト構造を有する誘電体材料 2 3 2 5 2 3 3 4 3 Dielectric material with perovskite structure such as iO, PbTiO, CaTiO, Sr (Zr, Ti) 0
3 3 3 3 3 3 3 3
が用いられる。一方、前記発光層 54として用いられる無機蛍光材料は、一般に絶縁 物結晶を母体結晶として、その中に発光中心となる元素をドープしたものである。こ の母体結晶には物理的化学的に安定であるものが用いられるため、無機 EL素子は 信頼性が高ぐ寿命も 3万時間以上を実現している。例えば、発光層に ZnSを主体と し、 Mn、 Cr、 Tb、 Eu、 Tm、 Yb等の遷移金属元素や希土類元素をドープすることに よって、発光輝度の向上が図られている（例えば、特許文献 2参照。）。  Is used. On the other hand, the inorganic fluorescent material used as the light-emitting layer 54 is generally a material in which an insulator crystal is used as a base crystal and an element serving as a light emission center is doped therein. Since this host crystal is physically and chemically stable, inorganic EL devices are highly reliable and have a lifetime of more than 30,000 hours. For example, the emission luminance is improved by doping the light emitting layer mainly with ZnS and doping with transition metal elements such as Mn, Cr, Tb, Eu, Tm, and Yb or rare earth elements (for example, patents). (Ref. 2).
[0006] 一般に、発光層 54に使用される ZnS等の第 12族一第 16族間化合物半導体は、 多結晶体で構成されている。このため発光層 54中には多くの結晶粒界が存在する。 この結晶粒界は、電界印加によって加速された電子に対して散乱体として働くため、 発光中心の励起効率が著しく低下する。又、結晶粒界では結晶方位のずれ等のた めに格子歪みも大きぐ EL発光に有害な非放射再結合中心も多く存在する。これら の原因によって、無機 EL素子の発光輝度は低ぐ実用上不十分である。  [0006] In general, a Group 12-Group 16 compound semiconductor such as ZnS used for the light-emitting layer 54 is composed of a polycrystal. Therefore, many crystal grain boundaries exist in the light emitting layer 54. This grain boundary acts as a scatterer for electrons accelerated by the application of an electric field, so that the excitation efficiency of the emission center is significantly reduced. In addition, there are many non-radiative recombination centers that are harmful to EL emission due to large lattice distortions due to misalignment of crystal orientation at the grain boundaries. For these reasons, the light emission luminance of inorganic EL elements is low and practically insufficient.
[0007] 上記課題を解決するために、発光層の結晶粒径の大粒径化ゃ結晶性を改善する 方法が提案されている。特許文献 3に記載の技術によれば、第 1電極が特定の結晶 方位を有し、その上に積層される第 1誘電体層が前記第 1電極と等価な結晶方位を 有し、さらにその上に積層される発光層が第 1誘電体層と等価な結晶方位を有した 無機 EL素子とすることで、厚み方向に対する結晶粒界を抑制し、発光輝度の改善が 図られている。また、特許文献 4に記載の技術によれば、希土類元素を添加した発光 層において、希土類元素の濃度を規定することで、成長初期における結晶成長核の 数を均一で適切な量としている。これによつて、成長の初期段階から粒径の揃った柱 状結晶が形成でき、発光輝度の改善が図られている。 [0008] 特許文献 1 :特公昭 52— 33491号公報 [0007] In order to solve the above problems, a method for improving crystallinity has been proposed if the crystal grain size of the light emitting layer is increased. According to the technique described in Patent Document 3, the first electrode has a specific crystal orientation, the first dielectric layer stacked thereon has a crystal orientation equivalent to the first electrode, and further By using an inorganic EL element in which the light emitting layer stacked thereon has a crystal orientation equivalent to that of the first dielectric layer, the grain boundary in the thickness direction is suppressed and the light emission luminance is improved. Further, according to the technique described in Patent Document 4, the number of crystal growth nuclei in the initial stage of growth is made uniform and appropriate by regulating the rare earth element concentration in the light emitting layer to which the rare earth element is added. As a result, columnar crystals having a uniform grain size can be formed from the initial stage of growth, and the emission luminance is improved. [0008] Patent Document 1: Japanese Patent Publication No. 52-33491
特許文献 2：特公昭 54— 8080号公報  Patent Document 2: Japanese Patent Publication No. 54-8080
特許文献 3 :特開平 6— 36876号公報  Patent Document 3: Japanese Patent Laid-Open No. 6-36876
特許文献 4 :特開平 6— 196262号公報  Patent Document 4: JP-A-6-196262
発明の開示  Disclosure of the invention
発明が解決しょうとする課題  Problems to be solved by the invention
[0009] 前述のような無機 EL素子をテレビ等の高品位のディスプレイデバイス用のバックラ イト等として利用する場合には、 300cd/m2程度の輝度が必要とされる。前述の提 案によれば一定の効果は得られるものの、発光輝度 150cd/m2と未だ不十分であ る。また、発光には通常数 100Vの電圧を印加する必要がある。さらに、発光を維持 するためには、交流電圧を数 10kHzの高周波で印加する必要がある等の課題があ [0009] When the inorganic EL element as described above is used as a backlight for a high-quality display device such as a television, a luminance of about 300 cd / m 2 is required. According to the above proposal, although a certain effect can be obtained, the light emission luminance of 150 cd / m 2 is still insufficient. In addition, it is usually necessary to apply a voltage of several hundred volts for light emission. Furthermore, in order to maintain light emission, there are problems such as the need to apply an AC voltage at a high frequency of several tens of kHz.
[0010] 本発明の目的は、寿命が長ぐ発光輝度も高い発光素子を用いた面状発光装置を 提供することである。 An object of the present invention is to provide a planar light emitting device using a light emitting element having a long lifetime and high light emission luminance.
課題を解決するための手段  Means for solving the problem
[0011] 本発明に係る面状発光装置は、基板と、  [0011] A planar light emitting device according to the present invention includes a substrate,
前記基板上に設けた平面状の背面電極と、  A planar back electrode provided on the substrate;
前記背面電極と対向して設けられた平面状の透明電極と、  A planar transparent electrode provided facing the back electrode;
前記背面電極と前記透明電極との間に挟まれて設けられた少なくとも 1層の平面状 の発光層と  At least one planar light-emitting layer sandwiched between the back electrode and the transparent electrode;
を備え、  With
前記発光層は、第 1半導体物質よりなる多結晶体構造であって、前記多結晶体構 造の粒界に前記第 1半導体物質とは異なる第 2半導体物質が偏析していることを特 徴とする。  The light emitting layer has a polycrystalline structure made of a first semiconductor material, and a second semiconductor material different from the first semiconductor material is segregated at a grain boundary of the polycrystalline structure. And
[0012] 本発明に係る面状発光装置は、互いに対向する 2枚の平行な仮想平面上にそれ ぞれ設けられた第 1及び第 2の電極と、  [0012] A planar light emitting device according to the present invention includes a first electrode and a second electrode respectively provided on two parallel virtual planes facing each other;
前記第 1及び第 2の電極の間に挟まれて設けられた発光層と  A light emitting layer provided between the first and second electrodes;
を備え、 前記第 1の電極と、前記第 1の電極が設けられている前記仮想平面 の前記第 2の 電極の射影とが互いに重ならな!/、と共に、 With The first electrode and the projection of the second electrode of the virtual plane on which the first electrode is provided must overlap each other! /
前記発光層は、第 1半導体物質よりなる多結晶体構造であって、前記多結晶体構 造の粒界に前記第 1半導体物質とは異なる第 2半導体物質が偏析していることを特 徴とする。  The light emitting layer has a polycrystalline structure made of a first semiconductor material, and a second semiconductor material different from the first semiconductor material is segregated at a grain boundary of the polycrystalline structure. And
[0013] 本発明に係る面状発光装置は、基板と、  [0013] A planar light emitting device according to the present invention includes a substrate,
前記基板上の同一面内に互いに離間して設けられた第 1及び第 2の電極と、 前記第 1及び第 2の電極の上に設けられた発光層と  A first electrode and a second electrode provided apart from each other in the same plane on the substrate; a light emitting layer provided on the first electrode and the second electrode;
を備え、  With
前記発光層は、第 1半導体物質よりなる多結晶体構造であって、前記多結晶体構 造の粒界に前記第 1半導体物質とは異なる第 2半導体物質が偏析していることを特 徴とする。  The light emitting layer has a polycrystalline structure made of a first semiconductor material, and a second semiconductor material different from the first semiconductor material is segregated at a grain boundary of the polycrystalline structure. And
[0014] 本発明に係る面状発光装置は、互いに対向する 2枚の平行な仮想平面上にそれ ぞれ設けられた第 1及び第 2の電極と、  The planar light emitting device according to the present invention includes first and second electrodes respectively provided on two parallel virtual planes facing each other,
前記第 1及び第 2の電極が対向する間に少なくとも一部が挟まれて設けられた誘電 体層と、  A dielectric layer provided with at least a portion sandwiched between the first and second electrodes facing each other;
前記第 1及び第 2の電極とに電気的に接続され、発光面が露出している発光層と を備え、  A light emitting layer electrically connected to the first and second electrodes and having a light emitting surface exposed,
前記発光層は、第 1半導体物質よりなる多結晶体構造であって、前記多結晶体構 造の粒界に前記第 1半導体物質とは異なる第 2半導体物質が偏析していることを特 徴とする。  The light emitting layer has a polycrystalline structure made of a first semiconductor material, and a second semiconductor material different from the first semiconductor material is segregated at a grain boundary of the polycrystalline structure. And
[0015] また、前記第 1半導体物質と前記第 2半導体物質とは、互いに異なる伝導型の半導 体構造を有するものであってもよい。例えば、前記第 1半導体物質は n型半導体構造 を有し、前記第 2半導体物質は p型半導体構造を有するものであってもよ!/、。  [0015] Further, the first semiconductor material and the second semiconductor material may have semiconductor structures of different conductivity types. For example, the first semiconductor material may have an n-type semiconductor structure, and the second semiconductor material may have a p-type semiconductor structure! /.
[0016] さらに、前記第 1半導体物質及び前記第 2半導体物質は、それぞれ化合物半導体 であってもよい。またさらに、前記第 1半導体物質は、第 12族 第 16族間化合物半 導体であってもよい。また、前記第 1半導体物質は、立方晶構造を有するものであつ てもよい。 [0017] さらに、前記第 1半導体物質は、 Cu、 Ag、 Au、 Ir、 Al、 Ga、 In、 Mn、 Cl、 Br、 I、 Li 、 Ce、 Pr、 Nd、 Pm、 Sm、 Eu、 Gd、 Tb、 Dy、 Ho、 Er、 Tm、 Yb力もなる群より選択 される少なくとも一種の元素を含んでレ、てもよ!/、。 [0016] Furthermore, each of the first semiconductor material and the second semiconductor material may be a compound semiconductor. Still further, the first semiconductor material may be a Group 12 Group 16 compound semiconductor. The first semiconductor material may have a cubic structure. [0017] Further, the first semiconductor material is Cu, Ag, Au, Ir, Al, Ga, In, Mn, Cl, Br, I, Li, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb may contain at least one element selected from the group of forces!
[0018] またさらに、前記第 1半導体物質よりなる多結晶体構造の平均結晶粒子径は、 5〜  [0018] Furthermore, the average crystal particle size of the polycrystalline structure made of the first semiconductor material is 5 to
500nmの範囲にあってもよい。  It may be in the range of 500 nm.
[0019] また、前記第 2半導体物質は、 ZnS、 ZnSe、 ZnSSe、 ZnSeTe、 ZnTe、 GaN、 In GaNの!/、ずれかであってもよ!、。  [0019] Further, the second semiconductor material may be ZnS, ZnSe, ZnSSe, ZnSeTe, ZnTe, GaN, or InGaN! /.
[0020] さらに、前記第 1半導体物質が亜鉛を含む亜鉛系材料であってもよい。この場合に は、前記電極のうち、少なくとも一方は、亜鉛を含む材料からなることが好ましい。ま たさらに、前記一方の電極を構成する前記亜鉛を含む材料は、酸化亜鉛を主体とし 、アルミニウム、ガリウム、チタン、ニオブ、タンタル、タングステン、銅、銀、ホウ素から なる群から選ばれる少なくとも一種を含むものであってもよい。  [0020] Furthermore, the first semiconductor substance may be a zinc-based material containing zinc. In this case, at least one of the electrodes is preferably made of a material containing zinc. Furthermore, the zinc-containing material constituting the one electrode is composed mainly of zinc oxide and includes at least one selected from the group consisting of aluminum, gallium, titanium, niobium, tantalum, tungsten, copper, silver, and boron. It may be included.
[0021] 本発明に係る面状発光装置は、基板と、 [0021] A planar light emitting device according to the present invention includes a substrate,
前記基板上に設けた平面状の背面電極と、  A planar back electrode provided on the substrate;
前記背面電極と対向して設けられた平面状の透明電極と、  A planar transparent electrode provided facing the back electrode;
前記背面電極と前記透明電極との間に挟まれて設けられた少なくとも 1層の平面状 の発光層と  At least one planar light-emitting layer sandwiched between the back electrode and the transparent electrode;
を備え、  With
前記発光層が、 P型半導体と n型半導体とを有していることを特徴とする。  The light-emitting layer includes a P-type semiconductor and an n-type semiconductor.
[0022] 本発明に係る面状発光装置は、互いに対向する 2枚の平行な仮想平面上にそれ ぞれ設けられた第 1及び第 2の電極と、 [0022] The planar light emitting device according to the present invention includes first and second electrodes respectively provided on two parallel virtual planes facing each other,
前記第 1及び第 2の電極の間に挟まれて設けられた発光層と  A light emitting layer provided between the first and second electrodes;
を備え、  With
前記第 1の電極と、前記第 1の電極が設けられている前記仮想平面 の前記第 2の 電極の射影とが互いに重ならな!/、と共に、  The first electrode and the projection of the second electrode of the virtual plane on which the first electrode is provided must overlap each other! /
前記発光層が、 P型半導体と n型半導体とを有していることを特徴とする。  The light-emitting layer includes a P-type semiconductor and an n-type semiconductor.
[0023] 本発明に係る面状発光装置は、基板と、 [0023] A planar light emitting device according to the present invention comprises a substrate,
前記基板上の同一面内に互いに離間して設けられた第 1及び第 2の電極と、 前記第 1及び第 2の電極の上に設けられた発光層と First and second electrodes spaced apart from each other in the same plane on the substrate; A light emitting layer provided on the first and second electrodes;
を備え、  With
前記発光層が、 P型半導体と n型半導体とを有していることを特徴とする。  The light-emitting layer includes a P-type semiconductor and an n-type semiconductor.
[0024] 本発明に係る面状発光装置は、互いに対向する 2枚の平行な仮想平面上にそれ ぞれ設けられた第 1及び第 2の電極と、 [0024] The planar light emitting device according to the present invention includes first and second electrodes respectively provided on two parallel virtual planes facing each other,
前記第 1及び第 2の電極が対向する間に少なくとも一部が挟まれて設けられた誘電 体層と、  A dielectric layer provided with at least a portion sandwiched between the first and second electrodes facing each other;
前記第 1及び第 2の電極とに電気的に接続され、発光面が露出している発光層と を備え、  A light emitting layer electrically connected to the first and second electrodes and having a light emitting surface exposed,
前記発光層が、 P型半導体と n型半導体とを有していることを特徴とする。  The light-emitting layer includes a P-type semiconductor and an n-type semiconductor.
[0025] 前記発光層は、 p型半導体の媒体の中に n型半導体粒子が分散して構成されてい てもよい。また、前記発光層は、 n型半導体粒子の集合体で構成され、該粒子間に p 型半導体が偏析した構成にしてもょレ、。 [0025] The light emitting layer may be formed by dispersing n-type semiconductor particles in a p-type semiconductor medium. In addition, the light emitting layer may be composed of an aggregate of n-type semiconductor particles, and a p-type semiconductor may be segregated between the particles.
[0026] また、前記 n型半導体粒子は、前記 p型半導体を介して前記第 1及び第 2電極と電 気的に接合されてレ、ることが好まし!/、。  [0026] Further, it is preferable that the n-type semiconductor particles are electrically bonded to the first and second electrodes via the p-type semiconductor!
[0027] さらに、前記 n型半導体及び前記 p型半導体は、それぞれ化合物半導体であっても よい。またさらに、前記 n型半導体は、第 12族 第 16族間化合物半導体であっても よい。また、前記 n型半導体は、第 13族—第 15族間化合物半導体であってもよい。 さらに、前記 n型半導体は、カルコパイライト型化合物半導体であってもよい。またさら に、前記 n型半導体は、 ZnS、 ZnSe、 ZnSSe、 ZnSeTe、 ZnTe、 GaN、 InGaNの V、ずれかであってもよ!、。  Furthermore, the n-type semiconductor and the p-type semiconductor may each be a compound semiconductor. Still further, the n-type semiconductor may be a Group 12 Group 16 compound semiconductor. Further, the n-type semiconductor may be a Group 13-Group 15 compound semiconductor. Further, the n-type semiconductor may be a chalcopyrite type compound semiconductor. Furthermore, the n-type semiconductor may be V of ZnS, ZnSe, ZnSSe, ZnSeTe, ZnTe, GaN, or InGaN!
[0028] また、前記 n型半導体が亜鉛を含む亜鉛系材料であってもよ!/、。この場合には、前 記第 1の電極又は前記第 2の電極のうち、少なくとも一方の電極は、亜鉛を含む材料 力、らなることが好ましい。さらに、前記一方の電極を構成する前記亜鉛を含む材料は 、酸化亜鉛を主体とし、アルミニウム、ガリウム、チタン、ニオブ、タンタル、タンダステ ン、銅、銀、ホウ素からなる群から選ばれる少なくとも一種を含んでいてもよい。  [0028] Further, the n-type semiconductor may be a zinc-based material containing zinc! /. In this case, it is preferable that at least one of the first electrode and the second electrode is made of a material force containing zinc. Further, the material containing zinc constituting the one electrode includes zinc oxide as a main component and at least one selected from the group consisting of aluminum, gallium, titanium, niobium, tantalum, tandastain, copper, silver, and boron. You may go out.
[0029] また、前記電極の少なくとも一方に面して支持する支持体基板をさらに備えてもよ い。さらに、前記電極に対向し、且つ、発光取出し方向前方に色変換層をさらに備え てもよい。 [0029] Further, a support substrate may be further provided that faces and supports at least one of the electrodes. Furthermore, a color conversion layer is further provided facing the electrode and in front of the light emission extraction direction. May be.
発明の効果  The invention's effect
[0030] 本発明によれば、寿命が長ぐ発光輝度も高い発光素子を用いた面状発光装置を 提供することが可能となる  [0030] According to the present invention, it is possible to provide a planar light emitting device using a light emitting element having a long lifetime and high emission luminance.
図面の簡単な説明  Brief Description of Drawings
[0031] [図 1]本発明の実施の形態 1に係る面状発光装置の構成を示す概略斜視図である。  FIG. 1 is a schematic perspective view showing a configuration of a planar light emitting device according to Embodiment 1 of the present invention.
[図 2]図 1の断面 Sを矢印の方向から見た断面図である。  2 is a cross-sectional view of the cross section S of FIG. 1 as viewed from the direction of the arrow.
[図 3]図 1の面状発光装置の平面図である。  FIG. 3 is a plan view of the planar light emitting device of FIG. 1.
[図 4]図 2の面状発光装置の発光層の詳細な構成を示す断面図である。  4 is a cross-sectional view showing a detailed configuration of a light emitting layer of the planar light emitting device of FIG.
[図 5] (a)は、 ZnSからなる発光層と AZOからなる透明電極（又は、背面電極）との界 面付近の模式図であり、（b)は、（a)のポテンシャルエネルギーの変位を説明する模 式図である。  [Fig. 5] (a) is a schematic diagram of the vicinity of the interface between the light-emitting layer made of ZnS and the transparent electrode (or back electrode) made of AZO, and (b) shows the displacement of potential energy in (a). FIG.
[図 6] (a)は、比較例として、 ZnSからなる発光層と ITOからなる透明電極との界面の 模式図であり、（b)は、（a)のポテンシャルエネルギーの変位を説明する模式図であ  [FIG. 6] (a) is a schematic diagram of an interface between a light-emitting layer made of ZnS and a transparent electrode made of ITO as a comparative example, and (b) is a schematic diagram for explaining the potential energy displacement of (a). In the figure
[図 7]面状発光装置の端子位置による電流密度不均一さを示す概略図である。 FIG. 7 is a schematic view showing current density non-uniformity depending on terminal positions of the planar light emitting device.
[図 8]本発明の実施の形態 2に係る面状発光装置の構成を示す概略斜視図である。  FIG. 8 is a schematic perspective view showing a configuration of a planar light emitting device according to Embodiment 2 of the present invention.
[図 9]図 8の断面 Sを矢印の方向から見た断面図である。  FIG. 9 is a cross-sectional view of the cross section S of FIG. 8 as viewed from the direction of the arrow.
[図 10]図 8の面状発光装置の平面図である。  10 is a plan view of the planar light emitting device of FIG.
[図 11(a)]本発明の実施の形態 2に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。  FIG. 11 (a) is a schematic cross-sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 2 of the present invention.
[図 11(b)]本発明の実施の形態 2に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。  FIG. 11 (b) is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 2 of the present invention.
[図 11(c)]本発明の実施の形態 2に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。  FIG. 11 (c) is a schematic cross-sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 2 of the present invention.
[図 11(d)]本発明の実施の形態 2に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。  FIG. 11 (d) is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 2 of the present invention.
[図 11(e)]本発明の実施の形態 2に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。 FIG. 11 (e) shows one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 2 of the present invention. FIG.
園 11(f)]本発明の実施の形態 2に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。 FIG. 11 (f)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 2 of the present invention.
園 11(g)]本発明の実施の形態 2に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。 FIG. 11 (g)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 2 of the present invention.
園 11(h)]本発明の実施の形態 2に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。 FIG. 11 (h)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 2 of the present invention.
園 l l(i)]作製された本発明の実施の形態 2に係る面状発光装置の断面図である。 園 12]本発明の実施の形態 3に係る面状発光装置の構成を示す断面図である。 園 13]本発明の実施の形態 4に係る面状発光装置の構成を示す断面図である。 FIG. 11 is a cross-sectional view of the planar light emitting device according to the second embodiment of the present invention. 12] A sectional view showing the structure of the planar light emitting device according to the third embodiment of the present invention. 13] A sectional view showing the structure of the planar light emitting device according to the fourth embodiment of the present invention.
[図 14(a)]本発明の実施の形態 4に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。 FIG. 14 (a) is a schematic cross-sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 4 of the present invention.
[図 14(b)]本発明の実施の形態 4に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。  FIG. 14 (b) is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 4 of the present invention.
園 14(c)]本発明の実施の形態 4に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。 14 (c)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 4 of the present invention.
[図 14(d)]本発明の実施の形態 4に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。  FIG. 14 (d) is a schematic cross-sectional view showing one of the steps of a method for manufacturing a planar light emitting device according to Embodiment 4 of the present invention.
[図 14(e)]本発明の実施の形態 4に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。  FIG. 14 (e) is a schematic cross-sectional view showing one of the steps of a method for manufacturing a planar light emitting device according to Embodiment 4 of the present invention.
園 14(f)]本発明の実施の形態 4に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。 14 (f)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 4 of the present invention.
[図 14(g)]本発明の実施の形態 4に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。  FIG. 14 (g) is a schematic cross-sectional view showing one of the steps of a method for manufacturing the planar light emitting device according to Embodiment 4 of the present invention.
[図 14(h)]本発明の実施の形態 4に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。  [FIG. 14 (h)] FIG. 14 (h) is a schematic cross-sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 4 of the present invention.
園 14(i)]作製された本発明の実施の形態 4に係る面状発光装置の断面図である。 園 15]本発明の実施の形態 5に係る面状発光装置の構成を示す断面図である。 園 16(a)]本発明の実施の形態 5に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。 14 (i)] is a cross-sectional view of the manufactured planar light emitting device according to Embodiment 4 of the present invention. 15] A sectional view showing the structure of the planar light emitting device according to Embodiment 5 of the present invention. 16 (a)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 5 of the present invention.
園 16(b)]本発明の実施の形態 5に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。 16 (b)] It is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 5 of the present invention.
園 16(c)]本発明の実施の形態 5に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。 FIG. 16 (c)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 5 of the present invention.
園 16(d)]本発明の実施の形態 5に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。 16 (d)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 5 of the present invention.
園 16(e)]本発明の実施の形態 5に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。 16 (e)] is a schematic cross-sectional view showing one of the steps of a method for manufacturing the planar light emitting device according to Embodiment 5 of the present invention.
園 16(f)]本発明の実施の形態 5に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。 16 (f)] FIG. 16 is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 5 of the present invention.
園 16(g)]本発明の実施の形態 5に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。 16 (g)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 5 of the present invention.
園 16(h)]本発明の実施の形態 5に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。 16 (h)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 5 of the present invention.
園 16(i)]作製された本発明の実施の形態 5に係る面状発光装置の断面図である。 園 17]本発明の実施の形態 6に係る面状発光装置の構成を示す断面図である。 園 18]本発明の実施の形態 7に係る面状発光装置の構成を示す概略斜視図である 園 19]図 18の断面 Sを矢印の方向から見た断面図である。 16 (i)] is a cross-sectional view of the surface light-emitting device according to Embodiment 5 of the present invention that was manufactured. 17] A sectional view showing the structure of the planar light emitting device according to the sixth embodiment of the present invention. 18] It is a schematic perspective view showing the configuration of the planar light emitting device according to Embodiment 7 of the present invention. 19] FIG. 19 is a cross-sectional view of section S of FIG. 18 as viewed from the direction of the arrow.
[図 20]図 18の面状発光装置の平面図である。 20 is a plan view of the planar light emitting device of FIG.
[図 21]図 19の面状発光装置の発光層の詳細な構成を示す断面図である。  21 is a cross-sectional view showing a detailed configuration of a light emitting layer of the planar light emitting device of FIG.
[図 22]別例の面状発光装置の断面図である。  FIG. 22 is a cross-sectional view of another example of a planar light emitting device.
園 23]さらに別例の面状発光装置の断面図である。 FIG. 23] is a cross-sectional view of yet another example of a planar light emitting device.
[図 24] (a)は、 ZnSからなる発光層と AZOからなる透明電極（又は、背面電極）との界 面付近の模式図であり、（b)は、（a)のポテンシャルエネルギーの変位を説明する模 式図である。 [図 25] (a)は、比較例として、 ZnSからなる発光層と ITOからなる透明電極との界面の 模式図であり、（b)は、（a)のポテンシャルエネルギーの変位を説明する模式図であ [FIG. 24] (a) is a schematic diagram of the vicinity of the interface between the light-emitting layer made of ZnS and the transparent electrode (or back electrode) made of AZO, and (b) shows the displacement of potential energy in (a). FIG. [FIG. 25] (a) is a schematic diagram of an interface between a light-emitting layer made of ZnS and a transparent electrode made of ITO as a comparative example, and (b) is a schematic diagram for explaining the potential energy displacement of (a). In the figure
[図 26]面状発光装置の端子位置による電流密度不均一さを示す概略図である。 FIG. 26 is a schematic view showing current density non-uniformity depending on terminal positions of the planar light emitting device.
[図 27]本発明の実施の形態 8に係る面状発光装置の構成を示す概略斜視図である FIG. 27 is a schematic perspective view showing the configuration of the planar light emitting device according to Embodiment 8 of the present invention.
[図 28]図 27の断面 Sを矢印の方向から見た断面図である。 FIG. 28 is a sectional view of section S of FIG. 27 as viewed from the direction of the arrow.
[図 29]図 27の面状発光装置の平面図である。 29 is a plan view of the planar light emitting device of FIG. 27.
[図 30(a)]本発明の実施の形態 8に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。  FIG. 30 (a) is a schematic sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 8 of the present invention.
[図 30(b)]本発明の実施の形態 8に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。  FIG. 30 (b) is a schematic sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 8 of the present invention.
[図 30(c)]本発明の実施の形態 8に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。  FIG. 30 (c) is a schematic cross-sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 8 of the present invention.
[図 30(d)]本発明の実施の形態 8に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。  FIG. 30 (d) is a schematic sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 8 of the present invention.
[図 30(e)]本発明の実施の形態 8に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。  FIG. 30 (e) is a schematic sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 8 of the present invention.
[図 30(f)]本発明の実施の形態 8に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。  FIG. 30 (f) is a schematic sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 8 of the present invention.
[図 30(g)]本発明の実施の形態 8に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。  FIG. 30 (g) is a schematic cross-sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 8 of the present invention.
[図 30(h)]本発明の実施の形態 8に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。  FIG. 30 (h) is a schematic cross-sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 8 of the present invention.
園 30(i)]作製された本発明の実施の形態 8に係る面状発光装置の断面図である。 園 31]本発明の実施の形態 9に係る面状発光装置の構成を示す断面図である。 園 32]本発明の実施の形態 10に係る面状発光装置の構成を示す断面図である。 30 (i)] is a cross-sectional view of the surface light-emitting device according to Embodiment 8 of the present invention that was produced. [31] FIG. 31 is a cross-sectional view showing a configuration of a planar light emitting device according to Embodiment 9 of the present invention. FIG. 32] A sectional view showing the structure of the planar light emitting device according to the tenth embodiment of the present invention.
[図 33(a)]本発明の実施の形態 10に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。 FIG. 33 (a) shows one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 10 of the present invention. FIG.
園 33(b)]本発明の実施の形態 10に係る面状発光装置の製造方法の工程の 1つを 示す概略断面図である。 FIG. 33 (b)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 10 of the present invention.
園 33(c)]本発明の実施の形態 10に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。 33 (c)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 10 of the present invention.
園 33(d)]本発明の実施の形態 10に係る面状発光装置の製造方法の工程の 1つを 示す概略断面図である。 FIG. 33 (d)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 10 of the present invention.
[図 33(e)]本発明の実施の形態 10に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。  FIG. 33 (e) is a schematic sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 10 of the present invention.
園 33(f)]本発明の実施の形態 10に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。 33 (f)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 10 of the present invention.
[図 33(g)]本発明の実施の形態 10に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。  FIG. 33 (g) is a schematic sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 10 of the present invention.
園 33(h)]本発明の実施の形態 10に係る面状発光装置の製造方法の工程の 1つを 示す概略断面図である。 FIG. 33 (h)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 10 of the present invention.
園 33(i)]作製された本発明の実施の形態 10に係る面状発光装置の断面図である。 園 34]本発明の実施の形態 11に係る面状発光装置の構成を示す断面図である。 Garden 33 (i)] is a cross-sectional view of the surface light emitting device according to Embodiment 10 of the present invention that was manufactured. [34] A sectional view showing the structure of the planar light emitting device according to the eleventh embodiment of the present invention.
[図 35(a)]本発明の実施の形態 11に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。 FIG. 35 (a) is a schematic sectional view showing one of steps in a method for manufacturing a planar light emitting device according to Embodiment 11 of the present invention.
園 35(b)]本発明の実施の形態 11に係る面状発光装置の製造方法の工程の 1つを 示す概略断面図である。 FIG. 35 (b)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 11 of the present invention.
園 35(c)]本発明の実施の形態 11に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。 FIG. 35 (c)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 11 of the present invention.
園 35(d)]本発明の実施の形態 11に係る面状発光装置の製造方法の工程の 1つを 示す概略断面図である。 FIG. 35 (d)] is a schematic cross-sectional view showing one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 11 of the present invention.
[図 35(e)]本発明の実施の形態 11に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。  FIG. 35 (e) is a schematic sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 11 of the present invention.
園 35(f)]本発明の実施の形態 11に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。 35 (f)] shows one of the steps of the method for manufacturing the planar light emitting device according to Embodiment 11 of the present invention. FIG.
[図 35(g)]本発明の実施の形態 11に係る面状発光装置の製造方法の工程の 1つを示 す概略断面図である。  FIG. 35 (g) is a schematic cross-sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 11 of the present invention.
[図 35(h)]本発明の実施の形態 11に係る面状発光装置の製造方法の工程の 1つを 示す概略断面図である。  FIG. 35 (h) is a schematic cross-sectional view showing one of steps of a method for manufacturing a planar light emitting device according to Embodiment 11 of the present invention.
[図 35(i)]作製された本発明の実施の形態 11に係る面状発光装置の断面図である。  FIG. 35 (i) is a cross-sectional view of a manufactured planar light emitting device according to Embodiment 11 of the present invention.
[図 36]本発明の実施の形態 12に係る面状発光装置の構成を示す断面図である。  FIG. 36 is a cross-sectional view showing a configuration of a planar light emitting device according to Embodiment 12 of the present invention.
[図 37]従来例の無機 EL素子の発光面に垂直な方向から見た概略断面図である。 発明を実施するための最良の形態  FIG. 37 is a schematic sectional view seen from a direction perpendicular to the light emitting surface of a conventional inorganic EL element. BEST MODE FOR CARRYING OUT THE INVENTION
[0032] 以下、発明を実施するための最良の形態について添付図面を用いて説明する。な お、図面において実質的に同一の部材には同一の符号を付して、その説明を省略し ている。  Hereinafter, the best mode for carrying out the invention will be described with reference to the accompanying drawings. In the drawings, substantially the same members are denoted by the same reference numerals, and descriptions thereof are omitted.
[0033] (実施の形態 1)  [Embodiment 1]
<面状発光装置の概略構成〉  <Schematic configuration of planar light emitting device>
図 1は、本発明の実施の形態 1に係る面状発光装置 10の概略的な構成を示す概 略斜視図である。図 2は、図 1の断面 Sの構成を示す概略断面図である。図 3は、この 面状発光装置 10の平面図である。この面状発光装置 10は、基板 1と、基板 1の上に 設けられた平面状の背面電極 4と、背面電極 4と対向して設けられた平面状の透明 電極 2と、背面電極 4と透明電極 2との間に挟まれて設けられた平面状の発光層 3とを 備える。透明電極 2と背面電極 4とは直流電源 5を介して電気的に接続されている。こ の場合、負極側に接続された透明電極 2は、電子注入電極（第 2の電極）として機能 し、正極側に接続された背面電極 4は、正孔注入電極（第 1の電極）として機能する。 なお、ここでは、基板 1の上に背面電極 4を設ける場合について説明する力 これに 限られず、例えば、基板 1の上に透明電極 2を設け、その上に発光層 3、背面電極 4 を順に積層する構成としてもょレ、。  FIG. 1 is a schematic perspective view showing a schematic configuration of a planar light emitting device 10 according to Embodiment 1 of the present invention. FIG. 2 is a schematic cross-sectional view showing the configuration of the cross section S in FIG. FIG. 3 is a plan view of the planar light emitting device 10. The planar light emitting device 10 includes a substrate 1, a planar back electrode 4 provided on the substrate 1, a planar transparent electrode 2 provided to face the back electrode 4, and a back electrode 4 A planar light emitting layer 3 sandwiched between the transparent electrode 2 and the transparent electrode 2. The transparent electrode 2 and the back electrode 4 are electrically connected via a DC power source 5. In this case, the transparent electrode 2 connected to the negative electrode side functions as an electron injection electrode (second electrode), and the back electrode 4 connected to the positive electrode side serves as a hole injection electrode (first electrode). Function. Here, the force for explaining the case where the back electrode 4 is provided on the substrate 1 is not limited to this. For example, the transparent electrode 2 is provided on the substrate 1, and the light emitting layer 3 and the back electrode 4 are sequentially provided thereon. As a structure to be laminated,
[0034] 図 4は、発光層 3の拡大概略図である。この面状発光装置 10では、発光層 3は、図  FIG. 4 is an enlarged schematic view of the light emitting layer 3. In this planar light emitting device 10, the light emitting layer 3 is
4に示すように、第 1半導体物質 21からなる多結晶体構造であって、この多結晶体構 造の粒界 22に第 2半導体物質 23が偏析した構造を有する。本実施の形態では、第 1半導体物質 21は、 n型半導体物質であ 、第 2半導体物質 23は、 p型半導体物質 である。このように、 n型半導体物質の粒界に偏析した p型半導体物質により正孔の 注入性が改善され、電子と正孔の再結合型発光が効率よく生じ、低電圧で発光が可 能であって、且つ、高輝度発光する面状発光装置 10を実現することができる。 As shown in FIG. 4, it has a polycrystalline structure composed of the first semiconductor material 21, and the second semiconductor material 23 segregates at the grain boundaries 22 of this polycrystalline structure. In this embodiment, the first The semiconductor material 21 is an n-type semiconductor material, and the second semiconductor material 23 is a p-type semiconductor material. In this way, the p-type semiconductor material segregated at the grain boundary of the n-type semiconductor material improves the hole injection property, efficiently generates recombination light emission of electrons and holes, and can emit light at a low voltage. In addition, the planar light emitting device 10 that emits light with high luminance can be realized.
[0035] さらに、この面状発光装置 10では、透明電極 2と背面電極 4とは直流電源 5を介し て電気的に接続されている。直流電源 5から電力が供給されると、透明電極 2及び背 面電極 4の間に電位差が生じ、発光層 3に電圧が印加される。そして、透明電極 2及 び背面電極 4の間に配置されている発光層 3が発光し、その光が透明電極 2を透過 して面状発光装置 10の外部に取り出される。  Furthermore, in the planar light emitting device 10, the transparent electrode 2 and the back electrode 4 are electrically connected via a DC power supply 5. When power is supplied from the DC power source 5, a potential difference is generated between the transparent electrode 2 and the back electrode 4, and a voltage is applied to the light emitting layer 3. Then, the light emitting layer 3 disposed between the transparent electrode 2 and the back electrode 4 emits light, and the light passes through the transparent electrode 2 and is extracted outside the planar light emitting device 10.
[0036] さらに、上述の構成に限られず、電極と発光層との間に電流制限を目的として薄い 誘電体層を複数設ける、交流電源により駆動する、背面電極を透明にする、背面電 極を黒色電極とする、面状発光装置 10の全部又は一部を封止する構造を更に備え る、発光取出し方向の前方に発光層 3からの発光色を色変換する構造を更に備える 等、適宜変更が可能である。例えば、青色発光層と、青色を緑色及び赤色に変換す る色変換層とを組み合わせて白色の面状発光装置とすることもできる。  [0036] Further, the present invention is not limited to the above configuration, and a plurality of thin dielectric layers are provided between the electrode and the light emitting layer for the purpose of current limitation, driven by an AC power source, the back electrode is made transparent, and the back electrode is Change as appropriate, including a black electrode, a structure that seals all or part of the planar light emitting device 10, and a structure that converts the color of light emitted from the light emitting layer 3 in front of the light emission direction. Is possible. For example, a white planar light emitting device can be formed by combining a blue light emitting layer and a color conversion layer that converts blue into green and red.
[0037] 以下、この面状発光装置の各構成について詳述する  [0037] Hereinafter, each configuration of the planar light emitting device will be described in detail.
<基板〉  <Board>
基板 1は、その上に形成する各層を支持できるものを用いる。また、発光層 3の発光 体から発せられる光の波長に対し光透過性を有する材料であることが求められる。こ のような材料としては、例えば、コーユング 1737等のガラス、石英、セラミック等を用 いること力 Sできる。通常のガラスに含まれるアルカリイオン等が発光素子へ影響しない ように、無アルカリガラスや、ガラス表面にイオンバリア層としてアルミナ等をコートした ソーダライムガラスであってもよい。また、ポリエステノレ、ポリエチレンテレフタレート系 、ポリクロ口トリフルォロエチレン系とナイロン 6の組み合わせやフッ素樹脂系材料、ポ リエチレン、ポリプロピレン、ポリイミド、ポリアミドなどの樹脂フィルム等を用いることも できる。樹脂フィルムは耐久性、柔軟性、透明性、電気絶縁性、防湿性の優れた材 料を用いる。なお、これらは例示であって、基板 1の材料は特にこれらに限定されるも のではない。 [0038] また、基板側から光を取り出さない構成の場合は、上述の光透過性は不要であり、 光透過性を有して!/、な!/、材料も用いること力 Sできる。 As the substrate 1, one that can support each layer formed thereon is used. Further, it is required to be a material having light transmittance with respect to the wavelength of light emitted from the light emitting body of the light emitting layer 3. As such a material, for example, glass such as Couting 1737, quartz, ceramic, etc. can be used. It may be non-alkali glass or soda lime glass coated with alumina or the like as an ion barrier layer on the glass surface so that alkali ions contained in ordinary glass do not affect the light emitting element. Polyesterol, polyethylene terephthalate, a combination of polychloroethylene and nylon 6, fluororesin materials, resin films of polyethylene, polypropylene, polyimide, polyamide, and the like can also be used. For the resin film, a material having excellent durability, flexibility, transparency, electrical insulation and moisture resistance is used. These are merely examples, and the material of the substrate 1 is not particularly limited thereto. [0038] Further, in the case of a configuration in which light is not extracted from the substrate side, the above-described light transmittance is unnecessary, and it has light transmittance!
[0039] <電極〉 [0039] <Electrode>
電極として、光を取り出す側の透明電極 2と、他方の背面電極 4とがある。なお、ここ では、基板 1の上に背面電極 4を設ける場合について説明する力 これに限られず、 例えば、基板 1の上に透明電極 2を設け、その上に発光層 3、背面電極 4を順に積層 する構成としてもよい。あるいは、透明電極 2及び背面電極 4の両方を透明電極とし てもよい。  As the electrodes, there are a transparent electrode 2 on the light extraction side and a back electrode 4 on the other side. Here, the force for explaining the case where the back electrode 4 is provided on the substrate 1 is not limited to this. For example, the transparent electrode 2 is provided on the substrate 1, and the light emitting layer 3 and the back electrode 4 are sequentially provided thereon. A stacked structure may be used. Alternatively, both the transparent electrode 2 and the back electrode 4 may be transparent electrodes.
[0040] まず、透明電極 2について説明する。透明電極 2の材料は、発光層 3内で生じた発 光を外部に取り出せるように光透過性を有するものであればよぐ特に可視光領域に おいて高い透過率を有することが好ましい。また、電極として低抵抗であることが好ま しぐ更には基板 1や発光層 3との密着性に優れていることが好ましい。透明電極 2の 材料として、特に好適なものは、 ITO (In Oに SnOをドープしたものであり、インジ  [0040] First, the transparent electrode 2 will be described. The material of the transparent electrode 2 preferably has a high transmittance particularly in the visible light region as long as it has a light transmitting property so that the light generated in the light emitting layer 3 can be extracted to the outside. Further, it is preferable that the electrode has a low resistance, and further, it is preferable that the electrode 1 has excellent adhesion to the substrate 1 and the light emitting layer 3. A particularly suitable material for the transparent electrode 2 is ITO (InO doped with SnO.
2 3 2  2 3 2
ゥム錫酸化物ともいう。）や InZnO、 ZnO、 SnO等を主体とする金属酸化物、 Pt、 A  Also called um tin oxide. ), Metal oxides mainly composed of InZnO, ZnO, SnO, etc., Pt, A
2  2
u、 Pd、 Ag、 Ni、 Cu、 Al、 Ru、 Rh、 Ir等の金属薄膜、あるいはポリア二リン、ポリピロ ール、 PEDOT/PSS、ポリチォフェンなどの導電性高分子等が挙げられる力 特に これらに限定されるものではない。これらの透明電極 2はその透明性を向上させ、あ るいは抵抗率を低下させる目的で、スパッタリング法、エレクトロンビーム蒸着法、ィォ ンプレーティング法、等の成膜方法で成膜できる。また成膜後に、抵抗率制御の目 的でプラズマ処理などの表面処理を施してもよい。透明電極 2の膜厚は、必要とされ るシー卜抵抗値と可視光透過率から決定される。  Forces that include metal thin films such as u, Pd, Ag, Ni, Cu, Al, Ru, Rh, Ir, or conductive polymers such as polyaniline, polypyrrole, PEDOT / PSS, and polythiophene. It is not limited. These transparent electrodes 2 can be formed by a film forming method such as a sputtering method, an electron beam evaporation method, an ion plating method, etc. for the purpose of improving the transparency or reducing the resistivity. Further, after film formation, surface treatment such as plasma treatment may be performed for the purpose of resistivity control. The film thickness of the transparent electrode 2 is determined from the required sheet resistance value and visible light transmittance.
[0041] 透明電極 2のキャリア濃度は、 lE17〜lE22cm_3の範囲であることが望ましい。ま た、透明電極 2として性能を出すために、透明電極 2の体積抵抗率は 1E— 3 Ω 'cm 以下であって、透過率は 380〜780nmの波長において 75%以上であることが望ま しい。また、透明電極 2の屈折率は、 1. 85〜； 1. 95が良い。さらに、透明電極 2の膜 厚は一般的には 100〜200nm程度が好ましい。なお、 ZnO等の膜においては、 30 nm以下の場合に緻密で安定した特性を持つ膜が実現できる。 [0041] The carrier concentration of the transparent electrode 2 is preferably in the range of lE17~lE22cm_ 3. In order to obtain performance as the transparent electrode 2, it is desirable that the transparent electrode 2 has a volume resistivity of 1E-3 Ω'cm or less and a transmittance of 75% or more at a wavelength of 380 to 780 nm. . The refractive index of the transparent electrode 2 is preferably 1.85 to 1.95. Furthermore, the film thickness of the transparent electrode 2 is generally preferably about 100 to 200 nm. In addition, in the case of a film made of ZnO or the like, a film having a dense and stable characteristic can be realized at 30 nm or less.
[0042] また、背面電極 4には、一般に良く知られている導電材料であればいずれでも適用 できる。更には発光層 3との密着性に優れていることが好ましい。好適な例としては、 例えば、 ITOや InZnO、 ZnO、 SnO等の金属酸化物、 Pt、 Au、 Pd、 Ag、 Ni、 Cu、 [0042] The back electrode 4 can be any conductive material that is generally well-known. it can. Furthermore, it is preferable that the adhesiveness with the light emitting layer 3 is excellent. Suitable examples include, for example, metal oxides such as ITO, InZnO, ZnO, SnO, Pt, Au, Pd, Ag, Ni, Cu,
2  2
Al、 Ru、 Rh、 Ir、 Cr、 Mo、 W、 Ta、 Nb等の金属、これらの積層構造体、あるいは、 ポリア二リン、ポリピロール、 PEDOT〔ポリ（3, 4—エチレンジォキシチォフェン）〕/ P SS (ポリスチレンスルホン酸)等の導電性高分子、あるいは導電性カーボンなどを用 いること力 Sでさる。  Metals such as Al, Ru, Rh, Ir, Cr, Mo, W, Ta, Nb, laminated structures of these, or polyaniline, polypyrrole, PEDOT [poly (3,4-ethylenedioxythiophene) ] / Use of conductive polymer such as PSS (polystyrene sulfonic acid) or conductive carbon.
[0043] <発光層〉 [0043] <Light emitting layer>
次に、発光層 3について説明する。図 4は、発光層 3の断面の一部を拡大した概略 構成図である。発光層 3は、第 1半導体物質 21からなる多結晶体構造であって、この 多結晶体構造の粒界 22に第 2半導体物質 23が偏祈した構造を有する。第 1半導体 物質 21としては、多数キャリアが電子であって、 n型伝導を示す半導体材料が用いら れる。一方、第 2半導体物質 23は、多数キャリアが正孔であって、 p型伝導を示す半 導体材料が用いられる。また、第 1半導体物質 21と第 2半導体物質 23とは電気的に 接合している。  Next, the light emitting layer 3 will be described. FIG. 4 is a schematic configuration diagram enlarging a part of the cross section of the light emitting layer 3. The light emitting layer 3 has a polycrystalline structure made of the first semiconductor material 21 and has a structure in which the second semiconductor material 23 is prayed at the grain boundary 22 of the polycrystalline structure. As the first semiconductor material 21, a semiconductor material in which majority carriers are electrons and exhibits n-type conduction is used. On the other hand, the second semiconductor material 23 is a semiconductor material in which majority carriers are holes and exhibits p-type conduction. Further, the first semiconductor material 21 and the second semiconductor material 23 are electrically joined.
[0044] 第 1半導体物質 21としては、バンドギャップの大きさが近紫外領域から可視光領域  [0044] The first semiconductor material 21 has a band gap size from the near ultraviolet region to the visible light region.
(1. 7eVから 3. 6eV)を有するものが好ましぐさらに近紫外領域から青色領域（2. 6 eV力、ら 3. 6eV)を有するものがより好ましい。具体的には、前述の ZnSや、 ZnSe、 Z nTe、 CdS、 CdSe等の第 12族—第 16族間化合物やこれらの混晶（例えば ZnSSe 等）、 CaS、 SrS等の第 2族-第 16族間化合物やこれらの混晶（例えば CaSSe等）、 A1P、 AlAs、 GaN、 GaP等の第 13族-第 15族間化合物やこれらの混晶（例えば In GaN等）、 ZnMgS、 CaSSe、 CaSrS等の前記化合物の混晶等を用いることができる 。またさらに、 CuAlS等のカルコパイライト型化合物を用いてもよい。またさらに、第 1  Those having (1.7 eV to 3.6 eV) are preferred, and those having a near ultraviolet region to blue region (2.6 eV force, et al. 3.6 eV) are more preferred. Specifically, the above-described ZnS, Group 12-Group 16 compounds such as ZnSe, ZnTe, CdS, CdSe, etc. and mixed crystals thereof (for example, ZnSSe, etc.), Group 2-Group such as CaS, SrS, etc. Inter-group 16 compounds and mixed crystals thereof (for example, CaSSe), Group 13-15 compounds such as A1P, AlAs, GaN, GaP, and mixed crystals thereof (for example, In GaN), ZnMgS, CaSSe, CaSrS A mixed crystal of the above-described compound can be used. Furthermore, a chalcopyrite type compound such as CuAlS may be used. In addition, the first
2  2
半導体物質 21よりなる多結晶体は、主たる部分が立方晶構造を有しているものが好 ましい。またさらに、 Cu、 Ag、 Au、 Ir、 Al、 Ga、 In、 Mn、 Cl、 Br、 I、 Li、 Ce、 Pr、 Nd 、 Pm、 Sm、 Eu、 Gd、 Tb、 Dy、 Ho、 Er、 Tm、 Ybからなる群より選択される 1又は複 数種の原子もしくはイオンを添加剤として含んでいてもよい。これらの元素の種類によ つても、発光層 3からの発光色が決定される。  The polycrystalline body made of the semiconductor material 21 preferably has a cubic structure in the main part. Furthermore, Cu, Ag, Au, Ir, Al, Ga, In, Mn, Cl, Br, I, Li, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm One or more kinds of atoms or ions selected from the group consisting of Yb may be contained as an additive. The color of light emitted from the light emitting layer 3 is also determined by the type of these elements.
[0045] 一方、第 2半導体物質 23としては、 Cu S、 ZnS、 ZnSe、 ZnSSe、 ZnSeTe、 ZnTe 、 GaN、 InGaNを用いることができる。これらの材料には p型伝導を付与するための 添加剤として、 N、 Cu、 Inから 1種又は複数種の元素を添加剤として含んでいてもよ い。 On the other hand, as the second semiconductor material 23, Cu S, ZnS, ZnSe, ZnSSe, ZnSeTe, ZnTe GaN, InGaN can be used. These materials may contain one or more elements from N, Cu, and In as additives for imparting p-type conduction.
[0046] 本実施の形態 1に係る面状発光装置 10の特徴は、発光層 3が n型半導体物質 21 よりなる多結晶体構造であって、この多結晶体構造の粒界 22に p型半導体物質 23 が偏析した構造を有する点にある。従来の無機 ELでは、発光層の結晶性を高めるこ とで、高電界で加速された電子が散乱されることを防いでいた力 ZnSや ZnSe等は 一般に n型伝導を示すため、正孔の供給が十分ではなぐ電子と正孔の再結合によ る高輝度の発光は期待できない。一方で、発光層の結晶粒が成長すると、単結晶で ない限り、結晶粒界も一意的に伸びる。高電圧を印加する従来の無機 EL素子では、 膜厚方向の粒界が導電パスとなり、耐圧低下を引き起こすという課題も生じる。これに 対して、本発明者は、鋭意研究の結果、発光層 3を n型半導体物質 21よりなる多結 晶体構造であって、この多結晶体構造の粒界 22に p型半導体物質 23が偏析した構 造とすることによって、粒界に偏析した p型半導体物質により正孔の注入性が改善さ れることを見出した。さらに、発光層 3中に偏析部を高密度に散在させることで、電子 と正孔の再結合型発光が効率よく生じることを見出した。これによつて、低電圧で高 輝度発光する発光素子を実現することができ、本発明に至ったものである。また、ド ナーあるいはァクセプターを導入することにより、 自由電子とァクセプターに捕獲され た正孔の再結合、自由正孔とドナーに捕獲された電子の再結合、ドナ一一ァクセプ ター対発光も同様に可能である。またさらに、他のイオン種が近傍にあることでエネ ルギー移動による発光も同様に可能である。  [0046] The planar light emitting device 10 according to the first embodiment is characterized in that the light emitting layer 3 has a polycrystalline structure made of an n-type semiconductor material 21, and the grain boundary 22 of this polycrystalline structure has a p-type. The semiconductor material 23 has a segregated structure. In the conventional inorganic EL, the force that prevented the electrons accelerated by a high electric field from being scattered by increasing the crystallinity of the light emitting layer. ZnS, ZnSe, etc. generally show n-type conduction. High-brightness light emission due to recombination of electrons and holes that cannot be sufficiently supplied cannot be expected. On the other hand, when the crystal grains of the light emitting layer grow, the crystal grain boundaries also extend uniquely unless they are single crystals. In a conventional inorganic EL element that applies a high voltage, the grain boundary in the film thickness direction becomes a conductive path, causing a problem that the breakdown voltage is lowered. On the other hand, as a result of intensive research, the present inventor has a light emitting layer 3 having a polycrystalline structure composed of an n-type semiconductor material 21, and a p-type semiconductor material 23 is present at the grain boundary 22 of the polycrystalline structure. It was found that by using a segregated structure, the hole injection property is improved by the p-type semiconductor material segregated at the grain boundary. Furthermore, it has been found that the recombination-type emission of electrons and holes is efficiently generated by segregating segregation portions in the light emitting layer 3 at a high density. As a result, a light emitting element that emits light with high luminance at a low voltage can be realized, and the present invention has been achieved. In addition, by introducing a donor or acceptor, recombination of free electrons and holes captured by the acceptor, recombination of electrons captured by free holes and donors, and emission of a donor-acceptor pair are also performed. Is possible. Furthermore, light emission by energy transfer is possible as well because other ion species are nearby.
[0047] さらに、発光層 3の n型半導体粒子 21として ZnS等の亜鉛系材料を用いる場合に は、透明電極 2と背面電極 4の少なくとも一方には、例えば、 ZnO、 AZO (酸化亜鉛 に例えばアルミをドープしたもの）、 GZO (酸化亜鉛に、例えばガリウムをドープしたも の）等の亜鉛を含む金属酸化物からなる電極を用いることが好ましい。本発明者は、 特定の n型半導体粒子 21と特定の透明電極 2 (又は背面電極 4)との組み合わせを 採用することによって、高効率に発光させることができることを見出したものである。  [0047] Further, when a zinc-based material such as ZnS is used as the n-type semiconductor particles 21 of the light-emitting layer 3, at least one of the transparent electrode 2 and the back electrode 4 is, for example, ZnO, AZO (for example, zinc oxide) It is preferable to use an electrode made of a metal oxide containing zinc, such as one doped with aluminum) or GZO (zinc oxide doped with gallium, for example). The present inventor has found that light can be emitted with high efficiency by employing a combination of specific n-type semiconductor particles 21 and specific transparent electrode 2 (or back electrode 4).
[0048] すなわち、透明電極 2 (又は背面電極 4)における仕事関数について着目すると、 Z nOの仕事関数は 5. 8eVであるのに対して、従来、透明電極として使われてきた ITO (酸化インジウムスズ)の仕事関数は 7. OeVである。一方、発光層 3の n型半導体粒 子 21である亜鉛系材料の仕事関数は 5〜6eVであることから、 ITOに比べて ZnOの 仕事関数は、亜鉛系材料の仕事関数により近いため、発光層 3への電子注入性が良 いというメリットがある。これは、透明電極 2 (又は背面電極 4)として同様に亜鉛系材 料である AZO、 GZOを用いた場合も同様である。 That is, when attention is paid to the work function in the transparent electrode 2 (or the back electrode 4), Z The work function of nO is 5.8 eV, whereas the work function of ITO (indium tin oxide), which has been used as a transparent electrode, is 7. OeV. On the other hand, since the work function of the zinc-based material that is the n-type semiconductor particle 21 of the light-emitting layer 3 is 5 to 6 eV, the work function of ZnO is closer to the work function of the zinc-based material than that of ITO. There is an advantage that electron injection into layer 3 is good. The same applies to the case where AZO and GZO, which are zinc-based materials, are used as the transparent electrode 2 (or the back electrode 4).
[0049] 図 5 (a)は、 ZnSからなる発光層 3と AZOからなる透明電極 2 (又は、背面電極 4)と の界面付近の模式図である。図 5 (b)は、図 5 (a)のポテンシャルエネルギーの変位 を説明する模式図である。また、図 6 (a)は、比較例として、 ZnSからなる発光層 3と IT Oからなる透明電極との界面の模式図である。図 6 (b)は、図 6 (a)のポテンシャルェ ネルギ一の変位を説明する模式図である。  FIG. 5 (a) is a schematic view of the vicinity of the interface between the light emitting layer 3 made of ZnS and the transparent electrode 2 (or the back electrode 4) made of AZO. Fig. 5 (b) is a schematic diagram for explaining the potential energy displacement of Fig. 5 (a). FIG. 6A is a schematic diagram of an interface between the light emitting layer 3 made of ZnS and the transparent electrode made of ITO as a comparative example. Fig. 6 (b) is a schematic diagram for explaining the displacement of the potential energy in Fig. 6 (a).
[0050] 図 5 (a)に示すように、上記の好ましい例では、発光層 3を構成する n型半導体粒子  [0050] As shown in FIG. 5 (a), in the above preferred example, the n-type semiconductor particles constituting the light emitting layer 3 are used.
21が亜鉛系材料 (ZnS)であって、透明電極 2 (又は、背面電極 4)が酸化亜鉛系材 料 (AZO)であることから、透明電極 2 (又は、背面電極 4)と発光層 3との界面にでき る酸化物は、酸化亜鉛 (ZnO)となる。さらに、界面では成膜時にドーピング材料 (A1 )が拡散し、低抵抗な酸化膜が形成される。また、上記の酸化亜鉛系 (AZO)の透明 電極 2 (又は背面電極 4)は、六方晶の結晶構造をとるが、発光層 3を構成する n型半 導体物質 21である亜鉛系材料 (ZnS)も六方晶または立方晶の結晶構造をとるため 、両者の界面では歪が小さくエネルギー障壁が小さくなる。これによつて、図 5 (b)に 示すように、ポテンシャルエネルギーの変位が少ない。  Since 21 is a zinc-based material (ZnS) and the transparent electrode 2 (or back electrode 4) is a zinc oxide-based material (AZO), the transparent electrode 2 (or back electrode 4) and the light emitting layer 3 The oxide that forms at the interface is zinc oxide (ZnO). Further, at the interface, the doping material (A1) diffuses during film formation, and a low-resistance oxide film is formed. The zinc oxide-based (AZO) transparent electrode 2 (or back electrode 4) has a hexagonal crystal structure, but is a zinc-based material (ZnS) that is the n-type semiconductor material 21 constituting the light-emitting layer 3. ) Also has a hexagonal or cubic crystal structure, so the strain is small and the energy barrier is small at the interface between the two. As a result, the displacement of potential energy is small as shown in Fig. 5 (b).
[0051] 一方、比較例では、図 6 (a)のように透明電極が亜鉛系材料でない ITOであるため 、界面にできた酸化膜 (ZnO)は、 ITOにとつて異なる結晶構造を持つことから、その 界面におけるエネルギー障壁が大きくなる。したがって、図 6 (b)に示すように、ポテ ンシャルエネルギーの変位が界面で大きくなり、発光素子の発光効率が低下する。  On the other hand, in the comparative example, as shown in FIG. 6 (a), the transparent electrode is ITO which is not a zinc-based material, so that the oxide film (ZnO) formed at the interface has a crystal structure different from that of ITO. Therefore, the energy barrier at the interface increases. Therefore, as shown in FIG. 6 (b), the displacement of potential energy increases at the interface, and the light emission efficiency of the light emitting element decreases.
[0052] 以上のように、発光層 3の n型半導体粒子 21として、 ZnS、 ZnSeなどの亜鉛系材料 を用いる場合には、酸化亜鉛系材料からなる透明電極 2 (又は、背面電極 4)と組み 合わせることにより、発光効率の良い面状発光装置を提供することができる。  As described above, when a zinc-based material such as ZnS or ZnSe is used as the n-type semiconductor particles 21 of the light-emitting layer 3, the transparent electrode 2 (or the back electrode 4) made of a zinc oxide-based material is used. By combining them, a planar light emitting device with high luminous efficiency can be provided.
[0053] なお、上記の例では、亜鉛を含む透明電極 2 (又は、背面電極 4)として、アルミユウ ムをドープした AZOとガリウムをドープした GZOとを例にあげて説明した力 S、アルミ二 ゥム、ガリウム、チタン、ニオブ、タンタル、タングステン、銅、銀、ホウ素のうち少なくと も 1種類をドープした酸化亜鉛を用レ、ても同様である。 [0053] In the above example, as the transparent electrode 2 (or the back electrode 4) containing zinc, aluminum alloy is used. Explained by taking AZO doped with gallium and GZO doped with gallium as examples. At least one of S, aluminum, gallium, titanium, niobium, tantalum, tungsten, copper, silver and boron. The same applies to the use of doped zinc oxide.
[0054] <製造方法〉 <Manufacturing method>
以下、実施の形態 1に係る面状発光装置 10の製造方法の一例を説明する。なお、 前述の他の材料からなる発光層についても同様の製造方法が利用可能である。  Hereinafter, an example of a method for manufacturing the planar light emitting device 10 according to Embodiment 1 will be described. The same manufacturing method can be used for the light emitting layer made of the other materials described above.
(a)基板 1としてコーユング 1737を準備する。  (a) Prepare Coung 1737 as the substrate 1.
(b)基板 1上に、平面状の背面電極 4を形成する。例えば A1を使用し、フォトリソダラ フィ法によって形成する。膜厚は 200nmとする。  (b) A planar back electrode 4 is formed on the substrate 1. For example, using A1, it is formed by the photolithographic method. The film thickness is 200 nm.
(c)背面電極 4上に、平面状の発光層 3を形成する。複数の蒸発源に ZnSと Cu Sの  (c) A planar light emitting layer 3 is formed on the back electrode 4. ZnS and Cu S in multiple evaporation sources
2 粉体をそれぞれ投入し、真空中（10— 6Torr台）にて、各材料にエレクトロンビームを 照射し、成膜する。このとき、基板温度は 200°Cとし、 ZnSと Cu Sを共蒸着する。 2 powder was placed respectively, in a vacuum (10- 6 Torr table), is irradiated with electron beams in each material is deposited. At this time, the substrate temperature is 200 ° C., and ZnS and Cu S are co-evaporated.
2  2
(d)成膜後、硫黄雰囲気中、 700°Cで約 1時間焼成して発光層 3を得る。この膜を X 線回折や SEMによって調べることによって、微小な ZnS結晶粒の多結晶体構造と、 その粒界における、 Cu Sの偏析部とが観察される。詳細は明らかではないが、 ZnS と Cu Sとの相分離が生じ、前記偏析構造が形成されるものと考えられる。  (d) After the film formation, the light emitting layer 3 is obtained by baking at 700 ° C. for about 1 hour in a sulfur atmosphere. By examining this film by X-ray diffraction or SEM, a polycrystalline structure of minute ZnS grains and a segregation part of Cu S at the grain boundary are observed. Although details are not clear, it is considered that phase separation of ZnS and Cu S occurs and the segregation structure is formed.
(e)続いて、平面状の透明電極 2を、例えば ITOを使用して形成する。膜厚は 200η mとする。  (e) Subsequently, the planar transparent electrode 2 is formed using, for example, ITO. The film thickness is 200ηm.
(f)続いて、発光層 3及び透明電極 2上に、保護層（図では省略）として、例えば窒化 シリコン等の透明絶縁体層を形成する。  (f) Subsequently, a transparent insulator layer such as silicon nitride is formed on the light emitting layer 3 and the transparent electrode 2 as a protective layer (not shown).
以上の工程によって、本実施の形態 1の面状発光装置 10が得られる。  Through the above steps, the planar light emitting device 10 of the first embodiment is obtained.
[0055] この実施の形態 1に係る面状発光装置 10は、透明電極 2と背面電極 4とを直流電 源 5に接続して、その間に直流電圧を印加して発光評価を行なったところ、印加電圧 15Vで発光し始め、 35Vで約 600cd/m2の発光輝度を示した。 [0055] In the planar light emitting device 10 according to the first embodiment, the transparent electrode 2 and the back electrode 4 are connected to the DC power source 5, and a DC voltage is applied between them to perform the light emission evaluation. It started to emit light at a voltage of 15V, and showed an emission luminance of about 600cd / m 2 at 35V.
[0056] (実施の形態 2) [Embodiment 2]
<面状発光装置の概略構成〉  <Schematic configuration of planar light emitting device>
図 8は、本発明の実施の形態 2に係る面状発光装置 10aの構成を示す概略斜視図 である。図 9は、図 8の断面 Sの構成を示す概略断面図である。図 8は、この面状発光 装置 10aの平面図である。この面状発光装置 10aは、実施の形態 1に係る面状発光 装置と比較すると、第 1及び第 2の電極 2a、 2bが、互いに対向する 2枚の平行な仮想 平面の上にそれぞれストライプ状に設けられていると共に、第 1の電極 2aと、第 1の電 極 2aが設けられて!/、る仮想平面への第 2の電極 2bの射影とが互いに重ならな!/、こと を特徴としている。第 1の電極 2aと第 2の電極 2bとの間に挟まれる発光層の部分が電 流密度の高い場所であり、この箇所力も発光が生じる。この面状発光装置 10aでは、 上述のように、第 1の電極 2aと第 2の電極 2bとが互いにずらせて配置されているので 、発光が生じる第 1の電極 2aと第 2の電極 2bとの間に挟まれる発光層からの発光の 大部分が電極に遮蔽されることなく外部に取り出すことができる。 FIG. 8 is a schematic perspective view showing the configuration of the planar light emitting device 10a according to Embodiment 2 of the present invention. FIG. 9 is a schematic cross-sectional view showing the configuration of the cross section S of FIG. Figure 8 shows this planar light emission. It is a top view of the apparatus 10a. Compared with the planar light emitting device according to the first embodiment, the planar light emitting device 10a has the first and second electrodes 2a and 2b in a striped shape on two parallel virtual planes facing each other. The first electrode 2a and the first electrode 2a are provided! /, And the projection of the second electrode 2b onto the virtual plane does not overlap each other! / It is a feature. The portion of the light emitting layer sandwiched between the first electrode 2a and the second electrode 2b is a place where the current density is high, and this part force also emits light. In the planar light emitting device 10a, as described above, since the first electrode 2a and the second electrode 2b are arranged so as to be shifted from each other, the first electrode 2a and the second electrode 2b that emit light are Most of the light emitted from the light emitting layer sandwiched between them can be extracted outside without being shielded by the electrodes.
[0057] なお、この面状発光装置 10aにおいても、実施の形態 1と同様に、もう一つの特徴 は、発光層 3が、 n型半導体物質 21よりなる多結晶体構造であって、この多結晶体構 造の粒界 22に p型半導体物質 23が偏析した構造を有することである。  In this planar light emitting device 10a, as in the first embodiment, another feature is that the light emitting layer 3 has a polycrystalline structure made of an n-type semiconductor material 21, and this The p-type semiconductor material 23 has a segregated structure at the grain boundaries 22 of the crystal structure.
[0058] この面状発光装置 10aでは、上述のように、第 1及び第 2の電極 2a、 2bは、互いに 対向する 2枚の平行な仮想平面の上にそれぞれストライプ状に設けられていると共に 、第 1の電極 2aと、第 1の電極が設けられている仮想平面 の第 2の電極 2bの射影と が互いに重ならな!/、ように設けられて!/、る。  In the planar light emitting device 10a, as described above, the first and second electrodes 2a, 2b are respectively provided in stripes on two parallel virtual planes facing each other. The first electrode 2a and the projection of the second electrode 2b on the imaginary plane on which the first electrode is provided should not overlap each other! /.
[0059] 本発明者は、面状発光装置における電極位置に関する課題を見出し、上記のよう な電極配置を思い至ったものである。すなわち、実施の形態 1のような面状発光装置 では、発光層の抵抗が低い。一方、発光面側に平面状の透明電極膜を使用した場 合、透明電極の抵抗は比較的大きい。本発明者は、発光層の抵抗が低ぐ透明電極 の抵抗が比較的大きいことに起因して、透明電極において端子からの距離に応じて 電圧降下が発生し、例えば、図 7に模式的に示すように、平面内で発光ムラが発生 するという課題があることを見出した。  [0059] The present inventor has found a problem regarding the electrode position in the planar light emitting device, and has conceived the electrode arrangement as described above. That is, in the planar light emitting device as in Embodiment 1, the resistance of the light emitting layer is low. On the other hand, when a flat transparent electrode film is used on the light emitting surface side, the resistance of the transparent electrode is relatively large. The inventor has found that the voltage drop occurs according to the distance from the terminal in the transparent electrode due to the resistance of the transparent electrode being low and the resistance of the light emitting layer being low. For example, FIG. As shown in the figure, it has been found that there is a problem that uneven light emission occurs in a plane.
[0060] 上記課題を解決する方法として、透明電極ではなぐ低抵抗の金属電極を用いるこ とが考えられるが、その場合には発光面が確保できない。これに対しては、金属電極 をストライプ状に設け、発光面とすることができる。このように平面状の電極ではなぐ 複数のストライプ状の電極とすることで、平面内での電圧降下を防ぐと共に、ストライ プ状の電極の間に発光層が露出するので、発光面とすることができる。 [0061] しかし、発光層 3は、上下の金属電極 2a、 2bに挟まれた箇所で発光するため、その ままでは得られた発光が金属電極に遮られ、発光を効率的に外部に取り出すことが できない。そこで、本発明者は、さらに、第 1及び第 2の電極 2a、 2bを、互いに対向す る 2枚の平行な仮想平面の上にそれぞれストライプ状に設けると共に、第 1の電極 2a と、第 1の電極 2aが設けられている仮想平面への第 2の電極 2bの射影とが互いに重 ならないように設けるという本発明の構成を考え出したものである。上記構成とするこ とによって、第 1及び第 2の電極 2a、 2bの間に挟まれた発光層 3からの発光の大部分 が少なくとも一方の電極に遮られることなく外部に取り出すことができるようにすること ができる。 [0060] As a method for solving the above problems, it is conceivable to use a metal electrode having a low resistance that is not a transparent electrode, but in that case, a light emitting surface cannot be secured. For this, the metal electrodes can be provided in stripes to form a light emitting surface. By using multiple striped electrodes instead of flat electrodes in this way, voltage drop in the plane is prevented and the light emitting layer is exposed between the striped electrodes. Can do. [0061] However, since the light emitting layer 3 emits light at a position sandwiched between the upper and lower metal electrodes 2a and 2b, the emitted light is blocked by the metal electrode, and the emitted light is efficiently extracted outside. I can't. Therefore, the inventor further provided the first and second electrodes 2a and 2b in stripes on two parallel virtual planes facing each other, and the first electrode 2a and the first electrode The present invention has been conceived of the configuration of the present invention in which the second electrode 2b is projected so as not to overlap the virtual plane on which the first electrode 2a is provided. With the above configuration, most of the light emitted from the light emitting layer 3 sandwiched between the first and second electrodes 2a and 2b can be extracted outside without being blocked by at least one of the electrodes. Can be made.
[0062] 本実施の形態 2の面状発光装置 10aでは、基板 1上に形成されたストライプ状の第  [0062] In the planar light emitting device 10a of the second embodiment, the stripe-shaped first light formed on the substrate 1 is used.
1の電極 2aと、第 1の電極 2aに平行になるように、かつ、基板から垂直に見た場合に 第 1の電極 2aに重ならないように設けられたストライプ状の第 2の電極 2bと、第 2の電 極 2bおよび第 1の電極 2a間に介在する発光層 3とを有する。ストライプ状の両電極 2 a, 2bは、金属の電極である。本実施形態の表示装置では、両電極 2a, 2b間に電圧 を印加することにより、両電極 2a, 2b間の領域における発光層 3が発光する。これに より、電極に透明電極材料を使用する必要がないため、均一な平面発光を得ること ができ、コストダウンが可能となる。また、表側、裏側両側から光を取り出すことが可能 となる。  1 electrode 2a, and a striped second electrode 2b provided so as to be parallel to the first electrode 2a and not to overlap the first electrode 2a when viewed perpendicularly from the substrate, And a light emitting layer 3 interposed between the second electrode 2b and the first electrode 2a. Both striped electrodes 2a and 2b are metal electrodes. In the display device of this embodiment, the light emitting layer 3 in the region between the electrodes 2a and 2b emits light by applying a voltage between the electrodes 2a and 2b. As a result, it is not necessary to use a transparent electrode material for the electrode, so that uniform planar light emission can be obtained and the cost can be reduced. In addition, light can be extracted from both the front and back sides.
[0063] <製造方法〉  [0063] <Production method>
次に、本実施の形態 2の面状発光装置 10aの製造方法について、図 11 (a)〜図 1 l (i)を用いて説明する。  Next, a method for manufacturing the planar light emitting device 10a of the second embodiment will be described with reference to FIGS. 11 (a) to 11 (i).
(a)まず、基板 1上に、モリブデン (Mo)、タングステン (W)またはチタン (Ti)などの金 属膜を蒸着またはスパッタなどの方法にて成膜する（図 11 (a) )。  (a) First, a metal film such as molybdenum (Mo), tungsten (W), or titanium (Ti) is formed on the substrate 1 by a method such as vapor deposition or sputtering (FIG. 11 (a)).
(b)次に、フォトリソグラフの手法を用いて、ストライプ状のパターンをレジストによって 形成する（図 11 (b) )。  (b) Next, using a photolithographic technique, a striped pattern is formed with a resist (Fig. 11 (b)).
(c)次いで、エッチングを行い、金属膜をパターンユングして、第 1の電極 2aを形成 する（図 l l (c) )。  (c) Next, etching is performed and the metal film is patterned to form the first electrode 2a (FIG. 11 (c)).
(d)次に、第 1の電極 2a上のレジストの除去を行う（図 11 (d) )。 (e)次に、基板 1及び第 1の電極 2aの上に、発光層 3を形成する。複数の蒸発源に Z nSと Cu Sの粉体をそれぞれ投入し、真空中（10_6Torr台）にて、各材料にエレクト(d) Next, the resist on the first electrode 2a is removed (FIG. 11 (d)). (e) Next, the light emitting layer 3 is formed on the substrate 1 and the first electrode 2a. Each was charged powder Z nS and Cu S into a plurality of evaporation sources, in vacuo (10_ 6 Torr stand), elect to each material
2 2
ロンビームを照射し、成膜する。このとき、基板温度は 200°Cとし、 ZnSと Cu Sを共蒸  The film is formed by irradiation with a long beam. At this time, the substrate temperature is 200 ° C and ZnS and Cu S are co-evaporated.
2 着する。  2 Wear.
(f)成膜後、硫黄雰囲気中、 700°Cで約 1時間焼成して発光層 3を得る（図 l l (e) )。 この膜を X線回折や SEMによって調べることによって、微小な ZnS結晶粒の多結晶 体構造と、その粒界における、 Cu Sの偏析部とが観察される。詳細は明らかではな いが、 ZnSと Cu Sとの相分離が生じ、前記偏析構造が形成されるものと考えられる。  (f) After the film formation, the light emitting layer 3 is obtained by baking at 700 ° C. for about 1 hour in a sulfur atmosphere (FIG. l l (e)). By examining this film by X-ray diffraction or SEM, a polycrystalline structure of minute ZnS grains and a segregation part of Cu S at the grain boundary are observed. Although details are not clear, it is considered that phase separation of ZnS and Cu S occurs and the segregation structure is formed.
(g)次に、発光層 3上に、モリブデン (Mo)、タングステン (W)またはチタン (Ti)など の金属を蒸着またはスパッタ法などの方法にて成膜する（図 11 (f ) )。  (g) Next, a metal such as molybdenum (Mo), tungsten (W) or titanium (Ti) is deposited on the light emitting layer 3 by a method such as vapor deposition or sputtering (FIG. 11 (f)).
(h)次に、フォトリソグラフの手法を用いて、第 1の電極 2aと平行になるようにすると共 に、基板面から見た場合に第 1の電極 2aと重ならないようなストライプ状のパターンを レジストにより形成する（図 11 (g) )。  (h) Next, using a photolithographic technique, it is made to be parallel to the first electrode 2a, and at the same time, a striped pattern that does not overlap the first electrode 2a when viewed from the substrate surface Is formed by resist (Fig. 11 (g)).
(i)次に、エッチングを行って、金属膜をパターンユングし、ストライプ状の第 2の電極 2bを形成する（図 11 (h) )。  (i) Next, etching is performed to pattern the metal film to form a striped second electrode 2b (FIG. 11 (h)).
(j)次に、第 2の電極 2b上のレジストを除去して、実施の形態 2に係る面状発光装置 1 Oaを得ることができる（図 11 (i) )。  (j) Next, the resist on the second electrode 2b is removed to obtain the planar light emitting device 1 Oa according to Embodiment 2 (FIG. 11 (i)).
[0064] 本実施の形態 2では、第 1の電極 2a、第 2の電極 2bの材料に金属を用いている力 導電性の材料であれば何でもよく ZnOなどの酸化物などでもよい。また、本実施の形 態 2では、フォトリソグラフの手法を用いて電極のパターンユングを行っている力 これ に限定されることなぐストライプ状にパターンユングできる方法であれば用いることが できる。例えば、印刷によるパターンユングなどのパターンユングの方法を用いてもよ い。 [0064] In the second embodiment, any force conductive material using metal as the material of the first electrode 2a and the second electrode 2b may be used, and an oxide such as ZnO may be used. In Embodiment 2, any force can be used for patterning the electrodes using a photolithographic technique as long as the pattern can be patterned in stripes without being limited thereto. For example, a pattern jung method such as pattern jung by printing may be used.
[0065] (実施の形態 3)  [Embodiment 3]
図 12は、本発明の実施の形態 3に係る面状発光装置 10bの構成を示す断面図で ある。この面状発光装置 10bは、実施の形態 2に係る面状発光装置と比較すると、第 1の電極 2aが基板 1側に埋設されている点で相違する力 S、その他の特徴は実施の形 態 2と同様である。 [0066] (実施の形態 4) FIG. 12 is a cross-sectional view showing the configuration of the planar light emitting device 10b according to Embodiment 3 of the present invention. The planar light emitting device 10b is different from the planar light emitting device according to Embodiment 2 in that the first electrode 2a is embedded in the substrate 1 side and the force S is different from that of the embodiment. Same as state 2. [0066] (Embodiment 4)
<面状発光装置の概略構成〉  <Schematic configuration of planar light emitting device>
実施の形態 4に係る面状発光装置は、互いに対向する 2枚の平行な仮想平面上に それぞれ設けられた第 1及び第 2の電極と、第 1及び第 2の電極が対向する間に少な くとも一部が挟まれて設けられた誘電体層と、前記第 1及び第 2の電極とに電気的に 接続され、発光面が露出している発光層とを備え、発光層は、第 1半導体物質よりな る多結晶体構造であって、前記多結晶体構造の粒界に前記第 1半導体物質とは異 なる第 2半導体物質が偏析して V、ることを特徴とする。  The planar light-emitting device according to Embodiment 4 has a small amount of time between the first and second electrodes provided on two parallel virtual planes facing each other and the first and second electrodes facing each other. A dielectric layer provided with at least a part interposed therebetween, and a light emitting layer electrically connected to the first and second electrodes and having a light emitting surface exposed, the light emitting layer comprising: 1. A polycrystal structure made of a semiconductor material, wherein a second semiconductor material different from the first semiconductor material segregates at a grain boundary of the polycrystal structure and becomes V.
[0067] 図 13は、本発明の実施の形態 4に係る面状発光装置 10cの構成を示す概略断面 図である。本実施の形態 4に係る面状発光装置 10cは、基板 1上に形成された平面 状の第 1の電極 2aと、第 1の電極 2a上に形成された誘電体層 4と誘電体層 4の上部 に形成されたストライプ状の第 2の電極 2bと、誘電体層 4と同一面内において誘電体 層間に埋め込まれた発光層 3とを有する。  FIG. 13 is a schematic cross-sectional view showing the configuration of the planar light emitting device 10c according to Embodiment 4 of the present invention. A planar light emitting device 10c according to the fourth embodiment includes a planar first electrode 2a formed on a substrate 1, a dielectric layer 4 and a dielectric layer 4 formed on the first electrode 2a. And a light emitting layer 3 embedded in the dielectric layer in the same plane as the dielectric layer 4.
ストライプ状の第 2の電極 2bは第 1の電極 2aが設けられている平面と平行な仮想平 面上に設けられている。第 1の電極 2aと第 2の電極 2bは対向する部分を有している。 すなわち、第 1の電極である平面電極 2aと、第 1の電極 2aが設けられている仮想平 面への第 2の電極 2bの投影が重なる部分を有している。  The striped second electrode 2b is provided on a virtual plane parallel to the plane on which the first electrode 2a is provided. The first electrode 2a and the second electrode 2b have opposing portions. That is, the flat electrode 2a as the first electrode and a portion where the projection of the second electrode 2b on the virtual plane on which the first electrode 2a is provided overlap.
誘電体層 4は第 1の電極 2aと第 2の電極 2bが対向する間に形成されている。発光 層 3は第 1の電極 2aと第 2の電極 2bが対向していない部分に形成される。発光層 3と 誘電体層 4は同一面内、すなわち同一層に形成される。なお、誘電体層 4は、第 1の 電極 2aと第 2の電極 2bが対向する間に少なくとも一部が挟まれて設けられていれば よい。  The dielectric layer 4 is formed while the first electrode 2a and the second electrode 2b face each other. The light emitting layer 3 is formed in a portion where the first electrode 2a and the second electrode 2b are not opposed to each other. The light emitting layer 3 and the dielectric layer 4 are formed in the same plane, that is, in the same layer. The dielectric layer 4 may be provided so that at least a part is sandwiched between the first electrode 2a and the second electrode 2b facing each other.
発光層 3は第 1の電極 2aと第 2の電極 2bとにそれぞれ電気的に接続されている。本 実施の形態では、発光層 3がストライプ状の第 2の電極 2bの層まで突出しており、そ こで互いに接触している。具体的には、ストライプ状の第 2の電極 2bの側面が発光層 3に接触している。ここで、ストライプ状の第 2の電極 2bの側面とは、ストライプ状の第 2の電極 2bの表面のうち、ストライプ状の第 2の電極 2bの側面が設けられている仮想 平面に垂直な面のことである。このような構成により、発光層 3は露出している。 本実施の形態 4の面状発光装置 10cでは、両電極 2a, 2b間に電圧を印加すること により、両電極 2a, 2b間の領域における発光層 3が発光する。発光層 3は第 2の電極 2bに遮られることなく露出しており、発光層 3からの発光を容易に外部に取り出すこと ができる。そして、電極に透明電極材料を使用する必要がないため、均一な平面発 光を得ることができ、コストダウンが可能となる。 The light emitting layer 3 is electrically connected to the first electrode 2a and the second electrode 2b, respectively. In the present embodiment, the light emitting layer 3 protrudes to the layer of the striped second electrode 2b, and is in contact therewith. Specifically, the side surface of the striped second electrode 2 b is in contact with the light emitting layer 3. Here, the side surface of the striped second electrode 2b is a surface perpendicular to the virtual plane on which the side surface of the striped second electrode 2b is provided among the surfaces of the striped second electrode 2b. That is. With such a configuration, the light emitting layer 3 is exposed. In the planar light emitting device 10c of the fourth embodiment, the light emitting layer 3 emits light in the region between the electrodes 2a and 2b by applying a voltage between the electrodes 2a and 2b. The light emitting layer 3 is exposed without being blocked by the second electrode 2b, and the light emitted from the light emitting layer 3 can be easily extracted to the outside. And since it is not necessary to use a transparent electrode material for an electrode, uniform plane light emission can be obtained and cost reduction is attained.
<製造方法〉 <Manufacturing method>
次に、本実施の形態 4の面状発光装置 10cの製造方法について、図 14 (a)〜図 1 4 (i)を用いて説明する。  Next, a method for manufacturing the planar light emitting device 10c of the fourth embodiment will be described with reference to FIGS. 14 (a) to 14 (i).
(a)まず、基板 1上に、モリブデン (Mo)、タングステン (W)またはチタン (Ti)などの金 属を蒸着またはスパッタなどの方法にて成膜し、さらに、蒸着した金属膜の上に誘電 体膜を形成する（図 14 (a) )。  (a) First, a metal such as molybdenum (Mo), tungsten (W), or titanium (Ti) is formed on the substrate 1 by a method such as vapor deposition or sputtering, and further on the vapor-deposited metal film. A dielectric film is formed (Fig. 14 (a)).
(b)次に、フォトリソグラフの手法を用いて、ストライプ状のパターンをレジストにより形 成する（図 14 (b) )。  (b) Next, using a photolithographic technique, a striped pattern is formed from resist (Fig. 14 (b)).
(c)次に、第 1の電極 2aの上までエッチングを行い、金属膜、誘電体膜をパターン二 ングして、第 2の電極 2b、誘電体層 4を形成する（図 14 (c) )。  (c) Next, etching is performed up to the first electrode 2a, and the metal film and the dielectric film are patterned to form the second electrode 2b and the dielectric layer 4 (FIG. 14 (c)). ).
(d)次に、第 2の電極 2b上のレジストを除去する（図 14 (d) )。  (d) Next, the resist on the second electrode 2b is removed (FIG. 14 (d)).
(e)次に、開口部内の基板 1及び第 1の電極 2aの上に、発光層 3を形成する。複数の 蒸発源に ZnSと Cu Sの粉体をそれぞれ投入し、真空中（10_6TOTr台）にて、各材料 (e) Next, the light emitting layer 3 is formed on the substrate 1 and the first electrode 2a in the opening. ZnS and Cu S powders are put into multiple evaporation sources, and each material is used in vacuum (10_ 6 T OT r)
2  2
にエレクトロンビームを照射し、成膜する。このとき、基板温度は 200°Cとし、 ZnSと C u Sを共蒸着する。 The film is irradiated with an electron beam. At this time, the substrate temperature is 200 ° C., and ZnS and Cu S are co-evaporated.
2  2
(f)成膜後、硫黄雰囲気中、 700°Cで約 1時間焼成して発光層 3を得る（図 14 (e) )。 この膜を X線回折や SEMによって調べることによって、微小な ZnS結晶粒の多結晶 体構造と、その粒界における、 Cu Sの偏析部とが観察される。詳細は明らかではな いが、 ZnSと Cu Sとの相分離が生じ、前記偏析構造が形成されるものと考えられる。  (f) After film formation, the phosphor layer 3 is obtained by baking at 700 ° C. for about 1 hour in a sulfur atmosphere (FIG. 14 (e)). By examining this film by X-ray diffraction or SEM, a polycrystalline structure of minute ZnS grains and a segregation part of Cu S at the grain boundary are observed. Although details are not clear, it is considered that phase separation of ZnS and Cu S occurs and the segregation structure is formed.
(g)次に、発光層 3、誘電体層 4の上に、モリブデン (Mo)、タングステン (W)または チタン (Ti)などの金属を蒸着またはスパッタなどの方法にて成膜する（図 14 (f ) )。  (g) Next, a metal such as molybdenum (Mo), tungsten (W) or titanium (Ti) is deposited on the light emitting layer 3 and the dielectric layer 4 by a method such as vapor deposition or sputtering (FIG. 14). (f)).
(h)次に、フォトリソグラフの手法を用いて、金属膜上にストライプ状のパターンをレジ ストにより形成する（図 14 (g) )。 (i)次に、エッチングを行い、金属膜をパターンユングし誘電体膜 4上に第 2の電極 2 bを形成する（図 14 (h) )。 (h) Next, a stripe pattern is formed on the metal film by resist using a photolithographic technique (FIG. 14 (g)). (i) Next, etching is performed to pattern the metal film to form the second electrode 2b on the dielectric film 4 (FIG. 14 (h)).
(j)次に、第 2の電極 2b上のレジストを除去して面状発光装置 10cを得ることができる (図 14 (i) )。  (j) Next, the resist on the second electrode 2b is removed to obtain the planar light emitting device 10c (FIG. 14 (i)).
[0069] 本発明の実施の形態 4では、第 1の電極 2a、第 2の電極 2bの材料として金属を用 いている力 S、導電性の材料であれば何でもよく ZnOなどの酸化物などでもよい。また 、本実施形態では、フォトリソグラフの手法を用いてパターンユングを行っているが、 ストライプ状にパターンユングができればよぐ印刷によるパターンユングなどのパタ ーンユングの方法を用いてもよ!/、。  [0069] In Embodiment 4 of the present invention, force S using a metal as the material of the first electrode 2a and the second electrode 2b, any conductive material may be used, and an oxide such as ZnO may be used. Good. In the present embodiment, pattern jung is performed using a photolithographic technique. However, if the pattern jung can be formed in a stripe shape, a pattern jung method such as pattern jung by printing may be used! /.
[0070] (実施の形態 5)  [0070] (Embodiment 5)
図 15は、実施の形態 5に係る面状発光装置 10dの構成を示す概略断面図である。 この面状発光装置 10dは、実施の形態 4に係る面状発光装置とほぼ同様の構成を有 する力 発光層 3が第 1の電極 2aを貫いて設けられている点で相違する。この場合に も、発光層 3と第 2の電極 2bとが電極 2bの側面で接続されているので、発光層 3は第 2の電極 2bに遮られることなく露出しており、発光層 3からの発光を容易に外部に取り 出すこと力 Sできる。  FIG. 15 is a schematic cross-sectional view showing the configuration of the planar light emitting device 10d according to the fifth embodiment. This planar light emitting device 10d is different in that a force light emitting layer 3 having substantially the same configuration as that of the planar light emitting device according to Embodiment 4 is provided through the first electrode 2a. Also in this case, since the light emitting layer 3 and the second electrode 2b are connected by the side surface of the electrode 2b, the light emitting layer 3 is exposed without being blocked by the second electrode 2b. The ability to easily extract the emitted light to the outside.
[0071] 図 16 (a)〜図 16 (i)は、実施の形態 5に係る面状発光装置 10dの製造方法の各ェ 程を示す概略断面図である。この面状発光装置 10dの製造方法は、実施の形態 4に 係る面状発光装置の製造方法と比較すると、図 16 (c)に示すように、ステップ (c)に ついて、  [0071] FIGS. 16 (a) to 16 (i) are schematic cross-sectional views illustrating steps of a method for manufacturing the planar light emitting device 10d according to Embodiment 5. FIG. Compared with the manufacturing method of the planar light emitting device according to the fourth embodiment, the manufacturing method of the planar light emitting device 10d is as shown in FIG.16 (c).
(c)基板 1の上までエッチングを行い、第 1の電極 2a、金属膜、誘電体膜をパターン ユングして、第 1の電極 2a、第 2の電極 2b、誘電体層 4を形成する（図 16 (c) )。  (c) Etching to the top of the substrate 1 and patterning the first electrode 2a, the metal film, and the dielectric film to form the first electrode 2a, the second electrode 2b, and the dielectric layer 4 ( Figure 16 (c)).
と置換される。  Is replaced with
[0072] なお、本実施の形態 5のように、発光層 3を第 1の電極 2aを貫いて設けるか、実施の 形態 4に示すように、発光層 3を第 1の電極 2aの上に設けるかは、材料の特性に応じ て適宜選択すればよい。  [0072] Note that the light emitting layer 3 is provided through the first electrode 2a as in the fifth embodiment, or the light emitting layer 3 is disposed on the first electrode 2a as shown in the fourth embodiment. Whether it is provided may be appropriately selected according to the characteristics of the material.
[0073] (実施の形態 6)  [0073] (Embodiment 6)
図 17は、実施の形態 6に係る面状発光装置 10eの構成を示す概略断面図である。 本発明の実施の形態 6に係る面状発光装置 10eは、実施の形態 1から 5に係る面状 発光装置と比較すると、第 1及び第 2の電極が、基板上の同一面内に互いに離間し て設けられている点で相違する。このように第 1及び第 2の電極 2a、 2bが基板上の同 一面上に設けられ、発光層が両方の電極 2a、 2bの上に設けられているので、発光層 3の上面を全て発光面として露出させることができ、発光層 3からの発光を容易に外 部に取り出すことができる。 FIG. 17 is a schematic cross-sectional view showing the configuration of the planar light emitting device 10e according to the sixth embodiment. The planar light emitting device 10e according to the sixth embodiment of the present invention is different from the planar light emitting devices according to the first to fifth embodiments in that the first and second electrodes are separated from each other in the same plane on the substrate. It is different in that it is provided. As described above, the first and second electrodes 2a and 2b are provided on the same surface of the substrate, and the light emitting layer is provided on both the electrodes 2a and 2b. It can be exposed as a surface, and light emitted from the light emitting layer 3 can be easily taken out.
[0074] (実施の形態 7) [0074] (Embodiment 7)
<面状発光装置の概略構成〉  <Schematic configuration of planar light emitting device>
図 18は、本発明の実施の形態 7に係る面状発光装置 10の概略的な構成を示す概 略斜視図である。図 19は、図 18の断面 Sの構成を示す概略断面図である。図 20は 、この面状発光装置 10の平面図である。この面状発光装置 10は、基板 1と、基板 1 の上に設けられた平面状の背面電極 4と、背面電極 4と対向して設けられた平面状の 透明電極 2と、背面電極 4と透明電極 2との間に挟まれて設けられた平面状の発光層 3とを備える。透明電極 2と背面電極 4とは直流電源 5を介して電気的に接続されてい る。この場合、負極側に接続された透明電極 2は、電子注入電極（第 2の電極）として 機能し、正極側に接続された背面電極 4は、正孔注入電極（第 1の電極）として機能 する。  FIG. 18 is a schematic perspective view showing a schematic configuration of planar light-emitting device 10 according to Embodiment 7 of the present invention. FIG. 19 is a schematic cross-sectional view showing the configuration of the cross section S of FIG. FIG. 20 is a plan view of the planar light emitting device 10. The planar light emitting device 10 includes a substrate 1, a planar back electrode 4 provided on the substrate 1, a planar transparent electrode 2 provided to face the back electrode 4, a back electrode 4, A planar light emitting layer 3 sandwiched between the transparent electrode 2 and the transparent electrode 2. The transparent electrode 2 and the back electrode 4 are electrically connected via a DC power source 5. In this case, the transparent electrode 2 connected to the negative electrode side functions as an electron injection electrode (second electrode), and the back electrode 4 connected to the positive electrode side functions as a hole injection electrode (first electrode). To do.
[0075] この面状発光装置 10では、発光層 3は、図 21に示すように、 n型半導体粒子 21の 集合体で構成され、該粒子間に p型半導体 23が偏析していることを特徴とする。なお 、ここでは、図 21に示すように、基板 1の上に背面電極 4を設ける場合について説明 する力 これに限られず、例えば、図 22の別例の面状発光装置 10aに示すように、基 板 1の上に透明電極 2を設け、その上に発光層 3、背面電極 4を順に積層する構成と してもよい。あるいは、図 23に示す別例の面状発光装置 10bでは、発光層 3が、 p型 半導体 23の媒体の中に n型半導体粒子 21が分散して構成されたことを特徴とする。 このように、 n型半導体粒子と p型半導体との界面を多く形成することによって、正孔 の注入性が改善され、電子と正孔の再結合型発光が効率よく生じ、低電圧で高輝度 発光する面状発光装置を実現することができる。さらに、 n型半導体粒子が p型半導 体を介して電極と電気的に接続されている構成とすることによって、発光効率を向上 させることができ、低電圧で発光が可能で、且つ、高輝度発光する面状発光装置が 得られる。 In this planar light emitting device 10, the light emitting layer 3 is composed of an aggregate of n-type semiconductor particles 21 as shown in FIG. 21, and the p-type semiconductor 23 is segregated between the particles. Features. Note that here, as shown in FIG. 21, the force for explaining the case where the back electrode 4 is provided on the substrate 1 is not limited to this. For example, as shown in another planar light emitting device 10a in FIG. The transparent electrode 2 may be provided on the substrate 1, and the light emitting layer 3 and the back electrode 4 may be laminated on the transparent electrode 2 in this order. Alternatively, in another example of the planar light emitting device 10b shown in FIG. 23, the light emitting layer 3 is characterized in that the n-type semiconductor particles 21 are dispersed in the medium of the p-type semiconductor 23. In this way, by forming many interfaces between n-type semiconductor particles and p-type semiconductors, hole injection properties are improved, recombination light emission of electrons and holes is efficiently generated, and high luminance is achieved at low voltage. A planar light emitting device that emits light can be realized. In addition, light emission efficiency is improved by adopting a configuration in which n-type semiconductor particles are electrically connected to the electrode through a p-type semiconductor. Thus, a planar light emitting device capable of emitting light at a low voltage and emitting light with high luminance is obtained.
[0076] さらに、この面状発光装置 10では、透明電極 2と背面電極 4とは直流電源 5を介し て電気的に接続されている。直流電源 5から電力が供給されると、透明電極 2及び背 面電極 4の間に電位差が生じ、発光層 3に電圧が印加される。そして、透明電極 2及 び背面電極 4の間に配置されている発光層 3が発光し、その光が透明電極 2を透過 して面状発光装置 10の外部に取り出される。  Furthermore, in the planar light emitting device 10, the transparent electrode 2 and the back electrode 4 are electrically connected via a DC power supply 5. When power is supplied from the DC power source 5, a potential difference is generated between the transparent electrode 2 and the back electrode 4, and a voltage is applied to the light emitting layer 3. Then, the light emitting layer 3 disposed between the transparent electrode 2 and the back electrode 4 emits light, and the light passes through the transparent electrode 2 and is extracted outside the planar light emitting device 10.
[0077] さらに、上述の構成に限られず、電極と発光層との間に電流制限を目的として薄い 誘電体層を複数設ける、交流電源により駆動する、背面電極を透明にする、背面電 極を黒色電極とする、面状発光装置 10の全部又は一部を封止する構造を更に備え る、発光取出し方向の前方に発光層 3からの発光色を色変換する構造を更に備える 等、適宜変更が可能である。例えば、青色発光層と、青色を緑色及び赤色に変換す る色変換層とを組み合わせて白色の面状発光装置とすることもできる。  [0077] Further, the present invention is not limited to the above configuration, and a plurality of thin dielectric layers are provided between the electrode and the light emitting layer for the purpose of current limitation, driven by an AC power source, the back electrode is made transparent, and the back electrode is Change as appropriate, including a black electrode, a structure that seals all or part of the planar light emitting device 10, and a structure that converts the color of light emitted from the light emitting layer 3 in front of the light emission direction. Is possible. For example, a white planar light emitting device can be formed by combining a blue light emitting layer and a color conversion layer that converts blue into green and red.
[0078] なお、本実施の形態 7に係る面状発光装置の各構成部材は、その特徴について説 明するもの以外は、上記実施の形態 1に係る面状発光装置の各構成部材と実質的 に同様のものを用いることができる。  [0078] It should be noted that each component of the planar light emitting device according to the seventh embodiment is substantially the same as each component of the planar light emitting device according to the first embodiment, except that the features thereof are described. The same can be used.
[0079] <発光層〉  [0079] <Light emitting layer>
この発光層 3は、透明電極 2と背面電極 4との間に挟持され、次の 2つのうち、いず れかの構造を有する。  The light emitting layer 3 is sandwiched between the transparent electrode 2 and the back electrode 4 and has one of the following two structures.
(i) n型半導体粒子の集合体であって、該粒子間に p型半導体 23が偏祈した構造（ 図 21)。なお、上記 n型半導体粒子 21の集合体は、それ自体で層を構成している。  (i) An assembly of n-type semiconductor particles, in which a p-type semiconductor 23 is prayed between the particles (FIG. 21). The aggregate of the n-type semiconductor particles 21 constitutes a layer by itself.
(ii) p型半導体 23の媒体中に n型半導体粒子 21が分散した構造 (図 23)。 更に、発光層 3を構成する各 n型半導体粒子 21が、 p型半導体 23を介して電極 2、 4と電気的に接合されて!/、ることが好ましレ、。  (ii) A structure in which n-type semiconductor particles 21 are dispersed in a medium of p-type semiconductor 23 (FIG. 23). Further, it is preferable that each n-type semiconductor particle 21 constituting the light emitting layer 3 is electrically joined to the electrodes 2 and 4 via the p-type semiconductor 23! /.
[0080] <発光体〉 [0080] <Luminescent body>
n型半導体粒子 21の材料は、多数キャリアが電子であり n型伝導を示す n型半導体 材料である。材料としては、第 12族—第 16族間化合物半導体であってもよい。また、 第 13族 第 15族間化合物半導体であってもよい。具体的には、光学バンドギャップ が可視光の大きさを有する材料であって、例えば、 ZnS, ZnSe GaN InGaN, Al N GaAlN GaP CdSe CdTe SrS CaSを母体とし、母体のまま使用する力、、あ るいは添加剤として、 Cu Ag Au Ir Al Ga In Mn Cl Br I Li Ce Pr N d Pm Sm Eu Gd Tb Dy Ho, Er Tm Yb力、らなる群より選択される 1又は 複数種の原子もしくはイオンを添加剤として含んでいてもよい。これらの元素の種類 によっても、発光層 3からの発光色が決定される。 The material of the n-type semiconductor particles 21 is an n-type semiconductor material in which majority carriers are electrons and exhibit n-type conduction. The material may be a Group 12-Group 16 compound semiconductor. Further, it may be a Group 13 Group 15 Group 15 compound semiconductor. Specifically, optical band gap Is a material having the size of visible light, for example, ZnS, ZnSe GaN InGaN, Al N GaAlN GaP CdSe CdTe SrS CaS Au Ir Al Ga In Mn Cl Br I Li Ce Pr N d Pm Sm Eu Gd Tb Dy Ho, Er Tm Yb force, even if it contains one or more kinds of atoms or ions selected from the group Good. The color of light emitted from the light emitting layer 3 is also determined by the type of these elements.
[0081] 一方、 p型半導体 23の材料は、多数キャリアが正孔であり、 p型伝導を示す p型半 導体材料である。この p型半導体材料としては、 列えば'、 Cu S ZnS ZnSe ZnSS  On the other hand, the material of the p-type semiconductor 23 is a p-type semiconductor material in which majority carriers are holes and exhibits p-type conduction. As this p-type semiconductor material, if you line up, Cu S ZnS ZnSe ZnSS
2  2
e ZnSeTe ZnTeなどの化合物や、更に GaN, InGaN等の窒化物である。この p型 半導体の材料のうち、 Cu Sなどは、本来的に p型伝導を示すが、その他の材料は添  e ZnSeTe Compounds such as ZnTe, and nitrides such as GaN and InGaN. Among these p-type semiconductor materials, Cu S and the like inherently show p-type conduction, but other materials are added.
2  2
加剤として窒素、 Ag Cu Inから一種以上選択される元素を添加して用いる。また、 p型伝導を示す CuGaS CuAlSなどのカルコパイライト型化合物を用いても良い。  As an additive, one or more elements selected from nitrogen and Ag Cu In are added and used. Further, a chalcopyrite type compound such as CuGaS CuAlS exhibiting p-type conduction may be used.
2 2  twenty two
[0082] 本実施の形態に係る面状発光装置 10の特徴は、発光層 3が、（i) n型半導体粒子 2 1の粒子間に p型半導体 23が偏析した構造（図 21)、（ii) p型半導体 23の媒体中に n 型半導体粒子 21が分散した構造（図 23)のいずれかの構造を有することである。図 2 0に示す従来例のように、半導体粒子 61と電気的に接合する媒体がインジウム錫酸 化物 63の場合、電子が半導体粒子 61に到達して発光することが可能である力 イン ジゥム錫酸化物の正孔濃度は小さいため、再結合するための正孔が不足する。従つ て、電子と正孔の再結合による高輝度の発光は期待できない。そこで、本発明者は、 特に高輝度で効率良ぐし力、も連続した発光を得るために、発光層 3において、電子 の注入とともに正孔を効率良く注入することができる構造に着目した。上記構造を実 現するためには、発光体粒子内部または界面に多くの正孔が到達すること、更に電 子の注入電極に対向する電極からの正孔の注入が速やかに行われかつ発光体粒 子あるいは界面に到達する必要がある。そこで、本発明者は鋭意研究の結果、発光 層 3の構造として、上記 (i)、（ii)のうち、いずれかの構造とすることによって、 n型半導 体粒子内部または界面 電子の注入とともに正孔を効率良く注入することができるこ とを見出した。すなわち、上記各構造の発光層 3によれば、電極から注入された電子 は、 p型半導体 23を通して n型半導体粒子 21に到達し、一方、他方の電極から多く の正孔が発光体粒子に到達し、電子と正孔との再結合によって効率よく発光させるこ とができる。これによつて、低電圧で高輝度発光する面状発光装置を実現することが でき、本発明に至ったものである。また、ドナーあるいはァクセプターを導入すること により、自由電子とァクセプターに捕獲された正孔の再結合、自由正孔とドナーに捕 獲された電子の再結合、ドナ一一ァクセプター対発光も同様に可能である。またさら に、他のイオン種が近傍にあることでエネルギー移動による発光も同様に可能であるThe planar light emitting device 10 according to the present embodiment is characterized in that the light emitting layer 3 is (i) a structure in which a p-type semiconductor 23 is segregated between n-type semiconductor particles 21 (FIG. 21), ii) It has one of the structures (FIG. 23) in which the n-type semiconductor particles 21 are dispersed in the medium of the p-type semiconductor 23. As in the conventional example shown in FIG. 20, when the medium electrically connected to the semiconductor particles 61 is indium tin oxide 63, the force that allows the electrons to reach the semiconductor particles 61 to emit light is indium tin tin. Since the hole concentration of the oxide is small, holes for recombination are insufficient. Therefore, high luminance emission due to recombination of electrons and holes cannot be expected. Therefore, the present inventor has focused on a structure in which holes can be efficiently injected together with the injection of electrons in the light emitting layer 3 in order to obtain continuous light emission with particularly high brightness and high efficiency. In order to realize the above structure, a large number of holes reach the inside or the interface of the phosphor particles, and the holes are rapidly injected from the electrode facing the electron injection electrode, and the phosphor It is necessary to reach the particle or interface. Therefore, as a result of intensive studies, the present inventor has made the structure of the light emitting layer 3 one of the above (i) and (ii), thereby injecting the inside of the n-type semiconductor particles or the interface electrons. At the same time, it was found that holes can be injected efficiently. That is, according to the light-emitting layer 3 having each structure described above, electrons injected from the electrode reach the n-type semiconductor particles 21 through the p-type semiconductor 23, and more from the other electrode. Holes reach the phosphor particles, and light can be efficiently emitted by recombination of electrons and holes. Thus, a planar light emitting device that emits light with high luminance at a low voltage can be realized, and the present invention has been achieved. In addition, by introducing a donor or acceptor, recombination of free electrons and holes captured by the acceptor, recombination of free holes and electrons captured by the donor, and donor-acceptor pair emission are also possible. It is. Furthermore, light emission by energy transfer is also possible due to the proximity of other ion species.
〇 Yes
[0083] さらに、発光層 3の n型半導体粒子 21として ZnS等の亜鉛系材料を用いる場合に は、透明電極 2と背面電極 4の少なくとも一方には、例えば、 ZnO、 AZO (酸化亜鉛 に例えばアルミをドープしたもの）、 GZO (酸化亜鉛に、例えばガリウムをドープしたも の）等の亜鉛を含む金属酸化物からなる電極を用いることが好ましい。本発明者は、 特定の n型半導体粒子 21と特定の透明電極 2 (又は背面電極 4)との組み合わせを 採用することによって、高効率に発光させることができることを見出したものである。  [0083] Further, when a zinc-based material such as ZnS is used as the n-type semiconductor particles 21 of the light-emitting layer 3, at least one of the transparent electrode 2 and the back electrode 4 is, for example, ZnO, AZO (for example, zinc oxide) It is preferable to use an electrode made of a metal oxide containing zinc, such as one doped with aluminum) or GZO (zinc oxide doped with gallium, for example). The present inventor has found that light can be emitted with high efficiency by employing a combination of specific n-type semiconductor particles 21 and specific transparent electrode 2 (or back electrode 4).
[0084] すなわち、透明電極 2 (又は背面電極 4)における仕事関数について着目すると、 Z ηθの仕事関数は 5. 8eVであるのに対して、従来、透明電極として使われてきた ITO (酸化インジウムスズ)の仕事関数は 7. OeVである。一方、発光層 3の n型半導体粒 子 21である亜鉛系材料の仕事関数は 5〜6eVであることから、 ITOに比べて ZnOの 仕事関数は、亜鉛系材料の仕事関数により近いため、発光層 3への電子注入性が良 いというメリットがある。これは、透明電極 2 (又は背面電極 4)として同様に亜鉛系材 料である AZO、 GZOを用いた場合も同様である。  That is, when attention is paid to the work function in the transparent electrode 2 (or the back electrode 4), the work function of Z ηθ is 5.8 eV, whereas ITO (indium oxide) that has been conventionally used as a transparent electrode is used. The work function of tin) is 7. OeV. On the other hand, since the work function of the zinc-based material that is the n-type semiconductor particle 21 of the light-emitting layer 3 is 5 to 6 eV, the work function of ZnO is closer to the work function of the zinc-based material than that of ITO. There is an advantage that electron injection into layer 3 is good. The same applies to the case where AZO and GZO, which are zinc-based materials, are used as the transparent electrode 2 (or the back electrode 4).
[0085] 図 24 (a)は、 ZnSからなる発光層 3と AZOからなる透明電極 2 (又は、背面電極 4) との界面付近の模式図である。図 24 (b)は、図 24 (a)のポテンシャルエネルギーの 変位を説明する模式図である。また、図 25 (a)は、比較例として、 ZnS力 なる発光 層 3と ITOからなる透明電極との界面の模式図である。図 25 (b)は、図 25 (a)のポテ ンシャルエネルギーの変位を説明する模式図である。  FIG. 24 (a) is a schematic view of the vicinity of the interface between the light-emitting layer 3 made of ZnS and the transparent electrode 2 (or the back electrode 4) made of AZO. Fig. 24 (b) is a schematic diagram illustrating the displacement of potential energy in Fig. 24 (a). FIG. 25 (a) is a schematic diagram of an interface between the light emitting layer 3 having ZnS force and the transparent electrode made of ITO as a comparative example. FIG. 25 (b) is a schematic diagram for explaining the displacement of potential energy in FIG. 25 (a).
[0086] 図 24 (a)に示すように、上記の好ましい例では、発光層 3を構成する n型半導体粒 子 21が亜鉛系材料 (ZnS)であって、透明電極 2 (又は、背面電極 4)が酸化亜鉛系 材料 (AZO)であることから、透明電極 2 (又は、背面電極 4)と発光層 3との界面にで きる酸化物は、酸化亜鉛 (ZnO)となる。さらに、界面では成膜時にドーピング材料（ A1)が拡散し、低抵抗な酸化膜が形成される。また、上記の酸化亜鉛系 (AZO)の透 明電極 2 (又は背面電極 4)は、六方晶の結晶構造をとるが、発光層 3を構成する n型 半導体物質 21である亜鉛系材料 (ZnS)も六方晶または立方晶の結晶構造をとるた め、両者の界面では歪が小さくエネルギー障壁が小さくなる。これによつて、図 24 (b )に示すように、ポテンシャルエネルギーの変位が少ない。 As shown in FIG. 24 (a), in the above preferred example, the n-type semiconductor particles 21 constituting the light emitting layer 3 are zinc-based material (ZnS) and the transparent electrode 2 (or the back electrode) Since 4) is a zinc oxide-based material (AZO), it can be used at the interface between transparent electrode 2 (or back electrode 4) and light-emitting layer 3. The resulting oxide is zinc oxide (ZnO). Further, at the interface, the doping material (A1) diffuses during film formation, and a low-resistance oxide film is formed. The zinc oxide-based (AZO) transparent electrode 2 (or the back electrode 4) has a hexagonal crystal structure, but is a zinc-based material (ZnS) that is the n-type semiconductor substance 21 constituting the light-emitting layer 3. ) Also has a hexagonal or cubic crystal structure, so the strain is small and the energy barrier is small at the interface between the two. As a result, as shown in FIG. 24 (b), the displacement of potential energy is small.
[0087] 一方、比較例では、図 25 (a)のように透明電極が亜鉛系材料でない ITOであるた め、界面にできた酸化膜 (ZnO)は、 ITOにとつて異なる結晶構造を持つことから、そ の界面におけるエネルギー障壁が大きくなる。したがって、図 25 (b)に示すように、ポ テンシャルエネルギーの変位が界面で大きくなり、発光素子の発光効率が低下するOn the other hand, in the comparative example, as shown in FIG. 25 (a), the transparent electrode is ITO which is not a zinc-based material, so the oxide film (ZnO) formed at the interface has a different crystal structure from that of ITO. This increases the energy barrier at the interface. Therefore, as shown in FIG. 25 (b), the displacement of the potential energy increases at the interface, and the light emission efficiency of the light emitting element decreases.
〇 Yes
[0088] 以上のように、発光層 3の n型半導体粒子 21として、 ZnS、 ZnSeなどの亜鉛系材料 を用いる場合には、酸化亜鉛系材料からなる透明電極 2 (又は、背面電極 4)と組み 合わせることにより、発光効率の良い面状発光装置を提供することができる。  As described above, when a zinc-based material such as ZnS or ZnSe is used as the n-type semiconductor particles 21 of the light emitting layer 3, the transparent electrode 2 (or the back electrode 4) made of a zinc oxide-based material is used. By combining them, a planar light emitting device with high luminous efficiency can be provided.
[0089] なお、上記の例では、亜鉛を含む透明電極 2 (又は、背面電極 4)として、アルミユウ ムをドープした AZOとガリウムをドープした GZOとを例にあげて説明した力 アルミ二 ゥム、ガリウム、チタン、ニオブ、タンタル、タングステン、銅、銀、ホウ素のうち少なくと も 1種類をドープした酸化亜鉛を用レ、ても同様である。  [0089] In the above example, as the transparent electrode 2 (or the back electrode 4) containing zinc, the force described by taking AZO doped with aluminum and GZO doped with gallium as examples. The same applies to zinc oxide doped with at least one of gallium, titanium, niobium, tantalum, tungsten, copper, silver, and boron.
[0090] <製造方法〉  [0090] <Production method>
以下、実施の形態 7に係る面状発光装置 10の製造方法の一例を説明する。なお、 前述の他の材料からなる発光層についても同様の製造方法が利用可能である。  Hereinafter, an example of a method for manufacturing the planar light emitting device 10 according to Embodiment 7 will be described. The same manufacturing method can be used for the light emitting layer made of the other materials described above.
(a)基板 1としてコーユング 1737を準備する。  (a) Prepare Coung 1737 as the substrate 1.
(b)基板 1上に、平面状の背面電極 4を形成する。例えば A1を使用し、フォトリソダラ フィ法によって形成する。膜厚は 200nmとする。  (b) A planar back electrode 4 is formed on the substrate 1. For example, using A1, it is formed by the photolithographic method. The film thickness is 200 nm.
(c)背面電極 4上に、平面状の発光層 3を形成する。複数の蒸発源に ZnSと Cu Sの  (c) A planar light emitting layer 3 is formed on the back electrode 4. ZnS and Cu S in multiple evaporation sources
2 粉体をそれぞれ投入し、真空中（10— 6Torr台）にて、各材料にエレクトロンビームを 照射し、基板 1上に発光層 3として成膜する。このとき、基板温度は 200°Cとし、 ZnS と Cu Sを共蒸着する。 (d)発光層 3の成膜後、硫黄雰囲気中、 700°Cで約 1時間焼成する。この膜を X線回 折や SEMによって調べることによって、微小な ZnS結晶粒の多結晶構造と Cu Sの 2 powder was placed respectively, in a vacuum (10- 6 Torr table), is irradiated with electron beams in each material, forming a film as a light-emitting layer 3 on the substrate 1. At this time, the substrate temperature is 200 ° C., and ZnS and Cu S are co-evaporated. (d) After the light emitting layer 3 is formed, it is baked at 700 ° C. for about 1 hour in a sulfur atmosphere. By examining this film by X-ray diffraction and SEM, the polycrystalline structure of small ZnS grains and Cu S
X  X
偏析部とが観察される。詳細は明らかではないが、 ZnSと Cu Sとの相分離が生じ、 前記偏析構造が形成されたものと考えられる。  A segregation part is observed. Although details are not clear, it is considered that phase segregation between ZnS and Cu S occurred and the segregation structure was formed.
(e)続いて、平面状の透明電極 2を、例えば ITOを使用して形成する。膜厚は 200η mとする。  (e) Subsequently, the planar transparent electrode 2 is formed using, for example, ITO. The film thickness is 200ηm.
(f)続いて、発光層 3及び透明電極 2上に、保護層（図では省略）として、例えば窒化 シリコン等の透明絶縁体層を形成する。  (f) Subsequently, a transparent insulator layer such as silicon nitride is formed on the light emitting layer 3 and the transparent electrode 2 as a protective layer (not shown).
以上の工程によって、本実施の形態 7の面状発光装置 10が得られる。  Through the above steps, the planar light emitting device 10 of the seventh embodiment is obtained.
[0091] この実施の形態 7に係る面状発光装置 10は、透明電極 2と背面電極 4とを直流電 源 5に接続して、その間に直流電圧を印加して発光評価を行なったところ、印加電圧 15Vで発光し始め、 35Vで約 600cd/m2の発光輝度を示した。 [0091] In the planar light emitting device 10 according to the seventh embodiment, the transparent electrode 2 and the back electrode 4 are connected to the direct current power source 5, and the direct current voltage is applied between them to perform the light emission evaluation. It started to emit light at a voltage of 15V, and showed an emission luminance of about 600cd / m 2 at 35V.
[0092] (実施の形態 8) [0092] (Embodiment 8)
<面状発光装置の概略構成〉  <Schematic configuration of planar light emitting device>
図 27は、本発明の実施の形態 8に係る面状発光装置 10cの構成を示す概略斜視 図である。図 28は、図 27の断面 Sの構成を示す概略断面図である。図 29は、この面 状発光装置 10cの平面図である。この面状発光装置 10cは、実施の形態 7に係る面 状発光装置と比較すると、第 1及び第 2の電極 2a、 2bが、互いに対向する 2枚の平行 な仮想平面の上にそれぞれストライプ状に設けられていると共に、第 1の電極 2aと、 第 1の電極 2aが設けられている仮想平面への第 2の電極 2bの射影とが互いに重なら ないことを特徴としている。第 1の電極 2aと第 2の電極 2bとの間に挟まれる発光層の 部分が電流密度の高い場所であり、この箇所から発光が生じる。この面状発光装置 1 Ocでは、上述のように、第 1の電極 2aと第 2の電極 2bとが互いにずらせて配置されて いるので、発光が生じる第 1の電極 2aと第 2の電極 2bとの間に挟まれる発光層からの 発光の大部分が電極に遮蔽されることなく外部に取り出すことができる。  FIG. 27 is a schematic perspective view showing the configuration of the planar light emitting device 10c according to Embodiment 8 of the present invention. FIG. 28 is a schematic cross-sectional view showing the configuration of the cross section S of FIG. FIG. 29 is a plan view of the planar light emitting device 10c. In comparison with the planar light emitting device according to the seventh embodiment, the planar light emitting device 10c has the first and second electrodes 2a and 2b in a striped shape on two parallel virtual planes facing each other. The first electrode 2a and the projection of the second electrode 2b on the virtual plane on which the first electrode 2a is provided do not overlap with each other. The portion of the light emitting layer sandwiched between the first electrode 2a and the second electrode 2b is a place where the current density is high, and light emission occurs from this place. In the planar light emitting device 1 Oc, as described above, the first electrode 2a and the second electrode 2b are arranged so as to be shifted from each other, so that the first electrode 2a and the second electrode 2b that emit light are generated. Most of the light emitted from the light emitting layer sandwiched between the two can be extracted outside without being shielded by the electrodes.
[0093] なお、この面状発光装置 10cにおいても、実施の形態 7と同様に、もう一つの特徴 は、発光層 3が、（i) n型半導体粒子 21の粒子間に p型半導体 23が偏析した構造（図 21)、（ii) p型半導体 23の媒体中に n型半導体粒子 21が分散した構造（図 23)のい ずれかの構造を有することである。 In this planar light emitting device 10c, as in the seventh embodiment, another feature is that the light emitting layer 3 includes (i) the p-type semiconductor 23 between the n-type semiconductor particles 21. Segregated structure (Fig. 21), (ii) Structure in which n-type semiconductor particles 21 are dispersed in the medium of p-type semiconductor 23 (Fig. 23) It has a structure of either.
[0094] この面状発光装置 10cでは、上述のように、第 1及び第 2の電極 2a、 2bは、互いに 対向する 2枚の平行な仮想平面の上にそれぞれストライプ状に設けられていると共に 、第 1の電極 2aと、第 1の電極 2aが設けられている仮想平面 の第 2の電極 2bの射 影とが互いに重ならな!/、ように設けられて!/、る。  In the planar light emitting device 10c, as described above, the first and second electrodes 2a, 2b are respectively provided in stripes on two parallel virtual planes facing each other. The first electrode 2a and the projection of the second electrode 2b on the virtual plane on which the first electrode 2a is provided should not overlap each other! /.
[0095] 本発明者は、面状発光装置における電極位置に関する課題を見出し、上記のよう な電極配置を思い至ったものである。すなわち、実施の形態 7のような面状発光装置 では、発光層の抵抗が低い。一方、発光面側に平面状の透明電極膜を使用した場 合、透明電極の抵抗は比較的大きい。本発明者は、発光層の抵抗が低ぐ透明電極 の抵抗が比較的大きいことに起因して、透明電極において端子からの距離に応じて 電圧降下が発生し、例えば、図 26に模式的に示すように、平面内で発光ムラが発生 するという課題があることを見出した。  The inventor has found a problem regarding the electrode position in the planar light emitting device, and has come up with the electrode arrangement as described above. That is, in the planar light emitting device as in Embodiment 7, the resistance of the light emitting layer is low. On the other hand, when a flat transparent electrode film is used on the light emitting surface side, the resistance of the transparent electrode is relatively large. The inventor has found that the voltage drop occurs according to the distance from the terminal in the transparent electrode due to the resistance of the transparent electrode being low and the resistance of the light emitting layer being low. For example, FIG. As shown in the figure, it has been found that there is a problem that uneven light emission occurs in a plane.
[0096] 上記課題を解決する方法として、透明電極ではなぐ低抵抗の金属電極を用いるこ とが考えられるが、その場合には発光面が確保できない。これに対しては、金属電極 をストライプ状に設け、発光面とすることができる。このように平面状の電極ではなぐ 複数のストライプ状の電極とすることで、平面内での電圧降下を防ぐと共に、ストライ プ状の電極の間に発光層が露出するので、発光面とすることができる。  [0096] As a method for solving the above problems, it is conceivable to use a low-resistance metal electrode that is not a transparent electrode, but in that case, a light emitting surface cannot be secured. For this, the metal electrodes can be provided in stripes to form a light emitting surface. By using multiple striped electrodes instead of flat electrodes in this way, voltage drop in the plane is prevented and the light emitting layer is exposed between the striped electrodes. Can do.
[0097] しかし、発光層 3は、上下の金属電極 2a、 2bに挟まれた箇所で発光するため、その ままでは得られた発光が金属電極に遮られ、発光を効率的に外部に取り出すことが できない。そこで、本発明者は、さらに、第 1及び第 2の電極 2a、 2bを、互いに対向す る 2枚の平行な仮想平面の上にそれぞれストライプ状に設けると共に、第 1の電極 2a と、第 1の電極 2aが設けられている仮想平面への第 2の電極 2bの射影とが互いに重 ならないように設けるという本発明の構成を考え出したものである。上記構成とするこ とによって、第 1及び第 2の電極 2a、 2bの間に挟まれた発光層 3からの発光の大部分 が少なくとも一方の電極に遮られることなく外部に取り出すことができるようにすること ができる。  However, since the light-emitting layer 3 emits light at a position sandwiched between the upper and lower metal electrodes 2a and 2b, the light emission obtained is blocked by the metal electrode, and the light emission can be efficiently extracted outside. I can't. Therefore, the inventor further provided the first and second electrodes 2a and 2b in stripes on two parallel virtual planes facing each other, and the first electrode 2a and the first electrode The present invention has been conceived of the configuration of the present invention in which the second electrode 2b is projected so as not to overlap the virtual plane on which the first electrode 2a is provided. With the above configuration, most of the light emitted from the light emitting layer 3 sandwiched between the first and second electrodes 2a and 2b can be extracted outside without being blocked by at least one of the electrodes. Can be made.
[0098] 本実施の形態 8の面状発光装置 10cでは、基板 1上に形成されたストライプ状の第 1の電極 2aと、第 1の電極 2aに平行になるように、かつ、基板から垂直に見た場合に 第 1の電極 2aに重ならないように設けられたストライプ状の第 2の電極 2bと、第 2の電 極 2bおよび第 1の電極 2a間に介在する発光層 3とを有する。ストライプ状の両電極 2 a, 2bは、金属の電極である。本実施形態の表示装置では、両電極 2a, 2b間に電圧 を印加することにより、両電極 2a, 2b間の領域における発光層 3が発光する。これに より、電極に透明電極材料を使用する必要がないため、均一な平面発光を得ること ができ、コストダウンが可能となる。また、表側、裏側両側から光を取り出すことが可能 となる。 In the planar light emitting device 10c according to the eighth embodiment, the stripe-shaped first electrode 2a formed on the substrate 1 is parallel to the first electrode 2a and is perpendicular to the substrate. If you look at It has a striped second electrode 2b provided so as not to overlap the first electrode 2a, and a light emitting layer 3 interposed between the second electrode 2b and the first electrode 2a. Both striped electrodes 2a and 2b are metal electrodes. In the display device of this embodiment, the light emitting layer 3 in the region between the electrodes 2a and 2b emits light by applying a voltage between the electrodes 2a and 2b. As a result, it is not necessary to use a transparent electrode material for the electrode, so that uniform planar light emission can be obtained and the cost can be reduced. In addition, light can be extracted from both the front and back sides.
<製造方法〉 <Manufacturing method>
次に、本実施の形態 8の面状発光装置 10cの製造方法について、図 30 (a)〜図 3 0 (i)を用いて説明する。  Next, a method for manufacturing the planar light emitting device 10c of the eighth embodiment will be described with reference to FIGS. 30 (a) to 30 (i).
(a)まず、基板 1上に、モリブデン (Mo)、タングステン (W)またはチタン (Ti)などの金 属膜を蒸着またはスパッタなどの方法にて成膜する（図 30 (a) )。  (a) First, a metal film such as molybdenum (Mo), tungsten (W), or titanium (Ti) is formed on the substrate 1 by a method such as vapor deposition or sputtering (FIG. 30 (a)).
(b)次に、フォトリソグラフの手法を用いて、ストライプ状のパターンをレジストによって 形成する（図 30 (b) )。  (b) Next, using a photolithographic technique, a striped pattern is formed with a resist (FIG. 30 (b)).
(c)次いで、エッチングを行い、金属膜をパターンユングして、第 1の電極 2aを形成 する（図 30 (c) )。  (c) Next, etching is performed to pattern the metal film to form the first electrode 2a (FIG. 30 (c)).
(d)次に、第 1の電極 2a上のレジストの除去を行う（図 30 (d) )。  (d) Next, the resist on the first electrode 2a is removed (FIG. 30 (d)).
(e)次に、基板 1及び第 1の電極 2aの上に、発光層 3を形成する。複数の蒸発源に Z nSと Cu Sの粉体をそれぞれ投入し、真空中（10_6Torr台）にて、各材料にエレクト(e) Next, the light emitting layer 3 is formed on the substrate 1 and the first electrode 2a. Each was charged powder Z nS and Cu S into a plurality of evaporation sources, in vacuo (10_ 6 Torr stand), elect to each material
2 2
ロンビームを照射し、基板 1上に発光層 3として成膜する。このとき、基板温度は 200 °Cとし、 ZnSと Cu Sを共蒸着する。 A long beam is irradiated to form a light emitting layer 3 on the substrate 1. At this time, the substrate temperature is 200 ° C., and ZnS and Cu S are co-evaporated.
2  2
(f)成膜後、硫黄雰囲気中、 700°Cで約 1時間焼成する。これによつて発光層 3が得 られる（図 30 (e) )。なお、この膜を X線回折や SEMによって調べると、微小な ZnS結 晶粒の多結晶構造と Cu Sの偏析部とが観察される。詳細は明らかではないが、 ZnS  (f) After film formation, baked at 700 ° C for about 1 hour in a sulfur atmosphere. As a result, the light emitting layer 3 is obtained (FIG. 30 (e)). When this film is examined by X-ray diffraction or SEM, a polycrystalline structure of minute ZnS crystal grains and a segregation part of Cu S are observed. Details are not clear, but ZnS
X  X
と Cu Sとの相分離が生じ、前記偏析構造が形成されたものと考えられる。 It is considered that the segregation structure was formed due to phase separation between Cu and Cu S.
(g)次に、発光層 3上に、モリブデン (Mo)、タングステン (W)またはチタン (Ti)など の金属を蒸着またはスパッタ法などの方法にて成膜する（図 30 (f) )。  (g) Next, a metal such as molybdenum (Mo), tungsten (W) or titanium (Ti) is deposited on the light emitting layer 3 by a method such as vapor deposition or sputtering (FIG. 30 (f)).
(h)次に、フォトリソグラフの手法を用いて、第 1の電極 2aと平行になるようにすると共 に、基板面から見た場合に第 1の電極 2aと重ならないようなストライプ状のパターンを レジストにより形成する（図 30 (g) )。 (h) Next, if it is made parallel to the first electrode 2a using a photolithographic technique, In addition, a striped pattern that does not overlap with the first electrode 2a when viewed from the substrate surface is formed by a resist (FIG. 30 (g)).
(i)次に、エッチングを行って、金属膜をパターンユングし、ストライプ状の第 2の電極 2bを形成する（図 30 (h) )。  (i) Next, etching is performed to pattern the metal film to form a striped second electrode 2b (FIG. 30 (h)).
(j)次に、第 2の電極 2b上のレジストを除去して、実施の形態 8に係る面状発光装置 1 Ocを得ることができる（図 30 (i) )。  (j) Next, the resist on the second electrode 2b is removed to obtain the planar light emitting device 1 Oc according to Embodiment 8 (FIG. 30 (i)).
[0100] 本実施の形態 8では、第 1の電極 2a、第 2の電極 2bの材料に金属を用いている力 導電性の材料であれば何でもよく ZnOなどの酸化物などでもよい。また、本実施の形 態 8では、フォトリソグラフの手法を用いて電極のパターンユングを行っている力 これ に限定されることなぐストライプ状にパターンユングできる方法であれば用いることが できる。例えば、印刷によるパターンユングなどのパターンユングの方法を用いてもよ い。 [0100] In the eighth embodiment, any force conductive material using metal as the material of the first electrode 2a and the second electrode 2b may be used, and an oxide such as ZnO may be used. Further, in Embodiment 8, any force can be used as long as the pattern can be patterned into a stripe shape without being limited to the force of patterning the electrode using a photolithographic technique. For example, a pattern jung method such as pattern jung by printing may be used.
[0101] (実施の形態 9)  [0101] (Embodiment 9)
図 31は、本発明の実施の形態 9に係る面状発光装置 10dの構成を示す断面図で ある。この面状発光装置 10dは、実施の形態 8に係る面状発光装置と比較すると、第 1の電極 2aが基板 1側に埋設されている点で相違する力 S、その他の特徴は実施の形 態 8と同様である。  FIG. 31 is a cross-sectional view showing a configuration of a planar light emitting device 10d according to Embodiment 9 of the present invention. The planar light emitting device 10d is different from the planar light emitting device according to the eighth embodiment in that the force S, which is different in that the first electrode 2a is embedded on the substrate 1 side, and other features Same as in state 8.
[0102] (実施の形態 10)  [0102] (Embodiment 10)
<面状発光装置の概略構成〉  <Schematic configuration of planar light emitting device>
実施の形態 10に係る面状発光装置は、互いに対向する 2枚の平行な仮想平面上 にそれぞれ設けられた第 1及び第 2の電極と、前記第 1及び第 2の電極が対向する間 に少なくとも一部が挟まれて設けられた誘電体層と、前記第 1及び第 2の電極とに電 気的に接続され、発光面が露出している発光層とを備え、前記発光層が、 p型半導 体の媒体の中に n型半導体粒子が分散して構成されていることを特徴とする。  The planar light emitting device according to the tenth embodiment includes the first and second electrodes provided on two parallel virtual planes facing each other, and the first and second electrodes facing each other. A dielectric layer provided at least partially sandwiched, and a light emitting layer electrically connected to the first and second electrodes and having a light emitting surface exposed, the light emitting layer comprising: It is characterized in that n-type semiconductor particles are dispersed in a p-type semiconductor medium.
[0103] 図 32は、本発明の実施の形態 10に係る面状発光装置 10eの構成を示す概略断 面図である。本実施の形態 10に係る面状発光装置 10eは、基板 1上に形成された平 面状の第 1の電極 2aと、第 1の電極 2a上に形成された誘電体層 4と誘電体層 4の上 部に形成されたストライプ状の第 2の電極 2bと、誘電体層 4と同一面内において誘電 体層間に埋め込まれた発光層 3とを有する。 [0103] FIG. 32 is a schematic cross-sectional view showing a configuration of a planar light emitting device 10e according to Embodiment 10 of the present invention. The planar light emitting device 10e according to the tenth embodiment includes a planar first electrode 2a formed on the substrate 1, a dielectric layer 4 and a dielectric layer formed on the first electrode 2a. Striped second electrode 2b formed on top of 4 and dielectric in the same plane as dielectric layer 4 And a light emitting layer 3 embedded between body layers.
ストライプ状の第 2の電極 2bは第 1の電極 2aが設けられている平面と平行な仮想平 面上に設けられている。第 1の電極 2aと第 2の電極 2bは対向する部分を有している。 すなわち、第 1の電極である平面電極 2aと、第 1の電極 2aが設けられている仮想平 面への第 2の電極 2bの投影が重なる部分を有している。  The striped second electrode 2b is provided on a virtual plane parallel to the plane on which the first electrode 2a is provided. The first electrode 2a and the second electrode 2b have opposing portions. That is, the flat electrode 2a as the first electrode and a portion where the projection of the second electrode 2b on the virtual plane on which the first electrode 2a is provided overlap.
誘電体層 4は第 1の電極 2aと第 2の電極 2bが対向する間に形成されている。発光 層 3は第 1の電極 2aと第 2の電極 2bが対向していない部分に形成される。発光層 3と 誘電体層 4は同一面内、すなわち同一層に形成される。なお、誘電体層 4は、第 1の 電極 2aと第 2の電極 2bが対向する間に少なくとも一部が挟まれて設けられていれば よい。  The dielectric layer 4 is formed while the first electrode 2a and the second electrode 2b face each other. The light emitting layer 3 is formed in a portion where the first electrode 2a and the second electrode 2b are not opposed to each other. The light emitting layer 3 and the dielectric layer 4 are formed in the same plane, that is, in the same layer. The dielectric layer 4 may be provided so that at least a part is sandwiched between the first electrode 2a and the second electrode 2b facing each other.
発光層 3は第 1の電極 2aと第 2の電極 2bとにそれぞれ電気的に接続されている。本 実施の形態では、発光層 3がストライプ状の第 2の電極 2bの層まで突出しており、そ こで互いに接触している。具体的には、ストライプ状の第 2の電極 2bの側面が発光層 3に接触している。ここで、ストライプ状の第 2の電極 2bの側面とは、ストライプ状の第 2の電極 2bの表面のうち、ストライプ状の第 2の電極 2bの側面が設けられている仮想 平面に垂直な面のことである。このような構成により、発光層 3は露出している。  The light emitting layer 3 is electrically connected to the first electrode 2a and the second electrode 2b, respectively. In the present embodiment, the light emitting layer 3 protrudes to the layer of the striped second electrode 2b, and is in contact therewith. Specifically, the side surface of the striped second electrode 2 b is in contact with the light emitting layer 3. Here, the side surface of the striped second electrode 2b is a surface perpendicular to the virtual plane on which the side surface of the striped second electrode 2b is provided among the surfaces of the striped second electrode 2b. That is. With such a configuration, the light emitting layer 3 is exposed.
本実施の形態 10の面状発光装置では、両電極 2a, 2b間に電圧を印加することに より、両電極 2a, 2b間の領域における発光層 3が発光する。発光層 3は第 2の電極 2 bに遮られることなく露出しており、発光層 3からの発光を容易に外部に取り出すこと ができる。そして、電極に透明電極材料を使用する必要がないため、均一な平面発 光を得ることができ、コストダウンが可能となる。  In the planar light emitting device of the tenth embodiment, the light emitting layer 3 in the region between the electrodes 2a and 2b emits light by applying a voltage between the electrodes 2a and 2b. The light emitting layer 3 is exposed without being blocked by the second electrode 2b, and the light emitted from the light emitting layer 3 can be easily extracted to the outside. And since it is not necessary to use a transparent electrode material for an electrode, uniform plane light emission can be obtained and cost reduction is attained.
<製造方法〉 <Manufacturing method>
次に、本実施の形態 10の面状発光装置 10eの製造方法について、図 33 (a)〜図 33 (i)を用いて説明する。  Next, a method for manufacturing the planar light emitting device 10e of the tenth embodiment will be described with reference to FIGS. 33 (a) to 33 (i).
(a)まず、基板 1上に、モリブデン (Mo)、タングステン (W)またはチタン (Ti)などの金 属を蒸着またはスパッタなどの方法にて成膜し、さらに、蒸着した金属膜の上に誘電 体膜を形成する（図 33 (a) )。  (a) First, a metal such as molybdenum (Mo), tungsten (W), or titanium (Ti) is formed on the substrate 1 by a method such as vapor deposition or sputtering, and further on the vapor-deposited metal film. A dielectric film is formed (Fig. 33 (a)).
(b)次に、フォトリソグラフの手法を用いて、ストライプ状のパターンをレジストにより形 成する（図 33 (b) )。 (b) Next, a photolithographic technique is used to form a striped pattern with a resist. (Fig. 33 (b)).
(c)次に、第 1の電極 2aの上までエッチングを行い、金属膜、誘電体膜をパターン二 ングして、第 2の電極 2b、誘電体層 4を形成する（図 33 (c) )。  (c) Next, etching is performed up to the first electrode 2a, and the metal film and the dielectric film are patterned to form the second electrode 2b and the dielectric layer 4 (FIG. 33 (c) ).
(d)次に、第 2の電極 2b上のレジストを除去する（図 33 (d) )。  (d) Next, the resist on the second electrode 2b is removed (FIG. 33 (d)).
(e)次に、開口部内の基板 1及び第 1の電極 2aの上に、発光層 3を形成する。複数の 蒸発源に ZnSと Cu Sの粉体をそれぞれ投入し、真空中（10_6TOTr台）にて、各材料 (e) Next, the light emitting layer 3 is formed on the substrate 1 and the first electrode 2a in the opening. ZnS and Cu S powders are put into multiple evaporation sources, and each material is used in vacuum (10_ 6 T OT r)
2  2
にエレクトロンビームを照射し、基板 1上に発光層 3として成膜する。このとき、基板温 度は 200°Cとし、 ZnSと Cu Sを共蒸着する。  Are irradiated with an electron beam to form a light emitting layer 3 on the substrate 1. At this time, the substrate temperature is set to 200 ° C, and ZnS and CuS are co-evaporated.
2  2
(f)成膜後、硫黄雰囲気中、 700°Cで約 1時間焼成する。これによつて発光層 3が得 られる（図 33 (e) )。なお、この膜を X線回折や SEMによって調べると、微小な ZnS結 晶粒の多結晶構造と Cu Sの偏析部とが観察される。詳細は明らかではないが、 ZnS  (f) After film formation, baked at 700 ° C for about 1 hour in a sulfur atmosphere. As a result, the light emitting layer 3 is obtained (FIG. 33 (e)). When this film is examined by X-ray diffraction or SEM, a polycrystalline structure of minute ZnS crystal grains and a segregation part of Cu S are observed. Details are not clear, but ZnS
X  X
と Cu Sとの相分離が生じ、前記偏析構造が形成されたものと考えられる。  It is considered that the segregation structure was formed due to the phase separation between Cu and Cu S.
(g)次に、発光層 3、誘電体層 4の上に、モリブデン (Mo)、タングステン (W)または チタン (Ti)などの金属を蒸着またはスパッタなどの方法にて成膜する（図 33 (f) )。  (g) Next, a metal such as molybdenum (Mo), tungsten (W) or titanium (Ti) is deposited on the light emitting layer 3 and the dielectric layer 4 by a method such as vapor deposition or sputtering (FIG. 33). (f)).
(h)次に、フォトリソグラフの手法を用いて、金属膜上にストライプ状のパターンをレジ ストにより形成する（図 33 (g) )。  (h) Next, a striped pattern is formed on the metal film by resist using a photolithographic technique (FIG. 33 (g)).
(i)次に、エッチングを行い、金属膜をパターンユングし誘電体膜 4上に第 2の電極 2 bを形成する（図 33 (h) )。  (i) Next, etching is performed to pattern the metal film to form the second electrode 2b on the dielectric film 4 (FIG. 33 (h)).
(j)次に、第 2の電極 2b上のレジストを除去して面状発光装置 10dを得ることができる (図 33 (i) )。  (j) Next, the resist on the second electrode 2b is removed to obtain the planar light emitting device 10d (FIG. 33 (i)).
[0105] 本発明の実施の形態 10では、第 1の電極 2a、第 2の電極 2bの材料として金属を用 いている力 S、導電性の材料であれば何でもよく ZnOなどの酸化物などでもよい。また 、本実施形態では、フォトリソグラフの手法を用いてパターンユングを行っているが、 ストライプ状にパターンユングができればよぐ印刷によるパターンユングなどのパタ ーンユングの方法を用いてもよ!/、。  [0105] In the tenth embodiment of the present invention, force S using a metal as the material of the first electrode 2a and the second electrode 2b, any conductive material may be used, and an oxide such as ZnO may be used. Good. In the present embodiment, pattern jung is performed using a photolithographic technique. However, if the pattern jung can be formed in a stripe shape, a pattern jung method such as pattern jung by printing may be used! /.
[0106] (実施の形態 11)  [Embodiment 11]
図 34は、実施の形態 11に係る面状発光装置 10fの構成を示す概略断面図である 。この面状発光装置 10fは、実施の形態 10に係る面状発光装置とほぼ同様の構成 を有する力 発光層 3が第 1の電極 2aを貫いて設けられている点で相違する。この場 合にも、発光層 3と第 2の電極 2bとが電極 2bの側面で接続されているので、発光層 3 は第 2の電極 2bに遮られることなく露出しており、発光層 3からの発光を容易に外部 に取り出すことカできる。 FIG. 34 is a schematic sectional view showing the structure of the planar light emitting device 10f according to the eleventh embodiment. This planar light emitting device 10f has substantially the same configuration as the planar light emitting device according to the tenth embodiment. The difference is that the light-emitting layer 3 having a power is provided through the first electrode 2a. Also in this case, since the light-emitting layer 3 and the second electrode 2b are connected at the side surface of the electrode 2b, the light-emitting layer 3 is exposed without being blocked by the second electrode 2b, and the light-emitting layer 3 The light emitted from can be easily taken out.
[0107] 図 35 (a)〜図 35 (i)は、実施の形態 11に係る面状発光装置 10fの製造方法の各 工程を示す概略断面図である。この面状発光装置 10fの製造方法は、実施の形態 4 に係る面状発光装置の製造方法と比較すると、図 35 (c)に示すように、ステップ (c) について、 [0107] FIGS. 35 (a) to 35 (i) are schematic cross-sectional views showing respective steps of the method for manufacturing planar light emitting device 10f according to Embodiment 11. Compared with the manufacturing method of the planar light emitting device according to Embodiment 4, the manufacturing method of the planar light emitting device 10f is as follows for step (c) as shown in FIG.
(c)基板 1の上までエッチングを行い、第 1の電極 2a、金属膜、誘電体膜をパターン ユングして、第 1の電極 2a、第 2の電極 2b、誘電体層 4を形成する（図 35 (c) )。 と置換される。  (c) Etching to the top of the substrate 1 and patterning the first electrode 2a, the metal film, and the dielectric film to form the first electrode 2a, the second electrode 2b, and the dielectric layer 4 ( Figure 35 (c)). Is replaced with
[0108] なお、本実施の形態 11のように、発光層 3を第 1の電極 2aを貫いて設ける力、、実施 の形態 4に示すように、発光層 3を第 1の電極 2aの上に設けるかは、材料の特性に応 じて適宜選択すればよい。  [0108] It should be noted that, as shown in the eleventh embodiment, the force for providing the light emitting layer 3 through the first electrode 2a, and as shown in the fourth embodiment, the light emitting layer 3 is disposed on the first electrode 2a. It may be appropriately selected depending on the characteristics of the material.
[0109] (実施の形態 12)  [Embodiment 12]
図 36は、実施の形態 12に係る面状発光装置 10gの構成を示す概略断面図である 。本発明の実施の形態 6に係る面状発光装置 10gは、実施の形態 7から 11に係る面 状発光装置と比較すると、第 1及び第 2の電極が、基板上の同一面内に互いに離間 して設けられている点で相違する。このように第 1及び第 2の電極 2a、 2bが基板上の 同一面上に設けられ、発光層が両方の電極 2a、 2bの上に設けられているので、発光 層 3の上面を全て発光面として露出させることができ、発光層 3からの発光を容易に 外部に取り出すことができる。  FIG. 36 is a schematic sectional view showing the structure of the planar light emitting device 10g according to the twelfth embodiment. In the planar light emitting device 10g according to Embodiment 6 of the present invention, the first and second electrodes are separated from each other in the same plane on the substrate as compared with the planar light emitting devices according to Embodiments 7 to 11. Are different in that they are provided. As described above, the first and second electrodes 2a and 2b are provided on the same surface of the substrate, and the light emitting layer is provided on both the electrodes 2a and 2b. It can be exposed as a surface, and light emitted from the light emitting layer 3 can be easily taken out.
産業上の利用可能性  Industrial applicability
[0110] 本発明に係る面状発光装置は、平面状の発光装置として有用であり、特に液晶表 示装置等のバックライトとして有用である。 The planar light emitting device according to the present invention is useful as a planar light emitting device, and particularly useful as a backlight for a liquid crystal display device or the like.

Claims

請求の範囲 The scope of the claims
[1] 基板と、  [1] a substrate;
前記基板上に設けた平面状の背面電極と、  A planar back electrode provided on the substrate;
前記背面電極と対向して設けられた平面状の透明電極と、  A planar transparent electrode provided facing the back electrode;
前記背面電極と前記透明電極との間に挟まれて設けられた少なくとも 1層の平面状 の発光層と  At least one planar light-emitting layer sandwiched between the back electrode and the transparent electrode;
を備え、  With
前記発光層は、第 1半導体物質よりなる多結晶体構造であって、前記多結晶体構 造の粒界に前記第 1半導体物質とは異なる第 2半導体物質が偏析していることを特 徴とする面状発光装置。  The light emitting layer has a polycrystalline structure made of a first semiconductor material, and a second semiconductor material different from the first semiconductor material is segregated at a grain boundary of the polycrystalline structure. A planar light emitting device.
[2] 互いに対向する 2枚の平行な仮想平面上にそれぞれ設けられた第 1及び第 2の電 極と、 [2] First and second electrodes respectively provided on two parallel virtual planes facing each other;
前記第 1及び第 2の電極の間に挟まれて設けられた発光層と  A light emitting layer provided between the first and second electrodes;
を備え、  With
前記第 1の電極と、前記第 1の電極が設けられている前記仮想平面 の前記第 2の 電極の射影とが互いに重ならな!/、と共に、  The first electrode and the projection of the second electrode of the virtual plane on which the first electrode is provided must overlap each other! /
前記発光層は、第 1半導体物質よりなる多結晶体構造であって、前記多結晶体構 造の粒界に前記第 1半導体物質とは異なる第 2半導体物質が偏析していることを特 徴とする面状発光装置。  The light emitting layer has a polycrystalline structure made of a first semiconductor material, and a second semiconductor material different from the first semiconductor material is segregated at a grain boundary of the polycrystalline structure. A planar light emitting device.
[3] 基板と、 [3] a substrate;
前記基板上の同一面内に互いに離間して設けられた第 1及び第 2の電極と、 前記第 1及び第 2の電極の上に設けられた発光層と  A first electrode and a second electrode provided apart from each other in the same plane on the substrate; a light emitting layer provided on the first electrode and the second electrode;
を備え、  With
前記発光層は、第 1半導体物質よりなる多結晶体構造であって、前記多結晶体構 造の粒界に前記第 1半導体物質とは異なる第 2半導体物質が偏析していることを特 徴とする面状発光装置。  The light emitting layer has a polycrystalline structure made of a first semiconductor material, and a second semiconductor material different from the first semiconductor material is segregated at a grain boundary of the polycrystalline structure. A planar light emitting device.
[4] 互いに対向する 2枚の平行な仮想平面上にそれぞれ設けられた第 1及び第 2の電 極と、 前記第 1及び第 2の電極が対向する間に少なくとも一部が挟まれて設けられた誘電 体層と、 [4] First and second electrodes respectively provided on two parallel virtual planes facing each other; A dielectric layer provided with at least a portion sandwiched between the first and second electrodes facing each other;
前記第 1及び第 2の電極とに電気的に接続され、発光面が露出している発光層と を備え、  A light emitting layer electrically connected to the first and second electrodes and having a light emitting surface exposed,
前記発光層は、第 1半導体物質よりなる多結晶体構造であって、前記多結晶体構 造の粒界に前記第 1半導体物質とは異なる第 2半導体物質が偏析していることを特 徴とする面状発光装置。  The light emitting layer has a polycrystalline structure made of a first semiconductor material, and a second semiconductor material different from the first semiconductor material is segregated at a grain boundary of the polycrystalline structure. A planar light emitting device.
[5] 前記第 1半導体物質と前記第 2半導体物質とは、互いに異なる伝導型の半導体構 造を有することを特徴とする請求項 1から 4のいずれか一項に記載の面状発光装置。 [5] The planar light emitting device according to any one of [1] to [4], wherein the first semiconductor material and the second semiconductor material have semiconductor structures of different conductivity types.
[6] 前記第 1半導体物質は n型半導体構造を有し、前記第 2半導体物質は p型半導体 構造を有することを特徴とする請求項 1から 5のいずれか一項に記載の面状発光装 置。 6. The planar light emitting device according to any one of claims 1 to 5, wherein the first semiconductor material has an n-type semiconductor structure, and the second semiconductor material has a p-type semiconductor structure. Equipment.
[7] 前記第 1半導体物質及び前記第 2半導体物質は、それぞれ化合物半導体であるこ とを特徴とする請求項 1から 6のいずれか一項に記載の面状発光装置。  7. The planar light emitting device according to claim 1, wherein each of the first semiconductor material and the second semiconductor material is a compound semiconductor.
[8] 前記第 1半導体物質は、第 12族 第 16族間化合物半導体であることを特徴とする 請求項 1から 7のいずれか一項に記載の面状発光装置。 [8] The planar light emitting device according to any one of [1] to [7], wherein the first semiconductor substance is a Group 12 and Group 16 compound semiconductor.
[9] 前記第 1半導体物質は、立方晶構造を有することを特徴とする請求項 1から 8のい ずれか一項に記載の面状発光装置。 [9] The planar light emitting device according to any one of [1] to [8], wherein the first semiconductor material has a cubic structure.
[10] 前記第 1半導体物質は、 Cu、 Ag、 Au、 Ir、 Al、 Ga、 In、 Mn、 Cl、 Br、 I、 Li、 Ce、[10] The first semiconductor material is Cu, Ag, Au, Ir, Al, Ga, In, Mn, Cl, Br, I, Li, Ce,
Pr、 Nd、 Pm、 Sm、 Eu、 Gd、 Tb、 Dy、 Ho、 Er、 Tm、 Yb力もなる群より選択される 少なくとも一種の元素を含んでいることを特徴とする請求項 1から 9のいずれか一項 に記載の面状発光装置。 The element according to any one of claims 1 to 9, comprising at least one element selected from the group consisting of Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, and Yb force. A surface light-emitting device according to claim 1.
[11] 前記第 1半導体物質よりなる多結晶体構造の平均結晶粒子径は、 5〜500nmの範 囲にあることを特徴とする請求項 1から 10のいずれか一項に記載の面状発光装置。 [11] The planar light emission according to any one of [1] to [10], wherein an average crystal particle diameter of the polycrystalline structure made of the first semiconductor material is in a range of 5 to 500 nm. apparatus.
[12] 前記第 2半導体物質は、 ZnS、 ZnSe、 ZnSSe、 ZnSeTe、 ZnTe、 GaN、 InGaN の!/、ずれかであることを特徴とする請求項 1から 6の 、ずれか一項に記載の面状発光 装置。 [12] The second semiconductor material according to any one of claims 1 to 6, wherein the second semiconductor material is one of ZnS, ZnSe, ZnSSe, ZnSeTe, ZnTe, GaN, and InGaN! /. Planar light-emitting device.
[13] 前記第 1半導体物質が亜鉛を含む亜鉛系材料であって、 前記電極のうち、少なくとも一方は、亜鉛を含む材料からなる、請求項 1から 11のい ずれか一項に記載の面状発光装置。 [13] The first semiconductor substance is a zinc-based material containing zinc, The planar light-emitting device according to claim 1, wherein at least one of the electrodes is made of a material containing zinc.
[14] 前記一方の電極を構成する前記亜鉛を含む材料は、酸化亜鉛を主体とし、アルミ 二ゥム、ガリウム、チタン、ュォブ、タンタル、タングステン、銅、銀、ホウ素からなる群 力も選ばれる少なくとも一種を含むことを特徴とする請求項 13に記載の面状発光装 置。  [14] The material containing zinc constituting the one electrode is mainly composed of zinc oxide, and at least a group force consisting of aluminum, gallium, titanium, tube, tantalum, tungsten, copper, silver, and boron is also selected. 14. The planar light-emitting device according to claim 13, comprising one kind.
[15] 基板と、  [15] a substrate;
前記基板上に設けた平面状の背面電極と、  A planar back electrode provided on the substrate;
前記背面電極と対向して設けられた平面状の透明電極と、  A planar transparent electrode provided facing the back electrode;
前記背面電極と前記透明電極との間に挟まれて設けられた少なくとも 1層の平面状 の発光層と  At least one planar light-emitting layer sandwiched between the back electrode and the transparent electrode;
を備え、  With
前記発光層が、 P型半導体と n型半導体とを有していることを特徴とする面状発光装 置。  The planar light-emitting device, wherein the light-emitting layer includes a P-type semiconductor and an n-type semiconductor.
[16] 互いに対向する 2枚の平行な仮想平面上にそれぞれ設けられた第 1及び第 2の電 極と、  [16] First and second electrodes respectively provided on two parallel virtual planes facing each other;
前記第 1及び第 2の電極の間に挟まれて設けられた発光層と  A light emitting layer provided between the first and second electrodes;
を備え、  With
前記第 1の電極と、前記第 1の電極が設けられている前記仮想平面 の前記第 2の 電極の射影とが互いに重ならな!/、と共に、  The first electrode and the projection of the second electrode of the virtual plane on which the first electrode is provided must overlap each other! /
前記発光層が、 P型半導体と n型半導体とを有していることを特徴とする面状発光装 置。  The planar light-emitting device, wherein the light-emitting layer includes a P-type semiconductor and an n-type semiconductor.
[17] 基板と、  [17] a substrate;
前記基板上の同一面内に互いに離間して設けられた第 1及び第 2の電極と、 前記第 1及び第 2の電極の上に設けられた発光層と  A first electrode and a second electrode provided apart from each other in the same plane on the substrate; a light emitting layer provided on the first electrode and the second electrode;
を備え、  With
前記発光層が、 P型半導体と n型半導体とを有していることを特徴とする面状発光装 置。 The planar light-emitting device, wherein the light-emitting layer includes a P-type semiconductor and an n-type semiconductor.
[18] 互いに対向する 2枚の平行な仮想平面上にそれぞれ設けられた第 1及び第 2の電 極と、 [18] first and second electrodes respectively provided on two parallel virtual planes facing each other;
前記第 1及び第 2の電極が対向する間に少なくとも一部が挟まれて設けられた誘電 体層と、  A dielectric layer provided with at least a portion sandwiched between the first and second electrodes facing each other;
前記第 1及び第 2の電極とに電気的に接続され、発光面が露出している発光層と を備え、  A light emitting layer electrically connected to the first and second electrodes and having a light emitting surface exposed,
前記発光層が、 P型半導体と n型半導体とを有していることを特徴とする面状発光装 置。  The planar light-emitting device, wherein the light-emitting layer includes a P-type semiconductor and an n-type semiconductor.
[19] 前記発光層は、 p型半導体の媒体の中に n型半導体粒子が分散して構成されて!/、 ることを特徴とする請求項 15から 18のいずれか一項に記載の面状発光装置。  [19] The surface according to any one of claims 15 to 18, wherein the light emitting layer is formed by dispersing n-type semiconductor particles in a p-type semiconductor medium! / Light emitting device.
[20] 前記発光層は、 n型半導体粒子の集合体で構成され、該粒子間に p型半導体が偏 析していることを特徴とする請求項 15から 18のいずれか一項に記載の面状発光装 置。  [20] The light emitting layer according to any one of claims 15 to 18, wherein the light emitting layer includes an aggregate of n-type semiconductor particles, and a p-type semiconductor is segregated between the particles. Planar light-emitting device.
[21] 前記 n型半導体粒子は、前記 p型半導体を介して前記第 1及び第 2電極と電気的に 接合されていることを特徴とする請求項 20に記載の面状発光装置。  21. The planar light emitting device according to claim 20, wherein the n-type semiconductor particles are electrically joined to the first and second electrodes through the p-type semiconductor.
[22] 前記 n型半導体及び前記 p型半導体は、それぞれ化合物半導体であることを特徴 とする請求項 15から 21のいずれか一項に記載の面状発光装置。 [22] The planar light emitting device according to any one of [15] to [21], wherein each of the n-type semiconductor and the p-type semiconductor is a compound semiconductor.
[23] 前記 n型半導体は、第 12族 第 16族間化合物半導体であることを特徴とする請求 項 15から 22のいずれか一項に記載の面状発光装置。 23. The planar light-emitting device according to claim 15, wherein the n-type semiconductor is a group 12 group 16 compound semiconductor.
[24] 前記 n型半導体は、第 13族 第 15族間化合物半導体であることを特徴とする請求 項 15から 22のいずれか一項に記載の面状発光装置。 24. The planar light emitting device according to any one of claims 15 to 22, wherein the n-type semiconductor is a Group 13 Group 15 compound semiconductor.
[25] 前記 n型半導体は、カルコパイライト型化合物半導体であることを特徴とする請求項 25. The n-type semiconductor is a chalcopyrite compound semiconductor,
15から 22の!/、ずれか一項に記載の面状発光装置。  The surface light emitting device according to one of 15 to 22! /
[26] 前記 n型半導体粒子は、 ZnS、 ZnSe、 ZnSSe、 ZnSeTe、 ZnTe、 GaN、 InGaN のいずれかであることを特徴とする請求項 15から 22のいずれか一項に記載の面状 発光装置。 [26] The planar light emitting device according to any one of [15] to [22], wherein the n-type semiconductor particles are any one of ZnS, ZnSe, ZnSSe, ZnSeTe, ZnTe, GaN, and InGaN. .
[27] 前記 n型半導体が亜鉛を含む亜鉛系材料であって、  [27] The n-type semiconductor is a zinc-based material containing zinc,
前記第 1の電極又は前記第 2の電極のうち、少なくとも一方の電極は、亜鉛を含む 材料からなる、請求項 15から 26のいずれか一項に記載の面状発光装置。 At least one of the first electrode and the second electrode includes zinc. 27. The planar light emitting device according to any one of claims 15 to 26, comprising a material.
[28] 前記一方の電極を構成する前記亜鉛を含む材料は、酸化亜鉛を主体とし、アルミ 二ゥム、ガリウム、チタン、ュォブ、タンタル、タングステン、銅、銀、ホウ素からなる群 力 選ばれる少なくとも一種を含むことを特徴とする請求項 27に記載の面状発光装 置。 [28] The material containing zinc constituting the one electrode is mainly composed of zinc oxide, and is selected from the group force consisting of aluminum, gallium, titanium, tube, tantalum, tungsten, copper, silver, and boron. 28. The planar light emitting device according to claim 27, comprising one kind.
[29] 前記電極の少なくとも一方に面して支持する支持体基板をさらに備えることを特徴 とする請求項 1から 28のいずれか一項に記載の面状発光装置。  [29] The planar light-emitting device according to any one of [1] to [28], further comprising a support substrate that faces and supports at least one of the electrodes.
[30] 前記電極に対向し、且つ、発光取出し方向前方に色変換層をさらに備えることを特 徴とする請求項 1から 29のいずれか一項に記載の面状発光装置。  30. The planar light emitting device according to any one of claims 1 to 29, further comprising a color conversion layer facing the electrode and in front of a light emission extraction direction.
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