WO2007143935A1 - A network clock synchronization apparatus, system and method - Google Patents

A network clock synchronization apparatus, system and method Download PDF

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Publication number
WO2007143935A1
WO2007143935A1 PCT/CN2007/001858 CN2007001858W WO2007143935A1 WO 2007143935 A1 WO2007143935 A1 WO 2007143935A1 CN 2007001858 W CN2007001858 W CN 2007001858W WO 2007143935 A1 WO2007143935 A1 WO 2007143935A1
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WIPO (PCT)
Prior art keywords
time information
time
local
frequency
clock signal
Prior art date
Application number
PCT/CN2007/001858
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French (fr)
Chinese (zh)
Inventor
Qing Zhang
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Huawei Technologies Co., Ltd.
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Publication date
Application filed by Huawei Technologies Co., Ltd. filed Critical Huawei Technologies Co., Ltd.
Publication of WO2007143935A1 publication Critical patent/WO2007143935A1/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0638Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0644External master-clock

Definitions

  • Network clock synchronization device system and method
  • the present invention relates to the field of communications technologies, and in particular, to a network clock synchronization apparatus, system, and method. Background technique
  • the network transmission mode is constantly evolving, from the initial TDM (Time Division Multiplexing) to the ATM (Asynchronous Transfer Mode) to the IP (Internet Protocol).
  • TDM Time Division Multiplexing
  • ATM Asynchronous Transfer Mode
  • IP Internet Protocol
  • the service equipment is mainly synchronized by extracting the clock information from the service code stream; however, in the IP network transmission mode, the scheme of extracting the clock information from the service code stream for synchronization is difficult to implement. Therefore, in the IP network transmission mode, the clock of the service equipment is mainly used in the scheme of FIG. 1 or FIG. 2 .
  • the solution for the existing synchronous clock is as follows: a GPS (Global Positioning System) and a constant temperature crystal oscillator are used as clock references on the service device to obtain a good clock synchronization reference. Not affected by the specific transmission line.
  • GPS Global Positioning System
  • a constant temperature crystal oscillator is used as clock references on the service device to obtain a good clock synchronization reference. Not affected by the specific transmission line.
  • the shortcomings of this solution are: increased engineering complexity and cost of the entire equipment.
  • the addition of GPS functions involves GPS antennas, feeders, lightning protection, brackets, three defenses, etc.; GPS signals cannot be received underground or in special occasions.
  • FIG. 2 it is another existing synchronous clock scheme: a micro-synchronization device dedicated to providing a timing reference is used to provide a clock reference for a service device.
  • this scheme eliminates the need to make additional changes to the clock design of existing equipment and obtain a clock reference that meets the requirements.
  • the disadvantage of this solution is that the cost is too high, and there is a certain difficulty in integrating the operation and maintenance systems of the synchronous device and the service device. Summary of the invention
  • the embodiment of the invention provides a network clock synchronization device, system and method, which can meet the requirements of clock synchronization of service devices at a lower cost.
  • An embodiment of the present invention provides a network clock synchronization apparatus, including: a filter selector, a synthesis and adjustment algorithm module, a frequency adjuster, an oscillator, and a time synthesizer, wherein the filter selector is configured to receive a time server.
  • the synthesizing and adjusting algorithm module is configured to obtain a frequency deviation by comparing the reference time information output by the filter selector and the local time information output by the time synthesizer; a regulator for adjusting a local clock signal of the output according to a frequency offset provided by the synthesis and adjustment algorithm module, the local clock signal originating from an oscillation source clock signal provided by the oscillator; a time synthesizer for The local clock signal originating from the frequency adjuster synthesizes local time information.
  • the embodiment of the invention further provides a network clock synchronization system, comprising: a network clock synchronization device and at least one time server, wherein the network clock synchronization device obtains reference time information from the time server, and compares the reference time information And the local time information obtains a frequency deviation between the two, and further adjusts the local clock signal output by the network clock synchronization device according to the frequency deviation.
  • a network clock synchronization system comprising: a network clock synchronization device and at least one time server, wherein the network clock synchronization device obtains reference time information from the time server, and compares the reference time information And the local time information obtains a frequency deviation between the two, and further adjusts the local clock signal output by the network clock synchronization device according to the frequency deviation.
  • the embodiment of the present invention further provides a network clock synchronization method, including the following steps: obtaining reference time information from a time server; obtaining frequency deviations of the two by comparing the reference time information with local time information; adjusting according to the frequency deviation Local clock signal.
  • the embodiment of the present invention obtains the reference time information from the upper time server, and then obtains the local frequency deviation by comparing the reference time information and the local time information, that is, the drift of the local oscillator, and further according to the frequency deviation.
  • the local clock signal is adjusted to eliminate the drift of the local clock, and a relatively accurate local clock signal is obtained, which finally meets the requirements of the clock synchronization of the service device. Since the related device or the micro-synchronous device that does not need to increase the GPS function is required, the cost required for realizing the clock synchronization purpose by the embodiment of the present invention is low.
  • FIG. 1 is a schematic diagram of a clock synchronization device of the prior art
  • FIG. 2 is a schematic diagram of another clock synchronization device of the prior art
  • 3 is a schematic diagram of an embodiment of a network clock synchronization apparatus according to the present invention
  • FIG. 4 is a flow chart of an embodiment of a network clock synchronization method according to the present invention.
  • the time is obtained from the upper-level time server through the NTP (Network Transfer Protocol). Since the time server does not have time drift, the NTP introduces only jitter when the network response capability changes during the IP network transmission process.
  • the local oscillator generates mainly drift, and its own jitter can be neglected. According to the time information obtained from different time servers, the drift of the local oscillator can be calculated, and the frequency adjuster can be adjusted to eliminate the drift of the local clock and finally reach the service device clock. Synchronization requirements.
  • FIG. 3 is a schematic diagram of an embodiment of a network clock synchronization system according to the present invention.
  • the network clock synchronization system includes a time server 31 and a clock synchronization device 32 that communicates therewith over an IP transmission network.
  • the clock synchronization device 32 includes a high stability oscillator 326, a frequency adjuster 325, a frequency multiplier 324, a time synthesizer 323, a filter selector 321, and a synthesis and adjustment algorithm module 322.
  • Filter selector 321 receiving time information of the time server on the IP transmission network from at least one time server (only FIG. 3 shows only the IP transmission network and one IP time server, and the IP transmission network can also be connected to multiple time servers) The following description is convenient.
  • the time information that the filter selector 321 receives directly from the time server 31 is referred to as reference source time information), and then the reference time information is output to the synthesis and adjustment algorithm module 322.
  • the filter selector 321 can receive a plurality of reference source time information from the plurality of time servers 31 through the IP transmission network, the filter selector 321 also acquires the local time information from the time synthesizer 323 at the same time. Further, the filter selector 321 selects the best samples from the reference source time information sent back by all the time servers 31, compares them with the local time information, and performs parameters such as round trip delay, dispersion, and offset through the selection and clustering algorithms. Analysis, select a number of (usually one) more accurate time server reference source time information for conventional filtering (mainly remove jitter) and other processing, generate a more accurate time information (for the convenience of description, the cylinder is called reference time information And transmitting the reference time information to the synthesis and adjustment algorithm module 322. Filter selector The 321 can be integrated in the CPU of the business device or set separately.
  • the filter selector 321 can only receive the reference source time information of one time server 31 through the IP transmission network, the filter selector 321 does not need to obtain the local time information from the time synthesizer 323 (because there is only one reference source).
  • the time information has no optional space.
  • the filter selector 321 generates the accurate reference time information by filtering the reference source time information, and outputs the reference time information to the synthesis and adjustment algorithm module 322. .
  • the reference time information output by the filter selector 321 to the synthesis and adjustment algorithm module 322 is obtained from the time server 31, except that the reference time information is obtained by directly receiving the reference from the time server 31.
  • the time information after the source time information has been processed (such as filtering).
  • the synthesis and adjustment algorithm module 322 receives the accurate reference time information output by the filter selector 321 and the local time information output by the time synthesizer 323, compares the time information of the reference time server 31 with the local time information, and obtains the local clock and Time deviation of the time server; Then, according to the time deviation data obtained multiple times, the time drift of the local clock signal output by the frequency adjuster 325 and the corresponding frequency deviation (referred to as frequency) can be obtained by filtering and scaling.
  • the output of the frequency adjuster 325 ie, the local clock signal
  • the local clock signal is adjusted based on the frequency offset, so that the local clock signal output by the frequency adjuster 325 can lock the upper time server, thereby achieving more accurate time synchronization.
  • the synthesis and adjustment algorithm module 322 can be integrated into the CPU of the business device or set separately. It should be noted that, in general, the synthesis and adjustment algorithm module 322 comprehensively obtains the frequency offset within a period of time according to the multiple time offset data, but does not exclude the synthesis and adjustment algorithm module 322 from obtaining the frequency based on only one time deviation data. The case where the bias is output to the frequency adjuster 325.
  • the frequency adjuster 325 receives the adjustment signal (ie, the frequency offset) output by the synthesis and adjustment algorithm module 322 and the oscillation source clock signal output by the high-stability oscillator 326, and the frequency adjuster 325 performs the current output local clock signal according to the frequency offset. Adjustment. It can be understood that if the adjustment to be performed by the frequency adjuster 325 is the initial adjustment, the local clock signal frequency output by the current frequency adjuster 325 is the frequency of the oscillation source clock signal output by the high-stability oscillator 326, and further, according to the frequency offset adjustment.
  • the adjustment signal ie, the frequency offset
  • the frequency of the local clock signal after the change becomes the frequency of the oscillation source clock signal plus the frequency of the frequency offset (which may be positive or negative), thereby completing the synchronization of the local clock signal.
  • the local clock signal of the current output is adjusted according to the frequency offset output by the synthesis and adjustment algorithm module 322.
  • the current local clock signal may have been adjusted differently from the oscillation source clock signal because it has been previously adjusted. It is.
  • the frequency adjuster 325 adjusts the current local clock signal according to the frequency offset output by the synthesis and adjustment algorithm module 322.
  • the local clock signal output by the frequency adjuster 325 is a clock signal used as a local system (such as a service device).
  • the frequency adjuster adjusts the output of the frequency adjuster by adjusting the frequency register set in it.
  • the frequency adjuster can be selected from devices such as DDS (Direct Digital Synthesize).
  • Frequency multiplier 324 The frequency of the local clock signal output by the frequency adjuster 325 is multiplied to a higher frequency and then supplied to the time synthesizer 323. The higher the frequency at which the frequency multiplier 324 performs frequency multiplication, the higher the resolution of the time synthesizer 323, and the higher the accuracy of synthesizing the time code.
  • the frequency multiplier 324 uses a dedicated frequency doubling device.
  • the time synthesizer 323 synthesizes an unsigned 64-bit second time code (ie, local time information) by using a clock signal output from the frequency multiplier 324 (the clock signal is derived from the local clock signal output from the frequency adjuster 325), for example, this time
  • the code represents the description starting from 0:00 on January 1, 1900.
  • the first 32 bits are the integer part, and the last 32 bits are the fractional part.
  • the theoretical counting accuracy is 2 - 32 seconds.
  • the logic count pulse comes from the clock signal after multiplier 324 multiplier, and the frequency is generally 100MHz.
  • the filter selector 321 and the synthesis and adjustment algorithm module 322 can obtain current local time information from the time synthesizer 323 in real time.
  • the time synthesizer 323 can be implemented in a logic (FPGA) device. Since the time synthesizer 323 uses the clock signal output by the frequency adjuster 325 and is multiplied, the accuracy of the time code synthesized by the time synthesizer 323 is directly The accuracy of the local clock signal output by the frequency adjuster 325 is reflected. It can be understood that if the accuracy of the local clock signal output by the frequency adjuster 325 is already high, the frequency multiplier 324 may not be needed, that is, the time synthesizer 323 directly receives the current local clock signal output by the frequency adjuster 325, and then according to the The local clock signal synthesizes the corresponding local time information.
  • FPGA logic
  • the high-stability oscillator 326 outputs the oscillation source clock signal to the frequency adjuster 325, which is equivalent to providing the frequency adjuster 325 with an output local clock signal, in other words, although the local clock signal currently output by the frequency adjuster 325 may Different from the oscillation source clock signal (eg, adjusted according to the frequency offset), but the local clock signal is derived from the oscillation source clock signal.
  • the high-temperature oscillator is generally selected as the constant temperature crystal oscillator (OCXO) device, the aging rate Typically 5* 10-1G / day: Without adjustment, the OCXO's ability to maintain can achieve a clock accuracy of 0.05ppm for at least half a month.
  • the clock synchronizing device 32 of the above construction can be provided inside the service device or separately. If the clock synchronization device 32 is disposed inside the service device, many of the modules in the clock synchronization device 32 can extend the modules within the existing service device, such as the high stability oscillator 326 and the frequency adjuster 325, that is, only for existing services.
  • the service device with the clock synchronization function in the all-IP transmission mode shown in the embodiment of the present invention can be implemented by the device. This kind of service equipment only needs to synchronize the calibration of its own clock according to the reference source time information provided by the time server, without adding equipment such as GPS antenna, feeder, lightning protection, bracket, three defense or higher cost. Micro-synchronous devices, etc., can save the cost of clock synchronization.
  • the clock synchronization device is not excluded from the service device.
  • the clock synchronization device can be used to provide an accurate local clock signal for the service device, and thus, the service device can This local clock signal is used as the clock signal used by its system.
  • FIG. 4 it is a flowchart of an embodiment of a network clock synchronization method of the present invention.
  • the network clock synchronization method process in this embodiment includes the following steps:
  • Step 10 The reference time selection source (ie, the filter selector 321) in the service device (which can be considered as being directly implemented in the service device by the network clock synchronization device 32) can be set at intervals (the interval time can be set and The adjustment, for example, setting the interval time to 64 seconds, sends a time request to the at least one time server through the IP transmission network; of course, the service device may not actively request, but the time interval between the server 31 is actively transmitted (for example, broadcast) Way) Your own reference source time information.
  • the filter selector 321 in the service device which can be considered as being directly implemented in the service device by the network clock synchronization device 32
  • the adjustment for example, setting the interval time to 64 seconds, sends a time request to the at least one time server through the IP transmission network; of course, the service device may not actively request, but the time interval between the server 31 is actively transmitted (for example, broadcast) Way) Your own reference source time information.
  • Step 20 The time server 31 sends its own reference source time information to the filter selector 321 through the IP transmission network. If there are multiple time servers 31, the filter selector 321 also sends back the reference source time from all the time servers 31. The best sample is selected in the information, compared with the local time information, and the parameters such as round trip delay, dispersion and offset are analyzed by the selection and clustering algorithm, and several (generally one) more accurate time server references are selected.
  • the source time information generates more accurate time information (referred to as reference time information), wherein the local time information is acquired from the time synthesizer 323. As already mentioned, if the filter selector 321 receives only the reference source time information of a time server 31, it is no longer necessary to obtain it from the time synthesizer 323. Current local time information.
  • steps 10 and 20 above are to obtain reference time information from the time server 31. Specifically, at least one reference source time information is received first, and then reference time information is generated accordingly.
  • Step 30 The filter selector 321 sends the reference time information to the synthesis and adjustment algorithm module 322.
  • the synthesis and adjustment algorithm module 322 compares the reference time information with the current local time information to obtain a time offset between the local clock and the time server.
  • Step 40 According to the time deviation data obtained multiple times, the drift of the output clock of the frequency adjuster 325 and the corresponding frequency offset are obtained by filtering and scaling, and the frequency adjuster 325 is adjusted according to the frequency adjuster. The output of 325 locks the clock of the upper time server 31.
  • the synthesis and adjustment algorithm module can output the frequency adjuster 325 according to the previously adjusted empirical value. Adjustments are made to ensure that the clock of the business device can also achieve higher accuracy in this case.
  • the NTP introduces only jitter in the network network transmission process during the IP network transmission process; and the local high-stability oscillator 326 mainly generates drift, and its own jitter can be ignored.
  • This can combine the long-term stability of the time server 31 with the good anti-shake capability of the local high-stability oscillator 326 soft phase-locked loop to achieve the clock synchronization of the service device, that is, using NTP to compensate for the time caused by the aging of the OCXO device. drift. In this way, the purpose of clock synchronization in the IP network transmission mode at a lower cost is achieved.
  • the technical solution of the embodiment of the present invention is applicable not only to the IP network transmission mode but also to other transmission modes.

Abstract

A network clock synchronization apparatus (32) relating to the communication technology field includes a filter selector (321), a synthesis and adjustment algorithm module (322), a frequency regulator (325), an oscillator (326) and a time synthesizer (323), in which the filter selector (321) receives the reference source time information of a time server (31) and thereby generates the standard time information; the synthesis and adjustment algorithm module (322) obtains a frequency difference by comparing the standard time information output from the filter selector (321) with the local time information output from the time synthesizer (323); the frequency regulator (325) regulates its output local clock signal according to the frequency difference provided by the synthesis and adjustment algorithm module (322), in which the local clock signal source comes from the oscillation source clock signal provided by the oscillator (326); the time synthesizer (323) synthesizes the local time information from the local clock signal coming from the frequency regulator (325). A system and method can meet the requirement of the clock synchronization of the service device at the lower cost.

Description

一种网络时钟同步装置、 系统及方法  Network clock synchronization device, system and method
本申请要求于 2006 年 6 月 12 日提交中国专利局、 申请号为 200610061062.9、 发明名称为"一种网络时钟同步装置、 系统及方法"的中国 专利申请的优先权, 其全部内容通过引用结合在本申请中。  The present application claims priority to Chinese Patent Application No. 200610061062.9, entitled "A Network Clock Synchronization Apparatus, System and Method", filed on June 12, 2006, the entire contents of In this application.
技术领域 Technical field
本发明涉及通信技术领域,特别涉及一种网络时钟同步装置、系统及方法。 背景技术  The present invention relates to the field of communications technologies, and in particular, to a network clock synchronization apparatus, system, and method. Background technique
良好的网络同步性能对电信业务影响重大, 同步不良往往会带来一系 列的问题。 在无线网络中, 同步问题显得尤为重要、 语音质量差、 掉话率 高、 切换成功率低以及无法接入等诸多问题, 很大情况下都与网络同步性 能不佳有关。 网络传输方式在不断的演进, 从最初的 TDM ( Time Division Multiplexing, 时分复用)到 ATM ( Asynchronous Transfer Mode, 异步传输 模式) , 再到 IP ( Internet Protocol, 互联网协议) 方式。 在传统的网络传输 方式中, 主要通过从业务码流中提取时钟信息对业务设备进行同步; 但是 在 IP网络传输模式下, 采用从业务码流中提取时钟信息进行同步的方案很 难实现。 为此, 目前在 IP网络传输模式下, 主要采用图 1或图 2的方案对业 务设备进行时钟同步。  Good network synchronization performance has a major impact on telecommunications services, and poor synchronization often leads to a series of problems. In wireless networks, synchronization problems are particularly important, such as poor voice quality, high dropped call rate, low handover success rate, and inaccessibility. In many cases, they are related to poor network synchronization performance. The network transmission mode is constantly evolving, from the initial TDM (Time Division Multiplexing) to the ATM (Asynchronous Transfer Mode) to the IP (Internet Protocol). In the traditional network transmission mode, the service equipment is mainly synchronized by extracting the clock information from the service code stream; however, in the IP network transmission mode, the scheme of extracting the clock information from the service code stream for synchronization is difficult to implement. Therefore, in the IP network transmission mode, the clock of the service equipment is mainly used in the scheme of FIG. 1 or FIG. 2 .
如图 1所示, 其为现有的一种同步时钟的方案为: 在业务设备上采用 GPS ( Global Positioning System ,全球定位系统)加恒温晶振作为时钟基准, 以取得很好的时钟同步基准, 不受具体传输线路的影响。 但是该方案的缺 点为:增加了工程复杂度及整个设备的成本,增加 GPS功能涉及到 GPS天线、 馈线、 防雷、 支架、 三防等; 同时在地下或一些特殊场合无法接收到 GPS 信号。  As shown in FIG. 1 , the solution for the existing synchronous clock is as follows: a GPS (Global Positioning System) and a constant temperature crystal oscillator are used as clock references on the service device to obtain a good clock synchronization reference. Not affected by the specific transmission line. However, the shortcomings of this solution are: increased engineering complexity and cost of the entire equipment. The addition of GPS functions involves GPS antennas, feeders, lightning protection, brackets, three defenses, etc.; GPS signals cannot be received underground or in special occasions.
如图 2所示, 其为现有的另一种同步时钟方案为: 采用专门用于提供 定时基准的微型同步设备为业务设备提供时钟基准。 这种方案在全 IP传输 方式下, 无需对现有设备的时钟设计做额外的更改, 而获得满足要求的时 钟基准。 但该方案的缺点是成本过高, 且同步设备和业务设备的操作维护 系统融合存在一定困难。 发明内容 As shown in FIG. 2, it is another existing synchronous clock scheme: a micro-synchronization device dedicated to providing a timing reference is used to provide a clock reference for a service device. In the all-IP transmission mode, this scheme eliminates the need to make additional changes to the clock design of existing equipment and obtain a clock reference that meets the requirements. However, the disadvantage of this solution is that the cost is too high, and there is a certain difficulty in integrating the operation and maintenance systems of the synchronous device and the service device. Summary of the invention
本发明实施例提出了一种网絡时钟同步装置、 系统及方法, 能够在较 低成本下满足业务设备时钟同步的要求。  The embodiment of the invention provides a network clock synchronization device, system and method, which can meet the requirements of clock synchronization of service devices at a lower cost.
本发明实施例提供了一种网络时钟同步装置, 包括: 过滤选择器、合成和 调整算法模块、 频率调整器、 振荡器和时间合成器, 其中, 所述过滤选择器, 用于接收时间服务器的参考源时间信息并据此生成基准时间信息;所述合成和 调整算法模块,用于通过比较所述过滤选择器输出的基准时间信息及所述时间 合成器输出的本地时间信息得到频率偏差; 频率调整器, 用于按照所述合成和 调整算法模块提供的频率偏差调整其输出的本地时钟信号,所述本地时钟信号 源自所述振荡器提供的振荡源时钟信号; 时间合成器, 用于将源自所述频率调 整器的本地时钟信号合成本地时间信息。  An embodiment of the present invention provides a network clock synchronization apparatus, including: a filter selector, a synthesis and adjustment algorithm module, a frequency adjuster, an oscillator, and a time synthesizer, wherein the filter selector is configured to receive a time server. Referencing source time information and generating reference time information according to the same; the synthesizing and adjusting algorithm module is configured to obtain a frequency deviation by comparing the reference time information output by the filter selector and the local time information output by the time synthesizer; a regulator for adjusting a local clock signal of the output according to a frequency offset provided by the synthesis and adjustment algorithm module, the local clock signal originating from an oscillation source clock signal provided by the oscillator; a time synthesizer for The local clock signal originating from the frequency adjuster synthesizes local time information.
本发明实施例还提供了一种网络时钟同步系统, 包括: 网络时钟同步装置 和至少一个时间服务器,所述网络时钟同步装置从所述时间服务器获得基准 时间信息, 并通过比较所述基准时间信息与本地时间信息得到两者的频率 偏差, 进而按照所述频率偏差调整所述网络时钟同步装置输出的本地时钟 信号。  The embodiment of the invention further provides a network clock synchronization system, comprising: a network clock synchronization device and at least one time server, wherein the network clock synchronization device obtains reference time information from the time server, and compares the reference time information And the local time information obtains a frequency deviation between the two, and further adjusts the local clock signal output by the network clock synchronization device according to the frequency deviation.
本发明实施例还提供了一种网络时钟同步方法, 包括以下步驟: 从时间 服务器获得基准时间信息; 通过比较所述基准时间信息与本地时间信息得到 两者的频率偏差; 按照所述频率偏差调整本地时钟信号。  The embodiment of the present invention further provides a network clock synchronization method, including the following steps: obtaining reference time information from a time server; obtaining frequency deviations of the two by comparing the reference time information with local time information; adjusting according to the frequency deviation Local clock signal.
从以上技术方案可以看出, 本发明实施例从上级时间服务器获取基准 时间信息, 然后通过比较该基准时间信息和本地时间信息得到本地的频率 偏差, 即本地振荡器的漂移, 进而按照该频率偏差对本地时钟信号进行调 整, 从而消除本地时钟的漂移, 得到比较准确的本地时钟信号, 最终达到 业务设备时钟同步的要求。 由于不需增加 GPS功能的相关设备或微型同步 设备, 使得通过本发明实施例实现时钟同步目的所需的成本较低。  It can be seen from the above technical solution that the embodiment of the present invention obtains the reference time information from the upper time server, and then obtains the local frequency deviation by comparing the reference time information and the local time information, that is, the drift of the local oscillator, and further according to the frequency deviation. The local clock signal is adjusted to eliminate the drift of the local clock, and a relatively accurate local clock signal is obtained, which finally meets the requirements of the clock synchronization of the service device. Since the related device or the micro-synchronous device that does not need to increase the GPS function is required, the cost required for realizing the clock synchronization purpose by the embodiment of the present invention is low.
附图说明 DRAWINGS
图 1为现有技术的一种时钟同步装置示意图;  1 is a schematic diagram of a clock synchronization device of the prior art;
图 2为现有技术的另一种时钟同步装置示意图; 图 3为本发明网络时钟同步装置实施例示意图; 2 is a schematic diagram of another clock synchronization device of the prior art; 3 is a schematic diagram of an embodiment of a network clock synchronization apparatus according to the present invention;
图 4为本发明网络时钟同步方法实施例流程图。  4 is a flow chart of an embodiment of a network clock synchronization method according to the present invention.
具体实施方式 detailed description
在本发明实施例中: 通过 NTP ( Network Transfer Protocol, 网络传输协 议) 从上级时间服务器获取时间, 由于时间服务器不存在时间漂移, NTP 在 IP网络传输过程中由网络响应能力变化引入的只是抖动, 而本地振荡器 产生的主要是漂移, 自身的抖动可以忽略, 根据从不同时间服务器获取的 时间信息可计算获得本地振荡器的漂移, 通过调整频率调整器以消除本地 时钟的漂移最终达到业务设备时钟同步的要求。  In the embodiment of the present invention, the time is obtained from the upper-level time server through the NTP (Network Transfer Protocol). Since the time server does not have time drift, the NTP introduces only jitter when the network response capability changes during the IP network transmission process. The local oscillator generates mainly drift, and its own jitter can be neglected. According to the time information obtained from different time servers, the drift of the local oscillator can be calculated, and the frequency adjuster can be adjusted to eliminate the drift of the local clock and finally reach the service device clock. Synchronization requirements.
为使本发明实施例的目的、技术方案和优点更加清楚, 下面结合附图对本 发明各实施例作进一步的详细阐述。  In order to make the objects, technical solutions and advantages of the embodiments of the present invention more clear, the embodiments of the present invention are further described in detail below with reference to the accompanying drawings.
如图 3所示, 其为本发明的网络时钟同步系统实施例示意图。 该网络时 钟同步系统包括时间服务器 31和通过 IP传输网络与其通信的时钟同步装置 32。 其中, 时钟同步装置 32包括高稳振荡器 326、 频率调整器 325、 倍频器 324、 时间合成器 323、 过滤选择器 321、 合成和调整算法模块 322。  FIG. 3 is a schematic diagram of an embodiment of a network clock synchronization system according to the present invention. The network clock synchronization system includes a time server 31 and a clock synchronization device 32 that communicates therewith over an IP transmission network. The clock synchronization device 32 includes a high stability oscillator 326, a frequency adjuster 325, a frequency multiplier 324, a time synthesizer 323, a filter selector 321, and a synthesis and adjustment algorithm module 322.
过滤选择器 321: 通过 IP传输网络从至少一时间服务器 (图 3仅表示出 IP传输网络与一个 IP时间服务器, IP传输网络还可以和多个时间服务器相 连) 上接收时间服务器的时间信息 (为以下叙述方便, 将过滤选择器 321 直接从时间服务器 31接收到的时间信息称为参看源时间信息) , 然后据此 向合成和调整算法模块 322输出基准时间信息。  Filter selector 321: receiving time information of the time server on the IP transmission network from at least one time server (only FIG. 3 shows only the IP transmission network and one IP time server, and the IP transmission network can also be connected to multiple time servers) The following description is convenient. The time information that the filter selector 321 receives directly from the time server 31 is referred to as reference source time information), and then the reference time information is output to the synthesis and adjustment algorithm module 322.
如果过滤选择器 321可以通过 IP传输网络从多个时间服务器 31接收多 个参考源时间信息, 那么过滤选择器 321同时还要从时间合成器 323中获取 本地时间信息。 进而, 过滤选择器 321从所有时间服务器 31发回的参考源时 间信息中选取最佳的样本, 和本地时间信息进行比较, 通过选择和聚类算 法对往返延迟、 离差和偏移等参数进行分析, 选取若干个 (一般为一个) 较为准确的时间服务器的参考源时间信息进行常规滤波(主要去除抖动) 等处理后, 生成一个较为准确的时间信息 (为叙述方便, 筒称为基准时间 信息) , 并将该基准时间信息发送给合成和调整算法模块 322。 过滤选择器 321可以集成在业务设备的 CPU内或单独设置。 If the filter selector 321 can receive a plurality of reference source time information from the plurality of time servers 31 through the IP transmission network, the filter selector 321 also acquires the local time information from the time synthesizer 323 at the same time. Further, the filter selector 321 selects the best samples from the reference source time information sent back by all the time servers 31, compares them with the local time information, and performs parameters such as round trip delay, dispersion, and offset through the selection and clustering algorithms. Analysis, select a number of (usually one) more accurate time server reference source time information for conventional filtering (mainly remove jitter) and other processing, generate a more accurate time information (for the convenience of description, the cylinder is called reference time information And transmitting the reference time information to the synthesis and adjustment algorithm module 322. Filter selector The 321 can be integrated in the CPU of the business device or set separately.
可以理解 , 如果过滤选择器 321通过 IP传输网络只能接收到一个时间服 务器 31的参考源时间信息, 那么过滤选择器 321就不需要再从时间合成器 323获得本地时间信息(因为只有一个参考源时间信息,没有可选的余地), 进而,过滤选择器 321只要对该参考源时间信息进行过滤处理后生成准确的 基准时间信息, 并将该基准时间信息输出至合成和调整算法模块 322即可。 可以看出, 从本质上讲, 过滤选择器 321向合成和调整算法模块 322输出的 基准时间信息是从时间服务器 31获得的, 只是该基准时间信息是通过对从 时间服务器 31直接接收到的参考源时间信息进行了一定处理 (比如滤波) 后的时间信息。  It can be understood that if the filter selector 321 can only receive the reference source time information of one time server 31 through the IP transmission network, the filter selector 321 does not need to obtain the local time information from the time synthesizer 323 (because there is only one reference source). The time information has no optional space. Further, the filter selector 321 generates the accurate reference time information by filtering the reference source time information, and outputs the reference time information to the synthesis and adjustment algorithm module 322. . It can be seen that, in essence, the reference time information output by the filter selector 321 to the synthesis and adjustment algorithm module 322 is obtained from the time server 31, except that the reference time information is obtained by directly receiving the reference from the time server 31. The time information after the source time information has been processed (such as filtering).
合成和调整算法模块 322: 接收过滤选择器 321输出的准确的基准时间 信息及时间合成器 323输出的本地时间信息, 比较所述基准时间服务器 31 的时间信息与本地时间信息,进而获得本地时钟和时间服务器的时间偏差; 然后, 再根据多次获得的时间偏差数据, 通过滤波和换算等可得到频率调 整器 325输出的本地时钟信号在此段时间内的时间漂移和对应的频率偏差 (简称频偏) , 进而, 以此频偏为依据调整频率调整器 325的输出 (即本地 时钟信号), 这样频率调整器 325输出的本地时钟信号就可锁定上级时间服 务器, 实现了较为精确的时间同步。 合成和调整算法模块 322可以集成在业 务设备的 CPU内或单独设置。 需要说明的是, 一般情况下, 合成和调整算 法模块 322会根据多次时间偏差数据综合得到一段时间内的频偏,但是也不 排除合成和调整算法模块 322只根据一次的时间偏差数据得到频偏并输出 给频率调整器 325的情况。  The synthesis and adjustment algorithm module 322: receives the accurate reference time information output by the filter selector 321 and the local time information output by the time synthesizer 323, compares the time information of the reference time server 31 with the local time information, and obtains the local clock and Time deviation of the time server; Then, according to the time deviation data obtained multiple times, the time drift of the local clock signal output by the frequency adjuster 325 and the corresponding frequency deviation (referred to as frequency) can be obtained by filtering and scaling. In addition, the output of the frequency adjuster 325 (ie, the local clock signal) is adjusted based on the frequency offset, so that the local clock signal output by the frequency adjuster 325 can lock the upper time server, thereby achieving more accurate time synchronization. The synthesis and adjustment algorithm module 322 can be integrated into the CPU of the business device or set separately. It should be noted that, in general, the synthesis and adjustment algorithm module 322 comprehensively obtains the frequency offset within a period of time according to the multiple time offset data, but does not exclude the synthesis and adjustment algorithm module 322 from obtaining the frequency based on only one time deviation data. The case where the bias is output to the frequency adjuster 325.
频率调整器 325: 接收合成和调整算法模块 322输出的调整信号 (即频 偏)及高稳振荡器 326输出的振荡源时钟信号, 频率调整器 325根据该频偏 对当前输出的本地时钟信号进行调整。 可以理解, 如果频率调整器 325将要 进行的调整是初次调整,那么当前频率调整器 325输出的本地时钟信号频率 即为高稳振荡器 326输出的振荡源时钟信号频率, 进而, 根据该频偏调整后 的本地时钟信号频率变为振荡源时钟信号频率加上该频偏 (可能是正的也 可能是负的) 的频率, 从而完成了对本地时钟信号的同步。 经过初次调整 后的调整,则均是按照合成和调整算法模块 322输出的频偏对当前输出的本 地时钟信号进行调整, 当前的本地时钟信号由于此前已经进行过调整, 因 而可能已经与振荡源时钟信号频率不同了。 总而言之, 频率调整器 325是按 照合成和调整算法模块 322输出的频偏对当前的本地时钟信号进行调整。所 述频率调整器 325输出的本地时钟信号就是作为本地系统 (比如业务设备) 使用的时钟信号。 频率调整器通过调整设置在其内的频率寄存器, 以调整 频率调整器的输出。 频率调整器可选用 DDS ( Direct Digital Synthesize, 直 接数字合成) 等器件。 The frequency adjuster 325: receives the adjustment signal (ie, the frequency offset) output by the synthesis and adjustment algorithm module 322 and the oscillation source clock signal output by the high-stability oscillator 326, and the frequency adjuster 325 performs the current output local clock signal according to the frequency offset. Adjustment. It can be understood that if the adjustment to be performed by the frequency adjuster 325 is the initial adjustment, the local clock signal frequency output by the current frequency adjuster 325 is the frequency of the oscillation source clock signal output by the high-stability oscillator 326, and further, according to the frequency offset adjustment. The frequency of the local clock signal after the change becomes the frequency of the oscillation source clock signal plus the frequency of the frequency offset (which may be positive or negative), thereby completing the synchronization of the local clock signal. After initial adjustment After the adjustment, the local clock signal of the current output is adjusted according to the frequency offset output by the synthesis and adjustment algorithm module 322. The current local clock signal may have been adjusted differently from the oscillation source clock signal because it has been previously adjusted. It is. In summary, the frequency adjuster 325 adjusts the current local clock signal according to the frequency offset output by the synthesis and adjustment algorithm module 322. The local clock signal output by the frequency adjuster 325 is a clock signal used as a local system (such as a service device). The frequency adjuster adjusts the output of the frequency adjuster by adjusting the frequency register set in it. The frequency adjuster can be selected from devices such as DDS (Direct Digital Synthesize).
倍频器 324: 将频率调整器 325输出的本地时钟信号频率倍频到较高的 频率后再提供给时间合成器 323。 倍频器 324进行倍频的频率越高, 时间合 成器 323的分辨率越高, 进而合成时间码的精度也就越高。 倍频器 324采用 专门的倍频器件。  Frequency multiplier 324: The frequency of the local clock signal output by the frequency adjuster 325 is multiplied to a higher frequency and then supplied to the time synthesizer 323. The higher the frequency at which the frequency multiplier 324 performs frequency multiplication, the higher the resolution of the time synthesizer 323, and the higher the accuracy of synthesizing the time code. The frequency multiplier 324 uses a dedicated frequency doubling device.
时间合成器 323: 利用倍频器 324输出的时钟信号 (该时钟信号源自频 率调整器 325输出的本地时钟信号)合成无符号的 64位秒时间码(即本地时 间信息) , 例如, 此时间码表示自公元 1900年 1月 1日零时起开始的描述, 前 32位是整数部分, 后 32位是小数部分, 理论上计数的精度可达 2 - 32秒。 逻辑的计数脉冲来自倍频器 324倍频后的时钟信号,频率一般采用 100MHz。 进而,过滤选择器 321与合成和调整算法模块 322可以实时从时间合成器 323 中获取当前的本地时间信息。 时间合成器 323可以在逻辑 (FPGA ) 器件中 实现, 由于时间合成器 323采用的是频率调整器 325输出、 并经过倍频后的 时钟信号,所以时间合成器 323合成的时间码的准确度直接反映了频率调整 器 325输出的本地时钟信号的准确度。 可以理解, 如果频率调整器 325输出 的本地时钟信号准确度已经很高, 那么也可以不需要倍频器 324, 即时间合 成器 323直接接收频率调整器 325输出的当前本地时钟信号, 然后根据该本 地时钟信号合成对应的本地时间信息。 高稳振荡器 326: 输出振荡源时钟信 号至频率调整器 325, 相当于为频率调整器 325提供了输出本地时钟信号的基 础, 换而言之, 虽然频率调整器 325当前输出的本地时钟信号可能与所述振荡 源时钟信号不同(如按照频偏进行过调整), 但是该本地时钟信号是源自所述 振荡源时钟信号的。 该高稳振荡器一般选用的恒温晶振 (OCXO)器件, 老化率 一般为 5*10-1G/ day: 在不作调整的情况下, OCXO的保持能力可以使其至少在 半个月可达到 0.05ppm的时钟精度。 The time synthesizer 323: synthesizes an unsigned 64-bit second time code (ie, local time information) by using a clock signal output from the frequency multiplier 324 (the clock signal is derived from the local clock signal output from the frequency adjuster 325), for example, this time The code represents the description starting from 0:00 on January 1, 1900. The first 32 bits are the integer part, and the last 32 bits are the fractional part. The theoretical counting accuracy is 2 - 32 seconds. The logic count pulse comes from the clock signal after multiplier 324 multiplier, and the frequency is generally 100MHz. Further, the filter selector 321 and the synthesis and adjustment algorithm module 322 can obtain current local time information from the time synthesizer 323 in real time. The time synthesizer 323 can be implemented in a logic (FPGA) device. Since the time synthesizer 323 uses the clock signal output by the frequency adjuster 325 and is multiplied, the accuracy of the time code synthesized by the time synthesizer 323 is directly The accuracy of the local clock signal output by the frequency adjuster 325 is reflected. It can be understood that if the accuracy of the local clock signal output by the frequency adjuster 325 is already high, the frequency multiplier 324 may not be needed, that is, the time synthesizer 323 directly receives the current local clock signal output by the frequency adjuster 325, and then according to the The local clock signal synthesizes the corresponding local time information. The high-stability oscillator 326: outputs the oscillation source clock signal to the frequency adjuster 325, which is equivalent to providing the frequency adjuster 325 with an output local clock signal, in other words, although the local clock signal currently output by the frequency adjuster 325 may Different from the oscillation source clock signal (eg, adjusted according to the frequency offset), but the local clock signal is derived from the oscillation source clock signal. The high-temperature oscillator is generally selected as the constant temperature crystal oscillator (OCXO) device, the aging rate Typically 5* 10-1G / day: Without adjustment, the OCXO's ability to maintain can achieve a clock accuracy of 0.05ppm for at least half a month.
上述结构的时钟同步装置 32可以设置在业务设备内部或者单独设置。 如果时钟同步装置 32设置于业务设备内部, 那么时钟同步装置 32中的很多 模块可以延用现有业务设备内的模块, 比如高稳振荡器 326和频率调整器 325, 即只需对现有业务设备做一定的改进, 即可实现本发明实施例所示的 在全 IP传输模式下的具有时钟同步功能的业务设备。 这种业务设备只需要 根据时间服务器提供的参考源时间信息即可实现对自身时钟的同步校准, 而不需再附加诸如 GPS天线、 馈线、 防雷、 支架、 三防等设备或成本较高 的微型同步设备等, 可见节约了时钟同步的成本。 当然, 也不排除将本发 明实施所述的时钟同步装置独立于业务设备之外的情况, 这种情况下, 可 以使用该时钟同步装置为业务设备提供准确的本地时钟信号, 进而, 业务 设备可以将该本地时钟信号作为其系统使用的时钟信号。  The clock synchronizing device 32 of the above construction can be provided inside the service device or separately. If the clock synchronization device 32 is disposed inside the service device, many of the modules in the clock synchronization device 32 can extend the modules within the existing service device, such as the high stability oscillator 326 and the frequency adjuster 325, that is, only for existing services. The service device with the clock synchronization function in the all-IP transmission mode shown in the embodiment of the present invention can be implemented by the device. This kind of service equipment only needs to synchronize the calibration of its own clock according to the reference source time information provided by the time server, without adding equipment such as GPS antenna, feeder, lightning protection, bracket, three defense or higher cost. Micro-synchronous devices, etc., can save the cost of clock synchronization. Certainly, the clock synchronization device according to the implementation of the present invention is not excluded from the service device. In this case, the clock synchronization device can be used to provide an accurate local clock signal for the service device, and thus, the service device can This local clock signal is used as the clock signal used by its system.
如图 4所示, 其本发明的网络时钟同步方法实施例流程图。 本实施例中 的网络时钟同步方法流程包括以下步驟:  As shown in FIG. 4, it is a flowchart of an embodiment of a network clock synchronization method of the present invention. The network clock synchronization method process in this embodiment includes the following steps:
步骤 10: 业务设备(可以认为是网络时钟同步装置 32直接在业务设备 中予以实现) 中的参考时间选择源器(即过滤选择器 321 )每隔一定的时间 (所述间隔时间可进行设置及调整, 例如设定间隔时间为 64秒)通过 IP传 输网络向至少一时间服务器发出时间请求; 当然, 也可以无需业务设备主 动请求, 而是由时'间服务器 31定时主动下传 (比如广播的方式) 自己的参 考源时间信息。  Step 10: The reference time selection source (ie, the filter selector 321) in the service device (which can be considered as being directly implemented in the service device by the network clock synchronization device 32) can be set at intervals (the interval time can be set and The adjustment, for example, setting the interval time to 64 seconds, sends a time request to the at least one time server through the IP transmission network; of course, the service device may not actively request, but the time interval between the server 31 is actively transmitted (for example, broadcast) Way) Your own reference source time information.
步骤 20: 时间服务器 31通过 IP传输网络将自己的参考源时间信息发送 给过滤选择器 321, 如果存在多个时间服务器 31 , 则过滤选择器 321还要从 所有时间服务器 31发回的参考源时间信息中选取最佳的样本, 和本地时间 信息进行比较, 通过选择和聚类算法对往返延迟、 离差和偏移等参数进行 分析, 选取若干个(一般为一个)较为准确的时间服务器的参考源时间信 息生成较为准确的时间信息 (简称基准时间信息) , 其中, 所述本地时间 信息从时间合成器 323中获取。 前面已经提到, 如果过滤选择器 321只接收 到一个时间服务器 31的参考源时间信息,则无需再从时间合成器 323中获得 当前的本地时间信息。 Step 20: The time server 31 sends its own reference source time information to the filter selector 321 through the IP transmission network. If there are multiple time servers 31, the filter selector 321 also sends back the reference source time from all the time servers 31. The best sample is selected in the information, compared with the local time information, and the parameters such as round trip delay, dispersion and offset are analyzed by the selection and clustering algorithm, and several (generally one) more accurate time server references are selected. The source time information generates more accurate time information (referred to as reference time information), wherein the local time information is acquired from the time synthesizer 323. As already mentioned, if the filter selector 321 receives only the reference source time information of a time server 31, it is no longer necessary to obtain it from the time synthesizer 323. Current local time information.
可以看出, 上述步骤 10和 20的目的是从时间服务器 31获得基准时间信 息。 具体而言, 是先接收到至少一个参考源时间信息, 然后据此生成基准 时间信息。  It can be seen that the purpose of steps 10 and 20 above is to obtain reference time information from the time server 31. Specifically, at least one reference source time information is received first, and then reference time information is generated accordingly.
步骤 30:过滤选择器 321将该基准时间信息发送给合成和调整算法模块 322,合成和调整算法模块 322比较该基准时间信息及当前的本地时间信息, 进而获得本地时钟和时间服务器的时间偏差。  Step 30: The filter selector 321 sends the reference time information to the synthesis and adjustment algorithm module 322. The synthesis and adjustment algorithm module 322 compares the reference time information with the current local time information to obtain a time offset between the local clock and the time server.
步骤 40: 根据多次获得的时间偏差数据, 通过滤波和换算可得到频率 调整器 325输出时钟在此段时间的漂移和对应的频偏,以此为依据调整频率 调整器 325, 以便频率调整器 325的输出锁定上级时间服务器 31的时钟。  Step 40: According to the time deviation data obtained multiple times, the drift of the output clock of the frequency adjuster 325 and the corresponding frequency offset are obtained by filtering and scaling, and the frequency adjuster 325 is adjusted according to the frequency adjuster. The output of 325 locks the clock of the upper time server 31.
当业务设备和时间服务器 31连接中断或没有获取较好的时间服务器 31 的样本信息 (即参考源时间信息) 时, 合成和调整算法模块可根据先前的 调整的经验值对频率调整器 325的输出进行调整,这样可确保在此情况下业 务设备的时钟也能达到较高的精度。  When the connection between the service device and the time server 31 is interrupted or the sample information of the better time server 31 (ie, the reference source time information) is not obtained, the synthesis and adjustment algorithm module can output the frequency adjuster 325 according to the previously adjusted empirical value. Adjustments are made to ensure that the clock of the business device can also achieve higher accuracy in this case.
由于上级时间服务器 31不存在时间漂移 , NTP在 IP网络传输过程中由 网络响应能力变化引入的只是抖动; 而本地的高稳振荡器 326产生的主要是 漂移, 其自身的抖动可以忽略。 这样可以结合时间服务器 31的长期稳定度 与本地的高稳振荡器 326软锁相环良好的抑抖能力从而达到业务设备时钟 同步的需求,即利用 NTP来补偿 OCXO器件的老化所带来的时间漂移。这样, 实现了采用较低成本实现 IP网络传输模式下的时钟同步目的。 此外, 本发 明实施例技术方案不仅仅适用于 IP网络传输模式的情况, 对于其他传输模 式也可以适用。  Since there is no time drift in the upper-level time server 31, the NTP introduces only jitter in the network network transmission process during the IP network transmission process; and the local high-stability oscillator 326 mainly generates drift, and its own jitter can be ignored. This can combine the long-term stability of the time server 31 with the good anti-shake capability of the local high-stability oscillator 326 soft phase-locked loop to achieve the clock synchronization of the service device, that is, using NTP to compensate for the time caused by the aging of the OCXO device. drift. In this way, the purpose of clock synchronization in the IP network transmission mode at a lower cost is achieved. In addition, the technical solution of the embodiment of the present invention is applicable not only to the IP network transmission mode but also to other transmission modes.
以上所述仅为本发明的较佳实施例而已, 并不用以限制本发明, 凡在本发 明的精神和原则之内所作的任何修改、等同替换和改进等, 均应包含在本发明 的保护范围之内。  The above is only the preferred embodiment of the present invention, and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection of the present invention. Within the scope.

Claims

权 利 要 求 Rights request
1、 一种网络时钟同步装置, 其特征在于, 包括: 过滤选择器、 合成和调 整算法模块、 频率调整器、 振荡器和时间合成器, 其中,  A network clock synchronization device, comprising: a filter selector, a synthesis and adjustment algorithm module, a frequency adjuster, an oscillator, and a time synthesizer, wherein
所述过滤选择器,用于接收时间服务器的参考源时间信息并据此生成基准 时间信息;  The filter selector is configured to receive reference source time information of the time server and generate reference time information according to the reference time information;
所述合成和调整算法模块,用于通过比较所述过滤选择器输出的基准时间 信息及所述时间合成器输出的本地时间信息得到频率偏差;  The synthesis and adjustment algorithm module is configured to obtain a frequency deviation by comparing reference time information output by the filter selector and local time information output by the time synthesizer;
频率调整器,用于按照所述合成和调整算法模块提供的频率偏差调整其输 出的本地时钟信号, 所述本地时钟信号源自所述振荡器提供的振荡源时钟信 号;  a frequency adjuster for adjusting a local clock signal of the output according to a frequency offset provided by the synthesis and adjustment algorithm module, the local clock signal being derived from an oscillation source clock signal provided by the oscillator;
时间合成器,用于将源自所述频率调整器的本地时钟信号合成本地时间信  a time synthesizer for synthesizing a local clock signal originating from the frequency adjuster into a local time letter
2、 根据权利要求 1所述的装置, 其特征在于, 还包括: 2. The device according to claim 1, further comprising:
倍频器,用于将所述频率调整器输出的本地时钟信号倍频到较高的频率后 再输出至所述时间合成器。  And a frequency multiplier for multiplying the local clock signal output by the frequency adjuster to a higher frequency and then outputting to the time synthesizer.
3、 根据权利要求 1所述的装置, 其特征在于, 如果所述过滤选择器接收 多个时间服务器的参考源时间信息,则所述过滤器具体用于参考所述时间合成 器输出的本地时间信息、通过选择和聚类算法对往返延迟、 离差和偏移等参数 进行分析 , 从所述多个参考源时间信息中选取至少一个生成基准时间信息。  3. The apparatus according to claim 1, wherein if the filter selector receives reference source time information of a plurality of time servers, the filter is specifically used to refer to a local time output by the time synthesizer And analyzing, by the selection and the clustering algorithm, parameters such as round trip delay, dispersion and offset, and selecting at least one of the plurality of reference source time information to generate reference time information.
4、 根据权利要求 1所述的装置, 其特征在于, 所述合成和调整算法模块 输出至频率调整器的频率偏差具体为基于多次时间偏差数据综合得到的一段 时间内的频率偏差。  The device according to claim 1, wherein the frequency deviation of the synthesis and adjustment algorithm module outputted to the frequency adjuster is specifically a frequency deviation of a period of time obtained based on the multiple time deviation data synthesis.
5、 根据权利要求 1至 4中任意一项所述的装置, 其特征在于, 所述网络 时钟同步装置位于业务设备内部, 或者, 所述网络时钟同步装置独立于业务设 备外、 并为所述业务设备提供所述本地时钟信号。  The device according to any one of claims 1 to 4, wherein the network clock synchronization device is located inside the service device, or the network clock synchronization device is independent of the service device, and is The service device provides the local clock signal.
6、 一种网络时钟同步系统, 其特征在于, 包括: 网络时钟同步装置和至 少一个时间服务器,  6. A network clock synchronization system, comprising: a network clock synchronization device and at least one time server,
所述网络时钟同步装置从所述时间服务器获得基准时间信息, 并通过 比较所述基准时间信息与本地时间信息得到两者的频率偏差, 进而按照所 述频率偏差调整所述网络时钟同步装置输出的本地时钟信号。 The network clock synchronization device obtains reference time information from the time server and passes Comparing the reference time information with the local time information to obtain a frequency deviation between the two, and further adjusting the local clock signal output by the network clock synchronization device according to the frequency deviation.
7、 根据权利要求 6所述的系统, 其特征在于, 所述网络时钟同步装置 通过网络传输协议从所述时间服务器获得基准时间信息。  7. The system according to claim 6, wherein the network clock synchronization device obtains reference time information from the time server through a network transmission protocol.
8、 根据权利要求 6所述的系统, 其特征在于, 所述网絡时钟同步装置 通过定时向所述时间服务器请求参考源时间信息的方式获得所述基准时间 信息; 或者, 所述网络时钟同步装置通过接收时间服务器定时主动下传的 参考源时间信息而获得所述基准时间信息。  The system according to claim 6, wherein the network clock synchronization device obtains the reference time information by periodically requesting reference time source information to the time server; or the network clock synchronization device The reference time information is obtained by receiving reference source time information that is actively downlinked by the time server.
9、 根据权利要求 6所述的系统, 其特征在于, 所述网络时钟同步装置 位于业务设备内部; 或者, 所述网络时钟同步装置独立于所述业务设备外、 并为所述业务设备提供所述本地时钟信号。  The system according to claim 6, wherein the network clock synchronization device is located inside the service device; or the network clock synchronization device is independent of the service device and provides the service device Describe the local clock signal.
10、 根据权利要求 6所述的系统, 其特征在于, 所述网络时钟同步装置 是如权利要求 1至 4中任一项所述的装置。  The system according to claim 6, wherein the network clock synchronization device is the device according to any one of claims 1 to 4.
11、 一种网络时钟同步方法, 包括以下步骤:  11. A network clock synchronization method, comprising the following steps:
从时间服务器获得基准时间信息;  Obtaining reference time information from the time server;
通过比较所述基准时间信息与本地时间信息得到两者的频率偏差; 按照所述频率偏差调整本地时钟信号。  The frequency deviation between the two is obtained by comparing the reference time information with the local time information; and adjusting the local clock signal according to the frequency deviation.
12、 根据权利要求 11所述的方法, 其特征在于, 所述从时间服务器获得 基准时间信息的步骤包括:  12. The method according to claim 11, wherein the step of obtaining reference time information from the time server comprises:
接收来自多个时间服务器的多个参考源时间信息;  Receiving multiple reference source time information from multiple time servers;
参考本地时间信息从所述多个参考源时间信息中选取至少一个生成基准 时间信息。  The at least one generation reference time information is selected from the plurality of reference source time information with reference to the local time information.
13、 根据权利要求 12所述的方法, 其特征在于, 所述参考本地时间信息 从所述多个参考源时间信息中选取至少一个生成基准时间信息的步骤具体为: 参考本地时间信息、通过选择和聚类算法对往返延迟、 离差和偏移等参数 进行分析, 从所述多个参考源时间信息中选取至少一个生成基准时间信息。  The method according to claim 12, wherein the step of selecting at least one of the plurality of reference source time information to generate the reference time information by the reference local time information is specifically: referencing local time information, by selecting And the clustering algorithm analyzes parameters such as round trip delay, dispersion, and offset, and selects at least one of the plurality of reference source time information to generate reference time information.
14、根据权利要求 11至 13中任意一项所述的方法, 其特征在于, 所述通 过比较基准时间信息与本地时间信息得到两者的频率偏差步骤具体为: 比较所述基准时间信息及本地时间信息获得两者的时间偏差; The method according to any one of claims 11 to 13, characterized in that The step of comparing the frequency deviation between the comparison time information and the local time information is specifically: comparing the reference time information and the local time information to obtain a time deviation between the two;
根据所述时间偏差得到对应的频率偏差。  A corresponding frequency deviation is obtained based on the time offset.
15、 根据权利要求 14所述的方法, 其特征在于, 所述 据时间偏差得到 对应的频率偏差步骤具体为:根据多次获得的时间偏差数据综合得到一段时间 内的频率偏差。  The method according to claim 14, wherein the step of obtaining the corresponding frequency deviation according to the time deviation is specifically: synthesizing the frequency deviation over a period of time according to the time deviation data obtained multiple times.
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