WO2007135000A1

WO2007135000A1 - Integrated circuit for matrix display with integrated spacer and method for making same

Info

Publication number: WO2007135000A1
Application number: PCT/EP2007/054619
Authority: WO
Inventors: Pierre Blanchard; Laurent Charpiot
Original assignee: E2V Semiconductors
Priority date: 2006-05-19
Filing date: 2007-05-14
Publication date: 2007-11-29
Also published as: FR2901372B1; FR2901372A1

Abstract

The invention concerns integrated circuits for LCD matrix display and methods for making same. The circuit comprises an array of rows and columns of reflecting elementary electrodes (E1, E4) defining each one display pixel, and coated with liquid crystal. To maintain a constant spacing value H between the electrodes and a liquid crystal confinement plate, the method consists in integrating the chip of the integrated circuit spacer pads (18) distributed on the surface of the substrates. The spacer pads are localized each at one junction point between four adjacent electrodes. One spacer pad comprises a conductive pad (20) made of the same material as the reflecting electrodes, said material being coated with a non-reflecting layer (22) and with an electrically insulating layer.

Description

INTEGRATED MATRIX DISPLAY CIRCUIT WITH INTEGRATED SPACER AND METHOD OF MANUFACTURE

The present invention relates to reflective type liquid crystal matrix display integrated circuits and methods for making the same.

These circuits comprise, on the same monolithic substrate, an array of elementary electrodes disposed in rows and columns, each electrode defining a display pixel, and electronic control circuits of these electrodes, located under the electrode array. The elementary electrodes are reflective and are covered with a liquid crystal; a transparent confinement plate encloses the liquid crystal to retain it in place above the electrode array. The containment plate itself has a counterelectrode also transparent; the liquid crystal is electrically biased according to the voltage between a pixel electrode and the counter electrode; the liquid crystal reacts according to this electric polarization to modulate the ambient light which passes through it and which is reflected on each electrode; the action of the liquid crystal is a transmission variation or more exactly an optical polarization variation.

In this type of construction, it is sought to have a very constant thickness of liquid crystal above the entire electrode array to ensure luminance homogeneity over the entire surface for the same control voltage applied to all the pixels. . For this purpose spacers of constant height are distributed over the entire display matrix. These spacers are preferably located between the adjacent electrodes, for example where four adjacent electrodes are adjacent.

Displays of this type function in reflection of the light received, this reflection varying between a minimum reflection and a maximum reflection according to the electric polarization; it is desired that the electrodes be as reflective as possible (white pixels) when the voltage applied to the pixel corresponds to a maximum luminance to be provided in reflection, but it is also desirable that the pixels of the screen appear as black as possible when the applied voltage the pixel corresponds to a minimum luminance in ambient light reflection (black pixels). A problem encountered in existing displays is the risk of reflection that the spacers cause; the spacers are not covered with liquid crystal and they tend to reflect light even if the neighboring electrodes receive voltages corresponding to black pixels. This clean reflection of the spacers helps to prevent the display from appearing well black where it should be. In general, it can be said that the presence of spacers distributed over the entire surface of the image reduces the contrast since the black obtained is imperfect.

The proper reflectivity of the spacers is related in particular to the surface they occupy. So we reduce this phenomenon by minimizing their area, but the problem still remains at least partially.

The object of the invention is to try to minimize the influence of the presence of the spacers on the contrast of the image, and this with the aid of a spacer structure which is simple to produce by manufacturing technologies. common.

To achieve this, the invention proposes a liquid crystal matrix display integrated circuit comprising on a monolithic substrate an array of lines and columns of reflective elementary electrodes each defining a display pixel, and electronic control circuits of these elements. electrodes, located under the array of electrodes, the circuit further comprising a liquid crystal covering the electrodes, a transparent containment plate retaining the liquid crystal, and spacer pads distributed over the surface of the substrate to maintain constant the spacing between the electrodes and the confinement plate, the spacer pads being each located at a junction point between four adjacent electrodes, characterized in that a spacer pad comprises a conductive pad made of the same material as the reflecting electrodes, this material being covered with a non-reflective layer and an electrically layer insulating. It will be seen that this spacer structure has the advantage of being able to be manufactured very simply.

The material of the electrodes and the conductive pad is preferably aluminum; its thickness is typically about 2000 Angstroms (0.2 micrometers); the non-reflective layer is preferably titanium nitride; its thickness is preferably about 600 angstroms.

In an advantageous embodiment, the conductive pad covered by the non-reflecting layer and the insulating layer is a conductive layer portion separated from the four adjacent electrodes which surround it, the electrodes having cut corners to leave sufficient space for the conductive pad.

In another advantageous embodiment, the conductive pad consists of the four (uncut) corners of the adjacent electrodes. The studs can be square or circular or octagonal.

The corners of the electrodes, if cut, are cut preferably at 45 °.

The control circuits in principle comprise several levels of interconnect metal layers below a level corresponding to the reflective electrodes, and it is preferably provided that the outer connection pads are formed in a metal layer level below. the level corresponding to the reflective electrodes and not in the same level as the reflective electrodes.

For the manufacture of this matrix display integrated circuit, electronic control circuits are produced in a monolithic substrate and the substrate is planarized by an insulating layer, then a reflective conductive layer covered with a non-reflecting layer is deposited, and in this superposition of layers is etched a pattern comprising an array of electrodes in rows and columns used for the display, an electrically insulating layer is deposited, this layer is etched in the desired pattern to leave a spacer stud above an area at a junction point between four adjacent electrodes, and eliminating the non-reflective layer where it is not covered by the spacer, to define reflective electrodes each corresponding to an image pixel.

The following steps are the definition of contact pads for the communication of the circuit with the outside, then the establishment of a peripheral sealing bead and a containment plate, the filling by a liquid crystal and the sealing of the space filled with crystal. These last operations can be carried out on a slice collective semiconductor or on individual chips after cutting the slice into chips.

Other features and advantages of the invention will appear on reading the detailed description which follows and which is given with reference to the appended drawings in which:

FIG. 1 represents a simplified general view, in lateral section, of an integrated liquid crystal display circuit;

FIG. 2 represents an enlarged top view of a group of four adjacent electrodes corresponding to four image pixels;

- Figure 3 shows an even further enlarged view of the arrangement of a spacer pin at the intersection of a line and a column of electrodes;

- Figure 4 shows a side section of the constitution of the spacer pin;

- Figures 5 to 9 show the different steps of manufacturing the spacer stud;

- Figure 10 and Figure 1 1 show, in top view and in side section, an alternative embodiment of the spacer stud.

FIG. 1 shows a silicon chip 10 in which the electronic control circuits of a matrix liquid crystal display have been formed by conventional microelectronic technologies; the individual image points, or pixels, of the display are defined on the upper surface of the chip by reflecting electrodes arranged in a network of rows and columns.

The upper surface of the chip is covered with a liquid crystal 12. This crystal is enclosed between the chip and a transparent plate 14, in principle a glass plate coated with a transparent counterelectrode; the plate is placed above the chip. The plate is sealed to the chip by a bead of peripheral glue 16 surrounding the entire array of electrodes. The gap between the plate and the chip defines the thickness of liquid crystal present between the electrodes of the network and the counter-electrode. This spacing is kept constant over the entire surface of the matrix by spacers 18 of constant height distributed over this surface. The spacers are integrated on the surface of the chip, that is to say that they are formed by deposition and photolithography techniques like the other elements integrated in the chip. They are arranged between adjacent electrode groups, for example at each point where four adjacent electrodes are adjacent. Figure 2 shows four electrodes E1, E2, E3, E4, and a spacer 18 placed in the center of this group of four adjacent electrodes.

Two variants will be described: in one, the spacer does not cover the electrodes at all; in the other, the spacer covers the corners of the four adjacent electrodes.

In the first variant, represented in FIGS. 2 to 4, a central zone between four adjacent electrodes is reserved for the spacer. For this purpose, to provide sufficient space for the spacer, it is expected that the electrodes have their corners cut, the space between the cut corners of the four electrodes being used to place the spacer.

Figure 3 shows, in a large scale view, this arrangement of the spacer 18 relative to the electrodes. FIG. 4 represents a corresponding lateral section along the line IV-IV of FIG. 3. The electrodes are preferably constituted by portions of an aluminum layer. As an indication, the electrodes may be about 10 micrometers apart. The in-line electrodes E1, E2 or E3, E4 as well as the column electrodes (E1, E3 or E2, E4) are separated by the minimum distance D (0.4 micrometer, for example, or less) that the photolithography rules allow. ; indeed the spaces between electrodes are useless spaces for the display and they must be minimized to maximize the contrast of the image.

The space formed by the four cut corners of the electrodes is a square or rectangle whose sides are greater than D (for example about 4D), at the center of which we find the spacer 18, consisting of a well-defined pad of height H ( order of magnitude: 1 micrometer), trapezoidal in view of the etching processes used. In the example shown, the shape of the base of the stud is octagonal, but it could also be square or circular. The distance between opposite sides (or the diameter if it is a circle) is for example about 1 micrometer. The spacer is preferably formed from an insulating layer

(preferably silicon oxide) which covers a layer 20 of conductive material which is made of the same material (in practice low thickness aluminum deposited at low temperature) as the layer constituting the reflective electrodes E1 at E4.

Between the aluminum beach 20, at the base of the spacer, and the silicon oxide layer, there is also a non-reflective layer 22. The layer 22 can be formed by a thin layer (about 500 to 1000 angstroms) of titanium nitride deposited on the aluminum. Since the oxide is transparent, the titanium nitride layer prevents the aluminum layer from receiving and returning ambient light; the reflection coefficient in visible light is typically divided by a factor of at least three (and even much more for certain wavelength ranges) in the presence of a layer of 600 angstroms of titanium nitride, in a spacer having 1, 3 micrometer thickness of silicon oxide on 0.2 micrometer thickness of aluminum.

The total height of the spacer stud 18 above the surface of the electrodes E1 to E4 is the sum of the silicon oxide height and the height of the non-reflective layer 22 (the liquid crystal coated electrodes are not covered with titanium nitride since they must be as reflective as possible).

The width of the conductive pad 20 is preferably about 2D (0.8 micrometers), and it is separated from the cut corners of the electrodes by a distance D. The dimension D and the other distances are chosen as small as possible. design rules applicable to the technology used.

The method of manufacturing the spacers will now be described with reference to FIGS. 5 to 9.

The electronic control circuits are manufactured first by any microelectronic technologies in the detail of which it is not necessary to enter. The spacers are made afterwards. The various circuits made are not represented in the figures: FIG. 5 represents only, and schematically, the upper layers of interconnections made at the end of the manufacturing process. These upper layers typically comprise several conductive levels separated from each other by insulating layers of planarization. It can be considered for simplicity that there are several levels of conductors, for example four levels, embedded in an overall planarized insulating layer and interconnected by point vias through the insulator. The lower conductive levels may all be produced by aluminum layers coated with an anti-reflective layer (in particular titanium nitride) in order to minimize parasitic reflections due to the buried layers. Only one penultimate conducting level M3 is shown, formed for example by an aluminum layer or an aluminum layer coated with an antireflective layer of titanium nitride. The last level of metallization is a level M4 which is formed at this stage by a layer of aluminum deposited at low temperature and under a small thickness (of the order of 2000 angstroms whereas the lower layers can be closer to 5000 or 10,000 angstroms). The low temperature deposition on an insulating layer that has been well planned beforehand has the advantage of minimizing the surface defects of the aluminum and thus of giving it an optimum quality of reflectivity. The last level M4 is in fact the one in which the reflective electrodes corresponding to each pixel are produced. Before etching the layer M4 to define these electrodes, according to the invention, a non-reflecting uniform layer 22, preferably titanium nitride, is deposited. The titanium nitride can then be removed selectively without degrading the aluminum layer. As an indication, the thickness of titanium nitride can be 600 angstroms. By a photolithography operation (FIG. 6), the electrode array (electrode E1 in FIG. 6) is defined and simultaneously the regions 20 which form the base of the spacers in the variant embodiment corresponding to FIGS. 2 to 4. the space between electrodes or between electrodes and beaches 20 is the smallest allowed by the technology. In this operation, the titanium nitride layer and the aluminum layer are attacked by a single masking operation, using etching products adapted to each of these materials.

A uniform layer of insulator 32, preferably silicon oxide, which covers the electrodes and the beaches 20 is then deposited (FIG. 7). The thickness deposited is determined according to the desired height. for spacers; indeed, it is this layer that will form the essential of the height of the spacer stud. As can be seen, a slight recessed relief appears at the top of the layer 32 because of the underlying relief created by the etching of the electrodes and the spacer; however, the top of the layer 32 above the range 20 is generally flat since the width of the range 20 (0.8 micrometer for example) is sufficiently greater than the width of the spaces between the electrodes and the range 20 (0, 4 micron for example).

The insulating layer 32 is then etched (FIG. 8) through a mask which defines the spacers, to allow only the spacer studs 18 such as that of FIG. 4 to remain. The etching of the entire thickness of the insulating layer may cause a slight overgrading of the insulating layer 25 where it is not protected by the electrodes. Indeed, there is no etch selectivity between the layer 25 and the layer 32 if they are both made of silicon oxide. However this supergraft is not a problem because it does not change the height of the spacer relative to the upper surface of the electrodes. In FIG. 8, it has been considered that the mask which defines the spacers during this etching of the layer 32 is identical to that which defines the titanium nitride coated aluminum ranges, and has been considered perfectly perfect. aligned with it. To avoid risks of misalignment, it can be provided that the mask that defines the spacer is slightly larger than the one defining the range 20, the spacer then overflowing on either side of the range 20 as shown in FIG. Figure 4.

The titanium nitride layer 22 is then removed where it is not protected by the spacers, so that the electrodes which will be covered with liquid crystal will only comprise the aluminum reflective layer M4. The elimination of the layer 22 is done without a mask, by an etching product which does not attack the insulating layer 32 nor the layer M4. The spacers thus formed have a height above the upper surface of the electrodes which is the sum of the height of the titanium nitride layer 22 and the insulating layer 32.

FIG. 9 represents by way of example an additional step for the formation of a contact pad intended for the subsequent soldering of an external connection wire. Rather than forming this contact pad in the M4 layer as usual (contact on the last level of metallization), it is preferred to form the pad in the next lower metal level M3; this makes it possible to adapt the constitution and the layer M3 according to this destination, rather than to adapt the layer M4 which must already meet other requirements such as the quality of reflection.

The upper part of the insulating layer 25 is thus opened to form an access well to the lower conductive layer M3; thus denuded a conductive pad that can constitute a solder pad of an external connection wire.

In another variant embodiment, represented in FIGS. 10 and 11, the corners of the electrodes are not cut off, which means that the space between the adjacent electrodes remains everywhere at a minimum value (0.4 micrometer for example). ; and there is no central range below the spacer; but there is provided a pad 18 of silicon oxide large enough to cover the four corners of four adjacent electrodes. The width of the stud is approximately equal to the width of the square which was defined in FIG. 3 by the cut corners of the electrodes (approximately 1.2 micrometers). The manufacturing process is exactly the same as the previous one; during the removal of the titanium nitride layer 22, the titanium nitride remains under the spacer pad, so that the corners of the electrodes (which are not covered with liquid crystal and therefore can not modulate the light in function of the image) remain coated with a non-reflective layer and therefore do not produce parasitic reflection.

Claims

A liquid crystal matrix display integrated circuit comprising on a monolithic substrate (10) an array of reflective elementary electrode lines and columns (E1-E4) each defining a display pixel, and electronic control circuits of these electrodes, located under the array of electrodes, the circuit further comprising a liquid crystal (12) covering the electrodes, a transparent confinement plate (14) retaining the liquid crystal, and spacer pads (18) distributed on the surface of the substrate for maintaining constant the spacing between the electrodes and the confinement plate, the spacer pads being each located at a junction point between four adjacent electrodes, characterized in that a spacer stud comprises a conductive pad (20) composed of same material as the reflective electrodes, this material being covered with a non-reflective layer (22) and an electrical layer insulation (32).

2. Display circuit according to claim 1, characterized in that the insulating layer (32) is made of silicon oxide.

3. Display circuit according to one of claims 1 and 2, characterized in that the non-reflective layer is titanium nitride.

4. Display circuit according to one of claims 1 to 3, characterized in that the material of the electrodes and the conductive pad is aluminum.

5. Display circuit according to claim 4, characterized in that the material of the electrodes and the conductive pad has a thickness of about 2000 angstroms.

6. Display circuit according to one of claims 1 to 5, characterized in that the conductive pad (20) covered by the non-reflective layer and the insulating layer is a conductive layer portion separated from the four adjacent electrodes which Surround the electrodes having cut corners to leave sufficient space for the conductive pad.

7. Display circuit according to one of claims 1 to 5, characterized in that the conductive pad is constituted by the four uncut corners of the adjacent electrodes.

8. Display circuit according to one of claims 1 to 7, characterized in that the control circuits comprise several levels of interconnect metal layers below a level (M4) corresponding to the reflecting electrodes, and the display circuit comprises an outer connection pad formed in a metal layer level (M3) below the level corresponding to the reflecting electrodes.

9. A method of manufacturing a liquid crystal matrix display integrated circuit, wherein is made in a monolithic substrate (10) electronic control circuits and planarise the substrate by an insulating layer (25), and then deposited a reflective conductive layer (M4) covered with a non-reflective layer (22), and in this superposition of layers is etched a pattern comprising an array of electrodes in rows and columns for the display, depositing a layer electrically insulating (32), this layer is etched in the desired pattern to leave a spacer pad (18) over an area at a junction point between four adjacent electrodes, and the non-reflective layer (22) is removed. where it is not covered by the spacer, to define reflective electrodes each corresponding to an image pixel.

10. The method of claim 9, characterized in that the reflective conductive layer is aluminum deposited at low temperature.