WO2007129425A1 - Liquid crystal display device - Google Patents

Liquid crystal display device Download PDF

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Publication number
WO2007129425A1
WO2007129425A1 PCT/JP2006/325364 JP2006325364W WO2007129425A1 WO 2007129425 A1 WO2007129425 A1 WO 2007129425A1 JP 2006325364 W JP2006325364 W JP 2006325364W WO 2007129425 A1 WO2007129425 A1 WO 2007129425A1
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WO
WIPO (PCT)
Prior art keywords
liquid crystal
display device
crystal display
signal line
sub
Prior art date
Application number
PCT/JP2006/325364
Other languages
French (fr)
Japanese (ja)
Inventor
Kazuhiro Nakanishi
Original Assignee
Sharp Kabushiki Kaisha
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Kabushiki Kaisha filed Critical Sharp Kabushiki Kaisha
Publication of WO2007129425A1 publication Critical patent/WO2007129425A1/en

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Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3614Control of polarity reversal in general
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • G02F1/13452Conductors connecting driver circuitry and terminals of panels
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/52RGB geometrical arrangements
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/04Structural and physical details of display devices
    • G09G2300/0421Structural details of the set of electrodes
    • G09G2300/0426Layout of electrodes and connections
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/04Structural and physical details of display devices
    • G09G2300/0439Pixel structures
    • G09G2300/0452Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0247Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes

Definitions

  • the present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device in which one pixel has four or more subpixel forces.
  • liquid crystal display devices are thin and have low power consumption, they are widely used in office automation equipment such as personal computers, portable information terminal devices such as electronic notebooks and mobile phones, camera-integrated VTRs, and televisions.
  • FIG. 18 shows a schematic diagram of a liquid crystal panel used in a conventional liquid crystal display device.
  • the sub-pixels 113 are arranged in a matrix.
  • the row direction horizontal direction in the drawing
  • sub-pixels 113 of red (R), green (G), and blue (B) are repeatedly arranged in this order, and the same color in the column direction (vertical direction in the drawing).
  • Sub-pixels 113 are arranged.
  • One pixel 114 is composed of three-color sub-pixels 113 arranged in series.
  • the subpixel 113 has a liquid crystal panel 110 with three colors
  • the three colors R, G, and B are displayed simultaneously. It was difficult to control the color temperature, which is difficult to obtain.
  • FIG. 19 shows a schematic diagram of a liquid crystal panel 210 in which one pixel is composed of four subpixels.
  • the power of red (R), green (G), and blue (B) is added to white (W) in addition to the subpixels 213 arranged in a matrix.
  • a sub-pixel 213 is provided.
  • sub-pixels 213 of white (W), red (R), green (G), and blue (B) are repeatedly arranged in this order in the row direction, and the same color in the column direction.
  • Sub-pixels 213 are arranged.
  • One pixel 214 is composed of four sub-pixels 213 arranged continuously.
  • Patent Document 1 A liquid crystal display device having four color sub-pixels is disclosed in Patent Document 1, for example, and a liquid crystal display device that performs dot inversion display is disclosed in Patent Document 2, for example.
  • Patent Document 1 JP-A-11-295717 (Page 5, Figure 1)
  • Patent Document 2 Japanese Patent Laid-Open No. 2003-295157 (Page 5, Figure 1)
  • FIGS. 20 and 21 illustrate cases where only the red (R) subpixels 113 and 213 are displayed on the liquid crystal panels 110 and 210. Display! /, NA! /, And subpixels 113 and 213 should be hatched! /.
  • R red
  • FIG. 20 in the three-color liquid crystal panel 110 with sub-pixels 113, “+” and “” sub-pixels 113 are alternately arranged in the row direction during single color display. That is, since the dot inversion driving state is maintained, the display on the liquid crystal panel 110 is good.
  • sub-pixels 213 having the same polarity are arranged in the row direction.
  • a stripe pattern extending in the row direction that is, a horizontal stripe pattern appears in FIG.
  • This problem is not limited to the case where the sub-pixels are four colors, but the same is true for even-numbered colors.
  • An object of the present invention is to provide a liquid crystal display device having even-numbered sub-pixels of four or more colors.
  • the present invention provides a color image of different colors arranged in a plane.
  • a signal is transmitted to the pixel through a liquid crystal panel having a plurality of sub-pixel power pixels provided with a filter, a signal line disposed in each column of the sub-pixel, and a wiring connected to the signal line.
  • a liquid crystal display device comprising a source driver having a plurality of individual drivers for driving the display of the liquid crystal panel, wherein n pixels are evenly arranged in a direction parallel to the direction in which the signal lines are arranged
  • the sub-pixel force is the same, the arrangement of the sub-pixels is the same in each of the pixels, the polarities of the outputs of the adjacent source drivers are different, and the individual driver is an arbitrary natural number multiple of n 1
  • the connection with the wiring is omitted for every m added, and is not connected with the signal line.
  • the sub-driver connected to the individual driver adjacent to the individual driver in which the wiring is omitted is provided.
  • the polarity is reversed in the pixels having pixels.
  • the present invention is also characterized in that, in the liquid crystal display device having the above configuration, the m is constant.
  • floor (x) is a function called a floor function, and is a function that returns a maximum integer not exceeding X, that is, a maximum integer less than or equal to X.
  • the present invention is characterized in that the n is 4 and the m is 5.
  • a plurality of the sub-pixels constituting one pixel are arranged in a direction perpendicular to the direction in which the signal lines are arranged. And features.
  • the sub-pixels constituting one of the pixels are four including the color filters of red, green, blue, or white.
  • the present invention provides the source driver and the wiring force S on the flexible substrate, and omits the wiring on the flexible substrate. It is characterized by.
  • the present invention is characterized in that the wiring is provided on the liquid crystal panel, and the wiring is omitted on the liquid crystal panel.
  • the present invention is characterized in that the source driver is provided on the liquid crystal panel.
  • the sub-pixel connected to the individual driver adjacent to the individual driver in which the wiring is omitted is provided. Since the polarity of the sub-pixel displayed on the pixel is inverted, the occurrence of a striped pattern at that portion can be suppressed, and the display quality of the liquid crystal display device can be improved.
  • the occurrence of stripes can be made equal, and the display on the liquid crystal display device can be easily viewed. Can be.
  • m n X floor ((a / n) Z (b X c- a)) + 1
  • the occurrence of striped patterns can be evenly spaced throughout the liquid crystal panel, and the display can be seen more. It can be easy.
  • the polarity of adjacent subpixels of the same color in the entire liquid crystal panel is inverted, so that the occurrence of striped patterns can be suppressed as a whole.
  • the source driver and the wiring are provided on the flexible substrate, and the wiring is omitted on the flexible substrate. Accordingly, the liquid crystal panel having the conventional configuration is used. can do.
  • a wiring board is provided on a liquid crystal panel, and the wiring is omitted on the liquid crystal panel.
  • the thing of the structure of can be used.
  • FIG. 1 is a schematic configuration diagram of a liquid crystal display device according to an embodiment of the present invention.
  • FIG. 2 is a schematic diagram of a liquid crystal display device that is useful in an embodiment of the present invention.
  • FIG. 6 is a plan view of a flexible substrate according to an embodiment of the present invention.
  • FIG. 8 is a block diagram of a control unit that works according to an embodiment of the present invention.
  • FIG. 13 A schematic diagram of a liquid crystal display device according to an embodiment of the present invention in a monochromatic display state.
  • ⁇ 14 A schematic diagram of a liquid crystal display device according to another aspect of an embodiment of the present invention.
  • ⁇ 15A Implementation of the present invention Schematic diagram of a pixel that works on another aspect of the form
  • FIG.20 Schematic diagram of a liquid crystal panel with 3 sub-pixels in a single color display state
  • FIG. 21 Schematic diagram of a liquid crystal panel with 3 sub-pixels in a single color display state.
  • FIG. 1 is a schematic configuration diagram of a liquid crystal display device according to an embodiment of the present invention
  • FIG. 2 is a schematic diagram of the liquid crystal display device.
  • the liquid crystal display device 1 includes a liquid crystal panel 10 as a display member, a driving device 80 for the liquid crystal panel 10, and a backlight device 70 that irradiates the liquid crystal panel 10. In other words, it is a so-called transmissive liquid crystal display device. In FIG. 2, etc., the backlight device 70 is omitted.
  • the liquid crystal panel 10 is roughly divided into a display area 11 in which the sub-pixels 13 are arranged and a non-display area 12 that is an area other than the display area 11.
  • the non-display area 12 is provided so as to surround the display area 11 in a plan view of the liquid crystal panel 10.
  • the display area 11 and the non-display area 12 are not only a two-dimensional area in a plan view of the liquid crystal panel 10, but also the two-dimensional area facing the thickness direction of the liquid crystal panel 10, that is, a TFT substrate 20 described later. It also refers to the three-dimensional area of the liquid crystal panel 10 that is projected and grasped in the stacking direction of the substrates 40 (see Fig. 4).
  • each sub-pixel 13 has one of four colors of red (R), green (G), blue (B), and white (W), that is, one of the four colors.
  • Display color In the figure, “R” indicates that the display color of the sub-pixel 13 is red, and similarly “G”, “B”, and “W” are green, blue, and white, respectively.
  • the plurality of subpixels 13 are aligned in each of the first direction dl and the second direction d2 orthogonal to each other, that is, two-dimensionally arranged in a matrix.
  • the first direction dl is directed to the screen of the liquid crystal panel 10 in the row direction (horizontal direction)
  • the second direction d2 is directed to the screen in the column direction (vertical direction).
  • red (R), green (G), blue (B), and white (W) sub-pixels 13 are repeatedly arranged in this order, that is, these four colors are one unit. As shown, sub-pixels 13 of each color are repeatedly arranged. Then, sub-pixels 13 of the same color are arranged in the second direction d2. It should be noted that the four-color sub-pixels 13 arranged in succession in the first direction dl are pixels 14 as one unit for color display. In FIG. 2, one pixel 14 is surrounded by a thick line for the sake of explanation. The same applies to FIGS. 12 to 14 described later.
  • the liquid crystal panel 10 includes a TFT (Thin Film Transistor) substrate 20, a counter substrate 40 disposed opposite to the TFT substrate 20, and a liquid crystal sealed between the TFT substrate 20 and the counter substrate 40. Includes 50 and.
  • TFT substrate is also called a TFT array substrate, an array substrate, an active substrate, a matrix substrate, an active matrix substrate, or the like.
  • the TFT substrate 20 includes a transparent insulating substrate 21, a circuit layer disposed on the transparent insulating substrate 21, and an alignment film 28 disposed on the circuit layer. Is included.
  • the circuit layer described above includes the signal line 22, the scanning line 23, the TFT 24, the subpixel electrode 25, the auxiliary capacitance line 26, and the insulating layer 27.
  • the TFT 24 operates as a switching element and includes a semiconductor layer 24c and a drain electrode 24d.
  • the insulating layer 27 insulates the signal line 22, the scanning line 23, the semiconductor layer 24c, the drain electrode 24d, the sub-pixel electrode 25, and the auxiliary capacitance line 26 so as to form a predetermined circuit.
  • the sub-pixel electrode 25 is indicated by a broken line in order to make the drawing easy to see.
  • each signal line 22 extends in the second direction d2 in the display region 11, and the plurality of signal lines 22 are arranged in the first direction dl in the display region 11.
  • a plurality of scanning lines 23 are provided so as to intersect these signal lines 22 vertically (three-dimensional intersection). That is, each scanning line 23 extends in the first direction dl in the display area 11, and these scanning lines 23 are arranged in the second direction d 2 in the display area 11.
  • a TFT 24 is provided at each intersection of the signal line 22 and the running line 23. Near the intersection, the protruding portion of the signal line 22 forms the source electrode 24a of the TFT 24, and the protruding portion of the scanning line 23 forms the gate electrode 24b of the TFT 24.
  • a semiconductor layer 24c is disposed so as to face the gate electrode 24b, and a portion of the insulating layer 27 between the semiconductor layer 24c and the gate electrode 24b forms a gate insulating film.
  • a source electrode 24a and a drain electrode 24d of the TFT 24 are electrically connected to the semiconductor layer 24c.
  • the gate electrode 24b is located between the source electrode 24a and the drain electrode 24d.
  • the drain electrode 24d is connected to the scanning line 2
  • the auxiliary capacitor line 26 is arranged between the three layers and extends in the first direction dl, and is connected to the sub-pixel electrode 25 through the through hole 27a of the insulating layer 27.
  • the sub-pixel electrode 25 is disposed in a region partitioned by the signal line 22 and the scanning line 23, and is close to the signal line 22 and the scanning line 23 at this time.
  • the subpixel electrode 25 is disposed on the insulating layer 27, and the alignment film 28 is disposed on the insulating layer 27 so as to cover the subpixel electrode 25.
  • the counter substrate 40 includes a transparent insulating substrate 41, a color filter 42, a light shielding layer 43, a transparent electrode 44, and an alignment film 45, as shown in FIG.
  • a counter substrate having a color filter is also called a color filter substrate or the like.
  • the color filter 42 is disposed on the transparent insulating substrate 41 so as to face the subpixel electrode 25 of the TFT substrate 20 described above, and the display color of the subpixel 13 is determined by the color of the color filter 42. . That is, when the color filter 42 colors the light emitted from the backlight device 70 (see FIG. 1), display colors of red (R), green (G), blue (B), and white (W) can be obtained. . When the color of light emitted from the knocklight device 70 is the same as white (W) as the display color, the color filter 42 may not be provided for the white (W) sub-pixel 13.
  • a light shielding layer 43 is provided in a mesh shape so as to pass between adjacent color filters 42, in other words, so as to face (overlap) the signal line 22 and the scanning line 23 of the TFT substrate 20. ing.
  • the light shielding layer 43 is hatched for easy viewing of the drawing.
  • the light shielding layer 43 has a shape that also overlaps the TFT 24, and the non-display area 12 has a frame-like portion (not shown) surrounding the display area 11.
  • a transparent electrode 44 is disposed so as to cover the color filter 42 and the light shielding layer 43, and the transparent electrode 44 extends over the entire display region 11.
  • An orientation film 45 is disposed on the transparent electrode 44.
  • the TFT substrate 20 and the counter substrate 40 are arranged so that the alignment film 28 and the alignment film 45 face each other, and a liquid crystal 50 is sealed in a gap between the TFT substrate 20 and the counter substrate 40.
  • a polarizing plate 29 and a polarizing plate 49 are arranged on the outer surfaces of the TFT substrate 20 and the counter substrate 40, respectively.
  • a backlight device 70 is arranged on such a liquid crystal panel 10 so that light is irradiated on the TFT substrate 20 side (see FIG. 1).
  • the structures illustrated in FIGS. 3 and 4 are merely examples, and other switching elements such as a MIM (Metal Insulator Metal) element may be used instead of TFT24.
  • Filter ON • Color filter 42 may be provided on the TFT substrate 20 side like a TFT substrate.
  • the subpixel 13 includes a subpixel electrode 25, a TFT 24, a power color filter 42, and a portion of the transparent electrode 44 that faces the subpixel electrode 25.
  • the sub-pixel electrodes 25 are alternately arranged with the signal lines 22 in the first direction dl.
  • the sub-pixel electrode 25 is connected to the adjacent signal line 22 (left side in FIG. 5) via the TFT 24, and the gate electrode 24b of the TFT 24 is connected to the adjacent scanning line 23 (lower side in FIG. 5). Yes. With such a connection form, the sub-pixel 13 is connected to the signal line 22 and the scanning line 23.
  • a plurality of subpixels 13 arranged in the second direction d2 are connected to one signal line 22, and a plurality of subpixels 13 arranged in the first direction dl are connected to one scanning line 23. It is connected. Note that such a connection form of the sub-pixel electrode 25, the signal line 22 and the scanning line 23 is illustrated in a simplified manner in FIG. 2, and the same illustration method is used in the drawings described later. .
  • each signal line 22 and the scanning lines 23 further extend to the non-display area 12 while maintaining the arrangement order in the display area 11.
  • the ends of each signal line 22 and each scanning line 23 in the non-display area 12 form an input end of the liquid crystal panel 10, and each input end is connected to the driving device 80 via a wiring 88.
  • the drive device 80 includes a source driver 81, a gate driver 82, and a control unit 83.
  • the source driver 81 is a device that outputs a drive signal S6 to be applied to each signal line 22, and includes a plurality of individual drivers 81a provided in parallel.
  • the individual drivers 81a are numbered or numbered, and in the drawing, the individual drivers 81a are shown in the order of the numbers, and here, the numbers are numbered 1, 2,... From the left side of the drawing.
  • the output terminal of the individual driver 81a is connected to the signal line 22 of the TFT substrate 20 via the wiring 88, whereby the drive signal S6 output from the individual driver 81a is applied to the signal line 22.
  • the number of pieces of dummy data received from the control unit 83 As will be described later, in the embodiment of the present invention, the number of pieces of dummy data received from the control unit 83.
  • the wiring 88 of the separate driver 81a is not connected to the signal line 22.
  • the output timing of the scanning signal S5 is controlled by the gate driver control signal S3 output from the control unit 83.
  • the source driver 81 is formed on a film-like flexible substrate 85 as a so-called COF (Chip On Film) structure as shown in the plan view of the flexible substrate on which the source driver of FIG. 6 is formed.
  • the input terminal 86 for receiving a signal from the control unit 83 and the output terminal 87 for outputting a signal to the signal line 22 are connected by a wiring 88.
  • the signal line 22 is connected to the input terminal 20a provided so as to be exposed at the end of the TFT substrate 20 for receiving the signal from the source driver 81. Connected with 20b. In FIG. 7, the other components of the circuit layer are not shown.
  • the source driver 81 may be replaced with the flexible substrate 85 and may have a TAB (Tape Automated Bonding) structure formed on a tape. Further, the source driver 81 may have a COG (Chip On Glass) structure provided on the TFT substrate 20, and the source driver 81 and the control unit 83 may be connected by wiring provided on the flexible substrate.
  • TAB Pear Automated Bonding
  • COG Chip On Glass
  • the wiring 88 or 20b of the individual driver 8 la that is not connected to the signal line 22 may be interrupted on the flexible board 85 as shown in FIG. Even if it is broken on the TFT substrate 20. If it is assumed that there is an interruption on the flexible substrate 85, the TFT substrate 20 has a conventional structure in which all wiring 20b on the TFT substrate 20 connects the input terminal 20a and the signal line 22 without changing the design. Available . On the other hand, when it is assumed that there is an interruption on the TFT substrate 20, the conventional structure in which all the wirings 88 on the flexible substrate 85 connect the individual driver 81a and the output terminal 87 can be used without changing the design.
  • the conventional structure can be used as a flexible substrate if the wiring 20b is cut off on the TFT substrate 20.
  • the wiring 88 or 20b that does not connect the signal line 22 and the individual driver 81a may be omitted completely or may be omitted.
  • the gate driver 82 is a device that outputs a scanning signal S5 applied to each scanning line 23.
  • it is connected to the scanning line 23 of the liquid crystal panel 10 through the wiring described above.
  • the scanning signal S5 from the gate driver 82 is applied to the scanning line 23.
  • the output timing of the scanning signal S5 is controlled by a gate driver control signal S3 output from the control unit 83.
  • FIG. 8 shows a more specific block diagram of the control unit.
  • the control unit 83 includes a data generation unit 83a and a timing control unit 83b.
  • the data generator 83a obtains red (R), green (G) and blue (B) data rO, gO, bO and a clock signal CK of the display image, and from these three color data r0, gO and bO.
  • White (W) gradation data (gradation data string) W0 is generated and output.
  • the data generation unit 83a uses the above three-color data r0, gO, and bO for the gradation data of red (R), green (G), and blue (B) so as to suit the color display characteristics of the liquid crystal panel 10. (Gradation data string) Convert to R0, GO and BO and output. Further, the data generation unit 83a generates and outputs a dummy data string DO for the individual driver 81a that is not connected to the signal line 22 described above. This dummy data string DO has nothing to do with the display image data r0, g0, bO.
  • the timing control unit 83b acquires the synchronization signal and the clock signal CK, and generates and outputs the control signal S2 for the source driver 81 and the control signal S3 for the gate driver 82 based on the synchronization signal.
  • the timing control unit 83b generates and outputs a control signal S4 (trigger signal indicating the start and end of operation) for the data generation unit 83a.
  • the source driver 81 sequentially receives the data R0, G0, B0, WO and DO! /, And when the data R0, G0, B0, WO and DO for all the signal lines 22 are obtained, In synchronization with the selection timing of the scanning line 23 by the gate driver 82, the respective drive signals S6 are simultaneously applied to all the signal lines 22.
  • the control unit 83 and the source driver 81 in the liquid crystal display device 1 The process will be described more specifically.
  • the individual driver 81a in FIG. 9 the individual driver 81a has the above-mentioned numbers, and the gradation data XI to X20 are sequentially input (in the drawing, the left force is also in the first direction dl). It shall be received.
  • the source driver 81 has gradation data (data string) RO, GO, BO, WO, dummy.
  • Data (data string) D0, sync signal SI and clock signal CK are received.
  • the gradation data string RO is a data string composed of gradation data Rl, R2, R3,... Synchronized with the rising edge of the clock signal CK.
  • the tone data ⁇ R1, R2, R3,... Are data relating to the gradation of the red (R) sub-pixel 13 in the first, second, third,.
  • the gradation data strings GO, BO, and WO are data strings relating to the gradation of the sub-pixel 13 of green (G), blue (B), and white (W), respectively, and the gradation data strings G0, B0, And the data structure of WO is the same as the above-mentioned gradation data string R0.
  • the dummy data string DO is a data string composed of dummy data Dl, D2, D3,... That are unrelated to the gradation data strings R0, G0, BO, and WO.
  • the four gradation data Rl, Gl, B1, and Wl make up display data for one pixel 14.
  • the gradation data strings R0, G0, BO and WO for each color and the dummy data string DO are transmitted in parallel from the control unit 83 in synchronization with the clock signal CK. For this reason, the source driver 81 receives a parallel data sequence DA composed of five data sequences R0, G0, B0, WO and DO.
  • the source driver 81 generates the drive signal S6 based on the received data strings RO, GO, BO, WO, and DO.
  • the source driver 81 uses the gradation data Rl, R2, R3, and R4 in the data string RO from the head as the gradation data 1, 6, 11 16 is supplied to the first, sixth, eleventh and sixteenth individual drivers 81a (see FIG. 9).
  • the source driver 81 receives the gradation data Gl, G2, G3, and G4 in the data string GO as gradation data X2, X7, XI 2 and XI 7 from the head, and the second, seventh,
  • the grayscale data Bl, B2, B3 and B4 in the data string BO are received as grayscale data X3, X8, X13 and X18 from the top, respectively.
  • the grayscale data W1, W2, W3 and W4 in the data string WO are supplied to the eighth, thirteenth and eighteenth individual drivers 8 la, respectively, and the grayscale data X4, X9, X14 and XI 9 from the beginning And supply to the 4th, 9th, 14th and 19th individual drivers 8 la respectively.
  • the signal line 22 is not connected to the wirings of the fifth, tenth, fifteenth and twentieth individual drivers 8 la.
  • the individual driver 81a receives dummy gradation data X5, X10, XI5, and X20 supplied from the source driver 81 based on the dummy data string DO received from the control unit 83.
  • the data string DO is independent of the gradation data strings RO, GO, BO, and WO, and does not affect the image displayed on the liquid crystal panel 10.
  • the source driver 81 is a general-purpose driver configured such that the individual driver 81a performs dot inversion driving, and the gradation data XI, X2, X3, etc. received as described above Is output as either “+ (plus or positive)” drive signal S6 or “ ⁇ (minus or negative)” drive signal S6, and adjacent individual driver 81a outputs drive signal S6 of opposite polarity To do. Then, the drive signal S6 is applied to all the signal lines 22 in synchronization with the selection timing of the scanning line 23 by the gate driver 82. With the next drive signal S6, gradation data of the same number is used so as to perform dot inversion drive. Is output as the opposite polarity of the previous polarity.
  • the drive signal S6, in other words, the gradation data RO, GO, BO and WO are applied to the sub-pixel electrode 25 via the TFT 24 connected to the signal line 22 and the selected scanning line 23, As a result, 13 pixels are supplied.
  • the subpixel 13 is supplied with a voltage (potential) having a magnitude corresponding to the gradation data RO, GO, BO, or WO and having a “+” polarity or a “” polarity, and the next signal is applied to this voltage. Hold until For this reason, the polarity of the subpixel 13 is expressed by the polarity of the voltage applied to the subpixel electrode 25.
  • the “+” subpixel 13 means that the polarity of the subpixel electrode 25 of the subpixel 13 is “+”. Note that the polarities of the drive signal S6, the subpixel electrode 25, and the subpixel 13 are defined based on the potential of the transparent electrode 44.
  • FIG. 13 shows a case where only the red (R) sub-pixel 13 is displayed, and the sub-pixel 13 is hatched.
  • the display colors red (R), green (G), blue (B), and white (W)
  • the polarity is shown in the lower right as an example. Yes.
  • the sub-pixels 13 are 6 rows and 16 columns, the signal lines 22 are 16, and the individual drivers 81a are 20 is illustrated.
  • the signal lines 22 are divided into signal line groups 22a every four consecutive lines in the display area 11. Then, the red (R) sub-pixel 13 is connected to the first signal line 22 in each signal line group 22a (here, the first from the left in the first direction dl). Green (G), blue (B), and white (W) sub-pixels 13 are connected to the second to fourth signal lines 22 in the line group 22a, respectively. Such a connection form is the same for each row in the liquid crystal panel 10.
  • five individual drivers 81a that is, four that are the number of signal lines 22 belonging to the signal line group 22a are four, and one that is the number of individual drivers 8 la that receive the dummy data string).
  • the individual driver group 81b and the signal line group 22a have a one-to-one correspondence.
  • the signal lines 22 further extend to the non-display area 12 while maintaining the arrangement order in the display area 11, so the first (here, the first direction)
  • the individual driver 81a (first from the left in dl) is connected in the non-display area 12 to the signal line 22 arranged first in the non-display area 12 via the wiring 88.
  • This signal line 22 is displayed. Even in region 11, it is arranged first. Therefore, the first individual driver 81a in each individual driver group 81b outputs the drive signal S6 for the red (R) subpixel 13. Similarly, the second force in the individual driver group 81b and the fourth individual driver 81a are connected to the signal line 22 arranged first in the non-display area 12 and the display area 11, and are connected to green (G ), Blue (B) and white (W) sub-pixel 13 drive signals S6 are output. In addition, since the fifth individual driver 81a is not connected to the signal line 22 that outputs the dummy drive signal S6, the display on the liquid crystal panel 10 is not affected. In the figure, the color of the drive signal S6 output at the upper left in each individual driver 81a is shown, and the polarity of the drive signal S6 output at the lower right is shown. The dummy drive signal is indicated by D.
  • the source driver 81 outputs a drive signal S6 in which the first individual driver 8 la of the first and third, that is, odd-numbered individual driver groups 8 lb is “+”.
  • the first individual driver 81a of the second and fourth, that is, even-numbered individual driver group 81b is configured to output a "one" drive signal S6.
  • the first individual driver 8 la of the odd-numbered individual driver group 8 lb outputs the drive signal S6 of “-”
  • the first individual driver 81a of the even-numbered individual driver group 81b is “ + "Drive It is configured to output signal S6.
  • the polarities of the sub-pixels 13 of the same color arranged in the first direction dl are odd
  • the sub-pixel 13 connected to the signal line group 22a may be different from the sub-pixel 13 connected to the signal line group 22a connected to the even-numbered signal line group 22a.
  • the “+” subpixel and the “one” subpixel have the same number for the subpixel 13 of the same color. Mixed (distributed) in a one-to-one ratio in one-way dl.
  • the signal line group 22a is defined for every eight continuous lines in the display region 11 of the signal lines 22, that is, for every two pixels 14.
  • the above-described configuration is applied to the case where the individual driver group 81b is defined for every nine consecutive drivers, and one of the individual driver groups 81b is not connected to the sub-pixel 13 and receives dummy grayscale data. It's okay.
  • the 19th and 20th individual drivers 8 la that do not belong to the individual driver group 8 lb also receive dummy gradation data.
  • a signal line group 22a is defined for each number of natural multiples, and this signal line group 22a is configured.
  • the above effect can also be obtained when it is sufficient to define the individual driver group 81b for each m of the signal lines 22 plus 1 and apply the above configuration.
  • the same effect of reducing the horizontal stripe pattern can be obtained when an even number of subpixels constituting one pixel are arranged in the first direction dl, that is, when n is an even number. It is done. Examples of such pixels are shown in FIGS. 15A and 15B.
  • FIG. 15A and FIG. 15B are examples of pixels in which an even number of sub-pixels 13 constituting one pixel are arranged in the first direction dl. When n is an odd number, horizontal stripes do not occur when only one color subpixel is displayed.
  • FIG. 15A shows a pixel composed of six subpixels 13 of red (R), green (G), blue (B), yellow (Y), magenta (M), and cyan (C).
  • R red
  • G green
  • B blue
  • Y yellow
  • M magenta
  • C cyan
  • the arrangement of the individual drivers 8 la not connected to the signal line 22 is not limited to the m-th left end force in the first direction dl. m 1) It is also possible to start the arrangement from the deviation and place every mth force.
  • the fourth, ninth, fourteenth, and nineteenth individual drivers 81a are not shown connected to the signal line 22, and are shown in this case.
  • a plurality of flexible boards 85 provided with source drivers 81 are arranged in a line in the first direction dl, and a plurality of flexible boards 85 are connected to the liquid crystal panel 10.
  • Each source driver 81 is connected to a control unit 83 (not shown in FIG. 17).
  • the individual driver 8 la that receives dummy data
  • a method in which the individual driver 8 la is biased in one direction in the first direction d 1 and a method in which the entire driver is distributed in an average manner are cited.
  • an individual driver 81a that is not connected to the signal line 22 is arranged every fifth left end force of the individual driver 81a.
  • the individual driver 81a that is not connected to the signal line 22 is arranged from the left end to the 640th.
  • the individual driver 81a that is not connected to the signal line 22 is arranged only in the first and second source drivers 81 from the left end, and from the left end of the pixels 14 to the 160th column in the liquid crystal panel 10. The occurrence of horizontal stripes can be greatly reduced. But the rest is horizontal stripes The pattern cannot be reduced.
  • the left side force of the source driver 81 in the first direction dl is also set to sdl, sd2,... Sdl l in order, and the individual driver 81a of each source driver 81 is also set to Tl, ⁇ 2,.
  • the individual driver 8 la that is not connected to the signal line 22 is every 33rd in the source driver sdl, that is, every 11th of T33, T66,.
  • sd4 has ⁇ 3, ⁇ 36,... ⁇ ⁇ 366, twelve, sd5 has ⁇ 15, ⁇ 48,... ⁇ ⁇ 378, twelve, sd6 has ⁇ 27, ⁇ 60, ..., ⁇ 357, eleven, sd7 has ⁇ 6 , ⁇ 39, ⁇ , ⁇ 369 12 pieces, sd8 ⁇ 18, ⁇ 51, " ⁇ 381 12 pieces, d sd9 ⁇ 30, ⁇ 63, ... ⁇ 11360 11 pieces, sdlO ⁇ 9, ⁇ 42, ... ⁇ ⁇ 372 12 pieces In sdl l, there are 12 pieces of ⁇ 21, ⁇ 54,... ⁇ ⁇ 384, and the total is 128 pieces.
  • the individual driver 81a not connected to the signal line 22 may be started every T1 to T32 instead of starting from T33 of the source driver sdl, and may be arranged every 33rd.
  • the number of signal lines 22 is a
  • the number of individual drivers 81a per source driver 81 is b
  • the number of source drivers 81 is c
  • the first direction of the sub-pixel 13 constituting one pixel 14 is the first direction.
  • n be the number arranged in dl.
  • the pixels 14 are arranged in aZn columns in the first direction dl, and there are b ⁇ c ⁇ a surplus individual drivers 81a.
  • the individual drivers 81a that are not connected to the signal lines 22 are arranged every g from the left end of the pixel 14.
  • floor (x) is a function called a floor function, and returns a maximum integer not exceeding X, that is, a maximum integer less than or equal to X.
  • the arrangement of the individual driver 81a not connected to the signal line 22 is not limited to every m-th left end force in the first direction dl, and the first to (m-1) th from the left end of the first direction dl Arrangement may be started from either position and arranged every mth force.
  • the present invention can be applied to a liquid crystal display device in which one pixel has four or more subpixel forces.

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Abstract

The present invention can be applied to a liquid crystal display device in which one pixel is formed by four or more sub pixels and dot-reversed display is performed. In a source driver (81) having individual drivers (81a), an adjacent individual driver (81a) outputs a signal (S6) of a different polarity. On a liquid crystal panel (10), pixels (14) each formed by four sub pixels (13): red (R), green (G), blue (B), and white (W) arranged in the same order are arranged on a plane. A signal line (22) is arranged in each column of the pixels (14). The individual drivers (81a) are connected to the signal lines (22) by wires (88). However, for every five individual drivers (81a), there is a wire (88) which is not connected to the signal line (22). Thus, it is possible to reduce the horizontal stripes generated when only one-color sub pixels are displayed and improve the display quality of the liquid crystal display device.

Description

明 細 書  Specification
液晶表示装置  Liquid crystal display
技術分野  Technical field
[0001] 本発明は、液晶表示装置に関し、特に 1個の画素が 4個以上の副画素力 なる液 晶表示装置に関する。  The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device in which one pixel has four or more subpixel forces.
背景技術  Background art
[0002] 液晶表示装置は薄型で低消費電力であるため、パーソナルコンピュータ等の OA 機器、電子手帳や携帯電話機等の携帯情報端末機器、カメラ一体型 VTR、テレビ 等に広く用いられている。  [0002] Since liquid crystal display devices are thin and have low power consumption, they are widely used in office automation equipment such as personal computers, portable information terminal devices such as electronic notebooks and mobile phones, camera-integrated VTRs, and televisions.
[0003] 図 18に従来の液晶表示装置に用いられている液晶パネルの模式図を示す。液晶 パネル 110では、副画素 113がマトリクス配列されている。行方向(図面横方向)には 赤 (R)、緑 (G)および青(B)の 3色の副画素 113がこの順序で繰り返し並んでおり、 列方向(図面縦方向)には同色の副画素 113が並んでいる。 1個の画素 114は、連 続して並ぶ 3色の副画素 113によって構成される。副画素 113が 3色の液晶パネル 1 10を備えた液晶表示装置では、白色を表示する際に R、 G、 Bの 3色を同時に表示さ せるが、フィルタによって光が吸収されるため高輝度を得ることが難しぐ色温度の制 御が難し力つた。  FIG. 18 shows a schematic diagram of a liquid crystal panel used in a conventional liquid crystal display device. In the liquid crystal panel 110, the sub-pixels 113 are arranged in a matrix. In the row direction (horizontal direction in the drawing), sub-pixels 113 of red (R), green (G), and blue (B) are repeatedly arranged in this order, and the same color in the column direction (vertical direction in the drawing). Sub-pixels 113 are arranged. One pixel 114 is composed of three-color sub-pixels 113 arranged in series. In a liquid crystal display device in which the subpixel 113 has a liquid crystal panel 110 with three colors, when displaying white, the three colors R, G, and B are displayed simultaneously. It was difficult to control the color temperature, which is difficult to obtain.
[0004] そのため、赤 (R)、緑 (G)および青(B)にカ卩えて白(W)の副画素を設け、白色の輝 度を独立して制御できるようにした液晶表示装置が提案されて 、る。図 19に 1個の画 素が 4色の副画素からなる液晶パネル 210の模式図を示す。液晶パネル 210では、 図 18の液晶パネル 110と同様に副画素 213がマトリクス配列されている力 赤 (R)、 緑 (G)および青(B)の副画素 213に加えて白(W)の副画素 213が設けられている。 具体的には、行方向に白(W)、赤 (R)、緑 (G)および青 (B)の 4色の副画素 213がこ の順序で繰り返し並んでおり、列方向には同色の副画素 213が並んでいる。 1個の 画素 214は、連続して並ぶ 4色の副画素 213によって構成される。  [0004] Therefore, there is a liquid crystal display device in which white (W) sub-pixels are provided in addition to red (R), green (G), and blue (B) so that the brightness of white can be controlled independently. Proposed. FIG. 19 shows a schematic diagram of a liquid crystal panel 210 in which one pixel is composed of four subpixels. In the liquid crystal panel 210, in the same manner as the liquid crystal panel 110 in FIG. 18, the power of red (R), green (G), and blue (B) is added to white (W) in addition to the subpixels 213 arranged in a matrix. A sub-pixel 213 is provided. Specifically, four sub-pixels 213 of white (W), red (R), green (G), and blue (B) are repeatedly arranged in this order in the row direction, and the same color in the column direction. Sub-pixels 213 are arranged. One pixel 214 is composed of four sub-pixels 213 arranged continuously.
[0005] また、液晶表示装置においてフリツ力やクロストークを防止するために、縦方向およ び横方向に隣接する画素(副画素)の極性を反転させる駆動、 ヽゎゆるドット反転駆 動を行うソースドライバが用いられている。図 18および図 19では、ドット反転駆動を行 う液晶パネルを示しており、図中にお 、て副画素 13中に記した「 +」および「一」はそ の副画素 213の電極の電圧の極性を表している。 In addition, in order to prevent flicking force and crosstalk in a liquid crystal display device, driving that inverts the polarities of pixels (sub-pixels) adjacent in the vertical and horizontal directions, and so-called dot inversion driving. A source driver is used. 18 and 19 show a liquid crystal panel that performs dot inversion driving. In the figure, “+” and “one” shown in the subpixel 13 indicate the voltage of the electrode of the subpixel 213. Represents the polarity.
[0006] 4色の副画素を備えた液晶表示装置は例えば特許文献 1に、ドット反転表示を行う 液晶表示装置は例えば特許文献 2に示されている。 [0006] A liquid crystal display device having four color sub-pixels is disclosed in Patent Document 1, for example, and a liquid crystal display device that performs dot inversion display is disclosed in Patent Document 2, for example.
特許文献 1 :特開平 11— 295717号公報 (第 5頁、図 1)  Patent Document 1: JP-A-11-295717 (Page 5, Figure 1)
特許文献 2 :特開 2003— 295157号公報 (第 5頁、図 1)  Patent Document 2: Japanese Patent Laid-Open No. 2003-295157 (Page 5, Figure 1)
発明の開示  Disclosure of the invention
発明が解決しょうとする課題  Problems to be solved by the invention
[0007] しかし、 4色の副画素を備えた液晶表示装置では、従来のドット反転駆動を行うソー スドライバを用いて特許文献 2で提案されたようなドット反転表示をすると、 1色の副画 素だけを用いた単色表示をさせた場合に縞模様が現れるという問題がある。この点 について、図 20および図 21を参照して説明する。  However, in a liquid crystal display device having four color sub-pixels, when dot inversion display as proposed in Patent Document 2 is performed using a conventional source driver that performs dot inversion driving, one color sub-pixel is displayed. There is a problem that a striped pattern appears when monochrome display using only pixels is performed. This point will be described with reference to FIG. 20 and FIG.
[0008] 図 20および図 21には、液晶パネル 110および 210において、赤(R)の副画素 113 および 213のみを表示させた場合を図示して!/、る。表示させて!/、な!/、副画素 113お よび 213にはハッチングを施して!/、る。図 20に示すように副画素 113力 3色の液晶パ ネル 110では、単色表示時にお!、て行方向に「 +」および「 」の副画素 113が交互 に並ぶ。すなわちドット反転駆動の状態が維持されるため、液晶パネル 110の表示 は良好である。  FIGS. 20 and 21 illustrate cases where only the red (R) subpixels 113 and 213 are displayed on the liquid crystal panels 110 and 210. Display! /, NA! /, And subpixels 113 and 213 should be hatched! /. As shown in FIG. 20, in the three-color liquid crystal panel 110 with sub-pixels 113, “+” and “” sub-pixels 113 are alternately arranged in the row direction during single color display. That is, since the dot inversion driving state is maintained, the display on the liquid crystal panel 110 is good.
[0009] 一方、副画素 213力 色の液晶パネル 210では、図 21に示すように行方向に同じ 極性の副画素 213が並ぶ。このように同じ極性の副画素 213が行方向に揃うと、行方 向に延びた縞模様、すなわち図 21において横縞模様が現れる。この問題は、副画 素が 4色の場合に限らず、偶数色の場合について同様である。  On the other hand, in the sub-pixel 213 color liquid crystal panel 210, as shown in FIG. 21, sub-pixels 213 having the same polarity are arranged in the row direction. When the sub-pixels 213 having the same polarity are aligned in the row direction in this way, a stripe pattern extending in the row direction, that is, a horizontal stripe pattern appears in FIG. This problem is not limited to the case where the sub-pixels are four colors, but the same is true for even-numbered colors.
課題を解決するための手段  Means for solving the problem
[0010] そこで本発明は、ドット反転駆動が可能なソースドライバを用いて 1色の副画素だけ を用いた単色表示をした場合でも縞模様が現れな!/、高品位の表示が可能な、 4色以 上の偶数色の副画素を備えた液晶表示装置を提供することを目的とする。  [0010] Therefore, according to the present invention, a striped pattern does not appear even when a single color display using only one sub-pixel is performed using a source driver capable of dot inversion driving! /, And high-quality display is possible. An object of the present invention is to provide a liquid crystal display device having even-numbered sub-pixels of four or more colors.
[0011] 上記目的を達成するために本発明は、平面状に配置された、異なる色のカラーフィ ルタを備えた複数の副画素力 なる画素と、前記副画素の各列に配置された信号線 とを有する液晶パネルと、前記信号線に接続された配線を介して前記画素に信号を 送信し、液晶パネルの表示駆動を行う個別ドライバを複数有するソースドライバとを 備えた液晶表示装置にお!、て、前記画素が前記信号線の配置された方向に平行な 方向に偶数である n個配置された副画素力 なり、前記画素の各々において前記副 画素の配置が同一であり、隣接する前記ソースドライバの出力の極性が異なるもので あり、前記個別ドライバが nの任意の自然数倍に 1を加えた m個ごとに前記配線との 接続が省略され、前記信号線と接続されていないことを特徴とする。この構成〖こよると 、ある 1色のカラーフィルタを備えた副画素のみを表示させる単色表示をした際に、 前記配線が省略された前記個別ドライバと隣接する前記個別ドライバに接続された 前記副画素を有する前記画素では極性が反転する。 [0011] In order to achieve the above object, the present invention provides a color image of different colors arranged in a plane. A signal is transmitted to the pixel through a liquid crystal panel having a plurality of sub-pixel power pixels provided with a filter, a signal line disposed in each column of the sub-pixel, and a wiring connected to the signal line. And a liquid crystal display device comprising a source driver having a plurality of individual drivers for driving the display of the liquid crystal panel, wherein n pixels are evenly arranged in a direction parallel to the direction in which the signal lines are arranged The sub-pixel force is the same, the arrangement of the sub-pixels is the same in each of the pixels, the polarities of the outputs of the adjacent source drivers are different, and the individual driver is an arbitrary natural number multiple of n 1 The connection with the wiring is omitted for every m added, and is not connected with the signal line. According to this configuration, when a single color display is performed in which only a sub-pixel including a certain color filter is displayed, the sub-driver connected to the individual driver adjacent to the individual driver in which the wiring is omitted is provided. The polarity is reversed in the pixels having pixels.
[0012] また本発明は、上記構成の液晶表示装置において、前記 mが一定であることを特 徴とする。 The present invention is also characterized in that, in the liquid crystal display device having the above configuration, the m is constant.
[0013] また本発明は、上記構成の液晶表示装置において、前記信号線を a本、 1個の前 記ソースドライバの有する前記個別ドライバを b個、ソースドライバを c個備え、前記 m が111 = 11 £1001:( (&711) 7 ^ (:一&) ) + 1でぁることを特徴とする。ここで、 floor (x )は床関数と呼ばれる関数であり、 Xを越えない最大の整数、つまり X以下の最大の整 数を返す関数である。 [0013] Further, the present invention provides the liquid crystal display device having the above-described configuration, wherein the signal line includes a, the source driver includes b individual drivers and the source driver includes c source drivers, and the m is 111. = 11 £ 1001 :: ((& 711) 7 ^ ( : One &)) + 1. Here, floor (x) is a function called a floor function, and is a function that returns a maximum integer not exceeding X, that is, a maximum integer less than or equal to X.
[0014] また本発明は、上記構成の液晶表示装置において、前記 nが 4であり、前記 mが 5 であることを特徴とする。  In the liquid crystal display device having the above-described configuration, the present invention is characterized in that the n is 4 and the m is 5.
[0015] また本発明は、上記構成の液晶表示装置において、 1個の前記画素を構成する前 記副画素が前記信号線の配置された方向に垂直な方向に複数個配置されて 、るこ とを特徴とする。 Further, according to the present invention, in the liquid crystal display device having the above-described configuration, a plurality of the sub-pixels constituting one pixel are arranged in a direction perpendicular to the direction in which the signal lines are arranged. And features.
[0016] また本発明は、上記構成の液晶表示装置において、 1個の前記画素を構成する前 記副画素が、赤、緑、青または白の前記カラーフィルタを備えた 4個であることを特徴 とする。  According to the present invention, in the liquid crystal display device having the above configuration, the sub-pixels constituting one of the pixels are four including the color filters of red, green, blue, or white. Features.
[0017] また本発明は、上記構成の液晶表示装置において、前記ソースドライバと前記配線 力 Sフレキシブル基板上に設けられ、前記フレキシブル基板上で前記配線が省略され ていることを特徴とする。 In the liquid crystal display device having the above-described configuration, the present invention provides the source driver and the wiring force S on the flexible substrate, and omits the wiring on the flexible substrate. It is characterized by.
[0018] また本発明は、上記構成の液晶表示装置にお!、て、前記配線が前記液晶パネル 上に設けられ、前記液晶パネル上で前記配線が省略されて 、ることを特徴とする。  [0018] Further, the present invention is characterized in that the wiring is provided on the liquid crystal panel, and the wiring is omitted on the liquid crystal panel.
[0019] また本発明は、上記構成の液晶表示装置において、前記ソースドライバが前記液 晶パネル上に設けられて 、ることを特徴とする。 発明の効果  In the liquid crystal display device having the above-described configuration, the present invention is characterized in that the source driver is provided on the liquid crystal panel. The invention's effect
[0020] 本発明によると、 1色の副画素だけを用いた単色表示をした場合には、前記配線が 省略された前記個別ドライバと隣接する前記個別ドライバに接続された前記副画素 を有する前記画素では表示して 、る副画素の極性が反転するため、その部分での縞 模様の発生を抑制することができ、液晶表示装置の表示品位を向上させることができ る。  [0020] According to the present invention, in the case of performing monochromatic display using only one color sub-pixel, the sub-pixel connected to the individual driver adjacent to the individual driver in which the wiring is omitted is provided. Since the polarity of the sub-pixel displayed on the pixel is inverted, the occurrence of a striped pattern at that portion can be suppressed, and the display quality of the liquid crystal display device can be improved.
[0021] また本発明によると、信号線と接続されていない個別ドライバの間隔 mを一定とする ことにより、縞模様の発生を等間隔とすることができ、液晶表示装置の表示を見やす V、ものとすることができる。また、 m=n X floor ( (a/n) Z (b X c— a) ) + 1とすること により、縞模様の発生を液晶パネル全体に等間隔とすることができ、表示をより見や すいものとすることができる。さら〖こ、 n=4のとき m= 5とすること〖こより、液晶パネル全 体で隣接する同一色の副画素の極性が反転するため、縞模様の発生を全体に抑制 することができる。  In addition, according to the present invention, by making the interval m between the individual drivers not connected to the signal lines constant, the occurrence of stripes can be made equal, and the display on the liquid crystal display device can be easily viewed. Can be. In addition, by setting m = n X floor ((a / n) Z (b X c- a)) + 1, the occurrence of striped patterns can be evenly spaced throughout the liquid crystal panel, and the display can be seen more. It can be easy. Furthermore, since n = 4 and m = 5, the polarity of adjacent subpixels of the same color in the entire liquid crystal panel is inverted, so that the occurrence of striped patterns can be suppressed as a whole.
[0022] また本発明によると、ソースドライバと配線がフレキシブル基板上に設けられ、フレ キシブル基板上で配線が省略されて ヽるものとすること〖こより、液晶パネルを従来の 構成のものを使用することができる。  Further, according to the present invention, the source driver and the wiring are provided on the flexible substrate, and the wiring is omitted on the flexible substrate. Accordingly, the liquid crystal panel having the conventional configuration is used. can do.
[0023] また本発明によると、配線が液晶パネル上に設けられ、液晶パネル上で配線が省 略されているものとすることにより、ソースドライバと液晶パネルとを接続するフレキシ ブル基板などを従来の構成のものを使用することができる。 [0023] Further, according to the present invention, a wiring board is provided on a liquid crystal panel, and the wiring is omitted on the liquid crystal panel. The thing of the structure of can be used.
図面の簡単な説明  Brief Description of Drawings
[0024] [図 1]本発明の実施形態に力かる液晶表示装置の概略構成図 [0024] FIG. 1 is a schematic configuration diagram of a liquid crystal display device according to an embodiment of the present invention.
[図 2]本発明の実施形態に力かる液晶表示装置の模式図  FIG. 2 is a schematic diagram of a liquid crystal display device that is useful in an embodiment of the present invention.
[図 3]液晶パネルの部分平面図 [図 4]図 3の 4 4線における断面図 [Figure 3] Partial plan view of LCD panel [Fig.4] Sectional view along line 4-4 in Fig. 3
圆 5]本発明の実施形態に力かる液晶表示装置の詳細な模式図 [5] Detailed schematic diagram of a liquid crystal display device useful for an embodiment of the present invention
[図 6]本発明の実施形態にカゝかるフレキシブル基板の平面図  FIG. 6 is a plan view of a flexible substrate according to an embodiment of the present invention.
圆 7]本発明の実施形態にカゝかる TFT基板の部分平面図 [7] Partial plan view of a TFT substrate according to an embodiment of the present invention
[図 8]本発明の実施形態に力かる制御部のブロック図  FIG. 8 is a block diagram of a control unit that works according to an embodiment of the present invention.
圆 9]本発明の実施形態にかかる液晶表示装置の部分概略構成図 9] Partial schematic configuration diagram of the liquid crystal display device according to the embodiment of the present invention
[図 10]データ列のタイミングチャート  [Figure 10] Data string timing chart
[図 11]データ列の模式図  [Figure 11] Schematic diagram of data column
圆 12]本発明の実施形態に力かる液晶表示装置の模式図 圆 12] Schematic diagram of a liquid crystal display device useful for an embodiment of the present invention
[図 13]単色表示状態の、本発明の実施形態にかかる液晶表示装置の模式図 圆 14]本発明の実施形態の別の態様に力かる液晶表示装置の模式図 圆 15A]本発明の実施形態の別の態様に力かる画素の模式図  [FIG. 13] A schematic diagram of a liquid crystal display device according to an embodiment of the present invention in a monochromatic display state. 圆 14] A schematic diagram of a liquid crystal display device according to another aspect of an embodiment of the present invention. 圆 15A] Implementation of the present invention Schematic diagram of a pixel that works on another aspect of the form
圆 15B]本発明の実施形態の別の態様に力かる画素の模式図 [15B] Schematic diagram of a pixel that works in another aspect of the embodiment of the present invention
圆 16]本発明の実施形態の別の態様に力かる画素の模式図 圆 16] Schematic diagram of a pixel that works in another aspect of the embodiment of the present invention
圆 17]本発明の実施形態の別の態様に力かる液晶表示装置の模式図 圆 17] Schematic diagram of a liquid crystal display device according to another aspect of the embodiment of the present invention
[図 18]副画素が 3色である従来の液晶パネルの模式図  [Figure 18] Schematic diagram of a conventional liquid crystal panel with 3 sub-pixels
[図 19]副画素が 4色である従来の液晶パネルの模式図  [Figure 19] Schematic diagram of a conventional liquid crystal panel with 4 sub-pixels
[図 20]単色表示状態の、副画素が 3色である液晶パネルの模式図  [Fig.20] Schematic diagram of a liquid crystal panel with 3 sub-pixels in a single color display state
[図 21]単色表示状態の、副画素が 3色である液晶パネルの模式図 符号の説明  [Fig. 21] Schematic diagram of a liquid crystal panel with 3 sub-pixels in a single color display state.
1 液晶表示装置  1 Liquid crystal display
10 液晶パネル  10 LCD panel
13 副画素  13 Subpixel
14 画素  14 pixels
20b 配線  20b wiring
22 信号線  22 Signal line
42 カラーフィノレタ  42 Colorfinoleta
81 ソースドライバ 85 フレキシブル基板 81 Source driver 85 Flexible substrate
88 配線  88 Wiring
81a 個別ドライバ  81a Individual driver
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0026] 本発明の実施形態について図を用いて説明する。図 1は本発明の実施形態にかか る液晶表示装置の概略構成図、図 2は液晶表示装置の模式図である。 [0026] An embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a schematic configuration diagram of a liquid crystal display device according to an embodiment of the present invention, and FIG. 2 is a schematic diagram of the liquid crystal display device.
[0027] 図 1に示すように、液晶表示装置 1は、表示部材としての液晶パネル 10と、液晶パ ネル 10の駆動装置 80と、液晶パネル 10を照射するバックライト装置 70とを含んでお り、いわゆる透過型の液晶表示装置である。なお、図 2等ではバックライト装置 70を省 略している。 As shown in FIG. 1, the liquid crystal display device 1 includes a liquid crystal panel 10 as a display member, a driving device 80 for the liquid crystal panel 10, and a backlight device 70 that irradiates the liquid crystal panel 10. In other words, it is a so-called transmissive liquid crystal display device. In FIG. 2, etc., the backlight device 70 is omitted.
[0028] 液晶パネル 10は、副画素 13が配置された表示領域 11と、表示領域 11以外の領 域である非表示領域 12とに大別される。液晶パネル 10では、図 2に示すように非表 示領域 12は液晶パネル 10の平面視において表示領域 11を取り囲むように設けられ ている。なお、表示領域 11および非表示領域 12は、液晶パネル 10の平面視におけ る 2次元領域のみならず、この 2次元領域を液晶パネル 10の厚さ方向、すなわち後 述する TFT基板 20と対向基板 40の積み重ね方向(図 4参照)に投影して把握される 液晶パネル 10の 3次元領域をも指すこととする。  The liquid crystal panel 10 is roughly divided into a display area 11 in which the sub-pixels 13 are arranged and a non-display area 12 that is an area other than the display area 11. In the liquid crystal panel 10, as shown in FIG. 2, the non-display area 12 is provided so as to surround the display area 11 in a plan view of the liquid crystal panel 10. The display area 11 and the non-display area 12 are not only a two-dimensional area in a plan view of the liquid crystal panel 10, but also the two-dimensional area facing the thickness direction of the liquid crystal panel 10, that is, a TFT substrate 20 described later. It also refers to the three-dimensional area of the liquid crystal panel 10 that is projected and grasped in the stacking direction of the substrates 40 (see Fig. 4).
[0029] 図 2に示すように、各副画素 13は、赤 (R)、緑 (G)、青 (B)および白(W)の 4種類 の色、すなわち 4色のうちのいずれかの色を表示する。なお、図中において、「R」は その副画素 13の表示色が赤であることを示し、同様に「G」、 「B」および「W」はそれ ぞれ緑、青および白であることを示す。複数の副画素 13は、互いに直交する第 1方 向 dlおよび第 2方向 d2のそれぞれに整列、すなわち 2次元的にマトリクス配列してい る。なお、ここでは、第 1方向 dlは液晶パネル 10の画面に向力つて行方向(横方向) とし、第 2方向 d2はこの画面に向力つて列方向(縦方向)とする。  [0029] As shown in FIG. 2, each sub-pixel 13 has one of four colors of red (R), green (G), blue (B), and white (W), that is, one of the four colors. Display color. In the figure, “R” indicates that the display color of the sub-pixel 13 is red, and similarly “G”, “B”, and “W” are green, blue, and white, respectively. Indicates. The plurality of subpixels 13 are aligned in each of the first direction dl and the second direction d2 orthogonal to each other, that is, two-dimensionally arranged in a matrix. In this example, the first direction dl is directed to the screen of the liquid crystal panel 10 in the row direction (horizontal direction), and the second direction d2 is directed to the screen in the column direction (vertical direction).
[0030] 第 1方向 dlには、赤 (R)、緑 (G)、青 (B)および白(W)の副画素 13がこの順序で 繰り返し並んでおり、すなわちこれらの 4色を 1単位として各色の副画素 13が繰り返し 並んでいる。そして、第 2方向 d2には同じ色の副画素 13が並んでいる。なお、第 1方 向 dlに連続して並ぶ 4色の副画素 13がカラー表示のための 1単位である画素 14を 構成し、図 2では説明のために 1つの画素 14を太線で囲んでいる。これは後に示す 図 12〜図 14においても同様である。 [0030] In the first direction dl, red (R), green (G), blue (B), and white (W) sub-pixels 13 are repeatedly arranged in this order, that is, these four colors are one unit. As shown, sub-pixels 13 of each color are repeatedly arranged. Then, sub-pixels 13 of the same color are arranged in the second direction d2. It should be noted that the four-color sub-pixels 13 arranged in succession in the first direction dl are pixels 14 as one unit for color display. In FIG. 2, one pixel 14 is surrounded by a thick line for the sake of explanation. The same applies to FIGS. 12 to 14 described later.
[0031] 次に、図 3および図 4を用いて液晶パネルの構造について説明する。図 3は液晶パ ネルの部分平面図、図 4は図 3の 4— 4線における断面図である。液晶パネル 10は、 図 4に示すように、 TFT (Thin Film Transistor)基板 20と、 TFT基板 20に対向 配置された対向基板 40と、 TFT基板 20と対向基板 40との間に封入された液晶 50と を含んでいる。なお、「TFT基板」は、 TFTアレイ基板、アレイ基板、アクティブ基板、 マトリクス基板、アクティブマトリクス基板等とも呼ばれる。  Next, the structure of the liquid crystal panel will be described with reference to FIGS. 3 and 4. 3 is a partial plan view of the liquid crystal panel, and FIG. 4 is a cross-sectional view taken along line 4-4 of FIG. As shown in FIG. 4, the liquid crystal panel 10 includes a TFT (Thin Film Transistor) substrate 20, a counter substrate 40 disposed opposite to the TFT substrate 20, and a liquid crystal sealed between the TFT substrate 20 and the counter substrate 40. Includes 50 and. The “TFT substrate” is also called a TFT array substrate, an array substrate, an active substrate, a matrix substrate, an active matrix substrate, or the like.
[0032] TFT基板 20は、図 3および図 4に示すように、透明絶縁基板 21と、透明絶縁基板 2 1上に配置された回路層と、この回路層上に配置された配向膜 28とを含んでいる。 上述の回路層は、信号線 22と、走査線 23と、 TFT24と、副画素電極 25と、補助容 量線 26と、絶縁層 27とを含んでいる。 TFT24は、スイッチング素子として動作し、半 導体層 24cおよびドレイン電極 24dとを含む。絶縁層 27は、信号線 22、走査線 23、 半導体層 24c、ドレイン電極 24d、副画素電極 25および補助容量線 26を、所定の回 路を成すように絶縁する。なお、図 3では、図面を見やすくするために副画素電極 25 を破線で示している。  As shown in FIGS. 3 and 4, the TFT substrate 20 includes a transparent insulating substrate 21, a circuit layer disposed on the transparent insulating substrate 21, and an alignment film 28 disposed on the circuit layer. Is included. The circuit layer described above includes the signal line 22, the scanning line 23, the TFT 24, the subpixel electrode 25, the auxiliary capacitance line 26, and the insulating layer 27. The TFT 24 operates as a switching element and includes a semiconductor layer 24c and a drain electrode 24d. The insulating layer 27 insulates the signal line 22, the scanning line 23, the semiconductor layer 24c, the drain electrode 24d, the sub-pixel electrode 25, and the auxiliary capacitance line 26 so as to form a predetermined circuit. In FIG. 3, the sub-pixel electrode 25 is indicated by a broken line in order to make the drawing easy to see.
[0033] 詳細には、各信号線 22は表示領域 11内において第 2方向 d2に延在し、これら複 数の信号線 22が表示領域 11内において、第 1方向 dlに配列されている。また、これ らの信号線 22と垂直に交差 (立体交差)するように複数の走査線 23が設けられて 、 る。すなわち、各走査線 23は表示領域 11内において第 1方向 dlに延在し、これらの 走査線 23が表示領域 11内にお 、て第 2方向 d2に配列されて 、る。信号線 22と走 查線 23との各交差部分には TFT24が設けられて 、る。この交差部分付近にお!、て 、信号線 22の突出部が TFT24のソース電極 24aを成し、走査線 23の突出部が TF T24のゲート電極 24bを成す。また、ゲート電極 24bに対向するように半導体層 24c が配置されており、絶縁層 27のうち半導体層 24cとゲート電極 24bとの間の部分がゲ ート絶縁膜を成す。半導体層 24cにはソース電極 24aと TFT24のドレイン電極 24dと が電気的に接続されている。なお、平面視において、ソース電極 24aとドレイン電極 2 4dとの間にはゲート電極 24bが位置している。そして、ドレイン電極 24dは、走査線 2 3間に配置され第 1方向 dlに延在した補助容量線 26に対向するように設けられてい るとともに、絶縁層 27のスルーホール 27aを介して副画素電極 25に接続されている 。副画素電極 25は、信号線 22と走査線 23とで区画された領域内に配置されており、 このとき信号線 22および走査線 23に近接している。副画素電極 25は絶縁層 27上に 配置されており、副画素電極 25に被さるように配向膜 28が絶縁層 27上に配置され ている。 Specifically, each signal line 22 extends in the second direction d2 in the display region 11, and the plurality of signal lines 22 are arranged in the first direction dl in the display region 11. In addition, a plurality of scanning lines 23 are provided so as to intersect these signal lines 22 vertically (three-dimensional intersection). That is, each scanning line 23 extends in the first direction dl in the display area 11, and these scanning lines 23 are arranged in the second direction d 2 in the display area 11. A TFT 24 is provided at each intersection of the signal line 22 and the running line 23. Near the intersection, the protruding portion of the signal line 22 forms the source electrode 24a of the TFT 24, and the protruding portion of the scanning line 23 forms the gate electrode 24b of the TFT 24. A semiconductor layer 24c is disposed so as to face the gate electrode 24b, and a portion of the insulating layer 27 between the semiconductor layer 24c and the gate electrode 24b forms a gate insulating film. A source electrode 24a and a drain electrode 24d of the TFT 24 are electrically connected to the semiconductor layer 24c. In plan view, the gate electrode 24b is located between the source electrode 24a and the drain electrode 24d. The drain electrode 24d is connected to the scanning line 2 The auxiliary capacitor line 26 is arranged between the three layers and extends in the first direction dl, and is connected to the sub-pixel electrode 25 through the through hole 27a of the insulating layer 27. The sub-pixel electrode 25 is disposed in a region partitioned by the signal line 22 and the scanning line 23, and is close to the signal line 22 and the scanning line 23 at this time. The subpixel electrode 25 is disposed on the insulating layer 27, and the alignment film 28 is disposed on the insulating layer 27 so as to cover the subpixel electrode 25.
[0034] 他方、対向基板 40は、図 4に示すように、透明絶縁基板 41と、カラーフィルタ 42と、 遮光層 43と、透明電極 44と、配向膜 45とを含んでいる。なお、カラーフィルタを有す る対向基板は、カラーフィルタ基板等とも呼ばれる。  On the other hand, the counter substrate 40 includes a transparent insulating substrate 41, a color filter 42, a light shielding layer 43, a transparent electrode 44, and an alignment film 45, as shown in FIG. Note that a counter substrate having a color filter is also called a color filter substrate or the like.
[0035] カラーフィルタ 42は透明絶縁基板 41上に、上述の TFT基板 20の副画素電極 25 に対向するように配置されており、このカラーフィルタ 42の色によってその副画素 13 の表示色が決まる。すなわち、カラーフィルタ 42がバックライト装置 70 (図 1参照)から 照射した光を着色することによって、赤 (R)、緑 (G)、青 (B)および白(W)の表示色 が得られる。なお、ノ ックライト装置 70から照射する光の色が表示色としての白(W)と 同じ場合、白(W)の副画素 13についてはカラーフィルタ 42を設けなくても構わない 。表示領域 11内においては隣接するカラーフィルタ 42間を通るように、言い換えると TFT基板 20の信号線 22および走査線 23に対向するように (重なるように)、網目状 に遮光層 43が設けられている。なお、図 3では、図面を見やすくするために、遮光層 43にハッチングを施している。遮光層 43は、 TFT24にも重なるような形状をしており 、また、非表示領域 12においては表示領域 11を囲む額縁状の部分 (不図示)を有し ている。そして、カラーフィルタ 42および遮光層 43に被さるように透明電極 44が配置 されており、透明電極 44は表示領域 11全体に広がっている。透明電極 44上には配 向膜 45が配置されている。  The color filter 42 is disposed on the transparent insulating substrate 41 so as to face the subpixel electrode 25 of the TFT substrate 20 described above, and the display color of the subpixel 13 is determined by the color of the color filter 42. . That is, when the color filter 42 colors the light emitted from the backlight device 70 (see FIG. 1), display colors of red (R), green (G), blue (B), and white (W) can be obtained. . When the color of light emitted from the knocklight device 70 is the same as white (W) as the display color, the color filter 42 may not be provided for the white (W) sub-pixel 13. In the display area 11, a light shielding layer 43 is provided in a mesh shape so as to pass between adjacent color filters 42, in other words, so as to face (overlap) the signal line 22 and the scanning line 23 of the TFT substrate 20. ing. In FIG. 3, the light shielding layer 43 is hatched for easy viewing of the drawing. The light shielding layer 43 has a shape that also overlaps the TFT 24, and the non-display area 12 has a frame-like portion (not shown) surrounding the display area 11. A transparent electrode 44 is disposed so as to cover the color filter 42 and the light shielding layer 43, and the transparent electrode 44 extends over the entire display region 11. An orientation film 45 is disposed on the transparent electrode 44.
[0036] TFT基板 20と対向基板 40とは配向膜 28および配向膜 45が向き合うように配置さ れており、 TFT基板 20と対向基板 40との隙間には液晶 50が封入されている。なお、 TFT基板 20と対向基板 40の外表面上にそれぞれ偏光板 29および偏光板 49が配 置される。このような液晶パネル 10に対して、 TFT基板 20の側に光が照射されるよう にバックライト装置 70が配置される(図 1参照)。 [0037] なお、図 3および図 4に例示した構造はあくまでも一例であり、 TFT24の代わりに M IM (Metal Insulator Metal)素子等の他のスイッチング素子を用いてもよいし、 V、わゆるカラーフィルタ ·オン · TFT基板のようにカラーフィルタ 42を TFT基板 20側 に設けてもよい。 The TFT substrate 20 and the counter substrate 40 are arranged so that the alignment film 28 and the alignment film 45 face each other, and a liquid crystal 50 is sealed in a gap between the TFT substrate 20 and the counter substrate 40. A polarizing plate 29 and a polarizing plate 49 are arranged on the outer surfaces of the TFT substrate 20 and the counter substrate 40, respectively. A backlight device 70 is arranged on such a liquid crystal panel 10 so that light is irradiated on the TFT substrate 20 side (see FIG. 1). [0037] The structures illustrated in FIGS. 3 and 4 are merely examples, and other switching elements such as a MIM (Metal Insulator Metal) element may be used instead of TFT24. Filter ON • Color filter 42 may be provided on the TFT substrate 20 side like a TFT substrate.
[0038] このような液晶パネル 10において、副画素 13は、副画素電極 25と、 TFT24と、力 ラーフィルタ 42と、透明電極 44のうちで副画素電極 25に対向する部分とを含んで構 成される。このとき、図 5の液晶表示装置の詳細な模式図に示すように、副画素電極 25は、第 1方向 dlにおいて信号線 22と交互に配列されている。そして、副画素電極 25は TFT24を介して近接(図 5では左側)の信号線 22に接続されており、 TFT24 のゲート電極 24bは近接(図 5では下側)の走査線 23に接続されている。このような 接続形態により、副画素 13は信号線 22および走査線 23に接続されている。このとき 、 1本の信号線 22には第 2方向 d2に並んだ複数の副画素 13が接続されており、 1本 の走査線 23には第 1方向 dlに並んだ複数の副画素 13が接続されている。なお、副 画素電極 25、信号線 22および走査線 23のこのような接続形態を図 2では簡略的に 図示しており、同様の図示方法を後述の図面にお!、ても用いることとする。  In such a liquid crystal panel 10, the subpixel 13 includes a subpixel electrode 25, a TFT 24, a power color filter 42, and a portion of the transparent electrode 44 that faces the subpixel electrode 25. Made. At this time, as shown in the detailed schematic diagram of the liquid crystal display device of FIG. 5, the sub-pixel electrodes 25 are alternately arranged with the signal lines 22 in the first direction dl. The sub-pixel electrode 25 is connected to the adjacent signal line 22 (left side in FIG. 5) via the TFT 24, and the gate electrode 24b of the TFT 24 is connected to the adjacent scanning line 23 (lower side in FIG. 5). Yes. With such a connection form, the sub-pixel 13 is connected to the signal line 22 and the scanning line 23. At this time, a plurality of subpixels 13 arranged in the second direction d2 are connected to one signal line 22, and a plurality of subpixels 13 arranged in the first direction dl are connected to one scanning line 23. It is connected. Note that such a connection form of the sub-pixel electrode 25, the signal line 22 and the scanning line 23 is illustrated in a simplified manner in FIG. 2, and the same illustration method is used in the drawings described later. .
[0039] 液晶パネル 10では、図 2および図 5に示すように、信号線 22および走査線 23は表 示領域 11内での配列順序を保ったまま非表示領域 12へさらに延在して 、る。各信 号線 22および各走査線 23の非表示領域 12内での端部は液晶パネル 10での入力 端を成し、各入力端は配線 88を介して駆動装置 80に接続されている。  In the liquid crystal panel 10, as shown in FIGS. 2 and 5, the signal lines 22 and the scanning lines 23 further extend to the non-display area 12 while maintaining the arrangement order in the display area 11. The The ends of each signal line 22 and each scanning line 23 in the non-display area 12 form an input end of the liquid crystal panel 10, and each input end is connected to the driving device 80 via a wiring 88.
[0040] 駆動装置 80は、図 5に示すように、ソースドライバ 81と、ゲートドライバ 82と、制御部 83とを含んで!/ヽる。  As shown in FIG. 5, the drive device 80 includes a source driver 81, a gate driver 82, and a control unit 83.
[0041] ソースドライバ 81は各信号線 22へ印加する駆動信号 S6を出力する装置であり、並 列に設けられた複数の個別ドライバ 81aを含んでいる。個別ドライバ 81aは番号付け または順番付けされており、図面では個別ドライバ 81aをその番号順に並べて図示し ており、ここでは図面左側から 1番、 2番、…と採番するものとする。個別ドライバ 81a の出力端は配線 88を介して TFT基板 20の信号線 22に接続されており、これにより 個別ドライバ 81aから出力される駆動信号 S6が信号線 22へ印加される。なお、後述 するように本発明の実施形態においては、制御部 83からダミーデータを受信する個 別ドライバ 81aの配線 88は、信号線 22と接続されていない。また、走査信号 S5の出 力タイミング等は制御部 83から出力されるゲートドライバ制御信号 S3によって制御さ れる。 The source driver 81 is a device that outputs a drive signal S6 to be applied to each signal line 22, and includes a plurality of individual drivers 81a provided in parallel. The individual drivers 81a are numbered or numbered, and in the drawing, the individual drivers 81a are shown in the order of the numbers, and here, the numbers are numbered 1, 2,... From the left side of the drawing. The output terminal of the individual driver 81a is connected to the signal line 22 of the TFT substrate 20 via the wiring 88, whereby the drive signal S6 output from the individual driver 81a is applied to the signal line 22. As will be described later, in the embodiment of the present invention, the number of pieces of dummy data received from the control unit 83. The wiring 88 of the separate driver 81a is not connected to the signal line 22. The output timing of the scanning signal S5 is controlled by the gate driver control signal S3 output from the control unit 83.
[0042] ここで、ソースドライバ 81の個別ドライバ 81aと信号線 22との接続について説明する 。本実施形態において、ソースドライバ 81は、図 6のソースドライバが形成されたフレ キシブル基板の平面図に示すように、いわゆる COF (Chip On Film)構造としてフ イルム状のフレキシブル基板 85上に形成されており、制御部 83からの信号を受信す るための入力端子 86および信号線 22へ信号を出力するための出力端子 87と配線 8 8で接続されている。また、信号線 22は図 7の TFT基板の部分平面図に示すように、 ソースドライバ 81からの信号を受信するための TFT基板 20の端部に露出するように 設けられた入力端子 20aと配線 20bで接続されている。なお、図 7では回路層の他の 構成要素は図示を省略している。  Here, the connection between the individual driver 81a of the source driver 81 and the signal line 22 will be described. In this embodiment, the source driver 81 is formed on a film-like flexible substrate 85 as a so-called COF (Chip On Film) structure as shown in the plan view of the flexible substrate on which the source driver of FIG. 6 is formed. The input terminal 86 for receiving a signal from the control unit 83 and the output terminal 87 for outputting a signal to the signal line 22 are connected by a wiring 88. Further, as shown in the partial plan view of the TFT substrate in FIG. 7, the signal line 22 is connected to the input terminal 20a provided so as to be exposed at the end of the TFT substrate 20 for receiving the signal from the source driver 81. Connected with 20b. In FIG. 7, the other components of the circuit layer are not shown.
[0043] なお、ソースドライバ 81をフレキシブル基板 85に替えてテープ上に形成した TAB ( Tape Automated Bonding)構造としてもよい。また、ソースドライバ 81を TFT基 板 20上に設けた COG (Chip On Glass)構造とし、ソースドライバ 81と制御部 83と をフレキシブル基板上に設けられた配線で接続してもよい。  Note that the source driver 81 may be replaced with the flexible substrate 85 and may have a TAB (Tape Automated Bonding) structure formed on a tape. Further, the source driver 81 may have a COG (Chip On Glass) structure provided on the TFT substrate 20, and the source driver 81 and the control unit 83 may be connected by wiring provided on the flexible substrate.
[0044] 本実施形態において、信号線 22と接続されていない個別ドライバ 8 laの配線 88ま たは 20bは、図 6のようにフレキシブル基板 85上で途切れたものとしてもよぐ図 7の ように TFT基板 20上で途切れたものとしてもよ 、。フレキシブル基板 85上で途切れ たものとする場合、 TFT基板 20として、 TFT基板 20上の全ての配線 20bが入力端 子 20aと信号線 22とを接続する従来の構造のものを設計変更することなく利用できる 。一方、 TFT基板 20上で途切れたものとする場合、フレキシブル基板 85上の全ての 配線 88が個別ドライバ 81aと出力端子 87とを接続する従来の構造のものを設計変更 することなく利用できる。なお、 COG構造とした場合は TFT基板 20上で配線 20bを 途切れたものとすればよぐフレキシブル基板として従来の構造のものを利用できる。 図 6および図 7では信号線 22と個別ドライバ 81aとを接続していない配線 88または 2 0bを途切れたものとしている力 完全に省略し、ないものとしてもよい。  In this embodiment, the wiring 88 or 20b of the individual driver 8 la that is not connected to the signal line 22 may be interrupted on the flexible board 85 as shown in FIG. Even if it is broken on the TFT substrate 20. If it is assumed that there is an interruption on the flexible substrate 85, the TFT substrate 20 has a conventional structure in which all wiring 20b on the TFT substrate 20 connects the input terminal 20a and the signal line 22 without changing the design. Available . On the other hand, when it is assumed that there is an interruption on the TFT substrate 20, the conventional structure in which all the wirings 88 on the flexible substrate 85 connect the individual driver 81a and the output terminal 87 can be used without changing the design. In the case of the COG structure, the conventional structure can be used as a flexible substrate if the wiring 20b is cut off on the TFT substrate 20. In FIG. 6 and FIG. 7, the wiring 88 or 20b that does not connect the signal line 22 and the individual driver 81a may be omitted completely or may be omitted.
[0045] また、ゲートドライバ 82は各走査線 23へ印加する走査信号 S5を出力する装置であ り、上述配線を介して液晶パネル 10の走査線 23に接続されている。これにより、ゲー トドライバ 82からの走査信号 S5が走査線 23へ印加される。なお、走査信号 S5の出 力タイミング等は制御部 83から出力されるゲートドライバ制御信号 S3によって制御さ れる。 In addition, the gate driver 82 is a device that outputs a scanning signal S5 applied to each scanning line 23. Thus, it is connected to the scanning line 23 of the liquid crystal panel 10 through the wiring described above. As a result, the scanning signal S5 from the gate driver 82 is applied to the scanning line 23. The output timing of the scanning signal S5 is controlled by a gate driver control signal S3 output from the control unit 83.
[0046] 次に、図 8に制御部のより具体的なブロック図を示す。図 8に示すように、制御部 83 はデータ生成部 83aおよびタイミングコントロール部 83bを含んでいる。データ生成 部 83aは表示画像の赤 (R)、緑 (G)および青(B)のデータ rO、 gO、 bOならびにクロッ ク信号 CKを取得し、これらの 3色のデータ r0、 gOおよび bOから白(W)の階調データ (階調データ列) W0を生成して出力する。また、データ生成部 83aは、上述 3色のデ ータ r0、 gOおよび bOを液晶パネル 10のカラー表示特性に適するように赤 (R)、緑( G)および青 (B)の階調データ(階調データ列) R0、 GOおよび BOに変換して出力す る。さらに、データ生成部 83aは、前述の信号線 22に接続されていない個別ドライバ 81a用のダミーデータ列 DOを生成して出力する。このダミーデータ列 DOは、表示画 像のデータ r0、 g0、 bOとは全く関係がない。他方、タイミングコントロール部 83bは同 期信号およびクロック信号 CKを取得し、同期信号を元にしてソースドライバ 81用の 制御信号 S2およびゲートドライバ 82用の制御信号 S3を生成して出力する。また、タ イミングコントロール部 83bは、データ生成部 83a用の制御信号 S4 (動作の開始およ び終了等を示すトリガ信号)を生成して出力する。  Next, FIG. 8 shows a more specific block diagram of the control unit. As shown in FIG. 8, the control unit 83 includes a data generation unit 83a and a timing control unit 83b. The data generator 83a obtains red (R), green (G) and blue (B) data rO, gO, bO and a clock signal CK of the display image, and from these three color data r0, gO and bO. White (W) gradation data (gradation data string) W0 is generated and output. In addition, the data generation unit 83a uses the above three-color data r0, gO, and bO for the gradation data of red (R), green (G), and blue (B) so as to suit the color display characteristics of the liquid crystal panel 10. (Gradation data string) Convert to R0, GO and BO and output. Further, the data generation unit 83a generates and outputs a dummy data string DO for the individual driver 81a that is not connected to the signal line 22 described above. This dummy data string DO has nothing to do with the display image data r0, g0, bO. On the other hand, the timing control unit 83b acquires the synchronization signal and the clock signal CK, and generates and outputs the control signal S2 for the source driver 81 and the control signal S3 for the gate driver 82 based on the synchronization signal. The timing control unit 83b generates and outputs a control signal S4 (trigger signal indicating the start and end of operation) for the data generation unit 83a.
[0047] そして、ソースドライバ 81はデータ R0、 G0、 B0、 WOおよび DOを順次受信して!/、き 、全ての信号線 22用のデータ R0、 G0、 B0、 WOおよび DOが揃ったら、ゲートドライ ノ 82による走査線 23の選択タイミングに同期させて全ての信号線 22へそれぞれの 駆動信号 S6を同時に印加する。  [0047] Then, the source driver 81 sequentially receives the data R0, G0, B0, WO and DO! /, And when the data R0, G0, B0, WO and DO for all the signal lines 22 are obtained, In synchronization with the selection timing of the scanning line 23 by the gate driver 82, the respective drive signals S6 are simultaneously applied to all the signal lines 22.
[0048] ここで、図 9の液晶表示装置の部分概略構成図、図 10のタイミングチャートおよび 図 11のデータ列の模式図を参照して、液晶表示装置 1における制御部 83およびソ ースドライバ 81の処理をより具体的に説明する。なお、図 9において個別ドライバ 81a 中に示すように、個別ドライバ 81aは上述の番号が小さ 、順(図面にぉ 、ては第 1方 向 dlに左力も順)に階調データ XIから X20を受信するものとする。  Here, referring to the partial schematic configuration diagram of the liquid crystal display device in FIG. 9, the timing chart in FIG. 10, and the schematic diagram of the data string in FIG. 11, the control unit 83 and the source driver 81 in the liquid crystal display device 1 The process will be described more specifically. As shown in the individual driver 81a in FIG. 9, the individual driver 81a has the above-mentioned numbers, and the gradation data XI to X20 are sequentially input (in the drawing, the left force is also in the first direction dl). It shall be received.
[0049] 上述のようにソースドライバ 81は階調データ(データ列) RO、 GO、 BO、 WO、ダミー データ(データ列) D0、同期信号 SIおよびクロック信号 CKを受信する。このとき、図 10のタイミングチャートに示すように、階調データ列 ROはクロック信号 CKの立ち上が りに同期した階調データ Rl、 R2、 R3、…から成るデータ列であり、これらの階調デー ^R1, R2, R3,…は液晶パネル 10の各行における(ここでは左から) 1番目、 2番目 、 3番目、…の赤 (R)の副画素 13の階調に関するデータである。また、階調データ列 GO、 BO、および WOはそれぞれ緑(G)、青(B)および白(W)の副画素 13の階調に 関するデータ列であり、階調データ列 G0、 B0、および WOのデータ構造は上述の階 調データ列 R0と同様である。ダミーデータ列 DOは、階調データ列 R0、 G0、 BOおよ び WOとは無関係のダミーデータ Dl、 D2、 D3、…から成るデータ列である。なお、 4 つの階調データ Rl、 Gl、 B1および Wl等で 1画素 14の表示データを成す。これら の色ごとの階調データ列 R0、 G0、 BOおよび WOならびにダミーデータ列 DOは、制 御部 83からクロック信号 CKに同期して並列に送信されてくる。このため、ソースドライ ノ 81は、 5つのデータ列 R0、 G0、 B0、 WOおよび DOから成る並列データ列 DAを受 信すること〖こなる。 [0049] As described above, the source driver 81 has gradation data (data string) RO, GO, BO, WO, dummy. Data (data string) D0, sync signal SI and clock signal CK are received. At this time, as shown in the timing chart of FIG. 10, the gradation data string RO is a data string composed of gradation data Rl, R2, R3,... Synchronized with the rising edge of the clock signal CK. The tone data ^ R1, R2, R3,... Are data relating to the gradation of the red (R) sub-pixel 13 in the first, second, third,. Also, the gradation data strings GO, BO, and WO are data strings relating to the gradation of the sub-pixel 13 of green (G), blue (B), and white (W), respectively, and the gradation data strings G0, B0, And the data structure of WO is the same as the above-mentioned gradation data string R0. The dummy data string DO is a data string composed of dummy data Dl, D2, D3,... That are unrelated to the gradation data strings R0, G0, BO, and WO. The four gradation data Rl, Gl, B1, and Wl make up display data for one pixel 14. The gradation data strings R0, G0, BO and WO for each color and the dummy data string DO are transmitted in parallel from the control unit 83 in synchronization with the clock signal CK. For this reason, the source driver 81 receives a parallel data sequence DA composed of five data sequences R0, G0, B0, WO and DO.
そして、ソースドライバ 81は、受信したデータ列 RO、 GO、 BO、 WOおよび DOに基づ いて駆動信号 S6を生成する。このとき、ソースドライバ 81は、図 11のデータ列の模式 図に示すように、データ列 RO中の階調データ Rl、 R2、 R3および R4を先頭から階調 データ 1、 6、 11ぉょび 16として受信し、 1番目、 6番目、 11番目および 16番 目の個別ドライバ 81aへそれぞれ供給する(図 9参照)。同様にソースドライバ 81は、 データ列 GO中の階調データ Gl、 G2、 G3および G4についても、先頭から階調デー タ X2、 X7、 XI 2および XI 7として受信し、 2番目、 7番目、 12番目および 17番目の 個別ドライバへそれぞれ供給し、データ列 BO中の階調データ Bl、 B2、 B3および B4 についても、先頭から階調データ X3、 X8、 X13および X18として受信し、 3番目、 8 番目、 13番目および 18番目の個別ドライバ 8 laへそれぞれ供給し、データ列 WO中 の階調データ Wl、 W2、 W3および W4についても、先頭から階調データ X4、 X9、 X 14および XI 9として受信し、 4番目、 9番目、 14番目および 19番目の個別ドライバ 8 laへそれぞれ供給する。なお、本実施形態においては、 5番目、 10番目、 15番目お よび 20番目の個別ドライバ 8 laの配線には信号線 22は接続されておらず、これらの 個別ドライバ 81aはソースドライバ 81が制御部 83から受信したダミーのデータ列 DO に基づいて供給したダミーの階調データ X5、 X10、 XI 5および X20を受信する。デ ータ列 DOは階調データ列 RO、 GO、 BO、および WOとは無関係であり、液晶パネル 1 0に表示される画像への影響はな 、。 Then, the source driver 81 generates the drive signal S6 based on the received data strings RO, GO, BO, WO, and DO. At this time, as shown in the schematic diagram of the data string in FIG. 11, the source driver 81 uses the gradation data Rl, R2, R3, and R4 in the data string RO from the head as the gradation data 1, 6, 11 16 is supplied to the first, sixth, eleventh and sixteenth individual drivers 81a (see FIG. 9). Similarly, the source driver 81 receives the gradation data Gl, G2, G3, and G4 in the data string GO as gradation data X2, X7, XI 2 and XI 7 from the head, and the second, seventh, The grayscale data Bl, B2, B3 and B4 in the data string BO are received as grayscale data X3, X8, X13 and X18 from the top, respectively. The grayscale data W1, W2, W3 and W4 in the data string WO are supplied to the eighth, thirteenth and eighteenth individual drivers 8 la, respectively, and the grayscale data X4, X9, X14 and XI 9 from the beginning And supply to the 4th, 9th, 14th and 19th individual drivers 8 la respectively. In this embodiment, the signal line 22 is not connected to the wirings of the fifth, tenth, fifteenth and twentieth individual drivers 8 la. The individual driver 81a receives dummy gradation data X5, X10, XI5, and X20 supplied from the source driver 81 based on the dummy data string DO received from the control unit 83. The data string DO is independent of the gradation data strings RO, GO, BO, and WO, and does not affect the image displayed on the liquid crystal panel 10.
[0051] 本実施形態において、ソースドライバ 81は、個別ドライバ 81aがドット反転駆動を行 うように構成された汎用のドライバであり、上述のようにして受信した階調データ XI、 X2、 X3等を「+ (プラスまたは正)」の駆動信号 S6と「―(マイナスまたは負)」の駆動 信号 S6とのいずれかとして出力し、隣接する個別ドライバ 81aは逆の極性の駆動信 号 S6を出力する。そして、ゲートドライバ 82による走査線 23の選択タイミングに同期 させて全ての信号線 22に駆動信号 S6を印加した、次の駆動信号 S6では、ドット反 転駆動するように、同じ番号の階調データは前の極性と逆の極性として出力する。  [0051] In this embodiment, the source driver 81 is a general-purpose driver configured such that the individual driver 81a performs dot inversion driving, and the gradation data XI, X2, X3, etc. received as described above Is output as either “+ (plus or positive)” drive signal S6 or “− (minus or negative)” drive signal S6, and adjacent individual driver 81a outputs drive signal S6 of opposite polarity To do. Then, the drive signal S6 is applied to all the signal lines 22 in synchronization with the selection timing of the scanning line 23 by the gate driver 82. With the next drive signal S6, gradation data of the same number is used so as to perform dot inversion drive. Is output as the opposite polarity of the previous polarity.
[0052] 駆動信号 S6、言!、換えると階調データ RO、 GO、 BOおよび WOは、信号線 22およ び選択された走査線 23につながる TFT24を介して副画素電極 25へ印加され、これ により副画素 13〖こ供給される。副画素 13には、階調データ RO、 GO、 BOまたは WO に応じた大きさおよび「 +」極性または「 」極性を有する電圧 (電位)が供給され、こ の電圧を次の信号が印加されるまで保持する。このため、副画素電極 25に印加され た電圧の極性をもって副画素 13の極性を表現することにする。例えば「 +」の副画素 13とは、その副画素 13の副画素電極 25の極性が「 +」であることを意味する。なお、 駆動信号 S6、副画素電極 25および副画素 13の極性は、透明電極 44の電位を基準 として規定される。  [0052] The drive signal S6, in other words, the gradation data RO, GO, BO and WO are applied to the sub-pixel electrode 25 via the TFT 24 connected to the signal line 22 and the selected scanning line 23, As a result, 13 pixels are supplied. The subpixel 13 is supplied with a voltage (potential) having a magnitude corresponding to the gradation data RO, GO, BO, or WO and having a “+” polarity or a “” polarity, and the next signal is applied to this voltage. Hold until For this reason, the polarity of the subpixel 13 is expressed by the polarity of the voltage applied to the subpixel electrode 25. For example, the “+” subpixel 13 means that the polarity of the subpixel electrode 25 of the subpixel 13 is “+”. Note that the polarities of the drive signal S6, the subpixel electrode 25, and the subpixel 13 are defined based on the potential of the transparent electrode 44.
[0053] ここで、各信号線 22へ印加する駆動信号 S6の極性を、図 12および図 13の液晶表 示装置の模式図を参照して説明する。なお、図 13は赤 (R)の副画素 13のみを表示 させた場合を図示しており、表示して!/ヽな 、副画素 13にはハッチングを施して 、る。 図中、各副画素 13中の左上に表示色 (赤 (R)、緑 (G)、青 (B)および白(W) )の別を 記し、右下には極性の別を例示している。ここでは、説明をわかりやすくするために 副画素 13が 6行 16列、信号線 22が 16本、個別ドライバ 81aが 20個の場合を例示す る。  Here, the polarity of the drive signal S6 applied to each signal line 22 will be described with reference to the schematic diagrams of the liquid crystal display device of FIGS. FIG. 13 shows a case where only the red (R) sub-pixel 13 is displayed, and the sub-pixel 13 is hatched. In the figure, the display colors (red (R), green (G), blue (B), and white (W)) are shown in the upper left of each sub-pixel 13 and the polarity is shown in the lower right as an example. Yes. Here, in order to make the explanation easy to understand, an example in which the sub-pixels 13 are 6 rows and 16 columns, the signal lines 22 are 16, and the individual drivers 81a are 20 is illustrated.
[0054] この場合、信号線 22を表示領域 11内で連続する 4本ごとに信号線群 22aに区分 すると、各信号線群 22a内の 1番目(ここでは第 1方向 dlに左から 1番目)の信号線 2 2には赤 (R)の副画素 13が接続されており、同様に、各信号線群 22a内の 2番目か ら 4番目の信号線 22にはそれぞれ緑 (G)、青 (B)および白(W)の副画素 13が接続 されている。なお、このような接続形態は液晶パネル 10では各行について同様であ る。 [0054] In this case, the signal lines 22 are divided into signal line groups 22a every four consecutive lines in the display area 11. Then, the red (R) sub-pixel 13 is connected to the first signal line 22 in each signal line group 22a (here, the first from the left in the first direction dl). Green (G), blue (B), and white (W) sub-pixels 13 are connected to the second to fourth signal lines 22 in the line group 22a, respectively. Such a connection form is the same for each row in the liquid crystal panel 10.
[0055] 同様に、個別ドライバ 81aを連続する 5個(すなわち信号線群 22aに属する信号線 2 2の数である 4個に、ダミーデータ列を受信する個別ドライバ 8 laの数である 1個を加 算した数と同数)ごとに個別ドライバ群 81bに区分すると、個別ドライバ群 81bと信号 線群 22aとが 1対 1で対応する。このとき、上述のように液晶パネル 10では信号線 22 は表示領域 11内での配列順序を保ったまま非表示領域 12へさらに延在して 、るの で、 1番目(ここでは第 1方向 dlに左から 1番目)の個別ドライバ 81aは、配線 88を介 して非表示領域 12内で 1番目に配列された信号線 22に非表示領域 12内において 接続され、この信号線 22は表示領域 11内でも 1番目に配列されている。このため、 各個別ドライバ群 81b内の 1番目の個別ドライバ 81aは赤 (R)の副画素 13用の駆動 信号 S6を出力する。同様に、各個別ドライバ群 81b内の 2番目力 4番目の個別ドラ ィバ 81aは、非表示領域 12内および表示領域 11内で 1番目に配列された信号線 22 に接続され、緑 (G)、青 (B)および白(W)の副画素 13用の駆動信号 S6をそれぞれ 出力する。また、 5番目の個別ドライバ 81aはダミーの駆動信号 S6を出力する力 い ずれの信号線 22にも接続されていないため、液晶パネル 10への表示には影響がな い。なお、図中において各個別ドライバ 81a中の左上に出力する駆動信号 S6がいず れの色のものであるかを記し、右下に出力する駆動信号 S6の極性の別を記している 。また、ダミーの駆動信号は Dで示している。  Similarly, five individual drivers 81a (that is, four that are the number of signal lines 22 belonging to the signal line group 22a are four, and one that is the number of individual drivers 8 la that receive the dummy data string). When divided into individual driver groups 81b by the same number), the individual driver group 81b and the signal line group 22a have a one-to-one correspondence. At this time, as described above, in the liquid crystal panel 10, the signal lines 22 further extend to the non-display area 12 while maintaining the arrangement order in the display area 11, so the first (here, the first direction) The individual driver 81a (first from the left in dl) is connected in the non-display area 12 to the signal line 22 arranged first in the non-display area 12 via the wiring 88. This signal line 22 is displayed. Even in region 11, it is arranged first. Therefore, the first individual driver 81a in each individual driver group 81b outputs the drive signal S6 for the red (R) subpixel 13. Similarly, the second force in the individual driver group 81b and the fourth individual driver 81a are connected to the signal line 22 arranged first in the non-display area 12 and the display area 11, and are connected to green (G ), Blue (B) and white (W) sub-pixel 13 drive signals S6 are output. In addition, since the fifth individual driver 81a is not connected to the signal line 22 that outputs the dummy drive signal S6, the display on the liquid crystal panel 10 is not affected. In the figure, the color of the drive signal S6 output at the upper left in each individual driver 81a is shown, and the polarity of the drive signal S6 output at the lower right is shown. The dummy drive signal is indicated by D.
[0056] 図 12に例示するように、ソースドライバ 81は、 1番目および 3番目すなわち奇数番 目の個別ドライバ群 8 lbの 1番目の個別ドライバ 8 laが「 +」の駆動信号 S6を出力す るときは、 2番目および 4番目すなわち偶数番目の個別ドライバ群 81bの 1番目の個 別ドライバ 81aは「一」の駆動信号 S6を出力するように構成されている。また、奇数番 目の個別ドライバ群 8 lbの 1番目の個別ドライバ 8 laが「―」の駆動信号 S6を出力す るときは、偶数番目の個別ドライバ群 81bの 1番目の個別ドライバ 81aは「 +」の駆動 信号 S6を出力するように構成されて 、る。 [0056] As illustrated in FIG. 12, the source driver 81 outputs a drive signal S6 in which the first individual driver 8 la of the first and third, that is, odd-numbered individual driver groups 8 lb is “+”. In this case, the first individual driver 81a of the second and fourth, that is, even-numbered individual driver group 81b is configured to output a "one" drive signal S6. In addition, when the first individual driver 8 la of the odd-numbered individual driver group 8 lb outputs the drive signal S6 of “-”, the first individual driver 81a of the even-numbered individual driver group 81b is “ + "Drive It is configured to output signal S6.
[0057] なお、上述のように個別ドライバ 81aは番号付けされている点、また図面では個別ド ライバ 81aをその番号順に並べて図示している点に鑑み、付与された番号 (順番)が 連続する個別ドライバ 81aを「隣接する個別ドライバ 81a」のように表現することとする [0057] In addition, in view of the point that the individual drivers 81a are numbered as described above and the individual drivers 81a are arranged in the order of the numbers in the drawing, the assigned numbers (order) are consecutive. Individual driver 81a is expressed as “adjacent individual driver 81a”.
[0058] したがって、液晶表示装置 1では、奇数番目の信号線群 22aにおいて、表示領域 1 1内で s番目(sは 1以上 4以下の自然数)に配列された信号線 22へ「 +」(または「一」 )の駆動信号 S6が印加されるときには、偶数番目の信号線群 22aにおいて表示領域 11内で上述の s番目に配列された信号線 22へは逆極性である「 」(または「 +」)の 駆動信号 S6が印加される。 Therefore, in the liquid crystal display device 1, in the odd-numbered signal line group 22a, “+” (to the signal line 22 arranged in the sth (s is a natural number of 1 to 4) in the display region 11 is displayed. (Or “one”) when the drive signal S6 is applied, the signal line 22 arranged in the sth in the display region 11 in the even-numbered signal line group 22a has “” (or “ +)) Drive signal S6 is applied.
[0059] その結果、上述の構成の液晶表示装置 1および上述の液晶表示装置 1における液 晶パネル 10の駆動方法によれば、第 1方向 dlに並んだ同色の副画素 13の極性を、 奇数番目の信号線群 22aに接続された副画素 13と、偶数番目の信号線群 22aに接 続された信号線群 22aに接続された副画素 13とで異なるものとすることができる。な お、上述の例では偶数番目の信号線群 22aと奇数番目の信号線群 22aとが同数な ので、同色の副画素 13について「 +」の副画素と「一」の副画素とが第 1方向 dlに 1 対 1の割合で混在 (分散)する。このように第 1方向 dlすなわち横方向に並んだ同色 の副画素 13が隣同士で同じ極性を有さないようにすることができるため、 1色の副画 素 13だけを表示させた場合に発生する横縞模様を低減し、液晶表示装置 1の表示 品位を向上させることができる。  As a result, according to the liquid crystal display device 1 configured as described above and the driving method of the liquid crystal panel 10 in the liquid crystal display device 1 described above, the polarities of the sub-pixels 13 of the same color arranged in the first direction dl are odd The sub-pixel 13 connected to the signal line group 22a may be different from the sub-pixel 13 connected to the signal line group 22a connected to the even-numbered signal line group 22a. In the above example, since the even-numbered signal line group 22a and the odd-numbered signal line group 22a have the same number, the “+” subpixel and the “one” subpixel have the same number for the subpixel 13 of the same color. Mixed (distributed) in a one-to-one ratio in one-way dl. In this way, it is possible to prevent subpixels 13 of the same color arranged in the first direction dl, that is, in the horizontal direction from having the same polarity next to each other, so when only one subpixel 13 is displayed. The generated horizontal stripe pattern can be reduced and the display quality of the liquid crystal display device 1 can be improved.
[0060] ここで、図 14の液晶表示装置の模式図に示すように、信号線 22の表示領域 11内 で連続する 8本ごとすなわち画素 14の 2個分ごとに信号線群 22aを規定し、連続する 9個ごとに個別ドライバ群 81bを規定し、その個別ドライバ群 81bのうち 1個を副画素 1 3に接続せず、ダミーの階調データを受信するものとして上述の構成を適用してもよ い。この場合、個別ドライバ群 8 lbに属さない 19番目と 20番目の個別ドライバ 8 laも ダミーの階調データを受信するものとする。  Here, as shown in the schematic diagram of the liquid crystal display device of FIG. 14, the signal line group 22a is defined for every eight continuous lines in the display region 11 of the signal lines 22, that is, for every two pixels 14. The above-described configuration is applied to the case where the individual driver group 81b is defined for every nine consecutive drivers, and one of the individual driver groups 81b is not connected to the sub-pixel 13 and receives dummy grayscale data. It's okay. In this case, the 19th and 20th individual drivers 8 la that do not belong to the individual driver group 8 lb also receive dummy gradation data.
[0061] さらには 1個の画素 14を構成する副画素 13の、第 1方向 dlに並ぶ数 n (ここでは n  [0061] Furthermore, the number n of sub-pixels 13 constituting one pixel 14 arranged in the first direction dl (here n
=4)の自然数倍の本数ごとに信号線群 22aを規定し、この信号線群 22aを構成する 信号線 22の数に 1を加えた m個ごとに個別ドライバ群 81bを規定して上述の構成を 適用してもよぐ力かる場合にも上述の効果が得られる。図 14は、 m= 9であり、 n=4 に掛ける自然数が 2の場合である。 = 4) A signal line group 22a is defined for each number of natural multiples, and this signal line group 22a is configured. The above effect can also be obtained when it is sufficient to define the individual driver group 81b for each m of the signal lines 22 plus 1 and apply the above configuration. Figure 14 shows the case where m = 9 and n = 4 is a natural number of 2.
[0062] また、本実施形態において、 1個の画素を構成する副画素が第 1方向 dlに偶数個 並んでいる場合、すなわち nが偶数の場合にも同様の横縞模様を低減する効果が得 られる。このような画素の例を図 15Aおよび図 15Bに示す。図 15Aおよび図 15Bは、 いずれも 1個の画素を構成する副画素 13が第 1方向 dlに偶数個並んだ画素の例で ある。なお、 nが奇数の場合には 1色の副画素だけを表示させた場合には横縞模様 は発生しない。 Further, in the present embodiment, the same effect of reducing the horizontal stripe pattern can be obtained when an even number of subpixels constituting one pixel are arranged in the first direction dl, that is, when n is an even number. It is done. Examples of such pixels are shown in FIGS. 15A and 15B. FIG. 15A and FIG. 15B are examples of pixels in which an even number of sub-pixels 13 constituting one pixel are arranged in the first direction dl. When n is an odd number, horizontal stripes do not occur when only one color subpixel is displayed.
[0063] 図 15Aは赤(R)、緑(G)、青(B)、黄 (Y)、マゼンタ(M)およびシアン(C)の 6個の 副画素 13からなる画素であり、副画素 13が第 1方向 dlに 6個すなわち偶数個並ん でいる。この場合、上述の数 mについて n= 6に該当し、個別ドライバ 81aの m番目ご とに信号線 22と接続せず、ダミーデータを受信するものとすることにより、上述の場合 と同様に横縞模様の低減効果を得ることができる。例えば自然数力^の場合 m=6 X 1 + 1 = 7であり、 7番目、 14番目、…ゝ自然数力 の場合 m=6 X 2+ 1 = 13であり、 13番目、 26番目…の個別ドライバ 8 laが信号線 22と接続しな 、ものに該当する。  FIG. 15A shows a pixel composed of six subpixels 13 of red (R), green (G), blue (B), yellow (Y), magenta (M), and cyan (C). There are 6 or even 13 13 in the first direction dl. In this case, n = 6 for the number m described above, and the dummy data is received without connecting to the signal line 22 every m-th of the individual driver 81a. A pattern reduction effect can be obtained. For example, for natural number power ^ m = 6 X 1 + 1 = 7, 7th, 14th, ... ゝ For natural number power m = 6 X 2+ 1 = 13, 13th, 26th ... Applicable when driver 8 la is not connected to signal line 22.
[0064] また図 15Bは赤 (R)、緑 (G)、青(B)および白(W)の 4個の副画素 13が 2行 2列、 すなわち第 1方向 dlに 2個ずつ、第 2方向 d2に 2個ずつ並んで構成される画素であ る。この場合も、副画素 13が第 1方向 dlに偶数個並んでいる。この場合、上述の数 mについて n= 2に該当し、個別ドライバ 81aの m番目ごとに信号線 22と接続せず、 ダミーの階調データを受信するものとすることにより、上述の場合と同様に横縞模様 の低減効果を得ることができる。例えば自然数が 1の場合 m= 2 X 1 + 1 = 3であり、 3 番目、 6番目、…ゝ自然数力 の場合 m= 2 X 2+ 1 = 5であり、 5番目、 10番目…の 個別ドライバ 81aが信号線 22と接続しないものに該当する。なおこの場合、 1個の画 素 14について表示するのに、第 2方向 d2に並んでいる副画素 13の 2個分すなわち 2行分の走査が必要である。  [0064] FIG. 15B shows four subpixels 13 of red (R), green (G), blue (B), and white (W) in two rows and two columns, that is, two in the first direction dl. It is a pixel composed of two in two directions d2. Also in this case, an even number of subpixels 13 are arranged in the first direction dl. In this case, n = 2 for the above-mentioned number m, and it is not connected to the signal line 22 every m-th of the individual driver 81a, and dummy gradation data is received, so that it is the same as the above case. In addition, the effect of reducing the horizontal stripe pattern can be obtained. For example, if the natural number is 1, m = 2 X 1 + 1 = 3 and the 3rd, 6th, ... ゝ natural number power m = 2 X 2+ 1 = 5, 5th, 10th, etc. Applicable to driver 81a not connected to signal line 22. In this case, in order to display one pixel 14, it is necessary to scan two sub-pixels 13 arranged in the second direction d2, that is, two rows.
[0065] なお、 nがいずれの値である場合も、 nに掛ける自然数が 1のとき信号線群 22aの数 が最大になるので、極性が逆の同色副画素 13を第 1方向 dlの方向に交互に配置す ることができる。このため、上述の横縞模様の低減効果が最も顕著になる。 [0065] Regardless of the value of n, since the number of signal line groups 22a is maximized when the natural number multiplied by n is 1, the same color sub-pixel 13 having the opposite polarity is moved in the first direction dl Alternatingly Can. For this reason, the reduction effect of the above-mentioned horizontal stripe pattern becomes the most remarkable.
[0066] また、本実施形態において、信号線 22とは接続しない個別ドライバ 8 laの配置は 第 1方向 dlの左端力も m番目ごとに限られず、第 1の方向 dlの左端から 1番目〜 (m 1)番目の 、ずれかから配置を開始し、そこ力 m番目ごとに配置するものであって も構わない。図 16では例として、 4番目、 9番目、 14番目、 19番目の個別ドライバ 81 aを信号線 22と接続しな 、場合にっ 、て示して 、る。  In the present embodiment, the arrangement of the individual drivers 8 la not connected to the signal line 22 is not limited to the m-th left end force in the first direction dl. m 1) It is also possible to start the arrangement from the deviation and place every mth force. In FIG. 16, as an example, the fourth, ninth, fourteenth, and nineteenth individual drivers 81a are not shown connected to the signal line 22, and are shown in this case.
[0067] 以上、ソースドライバ 81が 1個の場合について説明した力 本実施形態において以 下に説明するようにソースドライバ 81が複数設けられて 、てもよ!/、。  [0067] The power described for the case where there is one source driver 81 As described above, a plurality of source drivers 81 may be provided as described below in this embodiment.
[0068] 図 17に示すように、ソースドライバ 81が設けられた、複数のフレキシブル基板 85が 第 1方向 dlに一列に配置され、液晶パネル 10に複数接続されている。各々のソース ドライバ 81は制御部 83 (図 17では不図示)と接続されている。  As shown in FIG. 17, a plurality of flexible boards 85 provided with source drivers 81 are arranged in a line in the first direction dl, and a plurality of flexible boards 85 are connected to the liquid crystal panel 10. Each source driver 81 is connected to a control unit 83 (not shown in FIG. 17).
[0069] ここでは、例として、個別ドライバ 81aを 384個備えるソースドライバ 81を 11個設け、 液晶パネル 10は副画素 13が第 1方向 dlに 4096個配置された場合について説明 する。この場合、信号線 22も第 1方向 dlに並んだ副画素 13と同数の 4096本配置さ れており、画素 14は第 1方向 dlに 4096 +4= 1024列配置されている。  Here, as an example, a case where eleven source drivers 81 including 384 individual drivers 81a are provided and the liquid crystal panel 10 has 4096 subpixels 13 arranged in the first direction dl will be described. In this case, the same number of 4096 signal lines 22 as the sub-pixels 13 arranged in the first direction dl are arranged, and 4096 + 4 = 1024 columns of pixels 14 are arranged in the first direction dl.
[0070] この場合、個別ドライバ 81aは 384 X 11 =4224個設けられており、 4096本の信号 線 22に対して 4224— 4096 = 128個力余剰となる。つまり、制御部 83からダミーの データ列を受信し、信号線 22とは接続しない個別ドライバ 81aが 128個存在する。ダ ミーデータを受信する個別ドライバ 81aを上述の様に配置することにより、横縞模様 の低減効果を得ることができる。  In this case, 384 × 11 = 4224 individual drivers 81 a are provided, and 4224−4096 = 128 power surpluses for 4096 signal lines 22. In other words, there are 128 individual drivers 81a that receive a dummy data string from the control unit 83 and are not connected to the signal line 22. By arranging the individual driver 81a for receiving dummy data as described above, the effect of reducing the horizontal stripe pattern can be obtained.
[0071] ダミーデータを受信する個別ドライバ 8 laの配置方法としては、例えば第 1の方向 d 1の一方に偏らせる方法、全体に平均的に分散させて配置する方法が挙げられる。  As an arrangement method of the individual driver 8 la that receives dummy data, for example, a method in which the individual driver 8 la is biased in one direction in the first direction d 1 and a method in which the entire driver is distributed in an average manner are cited.
[0072] 第 1の方向 dlの左端に偏らせた場合、個別ドライバ 81aの左端力 5番目ごとに信 号線 22とは接続しない個別ドライバ 81aを配置することとなる。この場合、左端から 6 40個目まで信号線 22とは接続しない個別ドライバ 81aが配置される。第 1方向 dlの 左端から 1番目と 2番目のソースドライバ 81にだけ信号線 22とは接続しない個別ドラ ィバ 81aが配置されることとなり、液晶パネル 10において画素 14の左端から 160列 目まで横縞模様の発生を大幅に低減することができる。しかし、残りの部分では横縞 模様は低減することができな 、。 [0072] When the first direction dl is biased to the left end, an individual driver 81a that is not connected to the signal line 22 is arranged every fifth left end force of the individual driver 81a. In this case, the individual driver 81a that is not connected to the signal line 22 is arranged from the left end to the 640th. In the first direction dl, the individual driver 81a that is not connected to the signal line 22 is arranged only in the first and second source drivers 81 from the left end, and from the left end of the pixels 14 to the 160th column in the liquid crystal panel 10. The occurrence of horizontal stripes can be greatly reduced. But the rest is horizontal stripes The pattern cannot be reduced.
[0073] 全体に平均的に分散させる場合、横縞模様の発生を大幅に低減することはできな いが、全体に低減することができるため、一部は大幅に低減できているが残りは全く 低減できて ヽな 、場合と比べて液晶パネル 10に表示される画像が見やす 、ものとな る。この場合、 1028個の画素 14の左端から 1028 + 128 = 8個ごとに信号線 22とは 接続しない個別ドライバ 81aを配置すれば最も分散させることができる。すなわち、個 別ドライバ 81aの左端力も 8 X 4+ 1 = 33番目ごとに信号線 22とは接続しな 、個別ド ライバ 81aを配置すれば最も分散させることができる。  [0073] When the average is dispersed throughout, it is not possible to greatly reduce the occurrence of horizontal stripe patterns, but since it can be reduced to the whole, some can be greatly reduced, but the rest is not at all. The image displayed on the liquid crystal panel 10 can be easily seen compared to the case. In this case, if the individual drivers 81a not connected to the signal line 22 are arranged every 1028 + 128 = 8 from the left end of the 1028 pixels 14, the dispersion can be most achieved. That is, the left end force of the individual driver 81a can be most dispersed if the individual driver 81a is arranged without being connected to the signal line 22 every 8 × 4 + 1 = 33.
[0074] 次にこの信号線 22とは接続しない個別ドライバ 81aの配置について具体的に説明 する。ソースドライバ 81を第 1方向 dlの左側力も順に sdl、 sd2、 · ··、 sdl lとし、各ソ ースドライバ 81の個別ドライバ 81aを同様に Tl、 Τ2、 · ··、 Τ384とする。信号線 22と は接続しない個別ドライバ 8 laは、ソースドライバ sdlでは、 33番目ごと、すなわち T3 3、 T66、…ゝ Τ363の 11偶である。ソースドライノ sd2で ίま、 sdlの Τ364力ら Τ384 の 21個も含めて 33番目の T12力も T45、T78、…ゝ Τ375の 12個である。ソースドラ イノ sd3で ίま、 sd2の Τ376力ら Τ384の 9偶ち含めて 33番目の Τ24力ら Τ57、 Τ90、 …ゝ Τ354の 11個である。  Next, the arrangement of the individual driver 81a not connected to the signal line 22 will be specifically described. The left side force of the source driver 81 in the first direction dl is also set to sdl, sd2,... Sdl l in order, and the individual driver 81a of each source driver 81 is also set to Tl, Τ2,. The individual driver 8 la that is not connected to the signal line 22 is every 33rd in the source driver sdl, that is, every 11th of T33, T66,. Thirty-third T12 forces including T45, T78, ... ゝ 375 12 pieces including 21 pieces of sdl Τ364 force Τ384 and so on. Saucedoraino In sd3, sd2's Τ376 force, Τ384, and ninety-eight occasions, including the 33rd Τ24 force, Τ57, Τ90,… ゝ Τ354, 11 pieces.
[0075] 同様に、 sd4では Τ3、 Τ36、…ゝ Τ366の 12個、 sd5では Τ15、 Τ48、…ゝ Τ378の 12個、 sd6では Τ27、 Τ60、 · ··、 Τ357の 11個、 sd7では Τ6、 Τ39、 · ··、 Τ369の 12 個、 sd8では Τ18、 Τ51、 "·Τ381の 12個、 sd9では Τ30、 Τ63、…ゝ Τ360の 11個、 sdlOでは Τ9、 Τ42、…ゝ Τ372の 12個、 sdl lでは Τ21、 Τ54、…ゝ Τ384の 12個で ある。これらを合計すると 128個となる。  [0075] Similarly, sd4 has Τ3, Τ36,… ゝ Τ366, twelve, sd5 has Τ15, Τ48,… ゝ Τ378, twelve, sd6 has Τ27, Τ60, ..., Τ357, eleven, sd7 has Τ6 , Τ39, ···, Τ369 12 pieces, sd8 Τ18, Τ51, "Τ381 12 pieces, d sd9 Τ30, Τ63, ... Τ 11360 11 pieces, sdlO Τ9, ゝ 42, ... Τ Τ372 12 pieces In sdl l, there are 12 pieces of Τ21, Τ54,… ゝ Τ384, and the total is 128 pieces.
[0076] なお、この場合、信号線 22とは接続しない個別ドライバ 81aをソースドライバ sdlの T33から開始するのではなぐ T1〜T32のいずれ力から開始し、 33番目ごとに配置 してちよい。  In this case, the individual driver 81a not connected to the signal line 22 may be started every T1 to T32 instead of starting from T33 of the source driver sdl, and may be arranged every 33rd.
[0077] 次に、この信号線 22とは接続しない個別ドライバ 8 laを全体に平均的に分散させる 場合の配置の仕方について数式を用いて説明する。信号線 22の数を a本、ソースド ライバ 81の 1個あたりの個別ドライバ 81aの数を b個、ソースドライバ 81の数を c個、 1 個の画素 14を構成する副画素 13の第 1方向 dlに並ぶ数を n個とする。 [0078] このとき、画素 14は第 1方向 dlに aZn列配置されており、余剰の個別ドライバ 81a は b X c— a個である。よって、 g = floor ( (a/n) /(bXc-a))とすると、画素 14の左 端から g個ごとに信号線 22とは接続しない個別ドライバ 81aを配置することとなる。す なわち、個別ドライバ 8 laの左端から m= n X g + 1 = n X floor ( (a/n) /(bXc-a) ) + 1番目ごとに信号線 22とは接続しな 、個別ドライバ 81aを配置すれば最も分散さ せることができる。ここで、 floor(x)は、床関数と呼ばれる関数であり、 Xを越えない最 大の整数、つまり X以下の最大の整数を返す関数である。この場合も、信号線 22とは 接続しない個別ドライバ 81aの配置は第 1方向 dlの左端力も m番目ごとに限られず、 第 1の方向 dlの左端から 1番目〜 (m— 1)番目の 、ずれかから配置を開始し、そこ 力 m番目ごとに配置するものであっても構わない。 Next, an arrangement method in the case where the individual drivers 8 la that are not connected to the signal line 22 are dispersed on the whole will be described using mathematical expressions. The number of signal lines 22 is a, the number of individual drivers 81a per source driver 81 is b, the number of source drivers 81 is c, and the first direction of the sub-pixel 13 constituting one pixel 14 is the first direction. Let n be the number arranged in dl. At this time, the pixels 14 are arranged in aZn columns in the first direction dl, and there are b × c−a surplus individual drivers 81a. Therefore, when g = floor ((a / n) / (bXc-a)), the individual drivers 81a that are not connected to the signal lines 22 are arranged every g from the left end of the pixel 14. In other words, from the left end of the individual driver 8 la m = n X g + 1 = n X floor ((a / n) / (bXc-a)) + Individually connected to the signal line 22 every 1st If the driver 81a is arranged, it can be most dispersed. Here, floor (x) is a function called a floor function, and returns a maximum integer not exceeding X, that is, a maximum integer less than or equal to X. Also in this case, the arrangement of the individual driver 81a not connected to the signal line 22 is not limited to every m-th left end force in the first direction dl, and the first to (m-1) th from the left end of the first direction dl Arrangement may be started from either position and arranged every mth force.
[0079] 上述の場合、 a=4096、 b = 384、 c = ll、 n=4であるため、 m=nXg+l=nXfl oor ( (a/n) /(bXc-a)) +1=4X floor ( (4096/4) Z (384 X 11—4096) ) + 1=4X8 + 1 = 33である。  [0079] In the above case, since a = 4096, b = 384, c = ll, and n = 4, m = nXg + l = nXfl oor ((a / n) / (bXc-a)) + 1 = 4X floor ((4096/4) Z (384 X 11—4096)) + 1 = 4X8 + 1 = 33.
産業上の利用可能性  Industrial applicability
[0080] 本発明は、 1個の画素が 4個以上の副画素力 なる液晶表示装置に適用可能であ る。 The present invention can be applied to a liquid crystal display device in which one pixel has four or more subpixel forces.

Claims

請求の範囲 The scope of the claims
[1] 平面状に配置された、異なる色のカラーフィルタを備えた複数の副画素からなる画 素と、前記副画素の各列に配置された信号線とを有する液晶パネルと、  [1] A liquid crystal panel having a plurality of subpixels having different color filters arranged in a plane and a signal line arranged in each column of the subpixels;
前記信号線に接続された配線を介して前記画素に信号を送信し、液晶パネルの表 示駆動を行う個別ドライバを複数有するソースドライバとを備えた液晶表示装置にお いて、  In a liquid crystal display device including a source driver having a plurality of individual drivers that transmit a signal to the pixel through a wiring connected to the signal line and perform display driving of the liquid crystal panel.
前記画素が前記信号線の配置された方向に平行な方向に偶数である n個配置さ れた副画素からなり、前記画素の各々において前記副画素の配置が同一であり、隣 接する前記ソースドライバの出力の極性が異なるものであり、前記個別ドライバが nの 任意の自然数倍に 1を加えた m個ごとに前記配線との接続が省略され、前記信号線 と接続されて ヽな ヽことを特徴とする液晶表示装置。  The pixel is composed of n subpixels arranged in an even number in a direction parallel to the direction in which the signal lines are arranged, and the arrangement of the subpixels is the same in each of the pixels, and the adjacent source drivers The polarity of the output of each is different, and the individual driver adds 1 to any natural number multiple of n, and the connection to the wiring is omitted every m times, and the individual driver is connected to the signal line. A liquid crystal display device.
[2] 前記 mが一定であることを特徴とする請求項 1に記載の液晶表示装置。 2. The liquid crystal display device according to claim 1, wherein the m is constant.
[3] 前記信号線を a本、 1個の前記ソースドライバの有する前記個別ドライバを b個、ソー スドライバを c個備え、前記 mが m=n X floor ( (a/n) / (b X c-a) ) + 1であることを 特徴とする請求項 1に記載の液晶表示装置。 [3] The signal line includes a, the source driver includes b the individual drivers, the source driver includes c, and the source driver includes c, and m is m = n X floor ((a / n) / (b 2. The liquid crystal display device according to claim 1, wherein X ca)) + 1.
[4] 前記 nが 4であり、前記 mが 5であることを特徴とする請求項 1に記載の液晶表示装 置。 4. The liquid crystal display device according to claim 1, wherein n is 4 and m is 5.
[5] 1個の前記画素を構成する前記副画素が前記信号線の配置された方向に垂直な 方向に複数個配置されて 、ることを特徴とする請求項 1に記載の液晶表示装置。  5. The liquid crystal display device according to claim 1, wherein a plurality of the sub-pixels constituting one pixel are arranged in a direction perpendicular to the direction in which the signal lines are arranged.
[6] 1個の前記画素を構成する前記副画素が、赤、緑、青または白の前記カラーフィル タを備えた 4個であることを特徴とする請求項 1に記載の液晶表示装置。 6. The liquid crystal display device according to claim 1, wherein the number of sub-pixels constituting one pixel is four including the color filters of red, green, blue or white.
[7] 前記ソースドライバと前記配線がフレキシブル基板上に設けられ、前記フレキシブ ル基板上で前記配線が省略されて ヽることを特徴とする請求項 1に記載の液晶表示 装置。 7. The liquid crystal display device according to claim 1, wherein the source driver and the wiring are provided on a flexible substrate, and the wiring is omitted on the flexible substrate.
[8] 前記配線が前記液晶パネル上に設けられ、前記液晶パネル上で前記配線が省略 されて 、ることを特徴とする請求項 1に記載の液晶表示装置。  8. The liquid crystal display device according to claim 1, wherein the wiring is provided on the liquid crystal panel, and the wiring is omitted on the liquid crystal panel.
[9] 前記ソースドライバが前記液晶パネル上に設けられて ヽることを特徴とする請求項[9] The source driver may be provided on the liquid crystal panel.
8に記載の液晶表示装置。 8. A liquid crystal display device according to 8.
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CN104575432A (en) * 2015-02-03 2015-04-29 京东方科技集团股份有限公司 Display panel driving method, display panel and display device
CN104658489A (en) * 2013-11-20 2015-05-27 顾晶 Drive method and drive IC (integrated circuit) used for LCD (liquid crystal display) panel
CN104898317A (en) * 2015-06-15 2015-09-09 深圳市华星光电技术有限公司 Pixel structure and liquid crystal display panel
CN105096897A (en) * 2015-09-22 2015-11-25 武汉华星光电技术有限公司 Liquid crystal display and driving method thereof
CN106023872A (en) * 2016-07-13 2016-10-12 深圳市华星光电技术有限公司 Display device and drive method thereof
WO2017015972A1 (en) * 2015-07-28 2017-02-02 深圳市华星光电技术有限公司 Liquid crystal display
WO2020082430A1 (en) * 2018-10-22 2020-04-30 惠科股份有限公司 Display panel

Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001033757A (en) * 1999-07-21 2001-02-09 Nec Corp Active matrix type liquid crystal display device
JP2003098973A (en) * 2001-09-26 2003-04-04 Hitachi Ltd Display device
JP2003273476A (en) * 2002-03-12 2003-09-26 Seiko Epson Corp Mounting structure and method of manufacturing the same, electro-optical device and electronic device
JP2005062869A (en) * 2003-08-11 2005-03-10 Samsung Electronics Co Ltd Liquid crystal display
JP2005215007A (en) * 2004-01-27 2005-08-11 Optrex Corp Display apparatus
JP2005283831A (en) * 2004-03-29 2005-10-13 Seiko Epson Corp Electrooptic device and electronic equipment
JP2005346037A (en) * 2004-05-31 2005-12-15 Samsung Electronics Co Ltd Liquid crystal display device and its driving method
JP2006106062A (en) * 2004-09-30 2006-04-20 Sharp Corp Active matrix type liquid crystal display device and liquid crystal display panel used for same
WO2006070559A1 (en) * 2004-12-27 2006-07-06 Sharp Kabushiki Kaisha Display panel driving device, display panel, display device provided with such display panel, and display panel driving method
JP2006195436A (en) * 2004-12-15 2006-07-27 Canon Inc Active matrix display device and driving method of the active matrix display device
JP2006259135A (en) * 2005-03-16 2006-09-28 Sharp Corp Display apparatus and color filter substrate
JP2006267788A (en) * 2005-03-25 2006-10-05 Sanyo Epson Imaging Devices Corp Liquid crystal display device
JP2006527399A (en) * 2003-06-06 2006-11-30 クレアボワイヤント インコーポレーテッド Image degradation correction of a novel liquid crystal display with segmented blue sub-pixels

Patent Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001033757A (en) * 1999-07-21 2001-02-09 Nec Corp Active matrix type liquid crystal display device
JP2003098973A (en) * 2001-09-26 2003-04-04 Hitachi Ltd Display device
JP2003273476A (en) * 2002-03-12 2003-09-26 Seiko Epson Corp Mounting structure and method of manufacturing the same, electro-optical device and electronic device
JP2006527399A (en) * 2003-06-06 2006-11-30 クレアボワイヤント インコーポレーテッド Image degradation correction of a novel liquid crystal display with segmented blue sub-pixels
JP2005062869A (en) * 2003-08-11 2005-03-10 Samsung Electronics Co Ltd Liquid crystal display
JP2005215007A (en) * 2004-01-27 2005-08-11 Optrex Corp Display apparatus
JP2005283831A (en) * 2004-03-29 2005-10-13 Seiko Epson Corp Electrooptic device and electronic equipment
JP2005346037A (en) * 2004-05-31 2005-12-15 Samsung Electronics Co Ltd Liquid crystal display device and its driving method
JP2006106062A (en) * 2004-09-30 2006-04-20 Sharp Corp Active matrix type liquid crystal display device and liquid crystal display panel used for same
JP2006195436A (en) * 2004-12-15 2006-07-27 Canon Inc Active matrix display device and driving method of the active matrix display device
WO2006070559A1 (en) * 2004-12-27 2006-07-06 Sharp Kabushiki Kaisha Display panel driving device, display panel, display device provided with such display panel, and display panel driving method
JP2006259135A (en) * 2005-03-16 2006-09-28 Sharp Corp Display apparatus and color filter substrate
JP2006267788A (en) * 2005-03-25 2006-10-05 Sanyo Epson Imaging Devices Corp Liquid crystal display device

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2498126A1 (en) * 2009-11-06 2012-09-12 Sharp Kabushiki Kaisha Liquid crystal display device
EP2498126A4 (en) * 2009-11-06 2013-10-30 Sharp Kk Liquid crystal display device
CN103903543A (en) * 2013-06-28 2014-07-02 上海天马微电子有限公司 Pixel structure and display panel
EP2819118A3 (en) * 2013-06-28 2015-04-15 Shanghai Tianma Micro-electronics Co., Ltd. Pixel structure and display panel
CN103903543B (en) * 2013-06-28 2017-06-16 上海天马微电子有限公司 Pixel structure and display panel
US9558689B2 (en) 2013-06-28 2017-01-31 Shanghai Tianma Micro-electronics Co., Ltd. Pixel structure and display panel
CN104376817A (en) * 2013-08-12 2015-02-25 顾晶 Method for driving LCD panel and driving IC of LCD panel
CN104658489A (en) * 2013-11-20 2015-05-27 顾晶 Drive method and drive IC (integrated circuit) used for LCD (liquid crystal display) panel
CN104658489B (en) * 2013-11-20 2018-05-11 顾晶 A kind of driving method and its driving IC for LCD panel
CN104575432A (en) * 2015-02-03 2015-04-29 京东方科技集团股份有限公司 Display panel driving method, display panel and display device
CN104898317A (en) * 2015-06-15 2015-09-09 深圳市华星光电技术有限公司 Pixel structure and liquid crystal display panel
WO2016201724A1 (en) * 2015-06-15 2016-12-22 深圳市华星光电技术有限公司 Pixel structure and liquid crystal display panel
WO2017015972A1 (en) * 2015-07-28 2017-02-02 深圳市华星光电技术有限公司 Liquid crystal display
CN105096897A (en) * 2015-09-22 2015-11-25 武汉华星光电技术有限公司 Liquid crystal display and driving method thereof
CN106023872A (en) * 2016-07-13 2016-10-12 深圳市华星光电技术有限公司 Display device and drive method thereof
WO2020082430A1 (en) * 2018-10-22 2020-04-30 惠科股份有限公司 Display panel

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