WO2007095439A3 - Electrochemical etching of circuitry for high density interconnect electronic modules - Google Patents

Electrochemical etching of circuitry for high density interconnect electronic modules Download PDF

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Publication number
WO2007095439A3
WO2007095439A3 PCT/US2007/061738 US2007061738W WO2007095439A3 WO 2007095439 A3 WO2007095439 A3 WO 2007095439A3 US 2007061738 W US2007061738 W US 2007061738W WO 2007095439 A3 WO2007095439 A3 WO 2007095439A3
Authority
WO
WIPO (PCT)
Prior art keywords
micrometers
high density
electronic modules
density interconnect
circuitry
Prior art date
Application number
PCT/US2007/061738
Other languages
French (fr)
Other versions
WO2007095439A2 (en
Inventor
Jennings E Taylor
Jenny J Sun
Heather Mccrabb
Original Assignee
Faraday Technology Inc
Jennings E Taylor
Jenny J Sun
Heather Mccrabb
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Faraday Technology Inc, Jennings E Taylor, Jenny J Sun, Heather Mccrabb filed Critical Faraday Technology Inc
Publication of WO2007095439A2 publication Critical patent/WO2007095439A2/en
Publication of WO2007095439A3 publication Critical patent/WO2007095439A3/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/07—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process being removed electrolytically
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25F—PROCESSES FOR THE ELECTROLYTIC REMOVAL OF MATERIALS FROM OBJECTS; APPARATUS THEREFOR
    • C25F3/00—Electrolytic etching or polishing
    • C25F3/02—Etching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1492—Periodical treatments, e.g. pulse plating of through-holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061—Etching masks

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • ing And Chemical Polishing (AREA)

Abstract

A method for electrochemically etching a metal layer deposited on a dielectric with an etch resist layer pattern to form circuitry for high density interconnect electronic modules using a nonactive electrolyte solution is described. The method is particularly useful for printed wiring boards, chip scale packages, wafer level packages and the like. The circuit tracks generally range from 50 to 125 micrometers for printed wiring boards, from 5 to 50 micrometers for chip scale packages, and from 0.1 to 5 micrometers for wafer level packages, hi one embodiment of the invention the metal layer is copper and the nonactive electrolyte solution is a mixture of sodium nitrate and sodium chloride and a pulse electric current is employed to accomplish the electrochemical etching.
PCT/US2007/061738 2006-02-15 2007-02-07 Electrochemical etching of circuitry for high density interconnect electronic modules WO2007095439A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/354,376 2006-02-15
US11/354,376 US20060207888A1 (en) 2003-12-29 2006-02-15 Electrochemical etching of circuitry for high density interconnect electronic modules

Publications (2)

Publication Number Publication Date
WO2007095439A2 WO2007095439A2 (en) 2007-08-23
WO2007095439A3 true WO2007095439A3 (en) 2007-12-06

Family

ID=38372181

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/061738 WO2007095439A2 (en) 2006-02-15 2007-02-07 Electrochemical etching of circuitry for high density interconnect electronic modules

Country Status (2)

Country Link
US (1) US20060207888A1 (en)
WO (1) WO2007095439A2 (en)

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US20090047783A1 (en) * 2007-08-13 2009-02-19 Bchir Omar J Method of removing unwanted plated or conductive material from a substrate, and method of enabling metallization of a substrate using same
US20110017608A1 (en) * 2009-07-27 2011-01-27 Faraday Technology, Inc. Electrochemical etching and polishing of conductive substrates
CN102812787B (en) * 2010-03-23 2015-05-20 株式会社藤仓 Method for manufacturing printed wiring board
US20110281431A1 (en) * 2010-05-14 2011-11-17 Globalfoundries Inc. Method of patterning thin metal films
JP2015023251A (en) * 2013-07-23 2015-02-02 ソニー株式会社 Multilayer wiring board and manufacturing method therefor, and semiconductor product
US9150980B2 (en) * 2013-08-08 2015-10-06 The Boeing Company Method of removing a metal detail from a substrate
CN103600144B (en) * 2013-11-18 2016-02-24 南京航空航天大学 The method of cuniform channel Electrolyzed Processing massive array unevenness and device
US10398034B2 (en) * 2016-12-12 2019-08-27 Kateeva, Inc. Methods of etching conductive features, and related devices and systems
US10865497B2 (en) * 2017-09-28 2020-12-15 Sharp Kabushiki Kaisha Manufacturing method of mask
CN108024454A (en) * 2017-12-14 2018-05-11 悦虎电路(苏州)有限公司 A kind of line build-out method based on 1.5mil wiring boards
US10515824B2 (en) * 2018-01-11 2019-12-24 Intel Corporation Enhanced etch anisotropy using nanoparticles as banking agents in the presence or absence of a magnetic or electrical field
CN109377264B (en) * 2018-09-21 2021-06-29 苏州芯联成软件有限公司 Method for rapidly evaluating chip design and production cost
WO2021222582A1 (en) * 2020-04-30 2021-11-04 Dujud Llc Methods and processes for forming electrical circuitries on three-dimensional geometries

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US20050145506A1 (en) * 2003-12-29 2005-07-07 Taylor E. J. Electrochemical etching of circuitry for high density interconnect electronic modules

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US6045681A (en) * 1997-06-23 2000-04-04 Konica Corporation Manufacturing method of planographic printing plate support and presensitized planographic printing plate
US20050145506A1 (en) * 2003-12-29 2005-07-07 Taylor E. J. Electrochemical etching of circuitry for high density interconnect electronic modules

Also Published As

Publication number Publication date
WO2007095439A2 (en) 2007-08-23
US20060207888A1 (en) 2006-09-21

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