WO2007076492A3 - Methods and systems for writing non-volatile memories for increased endurance - Google Patents

Methods and systems for writing non-volatile memories for increased endurance Download PDF

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Publication number
WO2007076492A3
WO2007076492A3 PCT/US2006/062579 US2006062579W WO2007076492A3 WO 2007076492 A3 WO2007076492 A3 WO 2007076492A3 US 2006062579 W US2006062579 W US 2006062579W WO 2007076492 A3 WO2007076492 A3 WO 2007076492A3
Authority
WO
WIPO (PCT)
Prior art keywords
write
segment
field
segments
methods
Prior art date
Application number
PCT/US2006/062579
Other languages
French (fr)
Other versions
WO2007076492A2 (en
Inventor
Yosi Pinto
Geoffrey S Gongwer
Oren Honen
Original Assignee
Sandisk Corp
Yosi Pinto
Geoffrey S Gongwer
Oren Honen
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/320,916 external-priority patent/US20070150644A1/en
Priority claimed from US11/321,217 external-priority patent/US7245556B1/en
Application filed by Sandisk Corp, Yosi Pinto, Geoffrey S Gongwer, Oren Honen filed Critical Sandisk Corp
Publication of WO2007076492A2 publication Critical patent/WO2007076492A2/en
Publication of WO2007076492A3 publication Critical patent/WO2007076492A3/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/349Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/349Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
    • G11C16/3495Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K21/00Details of pulse counters or frequency dividers
    • H03K21/40Monitoring; Error detection; Preventing or correcting improper counter operation
    • H03K21/403Arrangements for storing the counting state in case of power supply interruption

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)

Abstract

A memory system that incorporates methods of amplifying the lifetime of a counter made up of memory elements, such as EEPROM cells, having finite endurance. A relatively small memory made up of a number of individually accessible write segments, where, depending on the embodiment, each write segment is made up of a single memory cell or a small number of cells (e.g., a byte). A count is encoded so that it is distributed across a number of fields, each associated with one of the write segments, such that as the count is incremented only a single field (or, in the single bit embodiments, occasionally more than one field) is changed and that these changes are evenly distributed across the fields. The changed field is then written to the corresponding segment, while the other write segments are unchanged. Consequently, the number of rewrites to a given write segment is decreased, and the lifetime correspondingly increased, by a factor corresponding to the number of write segments used.
PCT/US2006/062579 2005-12-28 2006-12-22 Methods and systems for writing non-volatile memories for increased endurance WO2007076492A2 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US11/320,916 2005-12-28
US11/320,916 US20070150644A1 (en) 2005-12-28 2005-12-28 System for writing non-volatile memories for increased endurance
US11/321,217 2005-12-28
US11/321,217 US7245556B1 (en) 2005-12-28 2005-12-28 Methods for writing non-volatile memories for increased endurance

Publications (2)

Publication Number Publication Date
WO2007076492A2 WO2007076492A2 (en) 2007-07-05
WO2007076492A3 true WO2007076492A3 (en) 2007-11-29

Family

ID=38218856

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/062579 WO2007076492A2 (en) 2005-12-28 2006-12-22 Methods and systems for writing non-volatile memories for increased endurance

Country Status (2)

Country Link
TW (1) TWI313467B (en)
WO (1) WO2007076492A2 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
HUP0500498A3 (en) 2002-01-11 2013-01-28 Rath A nutrient pharmaceutical formulation comprising polyphenols for use in treatment of cancer
US7573969B2 (en) * 2007-09-27 2009-08-11 Sandisk Il Ltd. Counter using shift for enhanced endurance
KR101437123B1 (en) * 2008-04-01 2014-09-02 삼성전자 주식회사 Memory system and wear leveling method thereof
KR101526497B1 (en) * 2008-11-27 2015-06-10 삼성전자주식회사 System on chip and information processing method thereof
TWI473253B (en) * 2010-04-07 2015-02-11 Macronix Int Co Ltd Nonvolatile memory array with continuous charge storage dielectric stack
TWI497511B (en) 2012-11-08 2015-08-21 Ind Tech Res Inst Chip with embedded non-volatile memory and testing method therefor
JP2018065315A (en) * 2016-10-20 2018-04-26 富士ゼロックス株式会社 Image formation apparatus and program

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2180083A (en) * 1985-09-06 1987-03-18 Motorola Inc Non-volatile electronic counters
US5181231A (en) * 1990-11-30 1993-01-19 Texas Instruments, Incorporated Non-volatile counting method and apparatus
WO2000010251A1 (en) * 1998-08-13 2000-02-24 Microchip Technology Incorporated A binary counter and method for counting to extend lifetime of storage cells
US6249562B1 (en) * 1999-08-23 2001-06-19 Intel Corporation Method and system for implementing a digit counter optimized for flash memory
US20030131185A1 (en) * 2002-01-04 2003-07-10 Lance Dover Flash memory command abstraction
US20040141580A1 (en) * 2003-01-21 2004-07-22 Maletsky Kerry D. Method for counting beyond endurance limitations of non-volatile memories
US20040160343A1 (en) * 2003-02-18 2004-08-19 Sun Microsystems, Inc. Extending non-volatile memory endurance using data encoding
US20040228197A1 (en) * 2000-09-14 2004-11-18 Nima Mokhlesi Compressed event counting technique and application to a flash memory system

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2180083A (en) * 1985-09-06 1987-03-18 Motorola Inc Non-volatile electronic counters
US5181231A (en) * 1990-11-30 1993-01-19 Texas Instruments, Incorporated Non-volatile counting method and apparatus
WO2000010251A1 (en) * 1998-08-13 2000-02-24 Microchip Technology Incorporated A binary counter and method for counting to extend lifetime of storage cells
US6249562B1 (en) * 1999-08-23 2001-06-19 Intel Corporation Method and system for implementing a digit counter optimized for flash memory
US20040228197A1 (en) * 2000-09-14 2004-11-18 Nima Mokhlesi Compressed event counting technique and application to a flash memory system
US20030131185A1 (en) * 2002-01-04 2003-07-10 Lance Dover Flash memory command abstraction
US20040141580A1 (en) * 2003-01-21 2004-07-22 Maletsky Kerry D. Method for counting beyond endurance limitations of non-volatile memories
US20040160343A1 (en) * 2003-02-18 2004-08-19 Sun Microsystems, Inc. Extending non-volatile memory endurance using data encoding

Also Published As

Publication number Publication date
TWI313467B (en) 2009-08-11
TW200741739A (en) 2007-11-01
WO2007076492A2 (en) 2007-07-05

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