WO2007072984A1 - Semiconductor substrate manufacturing method and element structure manufacturing method - Google Patents

Semiconductor substrate manufacturing method and element structure manufacturing method Download PDF

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WO2007072984A1
WO2007072984A1 PCT/JP2006/325992 JP2006325992W WO2007072984A1 WO 2007072984 A1 WO2007072984 A1 WO 2007072984A1 JP 2006325992 W JP2006325992 W JP 2006325992W WO 2007072984 A1 WO2007072984 A1 WO 2007072984A1
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Prior art keywords
crystal layer
nitride film
chromium
layer
semiconductor substrate
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PCT/JP2006/325992
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French (fr)
Japanese (ja)
Inventor
Takafumi Yao
Meoung-Whan Cho
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Tohoku Techno Arch Co., Ltd.
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Priority to JP2007551175A priority Critical patent/JP4238372B2/en
Publication of WO2007072984A1 publication Critical patent/WO2007072984A1/en

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    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/56After-treatment
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/06Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
    • C23C16/18Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metallo-organic compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/0254Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/15Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
    • H01L29/151Compositional structures
    • H01L29/152Compositional structures with quantum effects only in vertical direction, i.e. layered structures with quantum effects solely resulting from vertical potential variation
    • H01L29/155Comprising only semiconductor materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66446Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003Nitride compounds

Definitions

  • the present invention relates to a method for manufacturing a semiconductor substrate and a method for manufacturing an element structure.
  • Patent Document 1 Japanese Patent Application Laid-Open No. 2 00 2-2 8 4 6 0 0 Disclosure of Invention
  • the crystallinity of the I I I group nitride semiconductor crystal may be deteriorated.
  • An object of the present invention is to provide a method for manufacturing a semiconductor substrate and a method for manufacturing an element structure, which can improve the crystallinity of a crystal layer of a group III nitride semiconductor.
  • the method for manufacturing a semiconductor substrate according to the first aspect of the present invention includes a loading step of loading a base substrate into a processing space partitioned from an external space, and a vapor deposition method on the base substrate.
  • the method for manufacturing a semiconductor substrate according to the second aspect of the present invention includes a carrying-in process for carrying a base substrate into a processing space partitioned from an external space, and a vapor deposition method on the base substrate.
  • the deposit nitride film forming step and the first crystal layer growing step are performed continuously without opening the processing space to the atmosphere.
  • the method for manufacturing a semiconductor substrate according to the third aspect of the present invention includes a carrying-in process for carrying a base substrate into a processing space partitioned from an external space, and a vapor deposition method on the base substrate.
  • a method for manufacturing a semiconductor substrate comprising: a carrying-in step of carrying a base substrate into a processing space partitioned from an external space; and a triangular pyramid on the base substrate by vapor deposition.
  • the first nitride layer growth step and the first crystal layer growth step are performed continuously without opening the processing space to the atmosphere.
  • the element structure manufacturing method includes a preparation step of preparing the second crystal layer as a semiconductor substrate by the semiconductor substrate manufacturing method according to the first to fourth aspects of the present invention; And an element structure forming step of forming an element structure on the semiconductor substrate.
  • FIG. 1A is a process cross-sectional view illustrating a method for manufacturing a semiconductor substrate.
  • FIG. 1B shows a process cross-sectional view illustrating a method for manufacturing a semiconductor substrate.
  • FIG. 1C is a process cross-sectional view illustrating a method for manufacturing a semiconductor substrate.
  • FIG. 2A is a process sectional view showing a method for manufacturing a semiconductor substrate.
  • FIG. 2B shows a process cross-sectional view illustrating a method for manufacturing a semiconductor substrate.
  • FIG. 2C is a process cross-sectional view illustrating a method for manufacturing a semiconductor substrate.
  • Figure 3 shows the configuration of the MOCVD system.
  • Figure 4 shows an SEM photograph of the second crystal layer observed.
  • Figure 5 shows a SEM photograph of the etched state.
  • FIG. 6 shows the X-ray diffraction results of the sample obtained in the process shown in FIG. 2C.
  • Figure 7 shows a SEM photograph of the surface of the chromium nitride film.
  • FIG. 8 shows the X-ray diffraction results of the sample obtained in the process shown in FIG. 1C.
  • FIG. 9 shows a photomicrograph of the surface of the second crystal layer observed.
  • FIG. 10 shows the X-ray diffraction results of the sample obtained in the step shown in FIG. 2B.
  • Fig. 11 A shows a TEM photograph (comparative example) of the sample cross section.
  • Fig. 11 B shows a TEM photograph (comparative example) of the sample cross section.
  • Figure 12 A shows the results of elemental analysis of the sample cross section (comparative example).
  • Fig. 12 B shows the result of elemental analysis of the sample cross section (comparative example).
  • Figure 12 C shows the results of elemental analysis of the sample cross section (comparative example).
  • Figure 1 2D shows the results of elemental analysis of the sample cross section (comparative example).
  • Figure 13 shows an SEM photograph (comparative example) observing the surface of the chromium nitride film.
  • FIG. 14 shows the X-ray diffraction result (comparative example) of the sample obtained in the process shown in FIG. 1C.
  • Fig. 15 shows a micrograph (comparative example) of the surface of the second crystal layer observed.
  • Figure 16 shows the results of AFM analysis of the surface of the second crystal layer (comparative example).
  • Fig. 17 shows the X-ray diffraction results (comparative example) of the sample obtained in the process shown in Fig. 2B.
  • FIG. 18A shows a process cross-sectional view (variation) showing a method for manufacturing a semiconductor substrate.
  • FIG. 18B shows a process cross-sectional view (modification) showing a method for manufacturing a semiconductor substrate.
  • FIG. 18C shows a semiconductor substrate.
  • 19A shows a process cross-sectional view showing a manufacturing method of the semiconductor substrate (modified example).
  • FIG. 19A shows a process cross-sectional view showing a semiconductor substrate manufacturing method (modified example).
  • FIG. Fig. 19C shows a process cross-sectional view showing a method for manufacturing a semiconductor substrate (modification)
  • Fig. 20 shows an X-ray diffraction result (deformation) of the sample obtained in the process shown in Fig. 1C Example)
  • FIG. 21 shows the X-ray diffraction result (modified example) of the sample obtained in the process shown in FIG. 2B.
  • Fig. 22 shows the configuration of the MOHVPE device.
  • FIG. 23 shows the X-ray diffraction results (modified example) of the sample obtained in the step shown in FIG. 1B and the step shown in FIG. 1C.
  • Figure 24A shows a cross-sectional SEM photograph (modified example) of the sample obtained in the process shown in Figure 2B.
  • Fig. 24B shows the cross-sectional X-ray diffraction result (modified example) of the sample obtained in the process shown in Fig. 2B.
  • FIG. 25 shows a cross-sectional TEM photograph (modified example) of the sample obtained in the step shown in FIG. 2B.
  • FIG. 26 shows a cross-sectional TEM photograph (modified example) of the sample obtained in the process shown in FIG. 19A.
  • FIG. 27 shows the X-ray diffraction result (modified example) of the sample obtained in the step shown in FIG. 19A.
  • FIG. 28 shows a block diagram of the MOMB E device.
  • FIG. 29 shows a cross-sectional SEM photograph and X-ray diffraction result (modified example) of the sample obtained in the process shown in FIG. 2B.
  • Fig. 3 OA shows the application of the GaN substrate to the device structure.
  • FIG. 30B shows a diagram showing application of the GaN substrate to the device structure.
  • FIG. 31 shows a diagram showing an application of the GaN substrate to the device structure.
  • FIG. 32 is a diagram showing an application of the GaN substrate to the device structure.
  • FIG. 33 shows a diagram showing application of the GaN substrate to the device structure.
  • FIG. 34 shows a diagram showing an application of the GaN substrate to the device structure.
  • the “film” may be a continuous film or a discontinuous film.
  • “Film” represents a state formed with a thickness.
  • the present invention relates to a method for forming a chromium layer or a chromium nitride film by vapor deposition.
  • the vapor phase growth method is, for example, MOCVD method, MBE method, MOMBE method, MOHVPE method, HVPE method.
  • FIGS. 1A to 2C are process sectional views showing a method for manufacturing a semiconductor substrate.
  • Figure 3 shows the configuration of device 1 It is.
  • gallium nitride will be mainly described as an example of a group III nitride semiconductor, but the same applies to other group III nitride semiconductors.
  • the base substrate 110 is carried into the MOCVD apparatus 200. That is, base substrate 110 is carried into reaction tube 210 of MOCVD apparatus 200 shown in FIG. 3 and placed on susceptor 216. Then, after the reaction tube 210 is sealed, it is evacuated to ImmTorr.
  • the material of the base substrate 1 10 is, for example, A 1 2 0 3 (sapphire), Si, Si C, Ga A s, Zn O, or other semiconductor single crystal, polycrystalline, and amorphous. It can be any substrate of quality, or it can be a single crystal of a metal such as Nb, V, Ta, Zr, Hf, Ti, Al, Cr, Mo, W, Cu, Fe, C It may be a substrate.
  • a chromium layer 115 is formed on the base substrate 110 by MOCVD.
  • an organic metal raw material for forming the chromium layer 115 is placed in the raw material tank 201 in the bubbler 220.
  • At least one of N 2, H 2, and Ar flows as a carrier gas into the raw material tank 201 through an MFC (mass flow control trolley) 230.
  • the MFC 230 controls the flow rate of the carrier gas.
  • the organometallic raw material vaporized in the raw material tank 201 flows into the reaction tube 210 through the EPC (Electrocon ssureconcentro1 1 er) 240 together with the carrier gas.
  • EPC Electrotron ssureconcentro1 1 er
  • the heater 214 heats the base substrate 110 through the susceptor 216 to keep the base substrate 110 at a constant temperature. Then, when the vaporized organometallic raw material is supplied to the vicinity of the base substrate 110, the chromium layer 115 is formed on the base substrate 110 by vapor deposition.
  • the organic metal raw material for forming the chromium layer 1 1 5 is (CH 3 C 5 H 4 ) 2 Cr is preferred.
  • (CH 3 C 5 H 4 ) 2 Cr has a lower melting point than other Cr organometallic raw materials (approximately 35 ° C), making it easier to control the pressure in the gaseous state.
  • the organometallic raw material for forming the chromium layer 1 1 5 may be (C 6 H 6 ) 2 Cr, (C 2 H 5 ) 2 Cr, or the like.
  • a metal compound raw material may be put in place of the organic metal raw material.
  • the metal compound raw material include Cr (C 5 H 7 0 2 ) 3, Cr (CnH ⁇ O ⁇ 3 ), and Cr (C 5 HF 6 O 2 ) 3 .
  • the chromium layer 1 15 is formed because the lattice constant of chromium nitride formed by nitriding is close to that of gallium nitride, and the lattice mismatch with gallium nitride is small.
  • the chromium layer 1 15 is nitrided to form a chromium nitride film 120.
  • nitriding gas hydrogen gas or nitrogen gas (hereinafter referred to as nitriding gas) containing ammonia (NH 3 ) gas is supplied to the vicinity of the chromium layer 1 15 in the reaction tube 210.
  • the heater 2 14 applies force to the base substrate 1 10 via the susceptor 2 16 [1 heat, and the temperature of the base substrate 1 10 (nitriding temperature of the chromium layer 1 15) is maintained at 600 ° C. or higher.
  • the chromium layer 1 15 is nitrided to form the chromium nitride film 120.
  • the nitriding temperature of the chromium layer 115 is preferably 1000 ° C. or higher (1273 K or higher), more preferably 1040 ° C. or higher, and further preferably 1060 ° C. or higher.
  • the chromium nitride film 120 functions as a buffer layer that relieves stress between the base substrate 110 and a first crystal layer 130 and a second crystal layer 140 described later.
  • the chromium nitride film 120 functions as a seed film for crystal growth of a first crystal layer 130 described later. Further, the chromium nitride film 120 functions as a peeling layer in an etching process described later.
  • the steps shown in FIGS. 1A to 1C are performed without opening the reaction tube 210 of the MOCVD apparatus 200 to the atmosphere (in n ⁇ s i t u).
  • the heating temperature of the base substrate 1 10 is 1000 ° C. or higher, a convex portion (slightly on the surface of the chromium nitride film 120 with the nitriding gas uniformly supplied to the chromium layer 1 15 Crystal part) is formed.
  • the size of the convex portion (microcrystalline portion) on the surface of the chromium nitride film 120 becomes uniform (see the SEM photograph in FIG. 7).
  • the nucleation size for the first crystal layer 130 to crystallize is uniformly distributed, so that the crystallinity of the first crystal layer 130 is improved. be able to. Therefore, the crystal layer of the second crystal layer 140 grown on the first crystal layer 130 can be improved in the step shown in FIG. 2B described later.
  • FIG. 8 when an X-ray analysis is performed on the chromium nitride film 120, an X-ray diffraction result shown in FIG. 8 is obtained.
  • the peak half-value width of the (1 1 1) plane of the chromium nitride film 120 is 1 310 [a r c s e c]. This shows that the crystallinity of the chromium nitride film 120 is good.
  • a first crystal layer 130 of a group I I I nitride semiconductor is grown on the chromium nitride film 120 by MOCVD.
  • the organometallic raw material for forming the first crystal layer 130 is put in the raw material tank 201 in the bubbler 220. At least one of N2, H2, and Ar flows as carrier gas into the raw material tank 201 via the MFC 230. At this time, the M FC 230 controls the flow rate of the carrier gas. Vaporization in the material tank 201 The organometallic raw material flows into the reaction tube 210 through the EPC 240 together with the carrier gas. At this time, the EPC 240 controls the flow rate of the carrier gas and the vaporized organometallic raw material. Further, nitriding gas flows into the reaction tube 210.
  • the heater 214 heats the base substrate 110 through the susceptor 216 to keep the base substrate 110 at about 600 to 1000 ° C. Then, the vaporized organometallic raw material and the nitriding gas are supplied in the vicinity of the chromium nitride film 120, so that the first crystal layer 130 is formed by vapor growth on the chromium nitride film 120. Be filmed. As a result, the multilayer ML 1 including the chromium nitride film 120 and the first crystal layer 130 is formed on the base substrate 110.
  • the organometallic raw material for forming the first crystal layer 130 is, for example, trimethylgallium (TMG).
  • the first crystal layer 130 can be composed of, for example, a GaN single crystal, a polycrystal, or an amorphous body.
  • the thickness of the first crystal layer 130 is preferably several tens of A to several tens of ⁇ .
  • the growth temperature of the first crystal layer 130 is preferably around 900 ° C.
  • the pressure in the reaction tube 2 10 is maintained at 500 Torr, for example.
  • the flow rate of the organic metal raw material is, for example, 300 cc.
  • the flow rate of the hydrogen gas contained in the nitriding gas is, for example, 10 liters Z.
  • the second crystal layer 140 of the I II nitride semiconductor is grown on the first crystal layer 130 at a temperature higher than the growth temperature of the first crystal layer 130 by MOCVD.
  • the heater 2 14 heats the base substrate 110 via the susceptor 216 and keeps the base substrate 110 at about 1100 openings.
  • the growth temperature of the second crystal layer 140 is equal to the growth temperature of the first crystal layer 130 (
  • the temperature is about 1 100 ° C, which is higher than around 900 ° C.
  • the second crystal layer 14 ° is a single crystal of G a N.
  • the film thickness of the second crystal layer 140 is
  • the steps shown in FIGS. 1A to 2B are continuously performed without releasing the atmosphere in the reaction tube 2 10 of the MOCVD apparatus 200 (in n ⁇ s i tu). As a result, the crystallinity of the second crystal layer 140 is maintained in a good state, and almost no pitch is formed on the surface (see FIG. 9).
  • the X-ray diffraction result shown in FIG. 10 is obtained.
  • the peak half-value width of the (0002) plane of the second crystal layer 140 is 467 [ar c s e c]. This shows that the crystallinity of the second crystal layer 140 is good.
  • the chromium nitride film 120 is selectively etched using a chemical solution. In other words, the chromium nitride film 120 is wet etched from the side.
  • Etsuchanto chemical solution
  • a mixed aqueous solution of nitrate 2 cerium ammonium Niu arm perchlorate (HC 1_Rei 4) (C e ( ⁇ 4 ) 2 ( ⁇ 3) 6) are preferred
  • HC 1_Rei 4 nitrate 2 cerium ammonium Niu arm perchlorate
  • the etching rate can be adjusted according to the temperature and concentration of the chemical solution. By adjusting the etching rate, cracks that occur when the first crystal layer 130 and the second crystal layer 140 are separated from the base substrate 110 can be suppressed.
  • the cross section (etched state) of the sample is observed by SEM during this process, for example, the result shown in the SEM image of FIG. 5 is obtained.
  • the etched portion 120 a is replaced with the unetched portion 1. Located on the side of 20b.
  • the etched portion 120a is a hollow portion.
  • the first crystal layer 130 and the second crystal layer 140 are separated from the base substrate 110 as shown in FIG. 2C. That is, the first crystal layer 130 and the second crystal layer 140 are self-supported from the base substrate 110 to manufacture a GaN substrate (template substrate) SB.
  • Figure 6 shows the X-ray diffraction results of the sample obtained in this process.
  • the diffraction profile of the (0002) plane of the sample obtained in this step is shown by a solid line
  • the diffraction profile of the (0002) plane of the sample obtained in the previous step is It is shown with a broken line for comparison.
  • the peak half-value width of (0002) plane before this process is 2 4 1 [arcsec]
  • solid line after performing this process
  • the peak half-width is 229 [arcsec].
  • the nitriding gas is inhomogeneous in the chromium layer 1 15 j.
  • convex portions are formed on the surface of the chromium nitride film.
  • the size of the convex portion (microcrystalline portion) in the comparative example is less than that in the case where the air is not released between the process shown in FIG. 1B and the process shown in FIG. 1C (see FIG. 7). It becomes uniform (see SEM picture in Fig. 13).
  • the photograph shown in FIG. 12A is a TEM photograph similar to that shown in FIG. 11A.
  • the chromium nitride film 120 when X-ray analysis is performed on the chromium nitride film 120, the X-ray diffraction results shown in FIG. 14 are obtained. As shown in FIG. 14, the peak half-value width of the (1 1 1) plane of the chromium nitride film is 2847 [ar c s e c]. As a result, the chromium nitride film according to the comparative example has poor crystallinity as compared to the case where the atmosphere is not released between the process shown in FIG. 1B and the process shown in FIG. 1C (see FIG. 8). I understand that
  • FIG. 16 shows the result of AFM analysis of the surface of the second crystal layer.
  • the X-ray diffraction results shown in Fig. 17 are obtained.
  • the peak half-value width of the (0002) plane of the second crystal layer is 55 7 [a r c s e c].
  • the crystallinity of the second crystal layer is worse than when the atmosphere is not released between the process shown in FIG. 1C and the process shown in FIG. 2A (see FIG. 10). I understand.
  • a plurality of multilayers ML 1 to ML 4 are formed on the base substrate 1 10 as shown in FIG. 18A. Is done. This allows multiple multilayers ML 1 to ML 4 to be stacked The formed structure 1 0 0 is formed on the base substrate 1 1 0.
  • the chromium nitride layer 1 2 0 and the first crystal layer 1 3 0 are alternately stacked, so that the structure between the base substrate 1 1 0 and the second crystal layer 1 4 0 The working internal stress can be relaxed.
  • reaction chambers are connected by a mechanism that can be transported without being exposed to the atmosphere (for example, a transport path).
  • a plurality of chromium nitride layers 120 are selectively etched simultaneously using a chemical solution. That is, as shown in FIG. 18B, each of the plurality of chromium nitride layers 120 is etched from the side.
  • the etching progresses while the crystal layer 1 30 is destroyed as the etching of the chromium nitride layer 1 2 0 in each of the multiple layers M L 1 to M L 4 progresses.
  • a plurality of paths through which the chemical solution permeates are formed, and these paths are coupled to each other, so that the path area for the chemical solution to permeate increases. For this reason, the etching rate can be improved.
  • the multiple multilayers ML 1 to ML 4 relax the internal stress acting between the base substrate 110 and the second crystal layer 140 during the etching, the internal stress of the second crystal layer 140 Can be maintained in a substantially uniform state.
  • etchant for example, a mixed water solution of perchloric acid (HC 1 0 4 ) and 2 cerium ammonium nitrate (C e (NH 4 ) 2 (N 0 3 ) 6 ) is suitable. Yes, but not limited to this.
  • the second crystal layer 1 4 0 and the adjacent first crystal layer 1 3 0 are separated from the base substrate 1 1 0. To do. That is, the second crystal layer 140 and the adjacent first crystal layer 130 are made independent from the base substrate 110 to manufacture the GaN substrate SB. The At this time, in the second crystal layer 140, the internal stress is in a substantially uniform state. As a result, the risk of cracking in the second crystal layer 140 is reduced.
  • the first crystal layer 130 adjacent to the second crystal layer 140 is not etched by the etchant (chemical solution) and becomes a part of the GaN substrate SB. 2
  • the process of separating the second crystal layer 140 and the first crystal layer 1 30 adjacent thereto from the base substrate 110 by repeating the process shown in 2A continuously without exposing to the atmosphere is stable and short. Can be done in time.
  • a chromium nitride film 120 i is formed directly on the base substrate 110 by the MOCVD method. That is, in the MOC VD apparatus 200, as shown in FIG. 3, the organic metal raw material for forming the chromium layer 1 15 (FIG. 1B) is put in the raw material tank 201 in the bubbler 220. At least one of N2, H2, and Ar flows as carrier gas into the raw material tank 201 via the MFC 230. At this time, the MFC 230 controls the flow rate of the carrier gas.
  • the organometallic raw material vaporized in the raw material tank 201 flows into the reaction tube 210 through the EPC 240 together with the carrier gas. At this time, the EPC 240 controls the flow rate of the carrier gas and the vaporized organometallic raw material.
  • nitriding gas flows into the reaction tube 210.
  • the heater 214 heats the base substrate 110 through the susceptor 216 to keep the base substrate 110 at a constant temperature. Then, the vaporized organometallic raw material and the nitriding gas are supplied to the vicinity of the base substrate 110, whereby the chromium nitride film 120 i is formed on the base substrate 110 by vapor phase growth.
  • the growth temperature of the chromium nitride film 120 i is maintained at 600 ° C or higher.
  • the growth temperature of the chromium nitride film 120 i is preferably 1000 ° C or higher (1 273 K or higher), more preferably 1040 ° C or higher, and more preferably 1060 ° C or higher. preferable.
  • the X-ray diffraction result shown in FIG. 20 is obtained.
  • the peak half-value width of the (1 1 1) plane of the chromium nitride film 120 i is 97 1 [a r c s e c]. This shows that the crystallinity of the chromium nitride film 120 i is better than the crystallinity of the chromium nitride film according to the comparative example (see FIG. 14).
  • the X-ray analysis is performed on the second crystal layer 140 i of the sample that has been subjected to the process shown in FIG. 19B and the process shown in FIG. 19C, the X-ray diffraction result shown in FIG. 21 is obtained.
  • the peak half-value width of the (0002) plane of the second crystal layer 140 i is 332 [a r c s e c].
  • the crystallinity of the second crystal layer 140 i is better than that of the chromium nitride film according to the comparative example (see FIG. 17).
  • FIG. 22 is a configuration diagram of the M OHVPE apparatus 300.
  • the MOCVD apparatus 200 shown in FIG. 3 and the MOHVPE apparatus 300 shown in FIG. 22 are connected via the transfer space 40 (see FIG. 29).
  • the transfer space 40 is in a vacuum state or a state filled with an inert gas.
  • An opening / closing mechanism is provided between the MQCVD apparatus 200 or the MOH VPE apparatus 300 and the transfer space 40, which is closed during processing and opened during transfer. Thereby, the process shown in FIGS. 1A to 2B can be continuously performed without opening to the atmosphere.
  • the base substrate 110 is carried into the MOHVPE apparatus 300. That is, the base substrate 110 is carried into the reaction tube 310 of the MOHV PE apparatus 300 shown in FIG. 22 and placed on the susceptor 316. The The inside of the reaction tube 310 is evacuated to 1 mm Torr after being sealed.
  • a chromium layer 115 is formed on the base substrate 110 by the MOHVPE method.
  • the organic metal raw material for forming the chromium layer 115 is placed in the raw material tank 301 in the bubbler 320.
  • At least one of N2, H2, and Ar flows as carrier gas into the raw material tank 301 via the MFC 330.
  • the MFC 330 controls the flow rate of the carrier gas.
  • the organometallic raw material vaporized in the raw material tank 301 flows into the reaction tube 310 through the EPC 340 together with the carrier gas.
  • the EPC 340 controls the flow rate of the carrier gas and the vaporized organometallic raw material.
  • the heater 3 14 heats the base substrate 110 through the gas in the reaction tube 310 to keep the base substrate 110 at a constant temperature. Then, the vaporized organometallic raw material is supplied to the vicinity of the base substrate 1 10, whereby the chromium layer 1 15 is formed on the base substrate 1 10 by vapor phase growth.
  • An organic metal raw material for forming the chromium layer 1 15 is, for example, (CH 3 C 5 H 4 ) 2 Cr.
  • the flow rate of the vaporized organometallic raw material is preferably 0.9 sccm, and the flow rate of the carrier gas (for example, H 2 ) is preferably 3250 sccm.
  • the temperature of the base substrate 110 is preferably from room temperature to 1100 ° C.
  • the film thickness of the chromium layer 115 is preferably several tens of A to several tens of ⁇ .
  • the chromium layer 115 is nitrided to form the chromium nitride film 120.
  • nitriding gas hydrogen gas or nitrogen gas (hereinafter referred to as nitriding gas) containing ammonia ( ⁇ 3 ) gas is supplied in the vicinity of the chromium layer 115 in the reaction tube 310. Is done. here, 1 1
  • the heater 314 heats the lower substrate 110 via the gas in the reaction tube 310, and the temperature of the base substrate 110 (nitriding temperature of the chromium layer 115) is maintained at 600 ° C or higher. As a result, the chromium layer 1 1 5 is nitrided and the chromium nitride film 1 1
  • hydrogen gas or nitrogen gas (hereinafter referred to as a reducing gas) containing hydrogen chloride (HC 1) gas may be further supplied into the reaction tube 310.
  • X-ray analysis was performed on the samples obtained in the process shown in FIG. 1B and the process shown in FIG. 1C, respectively, and (a) in FIG. 23 and (b) in FIG.
  • the X-ray diffraction results shown in Fig. 1 were obtained.
  • the chromium layer 115 is changed to the chromium nitride film 120 by the nitriding treatment.
  • the nitride nitride film 120 has a body-centered cubic structure (BCC: BodeyCenterCuBic).
  • a first crystal layer 130 of an I II nitride semiconductor is grown on the chromium nitride film 120 by MOHVPE. That is, in the MOHVPE apparatus 300, as shown in FIG. 22, the heater 315 heats the Ga source 322 via the gas in the reaction tube 310, and vaporized gallium is generated. Also, nitriding gas flows into the reaction tube 310. In the reaction tube 3 10, the heater 314 heats the base substrate 110 through the gas in the reaction tube 310 to keep the base substrate 110 at about 600 to 1000 ° C.
  • the vaporized gallium and the nitriding gas are supplied in the vicinity of the chromium nitride film 120, whereby the first crystal layer 130 is formed on the chromium nitride film 120 by vapor phase growth. .
  • a multilayer ML 1 including the chromium nitride film 120 and the first crystal layer 130 is formed on the base substrate 110.
  • the first crystal layer 1 is formed by the MOHVPE method.
  • the first crystal layer 1 Group III nitride at a temperature higher than the growth temperature of 30 A second crystalline layer 140 of a physical semiconductor is grown.
  • the heater 314 heats the base substrate 110 via the gas in the reaction tube 310 and keeps the base substrate 110 at about 110 ° C.
  • the growth temperature of the second crystal layer 140 is about 1100 ° C., which is higher than the growth temperature (around 900 ° C.) of the first crystal layer 130.
  • the second crystal layer 140 is a GaN single crystal.
  • the film thickness of the second crystal layer 140 is 10 ⁇ ! It is preferably ⁇ 50 ⁇ .
  • the other points are the same as those shown in FIG. 2A.
  • the X-ray diffraction result shown in FIG. 24B is obtained.
  • the peak half-value width of the (0002) plane of the second crystal layer 140 is 491 [ar c s e c].
  • the peak half-value width of the (1 0— 1 1) plane of the second crystal layer 140 is 341 [a r c s e c]. This shows that the crystallinity of the second crystal layer 140 is good.
  • the optimum nitriding conditions vary depending on the film thickness of the glom layer 1 15 (see Fig. 1B).
  • the second crystal layer 140 was grown at a growth temperature of 1 000 ° C. or more while changing the ratio of nitriding gas and reducing gas to 10-40.
  • the step shown in FIG. 19A may be performed in the reaction tube 310 of the MOHVP E device 300.
  • Organometallic raw material for forming (Fig. IB) is placed in the raw material tank 301 in the bubbler 320. At least one of N 2, H 2, and Ar flows as a carrier gas into the raw material tank 301 via the MFC 330. At this time, the MFC 330 controls the flow rate of the carrier gas. The organometallic raw material vaporized in the raw material tank 30 1 flows into the reaction tube 3 10 through the EPC 340 together with the carrier gas. At this time, the EPC 340 controls the flow rates of the carrier gas and the vaporized organometallic raw material. Also, nitriding gas flows into the reaction tube 310.
  • the heater 314 heats the base substrate 110 through the gas in the reaction tube 310 to keep the base substrate 110 at a constant temperature. Then, the vaporized organometallic raw material and the nitriding gas are supplied to the vicinity of the base substrate 110, whereby the chromium nitride film 120 i is formed on the base substrate 110 by vapor phase growth.
  • Fig. 26 When the cross section of the sample obtained in this process is observed by TEM, the results shown in Fig. 26 are obtained. As shown in the TEM image (see Fig. 26a) and its magnified image (see Fig. 26c), dislocation loops etc. are not observed in the field of view observed by TEM. The electron diffraction results (see b in Fig. 26) also show diffraction spots distributed almost symmetrically. This confirms that the crystallinity of the second crystal layer 140 is good.
  • the X-ray diffraction result shown in FIG. 27 is obtained.
  • the peak of the (1 1 1) plane of the chromium nitride film 120 i is strong, and it can be seen that the chromium nitride film 120 i is (1 1 1) oriented. .
  • FIG. 28 shows the same configuration of the MO MBE device 400.
  • the MOCVD apparatus 200 shown in FIG. 3, the MOHVPE apparatus 300 shown in FIG. 22, and the MOMBE apparatus 400 shown in FIG. 28 are connected via the transfer space 40 (see FIG. 29).
  • Carrying The sending space 40 is in a vacuum state or a state filled with an inert gas.
  • an opening / closing mechanism that is closed during processing and opened during transfer is provided. Thereby, the process shown in FIGS. 1A to 2B can be continuously performed without opening to the atmosphere.
  • the base substrate 110 is carried into the MOMBE apparatus 400. That is, the base substrate 110 is carried into the reaction tube 4 10 of the MOMBE apparatus 400 shown in FIG. 28 and placed on the susceptor 4 16. The inside of the reaction tube 410 is sealed and then evacuated to ImmTorr.
  • a chromium layer 1 15 is formed on the base substrate 1 10 by MOMBE.
  • the organometallic raw material for forming the chromium layer 1 15 is put in the raw material tank 401 in the bubbler 420. At least one of N2, H2, and Ar flows as carrier gas into the raw material tank 401 via the MFC 430. At this time, the M FC430 controls the flow rate of the carrier gas. The organometallic raw material vaporized in the raw material tank 401 flows into the reaction tube 410 through the EPC 440 together with the carrier gas. At this time, the EPC 440 controls the flow rate of the carrier gas and the vaporized organometallic raw material.
  • the heater 414 heats the base substrate 110 through the gas in the reaction tube 410 to keep the base substrate 110 at a constant temperature. Then, when the vaporized organometallic raw material is supplied to the vicinity of the base substrate 110, a chromium layer 115 is formed on the base substrate 110 by vapor phase growth.
  • the chromium layer 115 is nitrided to form the chromium nitride film 120.
  • the heater 4 14 heats the base substrate 1 10 through the gas in the reaction tube 4 10, and the temperature of the base substrate 1 10 (the nitriding temperature of the chromium layer 1 15) is 600 ° C or higher. Retained.
  • the chromium layer 1 15 is nitrided to form the chromium nitride film 120.
  • hydrogen gas or nitrogen gas (hereinafter referred to as a reducing gas) containing hydrogen chloride (HC 1) gas may be further supplied into the reaction tube 410.
  • the first crystal layer 130 of the group II nitride semiconductor is grown on the chromium nitride film 120 by the MOMBE method. That is, in the MOMBE apparatus 400, as shown in FIG. 28, an organometallic raw material for forming the first crystal layer 130 is put in a raw material tank 401 in the bubbler 420. At least one of N 2, H 2, and Ar flows into the raw material tank 401 through the MFC 430 as a carrier gas. At this time, the MFC 430 controls the carrier gas flow rate. The organometallic raw material vaporized in the raw material tank 401 flows into the reaction tube 410 through the EPC 440 together with the carrier gas.
  • the EPC 440 controls the flow rate of the carrier gas and the vaporized organometallic raw material.
  • nitriding gas flows into the reaction tube 410.
  • the heater 414 heats the base substrate 110 through the susceptor 416 to keep the base substrate 110 at about 600 to 1000 ports.
  • the vaporized organometallic raw material and the nitriding gas are supplied in the vicinity of the chromium nitride film 120, whereby the first crystal layer 130 is formed by vapor phase growth on the chromium nitride film 120. .
  • the multilayer ML 1 including the chromium nitride film 120 and the first crystal layer 130 is formed on the base substrate 110.
  • a group III nitride is formed on the first crystal layer 130 by a MOMBE method at a temperature higher than the growth temperature of the first crystal layer 130.
  • a second crystalline layer 140 of semiconductor is grown.
  • the heater 414 heats the base substrate 110 via the gas in the reaction tube 4 10 to keep the base substrate 110 at about 1100 ° C.
  • the growth temperature of the second crystal layer 140 is about 1100 ° C., which is higher than the growth temperature of the first crystal layer 130 (around 900 ° C.).
  • the second crystal layer 140 is a GaN single crystal.
  • the film thickness of the second crystal layer 140 is 10 ⁇ ! It is preferably ⁇ 50 ⁇ .
  • the other points are the same as the process shown in Fig. 2 (b).
  • the MOMBE device 400 may be equipped with, for example, a reflection high-energy electron diffraction (RHEED) gun 414 and a RHEED screen 4 16. You may be able to observe the transmission diffraction pattern at the.
  • the susceptor 416 that holds the base substrate 1 10 may be attached to the tip of the operation unit (Manipu lar) 41 8.
  • 1A to 2B may be performed by any vapor phase growth method including CVD, MOCVD, MBE, MOMBE, MOHVPE, and HVPE.
  • the steps shown in FIGS. 1A to 2B may be performed using the multi-chamber system 1 shown in FIG.
  • the multi-chamber system 1 includes a MO CVD apparatus 200, a MOHVPE apparatus 300, a MOMBE apparatus 400, a CVD apparatus 10, an MBE apparatus 20, an HVPE apparatus 30, and a transfer space 40.
  • the MOCVD apparatus 200, the MOHVPE apparatus 300, the MOMBE apparatus 400, the CVD apparatus 10, the MBE apparatus 20, and the HVPE apparatus 30 are connected to each other through a transfer space 40.
  • the transfer space 40 is in a vacuum state or filled with an inert gas.
  • an opening / closing mechanism that is closed during processing and opened during transfer is provided.
  • the process shown to FIG. 1A-FIG. 2B can be performed continuously, without releasing to air
  • the process shown in FIGS. 1A to 1C is performed by the MOC VD method, and the sample is transferred from the MOC VD apparatus 200 to the HVPE apparatus 30 via the transfer space 40.
  • the process shown in FIGS. 2A and 2B may be performed by the HVPE method.
  • the X-ray diffraction result shown in FIG. 30B is obtained.
  • the peak half-value width of the (000 2) plane of the second crystal layer 140 is 34 3 [a r c s e c].
  • the peak half-value width of the (1 0— 1 1) plane of the second crystal layer 140 is 3 7 5 [ar c s e c]. This shows that the crystallinity of the second crystal layer 140 is good.
  • the G a N substrate SB obtained as described above is applied to a G a N-based light emitting device (eg, In G a N / G a N blue light emitting diode, G a N / A 1 G a N ultraviolet light emitting diode, and so on).
  • a G a N-based light emitting device eg, In G a N / G a N blue light emitting diode, G a N / A 1 G a N ultraviolet light emitting diode, and so on.
  • Laser diodes eg, In G a N / G a N blue light emitting diode, G a N / A 1 G a N ultraviolet light emitting diode, and so on.
  • Laser diodes GaN-based electronic elements, etc.
  • an element structure as shown below can be formed.
  • the 11-0 & 1 ⁇ layer 640 is formed on the GaN substrate SB.
  • an active layer (InGaN / GaN quantum well structure) 650 is formed on the n_GaN layer 640.
  • a p_G a N layer (or n—A 1 G a N layer) 6 60 is formed on the active layer 650.
  • an n_Ga N layer (or n—A 1 GaN layer) 722 is formed on a GaN substrate SB.
  • an active layer (InGaN-no-GaN quantum well structure) 724 is formed on the n_GaN layer 722.
  • a p-GaN layer (or p-AlGaN layer) 726 is formed on the active layer.
  • an upper electrode 724 and a lower electrode 722 are formed.
  • a light emitting device structure 700 having a top-down electrode can be formed. As a result, it is possible to avoid the loss of the light emitting area due to the electrodes, and to efficiently dissipate the heat generated from the active layer, which can be expected to improve the element operating characteristics.
  • the i—G a N layer 821 is formed on the G a N substrate S B.
  • an n-GaN layer 822 is formed on the i-type GaN layer 821.
  • An n—A 1 GaN layer 840 is formed on the ⁇ —Ga N layer 822.
  • a part of the n—A 1 Ga N layer 840 is etched to form a source electrode 832 and a drain electrode 838.
  • a gate electrode 834 is formed on the n—A 1 GaN layer 840.
  • a GaN-based heterojunction electronic device structure 800 having a top-down electrode can be formed.
  • an n—GaN layer 930 is formed on the GaN substrate SB.
  • a 1-03 layer (or i-A 1 GaN layer) 940 is formed on the 11-0 & layer 930.
  • source electrodes 912 and 914 and a gate electrode 916 are formed on the i-G a N layer 940.
  • a drain electrode 918 is formed on the back surface of the GaN substrate SB. Thereby, the vertical electronic element structure 900 can be formed.
  • the crystallinity of the GaN substrate SB is greatly improved. Therefore, the crystallinity of each layer included in the device structure formed on it Can greatly improve device characteristics and yield.
  • the present invention is not limited to the above embodiment, and various changes and modifications can be made without departing from the spirit and scope of the present invention. Therefore, in order to make the scope of the present invention public, the following claims are attached.

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Abstract

A method for manufacturing a semiconductor substrate relating to a first side plane is provided with a carry-in step of carrying a base substrate into a processing space partitioned from the external space; a chromium layer forming step of forming a chromium layer on the base substrate by vapor deposition; a nitriding step of forming a chromium nitride film by nitriding the chromium layer; and a first crystalline layer growing step of growing a first crystalline layer of a group III nitride semiconductor on the chromium nitride film. The chromium layer forming step and the nitriding step are characterized in that the steps are continuously performed without having the processing space open to the air.

Description

明 細 書  Specification
半導体基板の製造方法及び素子構造の製造方法 技術分野  Manufacturing method of semiconductor substrate and manufacturing method of element structure
本発明は、 半導体基板の製造方法及び素子構造の製造方法に関する。 背景技術  The present invention relates to a method for manufacturing a semiconductor substrate and a method for manufacturing an element structure. Background art
半導体基板を得るために、 MO C V D法により下地基板の上にアルミ二 ゥム膜を成膜した後、 そのアルミニウム膜を同一炉内で窒化して窒化アル ミニゥム膜を形成する方法が提案されている (例えば、 特許文献 1参照) 。 これにより、 窒化アルミニウム膜の不純物汚染を低減している。 特許文献 1 : 特開 2 0 0 2— 2 8 4 6 0 0号公報 発明の開示  In order to obtain a semiconductor substrate, a method of forming an aluminum nitride film by forming an aluminum film on a base substrate by MO CVD and then nitriding the aluminum film in the same furnace has been proposed. (For example, see Patent Document 1). This reduces the impurity contamination of the aluminum nitride film. Patent Document 1: Japanese Patent Application Laid-Open No. 2 00 2-2 8 4 6 0 0 Disclosure of Invention
特許文献 1に示された技術では、 窒化アルミニウム膜の上に I I I族窒 化物半導体の結晶を成長させた場合、 窒化アルミニウム膜と I I I族窒化 物半導体との格子不整合などにより核生成サイ 卜がランダムになりやすく In the technique disclosed in Patent Document 1, when a group III nitride semiconductor crystal is grown on an aluminum nitride film, a nucleation site is generated due to lattice mismatch between the aluminum nitride film and the group III nitride semiconductor. Easy to be random
、 I I I族窒化物半導体の結晶の結晶性が悪くなるおそれがある。 The crystallinity of the I I I group nitride semiconductor crystal may be deteriorated.
本発明の目的は、 I I I族窒化物半導体の結晶層の結晶性を向上できる 半導体基板の製造方法及び素子構造の製造方法を提供することにある。 本発明の第 1側面に係る半導体基板の製造方法は、 外部空間から仕切ら れた処理空間内に下地基板を搬入する搬入工程と、 気相成長法により、 前 記下地基板の上にク口ム層を成膜するクロム層成膜工程と、 前記ク口ム層 を窒化してクロム窒化物騁を形成する窒化工程と、 前記クロム窒化物膜の 上に I I I族窒化物半導体の第 1結晶層を成長させる第 1結晶層成長工程 とを備え、 前記クロム層成膜工程と前記窒化工程とは、 前記処理空間を大 気開放せずに連続して行われることを特徴とする。 An object of the present invention is to provide a method for manufacturing a semiconductor substrate and a method for manufacturing an element structure, which can improve the crystallinity of a crystal layer of a group III nitride semiconductor. The method for manufacturing a semiconductor substrate according to the first aspect of the present invention includes a loading step of loading a base substrate into a processing space partitioned from an external space, and a vapor deposition method on the base substrate. A chromium layer forming step of forming a layer; a nitriding step of nitriding the deposit layer to form a chromium nitride layer; and a first crystal layer of a group III nitride semiconductor on the chromium nitride film A first crystal layer growth process for growing the chrome layer, wherein the chromium layer forming process and the nitriding process increase the processing space. It is characterized by being continuously performed without being open.
本発明の第 2側面に係る半導体基板の製造方法は、 外部空間から仕切ら れた処理空間内に下地基板を搬入する搬入工程と、 気相成長法により、 前 記下地基板の上にク口ム窒化物膜を成膜するク口ム窒化物膜成膜工程と、 前記クロム窒化物膜の上に I I I族窒化物半導体の第 1結晶層を成長させ る第 1結晶層成長工程とを備え、 前記ク口ム窒化物膜成膜工程と前記第 1 結晶層成長工程とは、 前記処理空間を大気開放せずに連続して行われるこ とを特徴とする。  The method for manufacturing a semiconductor substrate according to the second aspect of the present invention includes a carrying-in process for carrying a base substrate into a processing space partitioned from an external space, and a vapor deposition method on the base substrate. A nitride film forming step for forming a nitride film, and a first crystal layer growing step for growing a first crystal layer of a group III nitride semiconductor on the chromium nitride film, The deposit nitride film forming step and the first crystal layer growing step are performed continuously without opening the processing space to the atmosphere.
本発明の第 3側面に係る半導体基板の製造方法は、 外部空間から仕切ら れた処理空間内に下地基板を搬入する搬入工程と、 気相成長法により、 前 記下地基板の上にク口ム層を成膜するク口ム層成膜工程と、 前記ク口ム層 を窒化して、 三角錐形状の複数の微結晶部を有するク口ム窒化物膜を形成 する窒化工程と、 前記クロム窒化物膜の上に I I I族窒化物半導体の第 1 結晶層を成長させる第 1結晶層成長工程とを備え、 前記ク口ム層成膜工程 と前記窒化工程とは、 前記処理空間を大気開放せずに連続して行われるこ とを特徴とする。  The method for manufacturing a semiconductor substrate according to the third aspect of the present invention includes a carrying-in process for carrying a base substrate into a processing space partitioned from an external space, and a vapor deposition method on the base substrate. A nitride layer forming step of forming a layer, a nitriding step of nitriding the deposit layer to form a nitride nitride film having a plurality of triangular pyramid-shaped microcrystal parts, and the chromium A first crystal layer growth step for growing a first crystal layer of a group III nitride semiconductor on the nitride film, wherein the deposition layer forming step and the nitridation step are configured to open the processing space to the atmosphere. It is characterized by being carried out continuously without.
本発明の第 4側面に係る半導体基板の製造方法は、 外部空間から仕切ら れた処理空間内に下地基板を搬入する搬入工程と、 気相成長法により、 前 記下地基板の上に、 三角錐形状の複数の微結晶部を有するクロム窒化物膜 を成膜するクロム窒化物膜成膜工程と、 前記クロム窒化物膜の上に I I I 族窒化物半導体の第 1結晶層を成長させる第 1結晶層成長工程とを備え、 前記ク口ム窒化物膜成膜工程と前記第 1結晶層成長工程とは、 前記処理空 間を大気開放せずに連続して行われることを特徴とする。  According to a fourth aspect of the present invention, there is provided a method for manufacturing a semiconductor substrate, comprising: a carrying-in step of carrying a base substrate into a processing space partitioned from an external space; and a triangular pyramid on the base substrate by vapor deposition. A chromium nitride film forming step for forming a chromium nitride film having a plurality of microcrystalline portions in shape, and a first crystal for growing a first crystal layer of a group III nitride semiconductor on the chromium nitride film And the first nitride layer growth step and the first crystal layer growth step are performed continuously without opening the processing space to the atmosphere.
本発明の第 5側面に係る素子構造の製造方法は、 本発明の第 1側面から 第 4側面に係る半導体基板の製造方法により、 前記第 2結晶層を半導体基 板として準備する準備工程と、 前記半導体基板の上に素子構造を形成する 素子構造形成工程とを備えたことを特徴とする。 本発明のその他の特徴及び利点は、 添付図面を参照とした以下の説明に より明らかになるであろう。 なお、 添付図面においては、 同じ若しくは同 様の構成には、 同じ参照番号を付す。 図面の簡単な説明 The element structure manufacturing method according to the fifth aspect of the present invention includes a preparation step of preparing the second crystal layer as a semiconductor substrate by the semiconductor substrate manufacturing method according to the first to fourth aspects of the present invention; And an element structure forming step of forming an element structure on the semiconductor substrate. Other features and advantages of the present invention will become apparent from the following description with reference to the accompanying drawings. In the accompanying drawings, the same reference numerals are given to the same or similar components. Brief Description of Drawings
図 1 Aは、 半導体基板の製造方法を示す工程断面図を示す。  FIG. 1A is a process cross-sectional view illustrating a method for manufacturing a semiconductor substrate.
図 1 Bは、 半導体基板の製造方法を示す工程断面図を示す。  FIG. 1B shows a process cross-sectional view illustrating a method for manufacturing a semiconductor substrate.
図 1 Cは、 半導体基板の製造方法を示す工程断面図を示す。  FIG. 1C is a process cross-sectional view illustrating a method for manufacturing a semiconductor substrate.
図 2 Aは、 半導体基板の製造方法を示す工程断面図を示す。  FIG. 2A is a process sectional view showing a method for manufacturing a semiconductor substrate.
図 2 Bは、 半導体基板の製造方法を示す工程断面図を示す。  FIG. 2B shows a process cross-sectional view illustrating a method for manufacturing a semiconductor substrate.
図 2 Cは、 半導体基板の製造方法を示す工程断面図を示す。  FIG. 2C is a process cross-sectional view illustrating a method for manufacturing a semiconductor substrate.
図 3は、 MOCVD装置の構成図を示す。  Figure 3 shows the configuration of the MOCVD system.
図 4は、 第 2結晶層を観察した SEM写真を示す。  Figure 4 shows an SEM photograph of the second crystal layer observed.
図 5は、 エッチング状態を観察した S EM写真を示す。  Figure 5 shows a SEM photograph of the etched state.
図 6は、 図 2 Cに示す工程で得られた試料の X線回折結果を示す。 図 7は、 クロム窒化物膜の表面を観察した S EM写真を示す。  FIG. 6 shows the X-ray diffraction results of the sample obtained in the process shown in FIG. 2C. Figure 7 shows a SEM photograph of the surface of the chromium nitride film.
図 8は、 図 1 Cに示す工程で得られた試料の X線回折結果を示す。 図 9は、 第 2結晶層の表面を観察した顕微鏡写真を示す。  FIG. 8 shows the X-ray diffraction results of the sample obtained in the process shown in FIG. 1C. FIG. 9 shows a photomicrograph of the surface of the second crystal layer observed.
図 1 0は、 図 2 Bに示す工程で得られた試料の X線回折結果を示す。 図 1 1 Aは、 試料断面の TEM写真 (比較例) を示す。  FIG. 10 shows the X-ray diffraction results of the sample obtained in the step shown in FIG. 2B. Fig. 11 A shows a TEM photograph (comparative example) of the sample cross section.
図 1 1 Bは、 試料断面の TEM写真 (比較例) を示す。  Fig. 11 B shows a TEM photograph (comparative example) of the sample cross section.
図 1 2 Aは、 試料断面の元素分析結果 (比較例) を示す。  Figure 12 A shows the results of elemental analysis of the sample cross section (comparative example).
図 1 2 Bは、 試料断面の元素分析結果 (比較例) を示す。  Fig. 12 B shows the result of elemental analysis of the sample cross section (comparative example).
図 1 2 Cは、 試料断面の元素分析結果 (比較例) を示す。  Figure 12 C shows the results of elemental analysis of the sample cross section (comparative example).
図 1 2Dは、 試料断面の元素分析結果 (比較例) を示す。  Figure 1 2D shows the results of elemental analysis of the sample cross section (comparative example).
図 1 3は、 クロム窒化物膜の表面を観察した S EM写真 (比較例) を示 す。 図 14は、 図 1 Cに示す工程で得られた試料の X線回折結果 (比較例) を示す。 Figure 13 shows an SEM photograph (comparative example) observing the surface of the chromium nitride film. FIG. 14 shows the X-ray diffraction result (comparative example) of the sample obtained in the process shown in FIG. 1C.
図 1 5は、 第 2結晶層の表面を観察した顕微鏡写真 (比較例) を示す。 図 16は、 第 2結晶層の表面を AFM解析した結果 (比較例) を示す。 図 1 7は、 図 2 Bに示す工程で得られた試料の X線回折結果 (比較例) を示す。  Fig. 15 shows a micrograph (comparative example) of the surface of the second crystal layer observed. Figure 16 shows the results of AFM analysis of the surface of the second crystal layer (comparative example). Fig. 17 shows the X-ray diffraction results (comparative example) of the sample obtained in the process shown in Fig. 2B.
図 1 8 Aは、 半導体基板の製造方法を示す工程断面図 (変形例) を示す 図 18 Bは、 半導体基板の製造方法を示す工程断面図 (変形例) を示す 図 18 Cは、 半導体基板の製造方法を示す工程断面図 (変形例) を示す 図 1 9 Aは、 半導体基板の製造方法を示す工程断面図 (変形例) を示す 図 1 9Bは、 半導体基板の製造方法を示す工程断面図 (変形例) を示す 図 1 9Cは、 半導体基板の製造方法を示す工程断面図 (変形例) を示す 図 20は、 図 1 Cに示す工程で得られた試料の X線回折結果 (変形例) を示す。  18A shows a process cross-sectional view (variation) showing a method for manufacturing a semiconductor substrate. FIG. 18B shows a process cross-sectional view (modification) showing a method for manufacturing a semiconductor substrate. FIG. 18C shows a semiconductor substrate. 19A shows a process cross-sectional view showing a manufacturing method of the semiconductor substrate (modified example). FIG. 19A shows a process cross-sectional view showing a semiconductor substrate manufacturing method (modified example). FIG. Fig. 19C shows a process cross-sectional view showing a method for manufacturing a semiconductor substrate (modification) Fig. 20 shows an X-ray diffraction result (deformation) of the sample obtained in the process shown in Fig. 1C Example)
図 21は、 図 2 Bに示す工程で得られた試料の X線回折結果 (変形例) を示す。  FIG. 21 shows the X-ray diffraction result (modified example) of the sample obtained in the process shown in FIG. 2B.
図 22は、 MOHVPE装置の構成図を示す。  Fig. 22 shows the configuration of the MOHVPE device.
図 23は、 図 1 Bに示す工程及び図 1 Cに示す工程で得られた試料の X 線回折結果 (変形例) を示す。  FIG. 23 shows the X-ray diffraction results (modified example) of the sample obtained in the step shown in FIG. 1B and the step shown in FIG. 1C.
図 24 Aは、 図 2 Bに示す工程で得られた試料の断面 SEM写真 (変形 例) を示す。 図 24 Bは、 図 2 Bに示す工程で得られた試料の断面 X線回折結果 (変 形例) を示す。 Figure 24A shows a cross-sectional SEM photograph (modified example) of the sample obtained in the process shown in Figure 2B. Fig. 24B shows the cross-sectional X-ray diffraction result (modified example) of the sample obtained in the process shown in Fig. 2B.
図 25は、 図 2 Bに示す工程で得られた試料の断面 T EM写真 (変形例 ) を示す。  FIG. 25 shows a cross-sectional TEM photograph (modified example) of the sample obtained in the step shown in FIG. 2B.
図 26は、 図 19 Aに示す工程で得られた試料の断面 T EM写真 (変形 例) を示す。  FIG. 26 shows a cross-sectional TEM photograph (modified example) of the sample obtained in the process shown in FIG. 19A.
図 27は、 図 1 9 Aに示す工程で得られた試料の X線回折結果 (変形例 ) を示す。  FIG. 27 shows the X-ray diffraction result (modified example) of the sample obtained in the step shown in FIG. 19A.
図 28は、 MOMB E装置の構成図を示す。  FIG. 28 shows a block diagram of the MOMB E device.
図 29は、 図 2 Bに示す工程で得られた試料の断面 S EM写真及び X線 回折結果 (変形例) を示す。  FIG. 29 shows a cross-sectional SEM photograph and X-ray diffraction result (modified example) of the sample obtained in the process shown in FIG. 2B.
図 3 OAは、 G a N基板の素子構造への応用を示す図を示す。  Fig. 3 OA shows the application of the GaN substrate to the device structure.
図 30Bは、 G a N基板の素子構造への応用を示す図を示す。  FIG. 30B shows a diagram showing application of the GaN substrate to the device structure.
図 31は、 G a N基板の素子構造への応用を示す図を示す。  FIG. 31 shows a diagram showing an application of the GaN substrate to the device structure.
図 32は、 G a N基板の素子構造への応用を示す図を示す。  FIG. 32 is a diagram showing an application of the GaN substrate to the device structure.
図 33は、 G a N基板の素子構造への応用を示す図を示す。  FIG. 33 shows a diagram showing application of the GaN substrate to the device structure.
図 34は、 G a N基板の素子構造への応用を示す図を示す。 発明を実施するための最良の形態 本明細書において、 「膜」 は、 連続した膜でもよいし、 不連続な膜でも よいものとする。 「膜」 は、 厚さを持って形成されている状態を表す。 本発明は、 気相成長法によりクロム層又はクロム窒化物膜を成膜する方 法に関する。 ここで、 気相成長法は、 例えば、 MOCVD法、 MBE法、 MOMBE法、 MOHVPE法、 HVPE法である。  FIG. 34 shows a diagram showing an application of the GaN substrate to the device structure. BEST MODE FOR CARRYING OUT THE INVENTION In the present specification, the “film” may be a continuous film or a discontinuous film. “Film” represents a state formed with a thickness. The present invention relates to a method for forming a chromium layer or a chromium nitride film by vapor deposition. Here, the vapor phase growth method is, for example, MOCVD method, MBE method, MOMBE method, MOHVPE method, HVPE method.
本発明の実施形態に係る I I I族窒化物半導体の半導体基板の製造方法 を、 図 1 A〜図 3を用いて説明する。 図 1 A〜図 2Cは、 半導体基板の製 造方法を示す工程断面図である。 図 3は、 1^0じ 0装置200の構成図 である。 以下では、 I I I族窒化物半導体の一例として、 窒化ガリウムを 中心に説明するが、 他の I I I族窒化物半導体に関しても同様である。 図 1 Aに示す工程では、 MOCVD装置 200内に下地基板 1 10を搬 入する。 すなわち、 下地基板 1 10は、 図 3に示す MOCVD装置 200 の反応管 210内に搬入されサセプタ 216の上に置かれる。 そして、 反 応管 210内は、 密閉された後に ImmTo r rまで真空引きされる。 な お、 下地基板 1 10の材料は、 例えば、 A 1203 (サファイア) 、 S i、 S i C、 G a A s、 Z n Oなどの半導体の単結晶、 多結晶、 及び非晶質の いずれかの基板でもよいし、 あるいは、 Nb、 V、 Ta、 Z r、 H f 、 T i、 A l、 C r、 Mo、 W、 Cu、 F e、 Cなどの金属の単結晶の基板で もよい。 A method for manufacturing a group III nitride semiconductor substrate according to an embodiment of the present invention will be described with reference to FIGS. 1A to 2C are process sectional views showing a method for manufacturing a semiconductor substrate. Figure 3 shows the configuration of device 1 It is. Hereinafter, gallium nitride will be mainly described as an example of a group III nitride semiconductor, but the same applies to other group III nitride semiconductors. In the process shown in FIG. 1A, the base substrate 110 is carried into the MOCVD apparatus 200. That is, base substrate 110 is carried into reaction tube 210 of MOCVD apparatus 200 shown in FIG. 3 and placed on susceptor 216. Then, after the reaction tube 210 is sealed, it is evacuated to ImmTorr. The material of the base substrate 1 10 is, for example, A 1 2 0 3 (sapphire), Si, Si C, Ga A s, Zn O, or other semiconductor single crystal, polycrystalline, and amorphous. It can be any substrate of quality, or it can be a single crystal of a metal such as Nb, V, Ta, Zr, Hf, Ti, Al, Cr, Mo, W, Cu, Fe, C It may be a substrate.
図 1 Bに示す工程では、 MOCVD法により、 下地基板 1 10の上にク ロム層 1 1 5を成膜する。  In the process shown in FIG. 1B, a chromium layer 115 is formed on the base substrate 110 by MOCVD.
すなわち、 MOCVD装置 200では、 図 3に示すように、 クロム層 1 1 5を形成するための有機金属原料を、 バブラ一 220内の原料槽 201 に入れておく。 N2、 H2、 及び A rの少なくとも 1つを、 キャリアガス として、 MFC (Ma s s F l ow Co n t r o l l e r) 230を 介して原料槽 201に流入する。 このとき、 MFC 230は、 キャリアガ スの流量を制御する。 原料槽 201内で気化した有機金属原料は、 キヤリ ァガスとともに EPC (E l e c t r o n i c P r e s s u r e C o n t r o 1 1 e r ) 240を介して反応管 210に流入する。 このとき、 E P C 240は、 キヤリァガス及び気化した有機金属原料の流量を制御す る。 反応管 2 10内では、 ヒータ 214がサセプタ 216を介して下地基 板 1 10を加熱し下地基板 1 10を一定温度に保つ。 そして、 気化状態の 有機金属原料が下地基板 1 10近傍に供給されることにより、 下地基板 1 10の上にクロム層 1 1 5が気相成長して成膜される。  That is, in the MOCVD apparatus 200, as shown in FIG. 3, an organic metal raw material for forming the chromium layer 115 is placed in the raw material tank 201 in the bubbler 220. At least one of N 2, H 2, and Ar flows as a carrier gas into the raw material tank 201 through an MFC (mass flow control trolley) 230. At this time, the MFC 230 controls the flow rate of the carrier gas. The organometallic raw material vaporized in the raw material tank 201 flows into the reaction tube 210 through the EPC (Electrocon ssureconcentro1 1 er) 240 together with the carrier gas. At this time, EPC 240 controls the flow rate of the carrier gas and the vaporized organometallic raw material. In the reaction tube 2 10, the heater 214 heats the base substrate 110 through the susceptor 216 to keep the base substrate 110 at a constant temperature. Then, when the vaporized organometallic raw material is supplied to the vicinity of the base substrate 110, the chromium layer 115 is formed on the base substrate 110 by vapor deposition.
なお、 クロム層 1 1 5を形成するための有機金属原料は、 (CH3C5H 4) 2C rが好ましい。 (CH3C5H4) 2C rは、 他の C r有機金属原料よ り融点が低く (約 35°C) 気体状態の圧力を制御しやすい。 クロム層 1 1 5を形成するための有機金属原料は、 (C6H6) 2C r、 (C2H5) 2C r などでもよい。 The organic metal raw material for forming the chromium layer 1 1 5 is (CH 3 C 5 H 4 ) 2 Cr is preferred. (CH 3 C 5 H 4 ) 2 Cr has a lower melting point than other Cr organometallic raw materials (approximately 35 ° C), making it easier to control the pressure in the gaseous state. The organometallic raw material for forming the chromium layer 1 1 5 may be (C 6 H 6 ) 2 Cr, (C 2 H 5 ) 2 Cr, or the like.
また、 原料槽 201内には、 有機金属原料の代わりに金属化合物原料が 入れられていてもよい。 金属化合物原料は、 例えば、 C r (C5H702) 3 、 C r (CnH^O^ 3、 C r (C5HF6O2) 3などである。 Further, in the raw material tank 201, a metal compound raw material may be put in place of the organic metal raw material. Examples of the metal compound raw material include Cr (C 5 H 7 0 2 ) 3, Cr (CnH ^ O ^ 3 ), and Cr (C 5 HF 6 O 2 ) 3 .
ここで、 クロム層 1 1 5を成膜するのは、 その後に窒化して形成するク ロム窒化物の格子定数が窒化ガリゥムに近く、 窒化ガリゥムとの格子不整 合が小さいためである。  Here, the chromium layer 1 15 is formed because the lattice constant of chromium nitride formed by nitriding is close to that of gallium nitride, and the lattice mismatch with gallium nitride is small.
図 1 Cに示す工程では、 クロム層 1 1 5を窒化してクロム窒化物膜 12 0を形成する。  In the step shown in FIG. 1C, the chromium layer 1 15 is nitrided to form a chromium nitride film 120.
すなわち、 MOCVD装置 200では、 図 3に示すように、 アンモニア (NH3) ガスを含む水素ガス又は窒素ガス (以下、 窒化ガスとする) が 、 反応管 210内のクロム層 1 1 5近傍に供給される。 ここで、 ヒータ 2 14がサセプタ 2 16を介して下地基板 1 10を力 [1熱し、 下地基板 1 10 の温度 (クロム層 1 1 5の窒化温度) が 600°C以上に保持されている。 これにより、 クロム層 1 1 5が窒化してクロム窒化物膜 1 20が形成され る。 That is, in the MOCVD apparatus 200, as shown in FIG. 3, hydrogen gas or nitrogen gas (hereinafter referred to as nitriding gas) containing ammonia (NH 3 ) gas is supplied to the vicinity of the chromium layer 1 15 in the reaction tube 210. Is done. Here, the heater 2 14 applies force to the base substrate 1 10 via the susceptor 2 16 [1 heat, and the temperature of the base substrate 1 10 (nitriding temperature of the chromium layer 1 15) is maintained at 600 ° C. or higher. As a result, the chromium layer 1 15 is nitrided to form the chromium nitride film 120.
ここで、 クロム層 1 1 5の窒化温度は、 1000°C以上 (1273K以 上) であることが好ましく、 1040°C以上であることがさらに好ましく 、 1060°C以上であることがさらに好ましい。 クロム窒化物膜 1 20は 、 下地基板 1 10と、 後述の第 1結晶層 1 30及び第 2結晶層 140との 間の応力を緩和するバッファ一層として機能する。 また、 クロム窒化物膜 1 20は、 後述の第 1結晶層 1 30が結晶成長するためのシ一ド膜として 機能する。 さらに、 クロム窒化物膜 120は、 後述のエッチング処理にお ける剥離層として機能する。 この工程において下地基板 1 10の加熱温度を 100 o°c以上で窒化す ることにより得られた試料の表面を顕微鏡観察すると、 例えば図 7に示す SEM写真が得られる。 図 7に示すように、 クロム層 1 1 5がほぼ全部窒 化して、 三角錐形状の複数の凸部 (微結晶部) を表面に有するクロム窒化 物膜 1 20が形成される。 Here, the nitriding temperature of the chromium layer 115 is preferably 1000 ° C. or higher (1273 K or higher), more preferably 1040 ° C. or higher, and further preferably 1060 ° C. or higher. The chromium nitride film 120 functions as a buffer layer that relieves stress between the base substrate 110 and a first crystal layer 130 and a second crystal layer 140 described later. The chromium nitride film 120 functions as a seed film for crystal growth of a first crystal layer 130 described later. Further, the chromium nitride film 120 functions as a peeling layer in an etching process described later. In this process, when the surface of the sample obtained by nitriding the substrate substrate 110 at a heating temperature of 100 ° C. or higher is observed with a microscope, for example, an SEM photograph shown in FIG. 7 is obtained. As shown in FIG. 7, the chromium layer 115 is almost entirely nitrided to form a chromium nitride film 120 having a plurality of triangular pyramid-shaped convex portions (microcrystalline portions) on the surface.
また、 図 1 A〜図 1 Cに示す工程は、 MOCVD装置 200の反応管 2 10內を大気開放せずに (i n— s i t uで) 行われる。 これにより、 下 地基板 1 10の加熱温度が 1000°C以上である場合、 窒化ガスがクロム 層 1 1 5に均質に供給された状態で、 クロム窒化物膜 1 20の表面に凸部 (微結晶部) が形成される。 このため、 クロム窒化物膜 1 20の表面の凸 部 (微結晶部) の大きさが均一になる (図 7の SEM写真参照) 。 これに より、 後述の図 2 Aに示す工程において、 第 1結晶層 1 30が結晶するた めの核生成サイ卜が均一に分布するので、 第 1結晶層 1 30の結晶性を向 上させることができる。 このため、 後述の図 2 Bに示す工程において、 第 1結晶層 1 30の上に成長する第 2結晶層 140の結晶層も向上させるこ とができる。  Also, the steps shown in FIGS. 1A to 1C are performed without opening the reaction tube 210 of the MOCVD apparatus 200 to the atmosphere (in n−s i t u). As a result, when the heating temperature of the base substrate 1 10 is 1000 ° C. or higher, a convex portion (slightly on the surface of the chromium nitride film 120 with the nitriding gas uniformly supplied to the chromium layer 1 15 Crystal part) is formed. For this reason, the size of the convex portion (microcrystalline portion) on the surface of the chromium nitride film 120 becomes uniform (see the SEM photograph in FIG. 7). As a result, in the process shown in FIG. 2A, which will be described later, the nucleation size for the first crystal layer 130 to crystallize is uniformly distributed, so that the crystallinity of the first crystal layer 130 is improved. be able to. Therefore, the crystal layer of the second crystal layer 140 grown on the first crystal layer 130 can be improved in the step shown in FIG. 2B described later.
さらに、 クロム窒化物膜 120に対して X線解析を行うと、 図 8に示す X線回折結果が得られる。 図 8に示されるように、 クロム窒化物膜 120 の (1 1 1) 面のピーク半値幅は、 1 310 [a r c s e c] である。 こ れにより、 クロム窒化物膜 120の結晶性が良好であることが分かる。 図 2 Aに示す工程では、 MOCVD法により、 クロム窒化物膜 1 20の 上に I I I族窒化物半導体の第 1結晶層 1 30を成長させる。  Further, when an X-ray analysis is performed on the chromium nitride film 120, an X-ray diffraction result shown in FIG. 8 is obtained. As shown in FIG. 8, the peak half-value width of the (1 1 1) plane of the chromium nitride film 120 is 1 310 [a r c s e c]. This shows that the crystallinity of the chromium nitride film 120 is good. In the step shown in FIG. 2A, a first crystal layer 130 of a group I I I nitride semiconductor is grown on the chromium nitride film 120 by MOCVD.
すなわち、 MOC VD装置 20◦では、 図 3に示すように、 第 1結晶層 1 30を形成するための有機金属原料を、 バブラ一 220内の原料槽 20 1に入れておく。 N2、 H2, 及び A rの少なくとも 1つを、 キャリアガ スとして、 MFC 230を介して原料槽 201に流入する。 このとき、 M FC 230は、 キャリアガスの流量を制御する。 原料槽 201内で気化し た有機金属原料は、 キャリアガスとともに E PC 240を介して反応管 2 10内に流入する。 このとき、 EPC240は、 キャリアガス及び気化し た有機金属原料の流量を制御する。 また、 窒化ガスが、 反応管 210内に 流入する。 反応管 210内では、 ヒータ 214がサセプタ 216を介して 下地基板 1 10を加熱し下地基板 1 10を約 600〜 1000 °Cに保つ。 そして、 気化状態の有機金属原料及び窒化ガスがクロム窒化物膜 1 20近 傍に供給されることにより、 クロム窒化物膜 1 20の上に第 1結晶層 1 3 0が気相成長して成膜される。 この結果、 クロム窒化物膜 1 20及び第 1 結晶層 1 30を含む多重層 ML 1が下地基板 1 10の上に形成される。 なお、 第 1結晶層 1 30を形成するための有機金属原料は、 例えば、 ト リメチルガリウム (TMG) である。 第 1結晶層 1 30は、 例えば、 Ga Nの単結晶体、 多結晶体又はアモルファス体で構成されうる。 第 1結晶層 130の厚さは、 数十 A〜数十 μπιであることが好ましい。 第 1結晶層 1 30の成長温度は、 900°C付近であることが好ましい。 反応管 2 10内 の圧力は、 例えば、 500 T o r rに維持される。 有機金属原料の流量は 、 例えば、 300 c cである。 窒化ガスに含まれる水素ガスの流量は、 例 えば、 10リツトル Z分である。 That is, in the MOC VD apparatus 20 °, as shown in FIG. 3, the organometallic raw material for forming the first crystal layer 130 is put in the raw material tank 201 in the bubbler 220. At least one of N2, H2, and Ar flows as carrier gas into the raw material tank 201 via the MFC 230. At this time, the M FC 230 controls the flow rate of the carrier gas. Vaporization in the material tank 201 The organometallic raw material flows into the reaction tube 210 through the EPC 240 together with the carrier gas. At this time, the EPC 240 controls the flow rate of the carrier gas and the vaporized organometallic raw material. Further, nitriding gas flows into the reaction tube 210. In the reaction tube 210, the heater 214 heats the base substrate 110 through the susceptor 216 to keep the base substrate 110 at about 600 to 1000 ° C. Then, the vaporized organometallic raw material and the nitriding gas are supplied in the vicinity of the chromium nitride film 120, so that the first crystal layer 130 is formed by vapor growth on the chromium nitride film 120. Be filmed. As a result, the multilayer ML 1 including the chromium nitride film 120 and the first crystal layer 130 is formed on the base substrate 110. The organometallic raw material for forming the first crystal layer 130 is, for example, trimethylgallium (TMG). The first crystal layer 130 can be composed of, for example, a GaN single crystal, a polycrystal, or an amorphous body. The thickness of the first crystal layer 130 is preferably several tens of A to several tens of μπι. The growth temperature of the first crystal layer 130 is preferably around 900 ° C. The pressure in the reaction tube 2 10 is maintained at 500 Torr, for example. The flow rate of the organic metal raw material is, for example, 300 cc. The flow rate of the hydrogen gas contained in the nitriding gas is, for example, 10 liters Z.
図 2 Bに示す工程では、 MOCVD法により、 第 1結晶層 130の上に 、 第 1結晶層 1 30の成長温度よりも高い温度で I I I族窒化物半導体の 第 2結晶層 140を成長させる。  In the step shown in FIG. 2B, the second crystal layer 140 of the I II nitride semiconductor is grown on the first crystal layer 130 at a temperature higher than the growth temperature of the first crystal layer 130 by MOCVD.
すなわち、 MOCVD装置 200では、 ヒータ 2 14がサセプタ 216 を介して下地基板 1 1 0を加熱し下地基板 1 10を約 1 100口に保つ。 そして、 第 2結晶層 140の成長温度は、 第 1結晶層 1 30の成長温度 ( That is, in the MOCVD apparatus 200, the heater 2 14 heats the base substrate 110 via the susceptor 216 and keeps the base substrate 110 at about 1100 openings. The growth temperature of the second crystal layer 140 is equal to the growth temperature of the first crystal layer 130 (
900°C付近) よりも高い温度である約 1 100°Cになる。 ここで、 第 2 結晶層 14◦は、 G a Nの単結晶体である。 第 2結晶層 140の膜厚は、The temperature is about 1 100 ° C, which is higher than around 900 ° C. Here, the second crystal layer 14 ° is a single crystal of G a N. The film thickness of the second crystal layer 140 is
10 Ομπ!〜 50 Ομπιであることが好ましレ、。 他の点は、 図 2 Αに示すェ 程と同様である。 この工程で得られた試料の断面を S EM観察すると、 例えば、 図 4の S EM写真に示す結果が得られる。 図 4に示すように、 SEM観察した視野 内において、 第 2結晶層 140には転位等によるクラックが観察されない 。 これにより、 第 2結晶層 140の結晶性が良好であることが推認できる o 10 Ομπ! ~ 50 les, preferably to be Ομπι. The other points are the same as those shown in Fig. 2 (b). When SEM observation is performed on the cross section of the sample obtained in this process, for example, the result shown in the SEM photograph in FIG. 4 is obtained. As shown in FIG. 4, no cracks due to dislocations are observed in the second crystal layer 140 within the field of view observed by SEM. This confirms that the crystallinity of the second crystal layer 140 is good.
また、 図 1 A〜図 2 Bに示す工程は、 MOCVD装置 200の反応管 2 10内を大気開放せずに ( i n— s i t uで) 連続して行われる。 これに より、 第 2結晶層 140の結晶性が良好な状態に保たれ、 その表面にピッ 卜がほとんど形成されない (図 9参照) 。  Further, the steps shown in FIGS. 1A to 2B are continuously performed without releasing the atmosphere in the reaction tube 2 10 of the MOCVD apparatus 200 (in n−s i tu). As a result, the crystallinity of the second crystal layer 140 is maintained in a good state, and almost no pitch is formed on the surface (see FIG. 9).
さらに、 第 2結晶層 140に対して X線解析を行うと、 図 10に示す X 線回折結果が得られる。 図 10に示されるように、 第 2結晶層 140の ( 0002) 面のピーク半値幅は、 467 [a r c s e c] である。 これに より、 第 2結晶層 140の結晶性が良好であることが分かる。  Further, when an X-ray analysis is performed on the second crystal layer 140, the X-ray diffraction result shown in FIG. 10 is obtained. As shown in FIG. 10, the peak half-value width of the (0002) plane of the second crystal layer 140 is 467 [ar c s e c]. This shows that the crystallinity of the second crystal layer 140 is good.
図 2 Cに示す工程では、 化学溶液を用いてクロム窒化物膜 120を選択 的にエッチングする。 すなわち、 クロム窒化物膜 1 20を、 側方からゥェ ットエッチングする。  In the step shown in FIG. 2C, the chromium nitride film 120 is selectively etched using a chemical solution. In other words, the chromium nitride film 120 is wet etched from the side.
ここで、 エツチャント (化学溶液) は、 例えば、 過塩素酸 (HC 1〇4 ) と硝酸 2セリウムアンモニゥム (C e (ΝΉ4) 2 (ΝΟ3) 6) との混合 水溶液が好適であるが、 これに限定されない。 Here, Etsuchanto (chemical solution), for example, a mixed aqueous solution of nitrate 2 cerium ammonium Niu arm perchlorate (HC 1_Rei 4) (C e (ΝΉ 4 ) 2 (ΝΟ 3) 6) are preferred However, it is not limited to this.
なお、 エッチングレートは、 化学溶液の温度及び濃度によって調節する ことができる。 エッチングレートを調節することによって、 第 1結晶層 1 30及び第 2結晶層 140が下地基板 1 10から分離される際に発生する クラックを抑制することができる。  The etching rate can be adjusted according to the temperature and concentration of the chemical solution. By adjusting the etching rate, cracks that occur when the first crystal layer 130 and the second crystal layer 140 are separated from the base substrate 110 can be suppressed.
この工程の途中で試料の断面 (エッチング状態) を SEM観察すると、 例えば、 図 5の SEM写 ¾に示す結果が得られる。 図 5に示すように、 下 地基板 1 10と第 1結晶層 1 30との間において、 クロム窒化物膜 1 20 では、 エッチングされた部分 120 aが、 エッチングされていない部分 1 20 bの側方に位置している。 エッチングされた部分 120 aは、 空洞部 分である。 If the cross section (etched state) of the sample is observed by SEM during this process, for example, the result shown in the SEM image of FIG. 5 is obtained. As shown in FIG. 5, in the chromium nitride film 120 between the base substrate 1 10 and the first crystal layer 1 30, the etched portion 120 a is replaced with the unetched portion 1. Located on the side of 20b. The etched portion 120a is a hollow portion.
クロム窒化物膜 1 20がエッチングされると、 図 2 Cに示すように、 第 1結晶層 130及び第 2結晶層 140は、 下地基板 1 10から分離する。 すなわち、 第 1結晶層 130及び第 2結晶層 140を下地基板 1 10から 自立させて G a N基板 (テンプレート基板) SBを製造する。  When the chromium nitride film 120 is etched, the first crystal layer 130 and the second crystal layer 140 are separated from the base substrate 110 as shown in FIG. 2C. That is, the first crystal layer 130 and the second crystal layer 140 are self-supported from the base substrate 110 to manufacture a GaN substrate (template substrate) SB.
また、 この工程で得られた試料の X線回折結果を図 6に示す。 図 6では 、 この工程で得られた試料の (0002) 面の回折プロファイルが実線で 示され、 前の工程 (図 2 Bに示す工程) で得られた試料の (0002) 面 の回折プロファイルが比較のために破線で示されている。 図 6に示される ように、 この工程を行う前 (破線) の (0002) 面のピーク半値幅が 2 4 1 [a r c s e c] であり、 この工程を行つた後 (実線) の (0002 ) 面のピーク半値幅が 229 [a r c s e c] である。 これにより、 第 2 結晶層 140の結晶性が良好に保たれた状態でエッチングが行われたこと がわかる。  Figure 6 shows the X-ray diffraction results of the sample obtained in this process. In FIG. 6, the diffraction profile of the (0002) plane of the sample obtained in this step is shown by a solid line, and the diffraction profile of the (0002) plane of the sample obtained in the previous step (step shown in FIG. 2B) is It is shown with a broken line for comparison. As shown in Fig. 6, the peak half-value width of (0002) plane before this process (broken line) is 2 4 1 [arcsec], and after performing this process (solid line) of (0002) plane The peak half-width is 229 [arcsec]. As a result, it can be seen that the etching was performed while the crystallinity of the second crystal layer 140 was kept good.
(比較例)  (Comparative example)
図 1 Bに示す工程と図 1 Cに示す工程との間で、 MOC VD装置 200 の反応管 210内を大気開放した場合を考える。  Consider a case where the reaction tube 210 of the MOC VD apparatus 200 is opened to the atmosphere between the process shown in FIG. 1B and the process shown in FIG. 1C.
図 1 Bに示す工程により得られた試料を大気にさらすと、 図 1 1 A及び 図 1 1 Bの TEM写真及び図 12 A〜図 12 Dの元素分析マップに示す結 果が得られる。 すなわち、 クロム層 1 1 5 jの上に表面酸化膜 1 1 6 jが 形成される (図 1 1 A、 図 1 1 B参照) 。 また、 図 1 2 A〜図 12 Dに示 す元素分析マップにおいて、 窒素マップ (図 1 2B参照) 、 クロムマップ (図 1 2C参照) 、 及び酸素マップ (図 12D参照) を比較すると、 クロ ム層 1 1 5 jが部分的に轔化され酸素コンタミネーシヨンを受けているこ とが分かる。 これにより、 図 1 Cに示す工程で、 下地基板 1 10の加熱温 度が 1 000°C以上である場合、 窒化ガスがクロム層 1 15 jに不均質に 供給された状態で、 クロム窒化物膜の表面に凸部 (微結晶部) が形成され る。 これにより、 比較例における凸部 (微結晶部) は、 図 1 Bに示す工程 と図 1 Cに示す工程との間で大気開放されない場合 (図 7参照) に比べて 、 その大きさが不均一になる (図 13の S EM写真参照) 。 When the sample obtained by the process shown in Fig. 1B is exposed to the atmosphere, the results shown in the TEM photographs of Figs. 11A and 11B and the elemental analysis maps of Figs. 12A to 12D are obtained. That is, a surface oxide film 1 1 6 j is formed on the chromium layer 1 1 5 j (see FIGS. 11A and 11B). In addition, in the elemental analysis maps shown in Fig. 12A to Fig. 12D, the nitrogen map (see Fig. 12B), the chromium map (see Fig. 12C), and the oxygen map (see Fig. 12D) are compared. It can be seen that layer 1 1 5 j is partially hatched and subjected to oxygen contamination. Accordingly, in the process shown in FIG. 1C, when the heating temperature of the base substrate 1 10 is 1 000 ° C. or higher, the nitriding gas is inhomogeneous in the chromium layer 1 15 j. In the supplied state, convex portions (microcrystalline portions) are formed on the surface of the chromium nitride film. As a result, the size of the convex portion (microcrystalline portion) in the comparative example is less than that in the case where the air is not released between the process shown in FIG. 1B and the process shown in FIG. 1C (see FIG. 7). It becomes uniform (see SEM picture in Fig. 13).
なお、 図 1 2 A〜図 1 2Dに示す元素分析マップにおいて、 図 1 2Aに 示す写真は、 図 1 1 Aに示すものと同様の TEM写真である。  In the elemental analysis maps shown in FIGS. 12A to 12D, the photograph shown in FIG. 12A is a TEM photograph similar to that shown in FIG. 11A.
さらに、 クロム窒化物膜 1 20に対して X線解析を行うと、 図 14に示 す X線回折結果が得られる。 図 14に示されるように、 クロム窒化物膜の (1 1 1) 面のピーク半値幅は、 2847 [a r c s e c] である。 これ により、 比較例に係るクロム窒化物膜は、 図 1 Bに示す工程と図 1 Cに示 す工程との間で大気開放されない場合 (図 8参照) に比べて、 結晶性が悪 くなっていることが分かる。  Furthermore, when X-ray analysis is performed on the chromium nitride film 120, the X-ray diffraction results shown in FIG. 14 are obtained. As shown in FIG. 14, the peak half-value width of the (1 1 1) plane of the chromium nitride film is 2847 [ar c s e c]. As a result, the chromium nitride film according to the comparative example has poor crystallinity as compared to the case where the atmosphere is not released between the process shown in FIG. 1B and the process shown in FIG. 1C (see FIG. 8). I understand that
次に、 図 1 Cに示す工程と図 2 Aに示す工程との間で、 MOCVD装置 200の反応管 2 10内を大気開放した場合を考える。 図 1 Cに示す工程 により得られた試料を大気にさらすと、 クロム窒化物膜の表面が酸化され る。 これにより、 第 2結晶層の結晶性が悪くなり、 その表面にピットが形 成される (図 1 5及び図 16参照) 。 なお、 図 16は、 第 2結晶層の表面 を A F M解析した結果を示す。  Next, consider the case where the inside of the reaction tube 210 of the MOCVD apparatus 200 is opened to the atmosphere between the process shown in FIG. 1C and the process shown in FIG. 2A. When the sample obtained by the process shown in Fig. 1C is exposed to the atmosphere, the surface of the chromium nitride film is oxidized. As a result, the crystallinity of the second crystal layer deteriorates, and pits are formed on the surface (see FIGS. 15 and 16). FIG. 16 shows the result of AFM analysis of the surface of the second crystal layer.
さらに、 第 2結晶層に対して X線解析を行うと、 図 1 7に示す X線回折 結果が得られる。 図 1 7に示されるように、 第 2結晶層の (0002) 面 のピーク半値幅は、 55 7 [a r c s e c] である。 これにより、 第 2結 晶層は、 図 1 Cに示す工程と図 2 Aに示す工程との間で大気開放しない場 合 (図 10参照) に比べて、 結晶性が悪くなつていることが分かる。  Furthermore, when X-ray analysis is performed on the second crystal layer, the X-ray diffraction results shown in Fig. 17 are obtained. As shown in Fig. 17, the peak half-value width of the (0002) plane of the second crystal layer is 55 7 [a r c s e c]. As a result, the crystallinity of the second crystal layer is worse than when the atmosphere is not released between the process shown in FIG. 1C and the process shown in FIG. 2A (see FIG. 10). I understand.
(変形例)  (Modification)
また、 図 1 B〜図 2 Aに示す工程を大気開放せずに連続的に繰り返すと 、 図 18 Aに示すように、 下地基板 1 10の上に複数の多重層 ML 1〜M L 4が形成される。 これにより、 複数の多重層 ML 1〜ML 4が複数積層 された構造体 1 0 0が下地基板 1 1 0の上に形成される。 Moreover, when the process shown in FIG. 1B to FIG. 2A is continuously repeated without opening to the atmosphere, a plurality of multilayers ML 1 to ML 4 are formed on the base substrate 1 10 as shown in FIG. 18A. Is done. This allows multiple multilayers ML 1 to ML 4 to be stacked The formed structure 1 0 0 is formed on the base substrate 1 1 0.
この構造体 1 0 0では、 クロム窒化物層 1 2 0と第 1結晶層 1 3 0とが 交互に積層されているので、 下地基板 1 1 0と第 2結晶層 1 4 0との間に 働く内部応力を緩和させることができる。  In this structure 1 0 0, the chromium nitride layer 1 2 0 and the first crystal layer 1 3 0 are alternately stacked, so that the structure between the base substrate 1 1 0 and the second crystal layer 1 4 0 The working internal stress can be relaxed.
なお、 図 1 B〜図 2 Aに示す工程は、 同一の装置内で行われても良いし 、 異なる装置内で行われても良い。 異なる装置内で行われる場合、 それぞ れの反応室どうしが大気開放されずに搬送可能な機構 (例えば、 搬送路) で接続されているものとする。  1B to 2A may be performed in the same apparatus or may be performed in different apparatuses. When performed in different devices, the reaction chambers are connected by a mechanism that can be transported without being exposed to the atmosphere (for example, a transport path).
図 1 8 Bに示す工程では、 化学溶液を用いて複数のクロム窒化物層 1 2 0を選択的に同時にエッチングする。 すなわち、 図 1 8 Bに示すように、 複数のクロム窒化物層 1 2 0を、 それぞれ、 側方からエッチングする。 ここで、 複数の多重層 M L 1〜M L 4のそれぞれにおけるクロム窒化物 層 1 2 0のエッチングの進行とともに結晶層 1 3 0が破壊されながらエツ チングが進行する。 これにより、 化学溶液の浸透していく経路が複数形成 されるとともに、 それらの経路が互いに結合するので、 化学溶液の浸透し ていくための経路面積が大きくなる。 このため、 エッチングレートを向上 することができる。 また、 複数の多重層 M L 1〜M L 4がエッチング途中 において下地基板 1 1 0と第 2結晶層 1 4 0との間に働く内部応力を緩和 させるので、 第 2結晶層 1 4 0の内部応力を略均等な状態に保つことがで きる。  In the step shown in FIG. 18B, a plurality of chromium nitride layers 120 are selectively etched simultaneously using a chemical solution. That is, as shown in FIG. 18B, each of the plurality of chromium nitride layers 120 is etched from the side. Here, the etching progresses while the crystal layer 1 30 is destroyed as the etching of the chromium nitride layer 1 2 0 in each of the multiple layers M L 1 to M L 4 progresses. As a result, a plurality of paths through which the chemical solution permeates are formed, and these paths are coupled to each other, so that the path area for the chemical solution to permeate increases. For this reason, the etching rate can be improved. In addition, since the multiple multilayers ML 1 to ML 4 relax the internal stress acting between the base substrate 110 and the second crystal layer 140 during the etching, the internal stress of the second crystal layer 140 Can be maintained in a substantially uniform state.
なお、 エツチャント (化学溶液) は、 例えば、 過塩素酸 (H C 1 0 4 ) と硝酸 2セリウムアンモニゥム (C e (N H 4) 2 (N 0 3) 6 ) との混合水 溶液が好適であるが、 これに限定されない。 As the etchant (chemical solution), for example, a mixed water solution of perchloric acid (HC 1 0 4 ) and 2 cerium ammonium nitrate (C e (NH 4 ) 2 (N 0 3 ) 6 ) is suitable. Yes, but not limited to this.
複数のクロム窒化物層 1 2 0がエッチングされると、 図 1 8 Cに示すよ うに、 第 2結晶層 1 4 0及びそれに隣接する第 1結晶層 1 3 0が下地基板 1 1 0から分離する。 すなわち、 第 2結晶層 1 4 0及びそれに隣接する第 1結晶層 1 3 0を下地基板 1 1 0から自立させて G a N基板 S Bを製造す る。 このとき、 第 2結晶層 140において、 内部応力が略均等な状態にな つている。 これにより、 第 2結晶層 140にクラックを生じるおそれが低 減している。 When the plurality of chromium nitride layers 1 2 0 are etched, as shown in FIG. 18 C, the second crystal layer 1 4 0 and the adjacent first crystal layer 1 3 0 are separated from the base substrate 1 1 0. To do. That is, the second crystal layer 140 and the adjacent first crystal layer 130 are made independent from the base substrate 110 to manufacture the GaN substrate SB. The At this time, in the second crystal layer 140, the internal stress is in a substantially uniform state. As a result, the risk of cracking in the second crystal layer 140 is reduced.
ここで、 第 2結晶層 140に隣接する第 1結晶層 1 30は、 エッチヤン ト (化学溶液) によりエッチングされずに、 G a N基板 S Bの一部となる このように、 図 1 B〜図 2 Aに示す工程を大気開放せずに連続的に繰り 返すことにより、 第 2結晶層 140及びそれに隣接する第 1結晶層 1 30 を下地基板 1 10から分離する工程を、 安定的にかつ短時間で行うことが できる。  Here, the first crystal layer 130 adjacent to the second crystal layer 140 is not etched by the etchant (chemical solution) and becomes a part of the GaN substrate SB. 2 The process of separating the second crystal layer 140 and the first crystal layer 1 30 adjacent thereto from the base substrate 110 by repeating the process shown in 2A continuously without exposing to the atmosphere is stable and short. Can be done in time.
また、 図 1 Bに示す工程及び図 1 Cに示す工程の代わりに、 図 1 9 Aに 示す工程が行われても良い。 図 1 9Aに示す工程では、 MOCVD法によ り、 下地基板 1 10の上にクロム窒化物膜 120 iを直接的に成膜する。 すなわち、 MOC VD装置 200では、 図 3に示すように、 クロム層 1 1 5 (図 1 B) を形成するための有機金属原料を、 バブラ一 220内の原 料槽 201に入れておく。 N2、 H2、 及び A rの少なくとも 1つを、 キ ャリアガスとして、 MFC 230を介して原料槽 201に流入する ώ この とき、 MFC 230は、 キャリアガスの流量を制御する。 原料槽 201内 で気化した有機金属原料は、 キャリアガスとともに EPC 240を介して 反応管 210に流入する。 このとき、 EPC 240は、 キャリアガス及び 気化した有機金属原料の流量を制御する。 また、 窒化ガスが、 反応管 21 0内に流入する。 反応管 210内では、 ヒータ 214がサセプタ 216を 介して下地基板 1 10を加熱し下地基板 1 10を一定温度に保つ。 そして 、 気化状態の有機金属原料及び窒化ガスが下地基板 1 10近傍に供給され ることにより、 下地基板 1 10の上にクロム窒化物膜 1 20 iが気相成長 して成膜される。 Further, instead of the process shown in FIG. 1B and the process shown in FIG. 1C, the process shown in FIG. 19A may be performed. In the process shown in FIG. 19A, a chromium nitride film 120 i is formed directly on the base substrate 110 by the MOCVD method. That is, in the MOC VD apparatus 200, as shown in FIG. 3, the organic metal raw material for forming the chromium layer 1 15 (FIG. 1B) is put in the raw material tank 201 in the bubbler 220. At least one of N2, H2, and Ar flows as carrier gas into the raw material tank 201 via the MFC 230. At this time, the MFC 230 controls the flow rate of the carrier gas. The organometallic raw material vaporized in the raw material tank 201 flows into the reaction tube 210 through the EPC 240 together with the carrier gas. At this time, the EPC 240 controls the flow rate of the carrier gas and the vaporized organometallic raw material. In addition, nitriding gas flows into the reaction tube 210. Within the reaction tube 210, the heater 214 heats the base substrate 110 through the susceptor 216 to keep the base substrate 110 at a constant temperature. Then, the vaporized organometallic raw material and the nitriding gas are supplied to the vicinity of the base substrate 110, whereby the chromium nitride film 120 i is formed on the base substrate 110 by vapor phase growth.
なお、 クロム窒化物膜 120 iの成長温度は、 600°C以上に保持され る。 クロム窒化物膜 1 20 iの成長温度は、 1000 °C以上 ( 1 273 K 以上) であることが好ましく、 1040°C以上であることがさらに好まし く、 1060°C以上であることがさらに好ましい。 Note that the growth temperature of the chromium nitride film 120 i is maintained at 600 ° C or higher. The The growth temperature of the chromium nitride film 120 i is preferably 1000 ° C or higher (1 273 K or higher), more preferably 1040 ° C or higher, and more preferably 1060 ° C or higher. preferable.
この工程で得られた試料におけるクロム窒化物膜 1 20 iに対して X線 解析を行うと、 図 20に示す X線回折結果が得られる。 図 20に示される ように、 クロム窒化物膜 1 20 iの (1 1 1) 面のピーク半値幅は、 97 1 [a r c s e c] である。 これにより、 クロム窒化物膜 1 20 iの結晶 性が、 比較例に係るクロム窒化物膜の結晶性 (図 14参照) に比べて、 良 好であることが分かる。  When the X-ray analysis is performed on the chromium nitride film 120 i in the sample obtained in this step, the X-ray diffraction result shown in FIG. 20 is obtained. As shown in FIG. 20, the peak half-value width of the (1 1 1) plane of the chromium nitride film 120 i is 97 1 [a r c s e c]. This shows that the crystallinity of the chromium nitride film 120 i is better than the crystallinity of the chromium nitride film according to the comparative example (see FIG. 14).
さらに、 図 1 9 Bに示す工程及び図 19 Cに示す工程を行った試料の第 2結晶層 140 iに対して X線解析を行うと、 図 21に示す X線回折結果 が得られる。 図 21に示されるように、 第 2結晶層 140 iの (0002 ) 面のピーク半値幅は、 332 [a r c s e c] である。 これにより、 第 2結晶層 140 iの結晶性が、 比較例に係るクロム窒化物膜の結晶性 (図 17参照) に比べて、 良好であることが分かる。  Further, when the X-ray analysis is performed on the second crystal layer 140 i of the sample that has been subjected to the process shown in FIG. 19B and the process shown in FIG. 19C, the X-ray diffraction result shown in FIG. 21 is obtained. As shown in FIG. 21, the peak half-value width of the (0002) plane of the second crystal layer 140 i is 332 [a r c s e c]. Thus, it can be seen that the crystallinity of the second crystal layer 140 i is better than that of the chromium nitride film according to the comparative example (see FIG. 17).
また、 図 1 A〜図 2 Bに示す工程における少なくとも 1つの工程は、 M OHVPE装置 300の反応管 310内で行われても良い。 図 22は、 M OHVPE装置 300の構成図である。 このとき、 図 3に示す MOCVD 装置 200と図 22に示す MOHVPE装置 300とが搬送空間 40を介 して接続されている (図 29参照) 。 搬送空間 40は、 真空状態又は不活 性ガスが満たされた状態になっている。 MQCVD装置 200又は MOH VPE装置 300と搬送空間 40との間には、 処理時に閉じられ搬送時に 開かれる開閉機構が設けられている。 これにより、 図 1 A〜図 2 Bに示す 工程を大気開放せずに連続して行うことができる。  Further, at least one of the steps shown in FIGS. 1A to 2B may be performed in the reaction tube 310 of the MOHVPE apparatus 300. FIG. 22 is a configuration diagram of the M OHVPE apparatus 300. At this time, the MOCVD apparatus 200 shown in FIG. 3 and the MOHVPE apparatus 300 shown in FIG. 22 are connected via the transfer space 40 (see FIG. 29). The transfer space 40 is in a vacuum state or a state filled with an inert gas. An opening / closing mechanism is provided between the MQCVD apparatus 200 or the MOH VPE apparatus 300 and the transfer space 40, which is closed during processing and opened during transfer. Thereby, the process shown in FIGS. 1A to 2B can be continuously performed without opening to the atmosphere.
例えば、 図 1 Aに示す工程では、 MOHVPE装置 300内に下地基板 1 10を搬入する。 すなわち、 下地基板 1 10は、 図 22に示す MOHV P E装置 300の反応管 310内に搬入されサセプタ 316の上に置かれ る。 そして、 反応管 310内は、 密閉された後に 1 mmT o r rまで真空 引きされる。 For example, in the process shown in FIG. 1A, the base substrate 110 is carried into the MOHVPE apparatus 300. That is, the base substrate 110 is carried into the reaction tube 310 of the MOHV PE apparatus 300 shown in FIG. 22 and placed on the susceptor 316. The The inside of the reaction tube 310 is evacuated to 1 mm Torr after being sealed.
例えば、 図 1 Bに示す工程では、 MOHVPE法により、 下地基板 1 1 0の上にクロム層 1 15を成膜する。  For example, in the process shown in FIG. 1B, a chromium layer 115 is formed on the base substrate 110 by the MOHVPE method.
すなわち、 MOHVPE装置 300では、 図 22に示すように、 クロム 層 1 1 5を形成するための有機金属原料を、 バブラ一 320内の原料槽 3 01に入れておく。 N2、 H2、 及び A rの少なくとも 1つを、 キャリア ガスとして、 MFC 330を介して原料槽 301に流入する。 このとき、 MFC 330は、 キャリアガスの流量を制御する。 原料槽 301内で気化 した有機金属原料は、 キャリアガスとともに EPC 340を介して反応管 310に流入する。 このとき、 EPC340は、 キャリアガス及び気化し た有機金属原料の流量を制御する。 反応管 310内では、 ヒータ 3 14が 反応管 310内の気体を介して下地基†反 1 10を加熱し下地基板 1 10を —定温度に保つ。 そして、 気化状態の有機金属原料が下地基板 1 10近傍 に供給されることにより、 下地基板 1 10の上にクロム層 1 1 5が気相成 長して成膜される。  That is, in the MOHVPE apparatus 300, as shown in FIG. 22, the organic metal raw material for forming the chromium layer 115 is placed in the raw material tank 301 in the bubbler 320. At least one of N2, H2, and Ar flows as carrier gas into the raw material tank 301 via the MFC 330. At this time, the MFC 330 controls the flow rate of the carrier gas. The organometallic raw material vaporized in the raw material tank 301 flows into the reaction tube 310 through the EPC 340 together with the carrier gas. At this time, the EPC 340 controls the flow rate of the carrier gas and the vaporized organometallic raw material. In the reaction tube 310, the heater 3 14 heats the base substrate 110 through the gas in the reaction tube 310 to keep the base substrate 110 at a constant temperature. Then, the vaporized organometallic raw material is supplied to the vicinity of the base substrate 1 10, whereby the chromium layer 1 15 is formed on the base substrate 1 10 by vapor phase growth.
なお、 クロム層 1 1 5を形成するための有機金属原料は、 例えば、 (C H3C5H4) 2C rである。 気化した有機金属原料の流量は 0. 9 s c cm であることが好ましく、 キャリアガス (例えば H2) の流量は 3250 s c c mであることが好ましい。 下地基板 1 10の温度は常温〜 1 100°C であることが好ましい。 クロム層 1 15の膜厚は数十 A〜数十 μπιである ことが好ましい。 An organic metal raw material for forming the chromium layer 1 15 is, for example, (CH 3 C 5 H 4 ) 2 Cr. The flow rate of the vaporized organometallic raw material is preferably 0.9 sccm, and the flow rate of the carrier gas (for example, H 2 ) is preferably 3250 sccm. The temperature of the base substrate 110 is preferably from room temperature to 1100 ° C. The film thickness of the chromium layer 115 is preferably several tens of A to several tens of μπι.
例えば、 図 1 Cに示す工程では、 クロム層 1 1 5を窒化してクロム窒化 物膜 1 20を形成する。  For example, in the step shown in FIG. 1C, the chromium layer 115 is nitrided to form the chromium nitride film 120.
すなわち、 MOHVP Ε装置 300では、 図 22に示すように、 アンモ ユア (ΝΗ3) ガスを含む水素ガスあるいは窒素ガス (以下、 窒化ガスと する) 力 反応管 310内のクロム層 1 15近傍に供給される。 ここで、 一 1フ ー That is, in the MOHVP dredge apparatus 300, as shown in FIG. 22, hydrogen gas or nitrogen gas (hereinafter referred to as nitriding gas) containing ammonia (モ3 ) gas is supplied in the vicinity of the chromium layer 115 in the reaction tube 310. Is done. here, 1 1
ヒータ 3 14が反応管 310内の気体を介して下埤基板 1 10をカロ熱し、 下地基板 1 1 0の温度 (クロム層 1 15の窒化温度) が 600°C以上に保 持されている。 これにより、 クロム層 1 1 5が窒化してクロム窒化物膜 1The heater 314 heats the lower substrate 110 via the gas in the reaction tube 310, and the temperature of the base substrate 110 (nitriding temperature of the chromium layer 115) is maintained at 600 ° C or higher. As a result, the chromium layer 1 1 5 is nitrided and the chromium nitride film 1 1
20が形成される。 20 is formed.
なお、 反応管 310内には、 窒化ガスに加えて、 塩化水素 (HC 1 ) ガ スを含む水素ガス又は窒素ガス (以下、 還元ガスとする) がさらに供給さ れても良い。  In addition to the nitriding gas, hydrogen gas or nitrogen gas (hereinafter referred to as a reducing gas) containing hydrogen chloride (HC 1) gas may be further supplied into the reaction tube 310.
ここで、 MOHVP E装置 300を用いて図 1 Bに示す工程及び図 1 C に示す工程により得られた試料を X線解析して、 それぞれ、 図 23の (a ) 及び図 23の (b) に示す X線回折結果を得た。 図 23の (a) と図 2 3の (b) とを比較することにより、 クロム層 1 1 5が窒化処理によりク 口ム窒化物膜 1 20に変わっていることが分かる。 ク口ム窒化物膜 120 は、 体心立方構造 (BCC : B o d y C e n t e r Cu b i c) をと つている。  Here, using the MOHVP E apparatus 300, X-ray analysis was performed on the samples obtained in the process shown in FIG. 1B and the process shown in FIG. 1C, respectively, and (a) in FIG. 23 and (b) in FIG. The X-ray diffraction results shown in Fig. 1 were obtained. By comparing (a) in FIG. 23 and (b) in FIG. 23, it can be seen that the chromium layer 115 is changed to the chromium nitride film 120 by the nitriding treatment. The nitride nitride film 120 has a body-centered cubic structure (BCC: BodeyCenterCuBic).
例えば、 図 2 Aに示す工程では、 MOHVPE法により、 クロム窒化物 膜 120の上に I I I族窒化物半導体の第 1結晶層 1 30を成長させる。 すなわち、 MOHVPE装置 300では、 図 22に示すように、 ヒータ 31 5が反応管 31 0内の気体を介して G a源 322を加熱し、 気化した ガリゥムが生成される。 また、 窒化ガスが、 反応管 310内に流入する。 反応管 3 10内では、 ヒータ 314が反応管 310内の気体を介して下地 基板 1 10を加熱し下地基板 1 10を約 600〜 1000 °Cに保つ。 そし て、 気化したガリゥム及び窒化ガスがクロム窒化物膜 1 20近傍に供給さ れることにより、 クロム窒化物膜 1 20の上に第 1結晶層 1 30が気相成 長して成膜される。 この結果、 クロム窒化物膜 120及び第 1結晶層 1 3 0を含む多重層 ML 1が下地基板 1 10の上に形成される。  For example, in the process shown in FIG. 2A, a first crystal layer 130 of an I II nitride semiconductor is grown on the chromium nitride film 120 by MOHVPE. That is, in the MOHVPE apparatus 300, as shown in FIG. 22, the heater 315 heats the Ga source 322 via the gas in the reaction tube 310, and vaporized gallium is generated. Also, nitriding gas flows into the reaction tube 310. In the reaction tube 3 10, the heater 314 heats the base substrate 110 through the gas in the reaction tube 310 to keep the base substrate 110 at about 600 to 1000 ° C. Then, the vaporized gallium and the nitriding gas are supplied in the vicinity of the chromium nitride film 120, whereby the first crystal layer 130 is formed on the chromium nitride film 120 by vapor phase growth. . As a result, a multilayer ML 1 including the chromium nitride film 120 and the first crystal layer 130 is formed on the base substrate 110.
例えば、 図 2 Bに示す工程では、 MOHVPE法により、 第 1結晶層 1 For example, in the process shown in FIG. 2B, the first crystal layer 1 is formed by the MOHVPE method.
30の上に、 第 1結晶層 1 30の成長温度よりも高い温度で I I I族窒化 物半導体の第 2結晶層 140を成長させる。 On top of 30, the first crystal layer 1 Group III nitride at a temperature higher than the growth temperature of 30 A second crystalline layer 140 of a physical semiconductor is grown.
すなわち、 MOHVPE装置 300では、 ヒータ 314が反応管 310 内の気体を介して下地基板 1 10を加熱し下地基板 1 10を約 1 1 00°C に保つ。 そして、 第 2結晶層 140の成長温度は、 第 1結晶層 1 30の成 長温度 (900°C付近) よりも高い温度である約 1 100°Cになる。 ここ で、 第 2結晶層 140は、 G a Nの単結晶体である。 第 2結晶層 140の 膜厚は、 10 Ομπ!〜 50 Ομπιであることが好ましい。 他の点は、 図 2 A に示す工程と同様である。  That is, in the MOHVPE apparatus 300, the heater 314 heats the base substrate 110 via the gas in the reaction tube 310 and keeps the base substrate 110 at about 110 ° C. The growth temperature of the second crystal layer 140 is about 1100 ° C., which is higher than the growth temperature (around 900 ° C.) of the first crystal layer 130. Here, the second crystal layer 140 is a GaN single crystal. The film thickness of the second crystal layer 140 is 10 Ομπ! It is preferably ~ 50 〜μπι. The other points are the same as those shown in FIG. 2A.
この工程で得られた試料の断面を SEM観察すると、 例えば、 図 24 A の SEM写真に示す結果が得られる。 図 24 Aに示すように、 SEM観察 した視野内において、 第 2結晶層 140には転位等によるクラックが観察 されない。 また、 この工程で得られた試料の断面を TEM観察すると、 図 25に示す結果が得られる。 図 25に示すように、 TEM観察した視野内 において、 転位ループ等が観察されない。 これにより、 第 2結晶層 140 の結晶性が良好であることが推認できる。  When the cross section of the sample obtained in this step is observed by SEM, for example, the result shown in the SEM photograph of FIG. 24A is obtained. As shown in FIG. 24A, no cracks due to dislocations or the like are observed in the second crystal layer 140 within the field of view observed by SEM. In addition, when the cross section of the sample obtained in this step is observed by TEM, the results shown in FIG. 25 are obtained. As shown in Fig. 25, no dislocation loop or the like is observed in the field of view observed by TEM. This confirms that the crystallinity of the second crystal layer 140 is good.
さらに、 第 2結晶層 140に対して X線解析を行うと、 図 24 Bに示す X線回折結果が得られる。 図 24 Bに示されるように、 第 2結晶層 140 の (0002) 面のピーク半値幅は、 491 [a r c s e c] である。 第 2結晶層 140の (1 0— 1 1) 面のピーク半値幅は、 341 [a r c s e c] である。 これにより、 第 2結晶層 140の結晶性が良好であること が分かる。  Further, when X-ray analysis is performed on the second crystal layer 140, the X-ray diffraction result shown in FIG. 24B is obtained. As shown in FIG. 24B, the peak half-value width of the (0002) plane of the second crystal layer 140 is 491 [ar c s e c]. The peak half-value width of the (1 0— 1 1) plane of the second crystal layer 140 is 341 [a r c s e c]. This shows that the crystallinity of the second crystal layer 140 is good.
なお、 グロム層 1 1 5 (図 1 B参照) の膜厚に応じて最適の窒化条件が 変化する。 第 2結晶層 140の成長温度を 1 000°C以上にして、 窒化ガ スと還元ガスとの比率を 10〜40まで変化しながら成長を行った。 あるいは、 図 1 B及び図 1 Cに示す工程の代わりに図 1 9 Aに示す工程 を MOHVP E装置 300の反応管 310内で行っても良い。  Note that the optimum nitriding conditions vary depending on the film thickness of the glom layer 1 15 (see Fig. 1B). The second crystal layer 140 was grown at a growth temperature of 1 000 ° C. or more while changing the ratio of nitriding gas and reducing gas to 10-40. Alternatively, instead of the steps shown in FIGS. 1B and 1C, the step shown in FIG. 19A may be performed in the reaction tube 310 of the MOHVP E device 300.
すなわち、 MOHVP E装置 300では、 図 22に示すように、 クロム 層 1 1 5. (図 I B) を形成するための有機金属原料を、 バブラ一 320内 の原料槽 301に入れておく。 N 2、 H 2、 及び A rの少なくとも 1つを 、 キャリアガスとして、 MFC 330を介して原料槽 301に流入する。 このとき、 MFC 330は、 キャリアガスの流量を制御する。 原料槽 30 1内で気化した有機金属原料は、 キヤリアガスとともに E P C 340を介 して反応管 3 10に流入する。 このとき、 E PC 340は、 キャリアガス 及び気化した有機金属原料の流量を制御する。 また、 窒化ガスが、 反応管 310内に流入する。 反応管 310内では、 ヒータ 314が反応管 310 内の気体を介して下地基板 1 10を加熱し下地基板 1 10を一定温度に保 つ。 そして、 気化状態の有機金属原料及び窒化ガスが下地基板 1 1 0近傍 に供給されることにより、 下地基板 1 10の上にクロム窒化物膜 1 20 i が気相成長して成膜される。 That is, in the MOHVP E device 300, as shown in FIG. Layer 1 1 5. Organometallic raw material for forming (Fig. IB) is placed in the raw material tank 301 in the bubbler 320. At least one of N 2, H 2, and Ar flows as a carrier gas into the raw material tank 301 via the MFC 330. At this time, the MFC 330 controls the flow rate of the carrier gas. The organometallic raw material vaporized in the raw material tank 30 1 flows into the reaction tube 3 10 through the EPC 340 together with the carrier gas. At this time, the EPC 340 controls the flow rates of the carrier gas and the vaporized organometallic raw material. Also, nitriding gas flows into the reaction tube 310. In the reaction tube 310, the heater 314 heats the base substrate 110 through the gas in the reaction tube 310 to keep the base substrate 110 at a constant temperature. Then, the vaporized organometallic raw material and the nitriding gas are supplied to the vicinity of the base substrate 110, whereby the chromium nitride film 120 i is formed on the base substrate 110 by vapor phase growth.
この工程で得られた試料の断面を TEM観察すると、 図 26に示す結果 が得られる。 TEM像 (図 26の a参照) 及びその拡大像 (図 26の c参 照) に示すように、 TEM観察した視野内において、 転位ループ等が観察 されない。 また、 電子線回折結果 (図 26の b参照) もほぼ対称に分布し た回折スポットを示している。 これにより、 第 2結晶層 140の結晶性が 良好であることが推認できる。  When the cross section of the sample obtained in this process is observed by TEM, the results shown in Fig. 26 are obtained. As shown in the TEM image (see Fig. 26a) and its magnified image (see Fig. 26c), dislocation loops etc. are not observed in the field of view observed by TEM. The electron diffraction results (see b in Fig. 26) also show diffraction spots distributed almost symmetrically. This confirms that the crystallinity of the second crystal layer 140 is good.
この工程で得られた試料のクロム窒化物膜 120 iに対して X線解析を 行うと、 図 27に示す X線回折結果が得られる。 図 27に示されるように 、 クロム窒化物膜 120 iの (1 1 1) 面のピークが強く出ており、 クロ ム窒化物膜 1 20 iが (1 1 1) 配向していることが分かる。  When the X-ray analysis is performed on the chromium nitride film 120 i of the sample obtained in this step, the X-ray diffraction result shown in FIG. 27 is obtained. As shown in FIG. 27, the peak of the (1 1 1) plane of the chromium nitride film 120 i is strong, and it can be seen that the chromium nitride film 120 i is (1 1 1) oriented. .
また、 図 1 A〜図 2 Bに示す工程における少なくとも 1つの工程は、 M OMBE装置 400の反応管 410内で行われても良い。 図 28は、 MO MBE装置 400の構成同である。 このとき、 図 3に示す MOCVD装置 200と図 22に示す MOHVPE装置 300と図 28に示す MOMBE 装置 400とが搬送空間 40を介して接続されている (図 29参照) 。 搬 送空間 40は、 真空状態又は不活性ガスが満たされた状態になっている。 MOCVD装置 200、 MOHVPE装置 300又は MOMBE装置 40 0と搬送空間 40との間には、 処理時に閉じられ搬送時に開かれる開閉機 構が設けられている。 これにより、 図 1 A〜図 2 Bに示す工程を大気開放 せずに連続して行うことができる。 Further, at least one of the steps shown in FIGS. 1A to 2B may be performed in the reaction tube 410 of the MOMBE apparatus 400. FIG. 28 shows the same configuration of the MO MBE device 400. At this time, the MOCVD apparatus 200 shown in FIG. 3, the MOHVPE apparatus 300 shown in FIG. 22, and the MOMBE apparatus 400 shown in FIG. 28 are connected via the transfer space 40 (see FIG. 29). Carrying The sending space 40 is in a vacuum state or a state filled with an inert gas. Between the MOCVD apparatus 200, the MOHVPE apparatus 300 or the MOMBE apparatus 400 and the transfer space 40, an opening / closing mechanism that is closed during processing and opened during transfer is provided. Thereby, the process shown in FIGS. 1A to 2B can be continuously performed without opening to the atmosphere.
例えば、 図 1 Aに示す工程では、 MOMBE装置 400内に下地基板 1 10を搬入する。 すなわち、 下地基板 1 10は、 図 28に示す MOMBE 装置 400の反応管 4 10内に搬入されサセプタ 4 1 6の上に置かれる。 そして、 反応管 410内は、 密閉された後に ImmTo r rまで真空引き される。  For example, in the process shown in FIG. 1A, the base substrate 110 is carried into the MOMBE apparatus 400. That is, the base substrate 110 is carried into the reaction tube 4 10 of the MOMBE apparatus 400 shown in FIG. 28 and placed on the susceptor 4 16. The inside of the reaction tube 410 is sealed and then evacuated to ImmTorr.
例えば、 図 1 Bに示す工程では、 MOMBE法により、 下地基板 1 10 の上にクロム層 1 1 5を成膜する。  For example, in the process shown in FIG. 1B, a chromium layer 1 15 is formed on the base substrate 1 10 by MOMBE.
すなわち、 MOMB E装置 400では、 図 28に示すように、 クロム層 1 1 5を形成するための有機金属原料を、 バブラ一 420内の原料槽 40 1に入れておく。 N2、 H2、 及び A rの少なくとも 1つを、 キャリアガ スとして、 MFC 430を介して原料槽 401に流入する。 このとき、 M FC430は、 キャリアガスの流量を制御する。 原料槽 401内で気化し た有機金属原料は、 キャリアガスとともに EPC440を介して反応管 4 10に流入する。 このとき、 EPC440は、 キャリアガス及び気化した 有機金属原料の流量を制御する。 反応管 410内では、 ヒータ 414が反 応管 410内の気体を介して下地基板 1 10を加熱し下地基板 1 10を一 定温度に保つ。 そして、 気化状態の有機金属原料が下地基板 1 10近傍に 供給されることにより、 下地基板 1 10の上にクロム層 1 1 5が気相成長 して成膜される。  That is, in the MOMBE apparatus 400, as shown in FIG. 28, the organometallic raw material for forming the chromium layer 1 15 is put in the raw material tank 401 in the bubbler 420. At least one of N2, H2, and Ar flows as carrier gas into the raw material tank 401 via the MFC 430. At this time, the M FC430 controls the flow rate of the carrier gas. The organometallic raw material vaporized in the raw material tank 401 flows into the reaction tube 410 through the EPC 440 together with the carrier gas. At this time, the EPC 440 controls the flow rate of the carrier gas and the vaporized organometallic raw material. In the reaction tube 410, the heater 414 heats the base substrate 110 through the gas in the reaction tube 410 to keep the base substrate 110 at a constant temperature. Then, when the vaporized organometallic raw material is supplied to the vicinity of the base substrate 110, a chromium layer 115 is formed on the base substrate 110 by vapor phase growth.
例えば、 図 1 Cに示す工程では、 クロム層 1 1 5を窒化してクロム窒化 物膜 1 20を形成する。  For example, in the step shown in FIG. 1C, the chromium layer 115 is nitrided to form the chromium nitride film 120.
すなわち、 MOMB E装置 400では、 図 28に示すように、 アンモニ ァ (NH3) ガスを含む水素ガスあるいは窒素ガス (以下、 窒化ガスとす る) 力 反応管 410内のクロム層 1 1 5近傍に供給される。 ここで、 ヒ —タ 4 14が反応管 4 10内の気体を介して下地基板 1 10を加熱し、 下 地基板 1 10の温度 (クロム層 1 1 5の窒化温度) が 600°C以上に保持 されている。 これにより、 クロム層 1 1 5が窒化してクロム窒化物膜 12 0が形成される。 That is, in the MOMB E device 400, as shown in FIG. Hydrogen gas containing nitrogen (NH 3 ) gas or nitrogen gas (hereinafter referred to as nitriding gas) force Supplied in the vicinity of the chromium layer 1 15 in the reaction tube 410. Here, the heater 4 14 heats the base substrate 1 10 through the gas in the reaction tube 4 10, and the temperature of the base substrate 1 10 (the nitriding temperature of the chromium layer 1 15) is 600 ° C or higher. Retained. As a result, the chromium layer 1 15 is nitrided to form the chromium nitride film 120.
なお、 反応管 410内には、 窒化ガスに加えて、 塩化水素 (HC 1 ) ガ スを含む水素ガス又は窒素ガス (以下、 還元ガスとする) がさらに供給さ れても良い。  In addition to the nitriding gas, hydrogen gas or nitrogen gas (hereinafter referred to as a reducing gas) containing hydrogen chloride (HC 1) gas may be further supplied into the reaction tube 410.
例えば、 図 2 Aに示す工程では、 MOMBE法により、 クロム窒化物膜 120の上に 1 I I族窒化物半導体の第 1結晶層 1 30を成長させる。 すなわち、 MOMBE装置 400では、 図 28に示すように、 第 1結晶 層 1 30を形成するための有機金属原料を、 バブラ一 420内の原料槽 4 01に入れておく。 N 2、 H 2、 及び A rの少なくとも 1つを、 キヤリァ ガスとして、 MFC 430を介して原料槽 401に流入する。 このとき、 MF C 430は、 キヤリァガスの流量を制御する。 原料槽 401内で気化 した有機金属原料は、 キャリアガスとともに EPC440を介して反応管 410内に流入する。 このとき、 E PC 440は、 キャリアガス及ぴ気化 した有機金属原料の流量を制御する。 また、 窒.化ガスが、 反応管 410内 に流入する。 反応管 4 10内では、 ヒータ 414がサセプタ 416を介し て下地基板 1 10を加熱し下地基板 1 10を約 600〜 1000口に保つ 。 そして、 気化状態の有機金属原料及び窒化ガスがクロム窒化物膜 120 近傍に供給されることにより、 クロム窒化物膜 1 20の上に第 1結晶層 1 30が気相成長して成膜される。 この結果、 クロム窒化物膜 1 20及び第 1結晶層 1 30を含む多蓴層 ML 1が下地基板 1 10の上に形成される。 例えば、 図 2 Bに示す工程では、 MOMB E法により、 第 1結晶層 1 3 0の上に、 第 1結晶層 130の成長温度よりも高い温度で I I I族窒化物 半導体の第 2結晶層 140を成長させる。 For example, in the step shown in FIG. 2A, the first crystal layer 130 of the group II nitride semiconductor is grown on the chromium nitride film 120 by the MOMBE method. That is, in the MOMBE apparatus 400, as shown in FIG. 28, an organometallic raw material for forming the first crystal layer 130 is put in a raw material tank 401 in the bubbler 420. At least one of N 2, H 2, and Ar flows into the raw material tank 401 through the MFC 430 as a carrier gas. At this time, the MFC 430 controls the carrier gas flow rate. The organometallic raw material vaporized in the raw material tank 401 flows into the reaction tube 410 through the EPC 440 together with the carrier gas. At this time, the EPC 440 controls the flow rate of the carrier gas and the vaporized organometallic raw material. Also, nitriding gas flows into the reaction tube 410. In the reaction tube 4 10, the heater 414 heats the base substrate 110 through the susceptor 416 to keep the base substrate 110 at about 600 to 1000 ports. Then, the vaporized organometallic raw material and the nitriding gas are supplied in the vicinity of the chromium nitride film 120, whereby the first crystal layer 130 is formed by vapor phase growth on the chromium nitride film 120. . As a result, the multilayer ML 1 including the chromium nitride film 120 and the first crystal layer 130 is formed on the base substrate 110. For example, in the step shown in FIG. 2B, a group III nitride is formed on the first crystal layer 130 by a MOMBE method at a temperature higher than the growth temperature of the first crystal layer 130. A second crystalline layer 140 of semiconductor is grown.
すなわち、 MOMB E装置 400では、 ヒータ 414が反応管 4 10内 の気体を介して下地基板 1 10を加熱し下地基板 1 10を約 1 100°Cに 保つ。 そして、 第 2結晶層 140の成長温度は、 第 1結晶層 130の成長 温度 (900°C付近) よりも高い温度である約 1 100°Cになる。 ここで 、 第 2結晶層 140は、 G a Nの単結晶体である。 第 2結晶層 140の膜 厚は、 10 Ομπ!〜 50 Ομπιであることが好ましい。 他の点は、 図 2 Αに 示す工程と同様である。  That is, in the MOMBE apparatus 400, the heater 414 heats the base substrate 110 via the gas in the reaction tube 4 10 to keep the base substrate 110 at about 1100 ° C. The growth temperature of the second crystal layer 140 is about 1100 ° C., which is higher than the growth temperature of the first crystal layer 130 (around 900 ° C.). Here, the second crystal layer 140 is a GaN single crystal. The film thickness of the second crystal layer 140 is 10 Ομπ! It is preferably ~ 50 〜μπι. The other points are the same as the process shown in Fig. 2 (b).
なお、 MOMBE装置 400には、 例えば、 反射高速電子線回析 (R e f l e c t i o n H i g h En e r g y E l e c t r o n D i f f r a c t i o n : RHEED) 用ガン 414と RHEEDスクリーン 4 16が取り付けられていてもよく、 表面微小凹凸部での透過回析パターン を観測できるようになつていてもよレ、。 下地基板 1 10を保持しているサ セプタ 416は、 操作部 (Ma n i p u l a t o r) 41 8の先に取り付 けられていてもよレ、。  The MOMBE device 400 may be equipped with, for example, a reflection high-energy electron diffraction (RHEED) gun 414 and a RHEED screen 4 16. You may be able to observe the transmission diffraction pattern at the. The susceptor 416 that holds the base substrate 1 10 may be attached to the tip of the operation unit (Manipu lar) 41 8.
また、 図 1 A〜図 2 Bに示す各工程は、 CVD、 MOCVD, MBE、 MOMBE、 MOHVPE、 H V P E法を含むいずれの気相成長法により 行われても良い。  1A to 2B may be performed by any vapor phase growth method including CVD, MOCVD, MBE, MOMBE, MOHVPE, and HVPE.
例えば、 図 1 A〜図 2 Bに示す各工程は、 図 29に示すマルチチャンバ システム 1を用いて行われても良い。 マルチチャンバシステム 1は、 MO CVD装置 200、 MOHVPE装置 300、 MOMBE装置 400、 C VD装置 10、 MB E装置 20、 HVPE装置 30、 及び搬送空間 40を 備える。 MOCVD装置 200、 MOHVPE装置 300、 MOMBE装 置 400、 CVD装置 10、 MBE装置 20、 及び HVPE装置 30は、 搬送空間 40を介して互いに接続されている。 搬送空間 40は、 真空状態 又は不活性ガスが満たされた状態になっている。 MOCVD装置 200、 MOHVPE装置 300、 MOMBE装置 400、 CVD装置 10、 MB E装置 2.0、 及び HVPE装置 30と、 搬送空間 40との間には、 処理時 に閉じられ搬送時に開かれる開閉機構が設けられている。 これにより、 図 1 A〜図 2 Bに示す工程を大気開放せずに連続して行うことができる。 例えば、 マルチチャンバシステム 1を用いて、 図 1 A〜図 1 Cに示すェ 程を MOC VD法により行い、 搬送空間 40を介して試料を MOC VD装 置 200から HVPE装置 30へ搬送した後、 図 2 A及び図 2 Bに示すェ 程を H VP E法により行ってもよい。 For example, the steps shown in FIGS. 1A to 2B may be performed using the multi-chamber system 1 shown in FIG. The multi-chamber system 1 includes a MO CVD apparatus 200, a MOHVPE apparatus 300, a MOMBE apparatus 400, a CVD apparatus 10, an MBE apparatus 20, an HVPE apparatus 30, and a transfer space 40. The MOCVD apparatus 200, the MOHVPE apparatus 300, the MOMBE apparatus 400, the CVD apparatus 10, the MBE apparatus 20, and the HVPE apparatus 30 are connected to each other through a transfer space 40. The transfer space 40 is in a vacuum state or filled with an inert gas. MOCVD equipment 200, MOHVPE equipment 300, MOMBE equipment 400, CVD equipment 10, MB Between the E device 2.0 and the HVPE device 30 and the transfer space 40, an opening / closing mechanism that is closed during processing and opened during transfer is provided. Thereby, the process shown to FIG. 1A-FIG. 2B can be performed continuously, without releasing to air | atmosphere. For example, using the multi-chamber system 1, the process shown in FIGS. 1A to 1C is performed by the MOC VD method, and the sample is transferred from the MOC VD apparatus 200 to the HVPE apparatus 30 via the transfer space 40. The process shown in FIGS. 2A and 2B may be performed by the HVPE method.
このようにして得られた試料の断面を S EM観察すると、 例えば、 図 3 OAの S EM写真に示す結果が得られる。 図 3 OAに示すように、 SEM 観察した視野内において、 第 2結晶層 1 40には転位等によるクラックが 観察されない。 これにより、 第 2結晶層 1 40の結晶性が良好であること が推認できる。  When the cross section of the sample obtained in this way is observed by SEM, for example, the result shown in the SEM photograph of OA in Fig. 3 is obtained. As shown in FIG. 3 OA, no cracks due to dislocations or the like are observed in the second crystal layer 140 within the field of view observed by SEM. This confirms that the crystallinity of the second crystal layer 140 is good.
さらに、 第 2結晶層 1 40に対して X線解析を行うと、 図 30 Bに示す X線回折結果が得られる。 図 30 Bに示されるように、 第 2結晶層 1 40 の (000 2) 面のピーク半値幅は、 34 3 [a r c s e c] である。 第 2結晶層 1 40の (1 0— 1 1) 面のピーク半値幅は、 3 7 5 [a r c s e c] である。 これにより、 第 2結晶層 1 40の結晶性が良好であること が分かる。  Further, when X-ray analysis is performed on the second crystal layer 140, the X-ray diffraction result shown in FIG. 30B is obtained. As shown in FIG. 30B, the peak half-value width of the (000 2) plane of the second crystal layer 140 is 34 3 [a r c s e c]. The peak half-value width of the (1 0— 1 1) plane of the second crystal layer 140 is 3 7 5 [ar c s e c]. This shows that the crystallinity of the second crystal layer 140 is good.
(G a N基板の素子構造への応用)  (Application to device structure of G a N substrate)
上記のようにして得られた G a N基板 S Bに、 G a N系発光素子 (例: I nG a N/G a N青色発光ダイォード、 G a N/A 1 G a N紫外線発光 ダイォード及ぴレーザ ·ダイォード) 、 G a N系電子素子などを形成する 。 例えば、 以下に示すような素子構造を形成することができる。  The G a N substrate SB obtained as described above is applied to a G a N-based light emitting device (eg, In G a N / G a N blue light emitting diode, G a N / A 1 G a N ultraviolet light emitting diode, and so on). Laser diodes), GaN-based electronic elements, etc. For example, an element structure as shown below can be formed.
図 3 1に示すように、 G a N基板 S Bの上に、 11ー0 & 1^層640を形 成する。 次に、 n_G a N層 640の上に活性層 ( I n G a N/G a N量 子井戸構造) 6 50を形成する。 そして、 活性層 6 50の上に p_G a N 層 (又は n— A l G a N層) 6 60を形成する。 これにより、 トップダウ ン型電極を持つ素子構造 600を形成できる。 この結果、 電極による発光 面積の損失を回避できると共に、 活性層から発生する熱を効率よく放熱す ることができ、 素子動作特性の改善が期待できる。 As shown in Fig. 31, the 11-0 & 1 ^ layer 640 is formed on the GaN substrate SB. Next, an active layer (InGaN / GaN quantum well structure) 650 is formed on the n_GaN layer 640. Then, a p_G a N layer (or n—A 1 G a N layer) 6 60 is formed on the active layer 650. This allows you to An element structure 600 having a n-type electrode can be formed. As a result, it is possible to avoid the loss of the light emitting area due to the electrodes, and to efficiently dissipate the heat generated from the active layer, which can be expected to improve the element operating characteristics.
図 32に示すように、 G a N基板 SBの上に、 n_Ga N層 (又は n— A l GaN層) 722を形成する。 次に、 n _ G a N層 722の上に活性 層 (I nGa Nノ GaN量子井戸構造) 724を形成する。 そして、 活性 層の上に p— GaN層 (又は p— A l Ga N層) 726を形成する。 さら に、 上部電極 724及ぴ下部電極 722をそれぞれ形成する。 これにより 、 トップダウン型電極を持つ発光素子構造 700を形成することができる 。 この結果、 電極による発光面積の損失を回避できると共に、 活性層から 発生する熱を効率よく放熱することができ、 素子動作特性の改善が期待で きる。  As shown in FIG. 32, an n_Ga N layer (or n—A 1 GaN layer) 722 is formed on a GaN substrate SB. Next, an active layer (InGaN-no-GaN quantum well structure) 724 is formed on the n_GaN layer 722. Then, a p-GaN layer (or p-AlGaN layer) 726 is formed on the active layer. Further, an upper electrode 724 and a lower electrode 722 are formed. As a result, a light emitting device structure 700 having a top-down electrode can be formed. As a result, it is possible to avoid the loss of the light emitting area due to the electrodes, and to efficiently dissipate the heat generated from the active layer, which can be expected to improve the element operating characteristics.
図 33に示すように、 G a N基板 S Bの上に、 i— G a N層 821を形 成する。 次に、 i一 G a N層 821の上に n— Ga N層 822を形成する 。 η—Ga N層 822の上に n— A 1 GaN層 840を形成する。 そして 、 n— A 1 G a N層 840の一部をエッチングし、 ソース電極 832と ド レイン電極 838とを形成する。 その後、 n—A 1 GaN層 840上にゲ ート電極 834を形成する。 これにより、 トップダウン型電極を持つ G a N系のへテロ接合電子素子構造 800を形成することができる。  As shown in FIG. 33, the i—G a N layer 821 is formed on the G a N substrate S B. Next, an n-GaN layer 822 is formed on the i-type GaN layer 821. An n—A 1 GaN layer 840 is formed on the η—Ga N layer 822. Then, a part of the n—A 1 Ga N layer 840 is etched to form a source electrode 832 and a drain electrode 838. Thereafter, a gate electrode 834 is formed on the n—A 1 GaN layer 840. As a result, a GaN-based heterojunction electronic device structure 800 having a top-down electrode can be formed.
図 34に示すように、 GaN基板 SBの上に、 n— Ga N層 930を形 成する。 次に、 11ー0& 層930の上に 1—03 層 (又は i— A 1 G aN層) 940を形成する。 そして、 i—G a N層 940の上に、 ソース 電極 91 2、 914とゲート電極 916とを形成する。 その後、 G a N基 板 SBの裏面にドレインの電極 918を形成する。 これにより、 立て型電 子素子構造 900を形成することができる。  As shown in FIG. 34, an n—GaN layer 930 is formed on the GaN substrate SB. Next, a 1-03 layer (or i-A 1 GaN layer) 940 is formed on the 11-0 & layer 930. Then, source electrodes 912 and 914 and a gate electrode 916 are formed on the i-G a N layer 940. Thereafter, a drain electrode 918 is formed on the back surface of the GaN substrate SB. Thereby, the vertical electronic element structure 900 can be formed.
以上のように、 本発明によれば、 G a N基板 S Bの結晶性が大幅に改善 される。 そのため、 その上に形成される素子構造に含まれる各層の結晶性 が大幅に向上して、 デバイスの特性と歩留まりとを大幅に向上できる。 本発明は上記実施の形態に制限されるものではなく、 本発明の精神及び 範囲から離脱することなく、 様々な変更及び変形が可能である。 従って、 本発明の範囲を公にするために、 以下の請求項を添付する。 As described above, according to the present invention, the crystallinity of the GaN substrate SB is greatly improved. Therefore, the crystallinity of each layer included in the device structure formed on it Can greatly improve device characteristics and yield. The present invention is not limited to the above embodiment, and various changes and modifications can be made without departing from the spirit and scope of the present invention. Therefore, in order to make the scope of the present invention public, the following claims are attached.

Claims

1 . 外部空間から仕切られた処理空間内に下地基板を搬入する搬入工程 と、 1. a carry-in process for carrying the base substrate into the processing space partitioned from the external space;
気相成長法により、 前記下地基板の上にクロム層を成膜するクロム層成 膜工程と、  A chromium layer forming step of forming a chromium layer on the base substrate by vapor deposition;
0a.青  0a.Blue
前記クロム層を窒化してクロム窒化物膜を形成する窒化工程と、 前記クロム窒化物膜の上に I I I族窒化物半導体の第 1結晶層を成長さ せる第 1結晶層成長工程と、  A nitriding step of nitriding the chromium layer to form a chromium nitride film; a first crystal layer growing step of growing a first crystal layer of an I II nitride semiconductor on the chromium nitride film;
を備え、 With
 Surrounding
前記クロム層成膜工程と前記窒化工程とは、 前記処理空間を大気開放せ ずに連続して行われる  The chromium layer forming step and the nitriding step are continuously performed without opening the processing space to the atmosphere.
ことを特徴とする半導体基板の製造方 ¾。 A method for producing a semiconductor substrate, characterized in that:
2 . 前記クロム層成膜工程と前記窒化工程とに加えて前記第 1結晶層成 長工程は、 前記処理空間を大気開放せずに連続して行われる 2. In addition to the chromium layer forming step and the nitriding step, the first crystal layer growing step is continuously performed without opening the processing space to the atmosphere.
ことを特徴とする請求項 1に記載の半導体基板の製造方法。 The method of manufacturing a semiconductor substrate according to claim 1, wherein:
3 . 前記クロム層成膜工程、前記窒化工程及び前記第 1結晶層成長工程 は、 前記処理空間を大気開放せずに連続して複数回行われて、 前記クロム 窒化物膜と前記第 1結晶層とを含む多重層を複数前記下地基板の上に積層 する 3. The chromium layer forming step, the nitriding step, and the first crystal layer growing step are continuously performed a plurality of times without opening the processing space to the atmosphere, and the chromium nitride film and the first crystal are formed. A plurality of multiple layers including a plurality of layers are stacked on the base substrate.
ことを特徴とする請求項 2に記載の半導体基板の製造方法。 The method for producing a semiconductor substrate according to claim 2, wherein:
4 . 前記クロム層成膜工程と前記第 1結晶層成長工程とは、 MO C V D 法、 MO H V P E法及び MOM B E法のいずれかにより行われる ことを特徴とする請求項 1力 ら 3のいずれか 1項に記載の半導体基板の製 造方法。 4. The chromium layer forming step and the first crystal layer growing step are performed by any one of a MO CVD method, a MO HVPE method, and a MOM BE method. Manufacture of the semiconductor substrate described in item 1. Manufacturing method.
5 . 前記処理空間は、 5. The processing space is
第 1空間と、  The first space,
第 2空間と、  The second space,
前記第 1空間と前記第 2空間とを接続する第 3空間と、  A third space connecting the first space and the second space;
を含む including
ことを特徴とする請求項 1カゝら 4のいずれか 1項に記載の半導体基板の製 造方法。 5. The method for manufacturing a semiconductor substrate according to any one of claims 1 to 4, wherein:
6 . 前記第 1結晶層の上に、前記第 1結晶層の成長温度よりも高い温度 で I I I族窒化物半導体の第 2結晶層を成長させる第 2結晶層成長工程を さらに備え、 6. The method further comprises a second crystal layer growth step of growing a second crystal layer of the I I I nitride semiconductor on the first crystal layer at a temperature higher than the growth temperature of the first crystal layer,
前記ク口ム層成膜工程と前記窒化工程とに加えて前記第 1結晶層成長ェ 程と前記第 2結晶層成長工程とは、 気相成長法により、 前記処理空間を大 気開放せずに連続して行われる  In addition to the deposition layer forming step and the nitriding step, the first crystal layer growth step and the second crystal layer growth step may be performed by vapor deposition without opening the processing space to the atmosphere. Performed continuously
ことを特徴とする請求項 2に記載の半導体基板の製造方法。 The method for producing a semiconductor substrate according to claim 2, wherein:
7 . 前記クロム窒化物膜をェツチングして、前記第 2結晶層と前記第 1 結晶層とを含む部分を前記下地基板から分離する分離工程をさらに備えた ことを特徴とする請求項 6に記載の半導体基板の製造方法。 7. The method according to claim 6, further comprising a separation step of etching the chromium nitride film to separate a portion including the second crystal layer and the first crystal layer from the base substrate. Semiconductor substrate manufacturing method.
8 . 前記多重層の上に、前記第 1結晶層の成長温度よりも高い温度で I I I族窒化物半導体の第 2結晶層を成長させる第 2結晶層成長工程をさら に備え、 8. Further comprising a second crystal layer growth step of growing a second crystal layer of the I II nitride semiconductor on the multiple layer at a temperature higher than the growth temperature of the first crystal layer,
前記ク口ム層成膜工程と前記窒化工程とに加えて前記第 1結晶層成長ェ 程と前記第 2結晶層成長工程とは、 気相成長法により、 前記処理空間を大 気開放せずに連続して行われる' In addition to the deposition layer forming step and the nitriding step, the first crystal layer growth step and the second crystal layer growth step are performed by a vapor phase growth method to increase the processing space. It is done continuously without opening up.
ことを特徴とする請求項 3に記載の半導体基板の製造方法。 The method for manufacturing a semiconductor substrate according to claim 3, wherein:
9 . 前記多重層の前記クロム窒化物膜をエッチングして、前記第 2結晶 層とそれに隣接する第 1結晶層とを含む部分を前記下地基板から分離する 分離工程をさらに備えた 9. The method further comprises a separation step of etching the chromium nitride film of the multilayer to separate a portion including the second crystal layer and the first crystal layer adjacent thereto from the base substrate.
ことを特徴とする請求項 8に記載の半導体基板の製造方法。 The method of manufacturing a semiconductor substrate according to claim 8.
1 0 . 外部空間から仕切られた処理空間内に下地基板を搬入する搬入工程 と、 1 0. Carrying-in process for carrying the base substrate into the processing space partitioned from the external space;
気相成長法により、 前記下地基板の上にクロム窒化物膜を成膜するクロ ム窒化物膜成膜工程と、  A chromium nitride film forming step of forming a chromium nitride film on the base substrate by vapor deposition;
前記クロム窒化物膜の上に I I I族窒化物半導体の第 1結晶層を成長さ せる第 1結晶層成長工程と、  A first crystal layer growth step for growing a first crystal layer of a group I I I nitride semiconductor on the chromium nitride film;
を備え、 With
前記クロム窒化物膜成膜工程と前記第 1結晶層成長工程とは、 前記処理 空間を大気開放せずに連続して行われる  The chromium nitride film forming step and the first crystal layer growing step are continuously performed without opening the processing space to the atmosphere.
ことを特徴とする半導体基板の製造方法。 A method of manufacturing a semiconductor substrate.
1 1 . 前記クロム窒化物膜成膜工程及び前記第 1結晶層成長工程は、前記 処理空間を大気開放せずに連続して複数回行われて、 前記クロム窒化物膜 と前記第 1結晶層とを含む多重層を複数前記下地基板の上に積層する ことを特徴とする請求項 1 0に記載の半導体基板の製造方法。 1 1. The chromium nitride film forming step and the first crystal layer growing step are continuously performed a plurality of times without opening the processing space to the atmosphere, and the chromium nitride film and the first crystal layer are formed. The method for manufacturing a semiconductor substrate according to claim 10, wherein a plurality of multi-layers including: are stacked on the base substrate.
1 2 . 前記クロム窒化物膜成膜工程と前記第 1結晶層成長工程とは、 MO C V D法、 MO H V P E法及び MOM B E法のいずれかにより行われる ことを特徴とする請求項 1 0又は 1 1に記載の半導体基板の製造方法。 12. The chromium nitride film formation step and the first crystal layer growth step are performed by any one of a MO CVD method, a MO HVPE method, and a MOM BE method. A method for producing a semiconductor substrate according to 1.
1 3 . 前記処理空間は、 1 3. The processing space is
第 1空間と、  The first space,
第 2空間と、  The second space,
前記第 1空間と前記第 2空間とを接続する第 3空間と、  A third space connecting the first space and the second space;
を含む including
ことを特徴とする請求項 1 0又は 1 1に記載の半導体基板の製造方法。 The method for manufacturing a semiconductor substrate according to claim 10 or 11, wherein:
1 4 . 前記第 1結晶層の上に、前記第 1結晶層の成長温度よりも高い温度 で I I I族窒化物半導体の第 2結晶層を成長させる第 2結晶層成長工程を さらに備え、 14. Further comprising a second crystal layer growth step for growing a second crystal layer of an I II group nitride semiconductor on the first crystal layer at a temperature higher than a growth temperature of the first crystal layer,
前記クロム窒化物膜成膜工程と前記第 1結晶層成長工程とに加えて前記 第 2結晶層成長工程は、 気相成長法により、 前記処理空間を大気開放せず に連続して行われる  In addition to the chromium nitride film formation step and the first crystal layer growth step, the second crystal layer growth step is continuously performed by vapor phase growth without opening the processing space to the atmosphere.
ことを特徴とする請求項 1 1に記載の半導体基板の製造方法。 The method for manufacturing a semiconductor substrate according to claim 11, wherein:
1 5 . 前記クロム窒化物膜をエッチングして、前記第 2結晶層と前記第 1 結晶層とを含む部分を前記下地基板から分離する分離工程をさらに備えた ことを特徴とする請求項 1 4に記載の半導体基板の製造方法。 15. The method further comprises a separation step of etching the chromium nitride film to separate a portion including the second crystal layer and the first crystal layer from the base substrate. The manufacturing method of the semiconductor substrate as described in any one of.
1 6 . 前記多重層の上に、前記第 1結晶層の成長温度よりも高い温度で I I I族窒化物半導体の第 2結晶層を成長させる第 2結晶層成長工程をさら に備え、 16. Further comprising a second crystal layer growth step of growing a second crystal layer of an I II nitride semiconductor on the multiple layer at a temperature higher than the growth temperature of the first crystal layer,
前記ク口ム窒化物膜成膜工程と前記第 1結晶層成長工程とに加えて前記 第 2結晶層成長工程は、 気相成長法により、 前記処理空間を大気開放せず に連続して行われる  In addition to the deposition nitride film formation step and the first crystal layer growth step, the second crystal layer growth step is continuously performed by vapor phase growth without opening the processing space to the atmosphere. Be called
ことを特徴とする請求項 1 2に記載の半導体基板の製造方法。 The method for manufacturing a semiconductor substrate according to claim 12, wherein:
1 7 . 前記多重層の前記クロム窒化物膜をエッチングして、前記第 2結晶 層とそれに隣接する第 1結晶層とを含む部分を前記下地基板から分離する 分離工程をさらに備えた 17. The method further includes a separation step of etching the chromium nitride film of the multi-layer to separate a portion including the second crystal layer and the first crystal layer adjacent thereto from the base substrate.
ことを特徴とする請求項 1 6に記載の半導体基板の製造方法。 17. The method for manufacturing a semiconductor substrate according to claim 16, wherein:
1 8 . 外部空間から仕切られた処理空間内に下地基板を搬入する搬入工程 と、 1 8. Carrying-in process of carrying the base substrate into the processing space partitioned from the external space;
気相成長法により、 前記下地基板の上にクロム層を成膜するクロム層成 膜工程と、  A chromium layer forming step of forming a chromium layer on the base substrate by vapor deposition;
前記ク口ム層を窒化して、 三角錐形状の複数の微結晶部を有するクロム 窒化物膜を形成する窒化工程と、  Nitriding the nitride layer to form a chromium nitride film having a plurality of triangular pyramid-shaped microcrystalline portions; and
前記クロム窒化物膜の上に I I I族 ^化物半導体の第 1結晶層を成長さ せる第 1結晶層成長工程と、  A first crystal layer growth step of growing a first crystal layer of a group I II I compound semiconductor on the chromium nitride film;
を備え、 With
前記クロム層成膜工程と前記窒化工程とは、 前記処理空間を大気開放せ ずに連続して行われる  The chromium layer forming step and the nitriding step are continuously performed without opening the processing space to the atmosphere.
ことを特徴とする半導体基板の製造方法。 A method of manufacturing a semiconductor substrate.
1 9 . 前記クロム層成膜工程と前記窒化工程とにカ卩えて前記第 1結晶層成 長工程は、 前記処理空間を大気開放せずに連続して行われる 19. The first crystal layer growth step is performed continuously without opening the processing space to the atmosphere in combination with the chromium layer deposition step and the nitridation step.
ことを特徴とする請求項 1 8に記載の半導体基板の製造方法。 The method for manufacturing a semiconductor substrate according to claim 18, wherein:
2 0 . 外部空間から仕切られた処理空間内に下地基板を搬入する搬入工程 と、 2 0. Carrying-in process for carrying the base substrate into the processing space partitioned from the external space;
気相成長法により、 前記下地基板の上に、 三角錐形状の複数の微結晶部 を有するク口ム窒化物膜を成膜するク口ム窒化物膜成膜工程と、 前記クロム窒化物膜の上に Γ I I族窒化物半導体の第 1結晶層を成長さ せる第 1結晶層成長工程と、 A vapor nitride film forming step of forming a vapor nitride film having a plurality of triangular pyramid-shaped microcrystal parts on the base substrate by vapor phase growth; A first crystal layer growth step of growing a first crystal layer of a Γ group II nitride semiconductor on the chromium nitride film;
を備え、 With
前記クロム窒化物膜成膜工程と前記第 1結晶層成長工程とは、 前記処理 空間を大気開放せずに連続して行われる  The chromium nitride film forming step and the first crystal layer growing step are continuously performed without opening the processing space to the atmosphere.
ことを特徴とする半導体基板の製造方法。 A method of manufacturing a semiconductor substrate.
2 1 . 請求項 1から 2 0のいずれか 1項に記載の半導体基板の製造方法に より、 前記第 2結晶層を半導体基板として準備する準備工程と、 2 1. By the method for manufacturing a semiconductor substrate according to any one of claims 1 to 20, a preparation step of preparing the second crystal layer as a semiconductor substrate;
前記半導体基板の上に素子構造を形成する素子構造形成工程と、 を備えたことを特徴とする素子構造の製造方法。  An element structure forming step of forming an element structure on the semiconductor substrate; and a method of manufacturing the element structure.
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US8216869B2 (en) 2007-08-28 2012-07-10 Dowa Electronics Material Co., Ltd. Group III nitride semiconductor and a manufacturing method thereof
EP2031642A3 (en) * 2007-08-28 2014-07-02 DOWA Electronics Materials Co., Ltd. Group III nitride semiconductor and a manufacturing method thereof
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JP2011511460A (en) * 2008-01-31 2011-04-07 アプライド マテリアルズ インコーポレイテッド Processing system for manufacturing composite nitride semiconductor devices
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