WO2007066985A1 - Appareil et procede d'elaboration d'un metrique de bits mous, et systeme recepteur a maq a plusieurs niveaux - Google Patents

Appareil et procede d'elaboration d'un metrique de bits mous, et systeme recepteur a maq a plusieurs niveaux Download PDF

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Publication number
WO2007066985A1
WO2007066985A1 PCT/KR2006/005260 KR2006005260W WO2007066985A1 WO 2007066985 A1 WO2007066985 A1 WO 2007066985A1 KR 2006005260 W KR2006005260 W KR 2006005260W WO 2007066985 A1 WO2007066985 A1 WO 2007066985A1
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WIPO (PCT)
Prior art keywords
value
bit
signal
channel
sign
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PCT/KR2006/005260
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English (en)
Inventor
Dae-Ig Chang
Deock-Gil Oh
Kwang-Min Hyun
Dong-Weon Yoon
Sang-Kyu Park
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Electronics And Telecommunications Research Institute
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Publication date
Priority claimed from KR1020060083170A external-priority patent/KR100758306B1/ko
Application filed by Electronics And Telecommunications Research Institute filed Critical Electronics And Telecommunications Research Institute
Priority to US12/096,119 priority Critical patent/US8116406B2/en
Publication of WO2007066985A1 publication Critical patent/WO2007066985A1/fr

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/067—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing soft decisions, i.e. decisions together with an estimate of reliability
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/02—Amplitude-modulated carrier systems, e.g. using on-off keying; Single sideband or vestigial sideband modulation
    • H04L27/06—Demodulator circuits; Receiver circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/38—Demodulator circuits; Receiver circuits
    • H04L27/389—Demodulator circuits; Receiver circuits with separate demodulation for the phase and amplitude components

Definitions

  • the present invention relates to an apparatus and method for generating a soft bit metric and a multi-level (M-ary) Quadrature Amplitude Modulation (QAM) receiving system using the same. More specifically, the invention relates to an apparatus and method for generating a soft bit metric, in which a received symbol signal is converted into soft bit metric information per bit and then transmitted to an iterative decoder such as a Turbo or Low Density Parity Check (LDPC) decoder so as to recover data from the received signal modulated by a higher-order modulation scheme, and an M-ary QAM receiving system using the same.
  • an iterative decoder such as a Turbo or Low Density Parity Check (LDPC) decoder
  • Iterative decoding schemes are used in a receiver in order to perform channel coding using Turbo codes or LDPC codes.
  • an M-ary QAM modulation signal in which one symbol is expressed as some bits is transmitted in symbol unit, it is inevitable that a symbol signal is converted into information in the form of bits for iterative decoding.
  • Such conversion is accomplished by soft decoding, soft metric, Log Likelihood Ratio (LLR), soft demapping and the like.
  • the present invention is to convert a received symbol signal into soft bit metric information per bit ( I or Q channel) and transmits the converted information to an iterative decoder such as a Turbo or LDPC decoder, as illustrated in Fig. 2.
  • MAP Maximum A Posteriori
  • signal space division scheme uses geometric space division formulas to divide signal space based on a constellation position of a transmitted signal. So there are many different implementation methods that are based on the signal constellation.
  • LUT Look-Up Table
  • AMC Adaptive Modulation and Coding
  • the conventional MAP exhibiting high- performance involves an exponential calculation
  • the log- MAP that is logarithmic MAP requires an exponential operation
  • the Max-Log-MAP that approximates the log- MAP also has high-complexity in design.
  • an LUT must be configured in accordance with a symbol arrangement.
  • the iterative decoding scheme is essential for maintaining an efficient and stable communication quality in receiving a higher-order modulation signal.
  • This iterative decoding scheme is based on binary transmission, and thus, when a higher- order modulation symbol signal is received, the symbol signal should be converted into information in the form of bits so that the receiving system can effectively employ the binary iterative decoding scheme.
  • the QAM decoding method is known to be the best decoding method that can most effectively use the same bandwidth.
  • the QAM transmission is susceptive to the influence of fading or noises and thus requires a high Signal to Noise Ratio (SNR) to ensure stable reception.
  • SNR Signal to Noise Ratio
  • the iterative decoding scheme is useful to compensate the above shortcomings because it can acquire the high coding gain over channel coding such as Turbo codes or LDPC codes, which becomes a transmission system suitable for wideband transmission.
  • iterative decoding scheme for the higher-order modulation QAM signal it is absolutely necessary to generate a soft bit metric that converts a transmitted symbol signal into soft bit information.
  • an object of the present invention to provide an apparatus and method for generating a soft bit metric, in which a received symbol signal is converted into soft bit metric information per bit and then transmitted to an iterative decoder such as a Turbo or LDPC decoder so as to recover data from a received signal modulated using higher-order modulation scheme, and an M-ary QAM receiving system using the same.
  • an apparatus for generating a soft bit metric including: an analog to digital converter for converting an analog symbol signal of a demodulated I or Q channel into a digital signal; a sealer for scaling the converted digital signal based on a reference value used for determining a space between symbols; a positive integer converter for calculating a positive integer of the scaled digital I or Q channel symbol signal; a sign determinator for determining a sign of the scaled digital I or Q channel symbol signal; and a bit information converter for converting the scaled digital I or Q channel symbol signal into soft bit metric information per bit on the basis of the calculated positive integer and the determined sign value.
  • a method for generating a soft bit metric including the steps of: scaling a digital signal converted through an A/D converter by using a reference value used for determining a space between symbols; calculating a positive integer of the scaled digital I or Q channel symbol signal and determining a sign thereof; and converting the scaled digital I or Q channel symbol signal into soft bit metric information per bit based on the calculated positive integer and the determined sign value.
  • an M-ary QAM receiving system using a soft bit metric generating apparatus including: an I/Q demodulator for recovering a symbol signal of each of an I channel and a Q channel; an I channel soft bit metric generator for converting an I channel symbol signal into soft bit metric information per bit; a Q channel soft bit metric generator for converting a Q channel symbol signal into soft bit metric information per bit; a parallel to serial data converter for performing a parallel to serial conversion on I and Q bit metric information; and an iterative decoder for iteratively decoding the serially converted I and Q bit metric information.
  • the present invention can substantially reduce the design complexity by employing the Max-Log-MAP algorithm for symbol-to-bit information conversion in the M-ary QAM signal receiving system using Gray mapping that is typically used for forming a symbol with bits.
  • the calculation courses or routes can be increased as many as the increased number of bits without changing the structure, or the same courses can be used iteratively.
  • Fig. 2 is a block diagram illustrating an M-ary QAM receiving system using an apparatus for generating a soft bit metric in accordance with one embodiment of the present invention
  • Fig. 3 is a diagram describing a soft bit metric generation principle of an 8-PAM constellation diagram for a Gray coded I or Q signal in accordance with the present invention
  • Fig. 4 is a diagram describing a b 2 bit soft bit metric generation principle of an 8-PAM constellation for a Gray coded I or Q signal in accordance with the present invention
  • Fig. 5 is a diagram illustrating an apparatus for generating a soft bit metric in accordance with another embodiment of the present invention.
  • Fig. 6 is a detailed diagram of the soft bit metric operation unit of k-th bit in the soft bit metric generating apparatus in accordance with the invention.
  • Fig. 7 shows a 64-QAM signal constellation to which the present invention can -be applied.
  • a Gray coded 2-dimensional signal space having an M-number of signal points is divided into I (Inphase) channel having an N-number of signal points and Q (Quadrature) channel having an L-number of signal points, each channel being Gray coded one-dimensional Pulse Amplitude Modulation (PAM) signal space having the same properties. If the numbers of signal points arranged at the I and Q channels are the same, it becomes a square QAM. Otherwise, it becomes a rectangular QAM.
  • PAM Pulse Amplitude Modulation
  • a soft bit metric of QAM can be generated by recognizing the I and Q channels as respective independent PAMs and through the soft bit metric generation for such PAMs .
  • Fig. 2 is a block diagram illustrating an M-ary QAM receiving system using a soft bit metric generating apparatus in accordance with one embodiment of the present invention.
  • the M-ary QAM receiving system using the apparatus for generating a soft bit metric of the invention includes an I/Q demodulator 201 for demodulating symbol information of each of I and Q channels, I and Q channel soft bit metric generators 202 and 203 for converting symbol signals of the I and Q channels provided through the I /Q demodulator 201 into soft bit metric information per bit, and an iterative decoder 205 for iteratively decoding the I and Q channel bit metric signals outputted from the I and Q channel soft bit metric generators 202 and 203 through a parallel to serial data converter 204.
  • the M-ary QAM receiving system of the invention is a receiver, in which a received signal is demodulated in the I/Q demodulator 201. More specifically, an output of the I/Q demodulator 201 for recovering symbol information of each of the I and Q channels is inputted to each of the I and Q channel PAM signal soft bit metric generators 202 and 203, to generate I and Q channels soft bit metrics, as will be described with reference to Fig. 5 later. The I and Q bit metric signals are then inputted to the iterative decoder 205 via the parallel to serial data converter 204. As expressed above, each of the I and Q channels soft bit metric generators 202 and 203 is the PAM soft bit metric generator having the same structure.
  • the number of signal points on a PAM signal space is N, and symbol data of a codeword in which each signal point is composed of K bits is mapped to one point on the constellation of a one-dimensional signal space.
  • the left/right signal spaces have an axisymmetry relationship with respect to boundary values of bits constituting codewords .
  • Fig. 3 is diagram for explaining a soft bit metric generation principle of an 8-PAM constellation diagram for a Gray coded I or Q signal in accordance with the present invention, wherein the Gray coded 8-PAM signal constellation and groups by bits are commonly used in the I and Q channels.
  • Fig. 3 when seen on the PAM signal space, the arrangement of each bit value among bits constituting a symbol is bilaterally symmetric with respect to the origin 0.
  • Gi (bi) and G 2 (bi) groups bit bi values assigned to each signal point are symmetric with respect to the origin 0; and bit b 2 values arranged to each symbol, i.e., Gi (b 2 ) and G 2 (b 2 ) are symmetric to G 3 (b 2 ) and G 4 (b 2 ) with respect to the 0 point, and Gi (b 2 ) and G 2 (b 2 ), and G 3 (b 2 ) and G 4 (b 2 ) are symmetric with respect to -4d and +4d, respectively.
  • a received Gray coded N-PAM signal may be expres sed as :
  • s denotes a transmitted N-PAM symbol
  • ⁇ denotes a channel gain
  • n denotes an Additive White Gaussian Noise (AWGN) in which average is 0 and variance is ⁇ 2 . If ⁇ is probably stable (constant), the received signal z becomes a signal that is received through an AWGN channel.
  • AWGN Additive White Gaussian Noise
  • a PAM signal that is one of I and Q channels is received over the AWGN channel
  • a LLR test it may be represented by: wherein b k denotes a k-th bit value of a received signal symbol, z denotes a received signal, A denotes a +reference signal value, B denotes a -reference signal, and ⁇ 2 denotes a variance of AWGN noise.
  • Eq. (2) needs logarithmic calculation, it has an increased implementation complexity. Therefore, by applying the following approximated equation, Eq. (3), to Eq. (2) above, Eq. (4) is obtained as follows:
  • Eq. (4) is widely known as the Max-Log-MAP algorithm, but max(') or min(-) therein becomes a factor in increasing complexity due to an increase in a modulation order N since the number of cases is considered. Therefore, the following equation may be obtained by summarizing the results as discussed above : wherein z k denotes correction value for a k-th bit group in a received symbol area by a moving distance of the coordinate axis, z ⁇ ' k denotes a sign value sign( Zk ) of a corrected symbol value Zk , m k indicates whether the k- th bit arrangement in the group coincides with 2-PAM (coincidence: +1, non-coincidence: -1), d m ⁇ n , k denotes a closest distance value to a bit boundary value in a corresponding bit group to which the received signal belongs, and d maX ⁇ k denotes a farthest distance value from a bit boundary value in a
  • the soft bit metric can be calculated from Eq. (6) blow by using the parameters employed in Eq. (5):
  • the soft bit metric LLR in this example is determined as follows:
  • Fig. 4 describes a b 2 soft bit metric generation procedure among bits constituting an 8-PAM signal symbol in the same method as the principle for generating the bi soft bit metric as discussed with reference to Fig. 3.
  • the present invention relates to the I and Q channel soft bit metric generators 202 and 203 in the M-ary QAM receiving system shown in Fig. 2, each of which includes a soft bit metric operation unit [LLR generators (b 0 to bk-i) 55 depicted in Figs. 5 and 6.
  • Fig. 5 shows an algorithm block for implementing the N-PAM soft bit metric generation.
  • Fig. 5 illustrates a detailed block diagram of the soft bit metric generating apparatus shown in Fig. 2 in accordance with the present invention.
  • the soft bit metric generating apparatus that can be commonly used for the I and Q channels includes an A/D converter 51, a sealer 52, a positive integer converter 53, a sign determinator 54, and a soft bit metric operation unit 55.
  • the A/D converter 51 converts an analog symbol signal of a demodulated I (Inphase) channel or Q (Quadrature) channel into a digital signal.
  • the sealer 52 scales the converted digital signal using a reference value (e.g., d) that is used for determining a signal point position similar to the reference value for determining a space between symbols [(see Eq. (5)].
  • the positive integer converter 53 calculates a positive integer R of the scaled digital I or Q channel symbol signal Z.
  • the sign determinator 54 determines a sign of the scaled digital I or Q channel symbol signal Z, and the soft bit metric operation unit 55 converts the scaled digital I or Q channel symbol signal Z into soft bit metric information per bit.
  • Fig. 6 describes a detailed diagram of the soft bit metric operation unit [LLR generators (b 0 to b k _i)] 55 for the k-th bit included in the soft bit metric generating apparatus in accordance with the present invention.
  • the soft bit metric operation unit 55 for the k-th bit of the soft bit metric generating apparatus of the invention includes a coordinate shifting value generator 601, a coincidence decision unit 602, a correction value generator 603, a k sign value generator 604, a k absolute value generator 605, a minimum distance value generator 606, a maximum distance value generator 607, a real number subtractor 608, real number multipliers 609 and 612, and bit multipliers 610 and 611.
  • the coordinate shifting value generator 601 calculates a value for the coordinate axis shift (i.e., a coordinate space shifting value) using the positive integer R. That is, it determines, using the positive integer R, a group in the signal space where a received signal is included, and calculates a distance for shifting a bit determining boundary of the group to the origin.
  • the coincidence decision unit 602 compares the K-th bit with the 2-PAM bit by using the positive integer R to decide whether the 2-PAM bit value arrangement is axisymmetric or has the same pattern.
  • the correction value generator 603 generates a new received signal correction symbol value based on the coordinate space shifting value, the scaled digital I or Q channel symbol signal Z, and the positive integer R.
  • the ** sign value generator 604 generates a sign value of the received signal correction symbol value
  • the *k absolute value generator 605 generates an absolute value of the received signal correction symbol value (i.e., an absolute value of the coordinate shifting value).
  • the minimum distance value generator 606 using the absolute value of the coordinate shifting value, generates a minimum distance value in a corresponding group for determining a closest distance value to the bit boundary value therein.
  • the maximum distance value generator 607 using the minimum distance value, generates a maximum distance value in a group area for determining a farthest distance value (the maximum distance value) from the bit boundary value therein.
  • the real number subtractor 608 subtracts the absolute value of the coordinate shifting value from the minimum distance value.
  • the real number multiplier 609 multiplies the result calculated at the real number subtractor 608 by the maximum distance value.
  • the bit multiplier 610 multiplies the results from the coincidence decision unit 602 and the ⁇ sign value generator 604 in the form of bits.
  • the bit multiplier 611 multiplies the operation result of the bit multiplier 610 by the determined sign value Q in the form of bits.
  • the real number multiplier 612 converts the operation result of the real number multiplier 609 into soft bit metric (LLR) information by multiplying the operation result by the operation result of the bit multiplier 611.
  • LLR soft bit metric
  • the soft bit metric operation unit 55 of the invention calculates a soft bit metric per bit with z, R, and Q signals obtained from the sealer 52, the positive integer converter 53 and the sign determinator 54 shown in Fig. 5.
  • the coordinate shifting value (D k ) generator 601 determines a group in a signal space where the received signal, as described in Figs. 3 and 4 and will be discussed in Eq. (8) below, is contained, and then calculates a distance for moving a bit boundary of the group to the origin (0 point).
  • the correction value ( E * ) generator 603 generates, on the basis of the principle described in Fig. 3 or 4 , a new received signal correction symbol value ( Zk ) by using the coordinate space shifting value Dk calculated at the coordinate shifting value generator 601, and z and R that are determined by the sealer 52 and the positive integer converter 53 shown in Fig. 5, respectively.
  • the minimum distance value generator 606 determines a minimum distance value (d m i n , k /2) closest to the bit boundary value in the corresponding group.
  • the maximum distance value generator 607 uses the minimum distance value (d m j .n , k /2) determined by the minimum distance value generator 606, the maximum distance value generator 607 generates a maximum distance value (d max , k /2) farthest from the bit boundary value in the group area.
  • the bit multiplier 610 multiplies the results from the coincidence decision unit 602 and from the correction value generator 603, and the bit multiplier 611 multiplies the sign value Q k of the received signal determined by the sign determinator 54 by the result from the bit multiplier 610.
  • the real number multiplier 612 performs sign conversion on the operation result of the real number multiplier 609 depending on the result provided from the bit multiplier 611.
  • a symbol of a received two-dimensional signal is recovered by the I/Q demodulator 201 shown in Fig. 2.
  • the generators 202 and 203 independently generate bit metrics based on the following algorithm.
  • the received PAM symbol signal goes through the A/D converter 51, and is scaled by the sealer 502 with a reference value used for determining a signal point position.
  • the coordinate shifting value generator 601 calculates a value for shifting the coordinate axis.
  • the coincidence decision unit 602 decides whether the 2-PAM bit value arrangement is axisymmetric or has the same pattern.
  • the correction value generator 603 corrects the received symbol value by shifting the coordinate axis.
  • the minimum distance value generator 606 uses the output of the above 8 to generate a minimum distance value d min , k /2 closest to a bit boundary value in a corresponding group and the maximum distance value generator 607 generates a maximum distance value d max , k /2 farthest from to a bit boundary value in a group area.
  • the real number multiplier 612 calculates a soft bit metric LLR per bit.
  • the method of the present invention as mentioned above may be implemented by a software program that is stored in a computer-readable storage medium such as CD- ROM, RAM, ROM, floppy disk, hard disk, optical magnetic disk, etc. This process may be readily carried out by those skilled in the art; and therefore, details of thereof are omitted here.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
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Abstract

L'invention porte sur un appareil et un procédé d'élaboration d'un métrique de bits mous et sur un système récepteur à modulation d'amplitude en quadrature à plusieurs niveaux l'utilisant. L'appareil comporte: un convertisseur A/N convertissant en signal numérique le signal de symboles analogiques d'un canal démodulé en phase I ou en quadrature Q; un variateur scalant le signal numérique converti en fonction d'une valeur de référence utilisée pour déterminer l'espace entre symboles; un convertisseur d'entiers positifs calculant les entiers positifs du signal numérique scalé de symboles du canal démodulé en phase I ou en quadrature Q; un déterminateur du signe dudit signal numérique scalé; et un convertisseur d'informations de bit dudit signal numérique scalé en information de métriques de bits mous par bit, sur la base de l'entier positif calculé et de la valeur du signe déterminée.
PCT/KR2006/005260 2005-12-08 2006-12-07 Appareil et procede d'elaboration d'un metrique de bits mous, et systeme recepteur a maq a plusieurs niveaux WO2007066985A1 (fr)

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KR10-2005-0119590 2005-12-08
KR20050119590 2005-12-08
KR10-2006-0083170 2006-08-30
KR1020060083170A KR100758306B1 (ko) 2005-12-08 2006-08-30 소프트 비트 매트릭 발생 장치 및 그 방법과 그를 이용한다치 레벨 ｑａｍ 수신시스템

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2204984A1 (fr) * 2008-12-30 2010-07-07 Intel Corporation Récepteur de diffusion et procédé pour optimiser un facteur d'échelle pour un mappeur de vraisemblances logarithmiques
CN102369672A (zh) * 2008-12-04 2012-03-07 宇宙桥有限公司 生成软比特的系统和方法

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Publication number Priority date Publication date Assignee Title
EP0840483A2 (fr) * 1996-10-31 1998-05-06 Advanced Digital Television Broadcasting Laboratory Procédé de décision douce, et récepteur
US6347122B1 (en) * 1998-01-13 2002-02-12 Agere Systems Guardian Corp. Optimal complement punctured convolutional codes for use in digital audio broadcasting and other applications
GB2379143A (en) * 2001-08-23 2003-02-26 Korea Electronics Telecomm Soft bit value calculation for bit decoding
KR20040111571A (ko) * 2002-05-03 2004-12-31 아이비큐티 디지털 코포레이션 디지털 정보 송신 방법, 송신기, 정보 신호 수신 방법 및정보 신호를 수신하는 수신기

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0840483A2 (fr) * 1996-10-31 1998-05-06 Advanced Digital Television Broadcasting Laboratory Procédé de décision douce, et récepteur
US6347122B1 (en) * 1998-01-13 2002-02-12 Agere Systems Guardian Corp. Optimal complement punctured convolutional codes for use in digital audio broadcasting and other applications
GB2379143A (en) * 2001-08-23 2003-02-26 Korea Electronics Telecomm Soft bit value calculation for bit decoding
KR20040111571A (ko) * 2002-05-03 2004-12-31 아이비큐티 디지털 코포레이션 디지털 정보 송신 방법, 송신기, 정보 신호 수신 방법 및정보 신호를 수신하는 수신기

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102369672A (zh) * 2008-12-04 2012-03-07 宇宙桥有限公司 生成软比特的系统和方法
EP2204984A1 (fr) * 2008-12-30 2010-07-07 Intel Corporation Récepteur de diffusion et procédé pour optimiser un facteur d'échelle pour un mappeur de vraisemblances logarithmiques
US8234556B2 (en) 2008-12-30 2012-07-31 Intel Corporation Broadcast receiver and method for optimizing a scale factor for a log-likelihood mapper

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