WO2007023951A1 - Substrate processing apparatus and substrate processing method - Google Patents

Substrate processing apparatus and substrate processing method

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Publication number
WO2007023951A1
WO2007023951A1 PCT/JP2006/316747 JP2006316747W WO2007023951A1 WO 2007023951 A1 WO2007023951 A1 WO 2007023951A1 JP 2006316747 W JP2006316747 W JP 2006316747W WO 2007023951 A1 WO2007023951 A1 WO 2007023951A1
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WO
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Application
Patent type
Prior art keywords
film
substrate
processing
chamber
step
Prior art date
Application number
PCT/JP2006/316747
Other languages
French (fr)
Japanese (ja)
Inventor
Hidetada Kanemaru
Takebu Herai
Moyuru Yasuhara
Original Assignee
Tokyo Electron Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

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Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/54Apparatus specially adapted for continuous coating
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02043Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02046Dry cleaning only
    • H01L21/02049Dry cleaning only with gaseous HF
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02057Cleaning during device manufacture
    • H01L21/0206Cleaning during device manufacture during, before or after processing of insulating layers
    • H01L21/02063Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67155Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67184Apparatus for manufacturing or treating in a plurality of work-stations characterized by the presence of more than one transfer chamber
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67739Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
    • H01L21/67745Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber characterized by movements or sequence of movements of transfer devices

Abstract

A substrate processing apparatus is provided with a plurality of process chambers for performing prescribed processing to a substrate to be processed, and a common transfer chamber (102) which is commonly connected to the process chambers and carries in and out the substrates to and from the process chambers, respectively. The process chambers include adhered material removing process chambers (104A, 104B) for removing an adhered material including a native oxide adhered on the substrate by chemical reaction with a gas component not using plasma and heat treatment; film forming process chambers (104C, 104D) for forming a film on the substrate; and a measuring process chamber (400) for measuring the substrate.

Description

Specification

A substrate processing apparatus and a substrate processing method

Technical field

[0001] The present invention relates to a substrate processing apparatus 及 beauty substrate processing method to a substrate to be processed such as a semiconductor wafer subjected to a predetermined process.

BACKGROUND

[0002] In general, in a manufacturing process of a semiconductor device, a semiconductor wafer (hereinafter, simply "© E Bruno," and also referred to.) Various processes on, for example, film forming process of a thin film, oxidation diffusion process, § Neil process , etching treatment or the like is performed sequentially repeated. For the thin film, it may be formed in a multilayer on a semiconductor wafer. As a substrate processing apparatus for processing such various, for example, continuous multiple processing chambers to be capable of performing processing configured by connecting in common to one conveying chamber, the substrate processing called cluster type device is (for example, see JP-A-2004- 119635). A cluster-type substrate processing apparatus, so while conveying as wander speak the wafer between the processing chambers, each time necessary processing is carried out continuous target and efficiently by the process chambers! / , Ru.

[0003] Meanwhile, on the wafer, particles, metals, organic matter, contamination Natick Chillon surface coating such as adsorbed molecules, and natural oxide film (Silicon Native Oxide) adheres. Therefore, before performing the like deposition process, the removal of deposits, such as such natural Sani 匕膜 is required.

[0004] Therefore, conventionally, for example, after removing the natural oxide film on the wafer by wet cleaning using dilute hydrofluoric acid (DHF) or the like outside the substrate processing apparatus, the cleaned wafer substrate processing apparatus running film treated with ipecac to.

While [0005] is a force, a wafer surface when even natural Sani 匕膜 on the wafer is removed outside the substrate processing apparatus, which captures the wafers in the substrate processing apparatus for performing such film forming process if it is exposed to the atmosphere, there is a fear that a new natural Sani 匕膜 is generated on the wafer surface. The thickness of the natural oxide film of this greatly affects the characteristics of the semiconductor devices in which the natural oxide film is subsequently formed. For example becomes a major problem in forming the film thickness 0. 5 nm or more natural Sani匕 film is formed anew on the wafer surface, for example, the film thickness 65nm or less of the gate insulating film.

[0006] Further, according to the above wet cleaning, natural Sani 匕膜 the wafer surface is removed, © new watermark E wafer surface (e.g., via a water droplet station plants during transport or drying of the wafer formed silicon oxide film (SiO), etc.) there is a possibility to occur. For example, DHF

2

Although the underlying silicon by natural Sani 匕膜 of the wafer surface by the cleaning liquid is removed in the wafer surface becomes hydrophobic out dew, water droplets remaining on the surface of © E c when raising the wafer from the DHF cleaning liquid may, the water droplets can be a Wotama one click after spin drying. Such watermark becomes blocking items definitive etc. are the film formation process executed after the cleaning process, there is a possibility to degrade the characteristics of semiconductor devices.

[0007] In order to suppress the generation of more such watermarks and natural Sani 匕膜 is to use isopropyl alcohol (IPA) in the drying step after the wet cleaning (for example, see JP 2002 166 237 JP). However, the wafer surface after IPA drying, there is a possibility that IPA molecules (organic matter such as carbon) may remain. IPA molecules may give adverse effects on e.g. gate Sani 匕膜 characteristics (K. MOTAI, T. Itoga, and T. Me, Extended Abstruct of 1997, International Conference on SolidState Devices and Materials, Hamamatsu, pp . 24- 25 (1997) see).

[0008] Therefore, in recent years, regardless of the above wet cleaning method, by a dry cleaning method using plasma is known to remove the natural oxide film on the wafer! /, Ru. Such dry cleaning method, for example, the inductively coupled plasma is formed using a hydrogen gas and argon gas, it is known to remove the natural Sani 匕膜 on the wafer by the plasma (eg if Patent 04 - reference No. 336426). According to such a dry cleaning method, Do with water components such as the cleaning liquid as wet cleaning method, since it is possible to eliminate the risk without natural Sani 匕膜 watermark is generated.

While [0009] and Kaka, if the dry cleaning process by a plasma treatment, there is a possibility that the switch yer di-up damage of the plasma due thus inflicted on the wafer. Generating a semiconductor device on the wafer, leaving such a damage, for example, destruction of the gate insulating film passes, the characteristics of semiconductor devices there is a problem such that deterioration. [0010] Incidentally, by measuring the film thickness and particles on the wafer actually Tsu of whether deposits such as natural Sani 匕膜 on the wafer is removed, Te if it is possible to perform the inspection, the following equal advantage of being able to ensure uniformity of film quality to be formed by the film forming process yet many.

[0011] and with force, conventional particle measurement device (for example, Japanese 2004- see JP 327,546) and film thickness measuring apparatus (JP-A-03 - see 283618 JP), the such natural oxidation film on the wafer can not Rukoto to measure the film thickness and particles on the wafer by mosquitoes ゝ et continuous deposit removed. That is, after and above wet cleaning run outside the substrate processing apparatus, when loading the wafer in the above-described measurement device, also the wafer is exposed to the atmosphere want connexion, new naturally the wafer surface Sani匕film occurs.

SUMMARY OF THE INVENTION

[0012] Accordingly, with the present invention has been made in view of such problems, and an object, including natural Sani 匕膜 substrate without using and plasma without the water component It was removed dividing the kimono is subsequently to provide a measuring process or film forming process such as a substrate processing apparatus such as may be run continuously without the substrate exposed to the atmosphere.

[0013] In order to solve the above problems, the present invention includes a plurality of processing chambers for performing predetermined processing on a substrate to be processed, are connected in common to said plurality of processing chambers, for each of the plurality of processing chambers and a common transfer chamber for loading and unloading of the substrate to be processed Te, the plurality of the processing chamber, deposits the such depend on the plasma! / ヽ including a natural oxide film which is adhered to the target substrate a deposit removal processing chamber for removing by a chemical reaction and heat treatment of the gas component, wherein the deposition treatment chamber for performing a film forming process on a substrate to be processed, for performing measurement processing of the substrate to be processed a measurement processing chamber, a substrate processing apparatus, characterized in that it contains! / Ru.

According to [0014] the present invention, since the deposit containing natural Sani 匕膜 is removed by chemical reaction and heat treatment of the ヽ gas components such depend on the plasma, that the water component is used as wet cleaning it not, therefore that obtained such watermark is prevented from occurring on the substrate to be processed. Moreover, since the plasma is not used, can be prevented from plasma-induced charge Atsu Pudameji is imposed on the substrate to be processed. Further, in the substrate processing apparatus, after the deposit removal process, since the measuring process and film forming process may be performed continuously, a natural oxide film on the substrate to be processed is newly formed just before the film forming process it is be prevented by. Thus, it is possible to remove reliably the deposit containing natural Sani 匕膜 can further improve the adhesion of the film to be formed on a substrate to be processed by the next film forming process, the intensity it can also cause more further improved.

[0015] Preferably, the deposit removal process chamber, said the product generation process chamber for the deposits on the substrate to be processed to produce a product by gas Ingredient and chemical reaction, the product raw wherein the product removal process chamber for removing the heat treatment to the product produced on the substrate to be processed by forming treatment chamber composed of two processing chambers.

[0016] In a preferred embodiment, the deposition treatment chamber, a first film formation processing chamber for forming a first film on the target substrate, is deposited in the first film forming treatment chamber a second film formation processing chamber for deposition of the second layer to the first film was composed of two processing chambers.

[0017] In a preferred embodiment, the measurement process chamber, wherein a film thickness measuring unit for measuring the thickness of the film formed on the substrate to be processed, Pateiku Le measurement for measuring the particles on the substrate to be treated It comprises a part, a. In this case, a single measurement process chamber, it is possible to measure both film thickness and particle, it is possible to improve the throughput.

[0018] In a preferred embodiment, the measurement process chamber is provided with an image processing unit for recognition by capturing a surface image of the target substrate. In this case, it is possible to be able to perform such pattern matching of the surface of the substrate, for example, to identify a constant point measurement of target substrate to measure the film thickness and particles.

[0019] Further, the present invention includes a plurality of processing chambers for performing predetermined process on a target substrate, and a common transfer chamber connected in common to said plurality of processing chambers, wherein provided in the common transfer chamber a plurality of vacuum processing apparatus including a transport mechanism for conveying the processed substrate, respectively, prior SL includes a path portion connecting together a plurality of vacuum processing device, and said plurality of processing chambers, such independent deposits containing natural Sani 匕膜 attached to the target substrate in a plasma! / ヽ a deposit removal processing chamber for removing by a chemical reaction and heat treatment of the gas component, the deposition treatment chamber for performing a film forming process on the target substrate, the measurement process of the target substrate a measurement processing chamber for performing a substrate processing apparatus, characterized in that it contains! / Ru.

[0020] Also according to this invention, since the deposit containing natural Sani 匕膜 is removed by chemical reaction and heat treatment of the ヽ gas components such depend on the plasma, Rukoto water component is used as wet cleaning no, therefore that could be prevented, such as water marks are generated on the substrate to be processed. Moreover, since the plasma is not used, can be prevented from plasma-induced charge Atsu Pudameji is imposed on the substrate to be processed. Further, in the substrate processing apparatus, after the deposit removal process, since the measuring process and film forming process may be performed continuously, a natural oxide film on the substrate to be processed is newly formed just before the film forming process it is be prevented by. Thus, it is possible to remove reliably the deposit containing natural Sani 匕膜 can further improve the adhesion of the film to be formed on a substrate to be processed by the next film forming process, the intensity it can also cause more further improved.

[0021] Preferably, the deposit removal process chamber, said the product generation process chamber for the deposits on the substrate to be processed to produce a product by gas Ingredient and chemical reaction, the product raw wherein the product removal process chamber for removing the heat treatment to the product produced on the substrate to be processed by forming treatment chamber composed of two processing chambers.

[0022] In a preferred embodiment, the deposition treatment chamber, a first film formation processing chamber for forming a first film on the target substrate, is deposited in the first film forming treatment chamber a second film formation processing chamber for deposition of the second layer to the first film was composed of two processing chambers.

[0023] Alternatively, preferably, the deposition treatment chamber, a first film formation processing chamber for forming a first film on the target substrate, is deposited in the first film forming treatment chamber includes a plurality and the second film formation processing chamber for forming a second film on the first film, the two process chambers set of. In this case, for example, because in parallel with the plurality of sets of deposition treatment chamber can execute the film forming process, it is possible to greatly improve the throughput of the entire apparatus.

[0024] the target substrate to be processed in the deposit removal processing chamber, in the case of the substrate to be processed contact hole or via hole Lumpur is formed, preferably, the deposition treatment chamber is pre-Symbol to be a first barrier layer deposition treatment chamber for depositing the first barrier layer on the inside of the contact hole or via hole formed in the substrate, wherein the first barrier which is formed by the first barrier layer deposition treatment chamber a second barrier layer deposition treatment chamber for depositing the second barrier layer to the upper layer, the constructed. In this case, in order to ensure removal of deposits such as deposited spontaneous Sani 匕膜 the contact hole or via hole formed on a substrate to be processed, be deposited first barrier layer, the second barrier-layer can. Thus, these film adhesion can be further improved, it is possible to strength to more further improve.

[0025] the target substrate to be processed in the deposit removal processing chamber, when a silicon substrate is preferable that the deposition treatment chamber, the base oxide film layer by oxygen radicals on the substrate to be treated a base oxide layer deposition treatment chamber for forming a high dielectric for film of high dielectric gate oxide film on the target substrate, wherein the base oxide layer is deposited at the base oxide layer deposition treatment chamber and body gate oxide film deposition treatment chamber, the constructed. In this case, the deposits such as deposited spontaneous Sani 匕膜 the silicon substrate on which to ensure removal, based acid I 匕膜 layer, the high dielectric gate oxide film can be formed. Thus, these films can be further improved adhesion (layer), it is possible strength to more further improve.

[0026] Further, the present invention includes a deposit removal step of removing by a chemical reaction and heat treatment of the gas component which does not depend deposits to a plasma comprising a natural oxide film which is deposited on the substrate to be processed, said extraneous material removal after step, said measurement Sutetsu flop performing measurement processing of the substrate, after the measuring step, the substrate processing, characterized in that it and a film forming step of performing a film forming process on the target substrate it is a method.

According to [0027] the present invention, the deposit removing step, a measuring step, by executing continuous and deposition step, film formation processing in a state where deposits were removed reliably including a natural oxide film line We get. Thus, it is possible to further improve the adhesion of the film to be formed on the target substrate, it is possible strength to more further improve.

[0028] Preferably, the deposit removing step, said the product formation step of the deposits on the substrate to be processed to produce a product by gas component and a chemical reaction, said at the product generated scan Tetsupu a raw Narubutsu removal step of removing by heat treatment the product produced on the substrate to be processed, a.

[0029] Also, preferably, the film forming step includes a first film forming step of forming a first film on the target substrate, the first film formed in the first film forming step having a second film forming step of forming a second layer on top.

[0030] In a preferred embodiment, the measuring step is a step of performing an inspection measurement processing for inspecting whether or force whether said extraneous material removal step is properly performed. [0031] In this case, further, the measuring step includes a thickness measuring step of performing film thickness measurements of the deposit removal step is subjected the surface of the target substrate, wherein said extraneous material removal step is performed It has a deposit measurement step of performing deposit measurement of the surface of the substrate, and the film thickness measuring step and the deposit measurement step is preferably performed within one measurement process chamber. Thus, by measuring both the thickness and the particle (fouling), it is possible to reliably check whether deposits containing a natural oxide film from the target substrate has been removed.

[0032] Further, more preferably, the measuring step, the film thickness measuring step and based on the deposit Measurement results measured by the step, Te, a process recipe in order to perform the deposit removal step further comprising the recipe correction step of correcting. In this case, it is possible to perform the deposit removal step according to the actual processing results. For this reason, it is possible to reliably remove the deposits containing natural Sani 匕膜 from target substrate.

[0033] Alternatively, more preferably, the measuring step, the film thickness measuring step and based on the deposit Measurement results measured by the step Te, or mosquitoes ゝ not to perform the subsequent film formation step further comprising a determination step of determining. In this case, if for example, the film thickness measuring step and the particles (fouling) the measurement result is acceptable range measured by the measurement step, while determined to be performing the following film forming step, within an acceptable range if, it may be determined that not perform the following deposition step. Thus, at all times in a state in which deposits have been removed, including the nature Sani 匕膜 on the substrate to be processed can be performed following deposition stearyl-up. Thus, it is possible to ensure the uniformity one of quality of film deposited on the substrate to be processed.

[0034] In a preferred embodiment, the measuring step includes: a test measurement step of checks force whether said extraneous material removal step is properly performed, the thickness of the base film subsequent film formation step is performed the having a base film thickness measuring step of measuring.

[0035] In this case, more preferably, the measuring step includes a thickness measuring step of performing film thickness measurements of the deposit removal step is subjected the surface of the target substrate, the deposit removal removed by step facilities has a deposit measuring Sutetsu flop for performing deposit measurement of the surface of the substrate to be processed is an underlying thickness measuring step of measuring the thickness of the base film subsequent film formation step is performed, the , the film thickness measuring step, the deposits measurement step and the underlying film thickness measuring step is performed in a single measurement process chamber. In this case, the film thickness measurement for checking whether the power not the deposit removing Sutetsu flop is properly executed, since a thickness measurement of the base film next deposition process is Ru subjected can run concurrently, measured time required to process a can significantly be shortened.

[0036] Alternatively, the present invention includes a deposit removal stearyl-up to remove by chemical reaction and heat treatment of the gas component which does not depend deposits containing a natural oxide film which is deposited on the substrate to be processed in bra Zuma, the after deposit removal step, wherein a film forming step of performing a film forming process on the target substrate, after the deposition step, by comprising a measuring Sutetsu flop performing measurement processing of the substrate to be processed a substrate processing method according to.

[0037] In this case, preferably, the measuring step includes the NarumakuAtsu measurement step of performing a measurement of a thickness of film formed by the film forming step. As a result, it leaves in to be with aminoglutethimide inspection to the state after the film formation.

[0038] More preferably, said measuring step further comprises the recipe correction steps based on the NarumakuAtsu Measurement results measured by the step Te, corrects the process recipe for performing the film forming step . In this case, it is possible for subsequent target substrate, to execute always proper deposition process.

[0039] Alternatively, the present invention includes a measuring step of performing a measurement process of the substrate, after the measurement stearyl-up, does not depend deposits containing a natural oxide film which is adhered to the target substrate in a plasma and wherein the attached matter removing step of removing by a chemical reaction and heat treatment of the gas component, after the deposit removing step, further comprising a, a film forming stearyl-up for performing a film forming process on the target substrate a substrate processing method of. Thus, a constant step measurement of the target substrate, it may also be performed before the deposit removal step ヽ.

[0040] Alternatively, the present invention allows a computer to execute the deposit removing step of removing by a chemical reaction and heat treatment of the gas component which does not depend a natural oxide film which is deposited on the substrate to be processed and including deposits plasma, a measuring step of performing measurement processing of the substrate, after the deposit removal stepped, a program for executing a film forming step of performing a film forming process on the target substrate. [0041] Alternatively, the present invention allows a computer to execute the deposit removing step of removing by a chemical reaction and heat treatment of the gas component which does not depend a natural oxide film which is deposited on the substrate to be processed and including deposits plasma, a measuring step of performing measurement processing of the substrate, after the deposit removal stepped, the object to be processed and the film-forming step of performing a film forming process on a substrate, computer-readable recording a program for executing the a Do recording medium.

[0042] According to such a program or a program recorded on a recording medium, a deposit removing step, a measuring step, a deposition step can be continuously performed, a deposit comprising a natural oxide film securely deposition process can be performed in a state of being removed. Thus, it is possible to further improve the adhesion of the film to be formed on the target board can strength to more further improve.

BRIEF DESCRIPTION OF THE DRAWINGS

[0043] FIG 1 is a cross-sectional view showing a configuration example of a substrate processing apparatus according to a first embodiment of the present invention.

FIG. 2 is a diagram illustrating a configuration example of a processing chamber in the substrate processing apparatus shown in FIG.

FIG. 3 is a block diagram showing a configuration example of a control section (system controller) shown in FIG.

[4] FIG. 4 is a block diagram showing an exemplary configuration of the first embodiment of the present invention EC (equipment controller).

FIG. 5 is Ru FIG der illustrating another configuration example of the processing chamber in the substrate processing apparatus shown in FIG.

FIG. 6 is a sectional view showing a configuration example of a substrate processing apparatus according to a second embodiment of the present invention.

[7] FIG. 7 is a diagram illustrating a configuration example of a processing chamber in the substrate processing apparatus shown in FIG.

FIG. 8 is Ru FIG der illustrating another configuration example of the processing chamber in the substrate processing apparatus shown in FIG.

FIG. 9 is Ru FIG der illustrating another configuration example of the processing chamber in the substrate processing apparatus shown in FIG.

[10] FIG 10 is a cross sectional view showing a configuration example of a substrate processing apparatus according to a third embodiment of the present invention.

[11] FIG 11 is a block diagram showing a configuration example of the measurement processing chamber shown in FIG. 10.

[12] FIG 12 is a block diagram showing the arrangement of a third embodiment of the present invention EC (equipment controller).

[13] FIG 13 is a diagram showing a configuration example of a processing chamber in the substrate processing apparatus shown in FIG. 10

[14] FIG 14 is a Furochi Yato showing a specific example of the measurement process in the measurement process chamber shown in FIG. 10.

BEST MODE FOR CARRYING OUT THE INVENTION

[0044] Hereinafter, with reference to the accompanying drawings, will be described in detail preferred embodiments of the present invention. In the specification and the drawings, components having substantially the same functional configuration are a repeated explanation thereof are denoted by the same reference numerals.

[0045] (example of a substrate treating apparatus according to the first embodiment)

First, a first exemplary configuration of the substrate processing apparatus according to the embodiment want a reference to the accompanying drawings to illustrate the invention.

[0046] FIG. 1 is a schematic configuration diagram showing an example of a substrate processing apparatus according to the present embodiment. As shown in FIG. 1, the substrate processing apparatus 100 includes a single common transfer chamber 102 formed in a substantially polygonal shape (e.g. hexagonal), the processing chamber can be evacuated configured a plurality (e.g., four) having a vacuum processing apparatus including 104 and A~104D, the.

[0047] Each processing chamber 104A~104D is the peripheral surface of the common transfer chamber 102 are connected through respective gate valves 10 6A~106D. In each processing chamber 104A-104D, and the substrate to be processed such as a semiconductor wafer (hereinafter, simply referred to as "wafer".) Is W on the mounting table 10 5A~105D provided. Each processing chamber 104A~104D, to the wafer W placed on the mounting table 105A ~105D respectively, so that the can subjected to a predetermined process.

[0048] the common transfer chamber 102 via a vacuum evacuable-configured two load lock chambers 108A, 10 8B, substantially rectangular loading transfer chamber 110 is connected. The connecting portion of the load lock chamber 10 8A, 108B and the common transfer chamber 102 and the loading transfer chamber 110, respectively gate Tobarubu 107A, 107B is interposed. [0049] The loading transfer chamber 110, the alignment seeking the eccentric amount by rotating the example, three inlet ports 112A~ 112C and the wafer W on the cassette capable of accommodating a plurality of wafers W optically orienter 114 for is coupled, Ru.

The [0050] loading transfer chamber 110, bending has two picks 116A for holding the wafer W, the 116B, turning, lifting and linearly movably arranged loading transfer mechanism 116 is provided . Further, the common transfer chamber 102, transfer mechanism 118 that is configured to be able to bend and stretch and turning a two picks 118A, 118 B for holding the wafer W is provided. The substrate processing apparatus 100, the control unit 200 is connected. Then, the control unit 200, each part of the board processor 100 is adapted to be controlled, Ru.

[0051] In this embodiment, either one of the common transfer chamber 102 and two load lock chambers, for example, the load lock chambers 108A, transfer port 109A of the connecting portion between the common transfer chamber wafer W used as carry-dedicated opening for loading into 102, transfer port 109B of the connecting portion between the common transfer chamber 102 and the other row-locked chamber 108B is used as the unloading dedicated port for unloading out the wafer W from the common transfer chamber 102 It is.

[0052] (Specific Example of wafer processing)

The substrate processing apparatus 100 according to this embodiment, deposit removal of chemical reactions and heat treatment thus removing the deposits (e.g. Kontamine such Chillon and natural oxide film) such depend on plasma! / ヽ gas components on the wafer Ru processing and, the deposit removal process adapted to run continuously, a film forming process for forming a predetermined thin film on a wafer which has been subjected.

[0053] (deposit removal process)

First, the deposit removing process performed as a pretreatment for film formation process, is described in detail.

[0054] In the present embodiment, and Do using plasma without using a water component, deposit removal process is executed. The deposit removing process, for example, a product generation process for generating a product by a chemical reaction of a deposit and a gas component containing staggered nature Sani 匕膜 the wafer, the generation which is generated on the wafer a product removal process for removing the heat treatment objects, constituted by a two-step process.

[0055] The product generation process, for example, COR (Chemical Oxide Removal) processing, product removal processed, for example, PHT (Post Heat Treatment) process. COR process, the oxide film such as deposit for example a natural oxide film is deposited on the wafer, for example, ammonia (NH)

3 with gas molecules, such as gas and hydrogen fluoride (HF) gas, by chemical reaction, product is a process of generating (mainly (NH) SiF). PHT processing, the wafer After being subjected to the COR processing,

4 2 6

Heated, vaporized product generated on the wafer by a chemical reaction of the COR processing (sublimation

) Is allowed to a process for removing from the wafer.

[0056] Thus, the COR processing and PHT processing, the plasma-less etching treatment and Doraitari one - ing process (dry cleaning process) corresponding to (without the COR processing power water component and the wafer without a bra Zuma it is possible to remove deposits such as natural Sani 匕膜).

[0057] For the case where the ammonia gas and hydrogen fluoride gas was used as the reaction gas, specifically showing a chemical reaction formula COR processing and PHT processing.

[0058] [Chemical reaction formula COR processing]

SiO + 4HF → SiF + 2H O †

2 4 2

SiF + 2NH + 2HF → (NH) SiF

4 3 4 2 6

[0059] [Chemical reaction formula PHT processing]

(NH) SiF → SiF † + 2NH † + 2HF †

4 2 6 4 3

COR processing and PHT processing using the above chemical reactions, has the following characteristics. Note that in PHT process, N and H also occurs some amount.

twenty two

[0060] Characteristics of the COR processing and PHT processing]

(1) Netsusani 匕膜 selection ratio (removal rate) is high. More specifically, COR processing and PHT processing, one selection ratio of the thermal oxide film is high, selectivity of polysilicon is low. Accordingly, pseudo-SiO layer having properties similar to those of the surface layer and the SiO film of an insulating film made of SiO film is a thermal oxide film

2 2 Natural Sani 匕膜 and watermark 2 or silicon surface layer can be efficiently removed [0061] (2) the growth of natural Sani 匕膜 the surface of the surface layer and the insulating film pseudo-SiO layer has been removed fast

2

Degree is slow. Specifically, Oite the surface of the wafer whose surface exposed by wet etching, and versus growth time of natural Sani 匕膜 thickness 3 Å to 10 minutes approximately, COR processing and PHT processing by the surface of the wafer surface is exposed, the growth time of the natural Sani 匕膜 thickness 3 Å is substantially more than 2 hours. Accordingly, CO in the R processing and PHT processing by the cleaning step is not the watermark is newly generated, since the growth of natural Sani 匕膜 by further time after the washing step is suppressed, the semiconductors devices thereby improving the reliability.

[0062] (3) the reaction proceeds in a dry environment. Specifically, it never used in the reaction with water in the COR processing. Further, even water molecules generated by the COR processing, because the COR processing is carried out in substantially a vacuum state, water molecules are generated in a gaseous state. Therefore, Do is that water molecules adhere to the wafer in a liquid state, so no Rukoto to water marks or the like is generated on the surface of the wafer. To further PHT processing is carried out at a high temperature, never Wotama over click or the like on the surface of the wafer occurs, there is no the OH group is arranged on the surface of the wafer exposed surface. Accordingly, the not become surface passivated (The passivate) hydrophilic wafer, nor surface of the wafer absorbs moisture. Therefore, it is possible to prevent a decrease in wiring reliability of the semiconductor device.

[0063] (4) the amount of product (complex) relaxes the predetermined time has elapsed. Specifically, when a predetermined time has elapsed, thereafter be continued exposure of the watermark in a mixed gas of ammonia gas and hydrogen fluoride gas, the amount produced of the product is not increased. The amount of addition products, the pressure of the gas mixture is determined by the parameters of the mixed gas, such as volumetric flow ratio.従Tsu Te, the control of the removal of the watermark can be easily performed.

[0064] (5) generation of particles is very small. Specifically, for example be performed our Keru removal of natural Sani 匕膜 2000 wafers, it is hardly observed adhesion of particles to the inner wall of the processing chamber and the processing chamber. Therefore, without short circuit of the wiring through the particles are generated in the semiconductor device, thereby improving the reliability of the semiconductor device.

[0065] (the film-forming process)

Next, a description will be given of the film-forming process. Here, as a deposition process, deposition of depositing a barrier layer of 2-layer structure of TiN-based film as a Ti-based film and the second film as a first film, for example on the inside of the contact hole or via hole formed on the wafer film processing is performed. Before running this good UNA film forming process, and have the deposit removal process Na using plasma without using water component as described above is performed. Accordingly, it is Rukoto improve the adhesion and strength of the film. Further, in deposit removal process according to this embodiment, plasma is used et Lena, therefore, the this inflict charge-up damage of the plasma due to the base film of the wafer can be prevented. Therefore, it is possible to perform no wiring force 卩E of damage, also, it is possible to form a film having a good contact resistance.

[0066] In the manufacture of semiconductor devices, recent and corresponds to the demands of the density and integration, there is a tendency to the circuit configuration in the multilayer wiring structure. Therefore, embedding techniques for electrical connection between layers, such as underlying semiconductor device and an upper via hole is a connecting portion of the wiring layers to each other in the contact hole and the upper and lower, which is a connection portion between the wiring layers is Te important summer there. Such embedding is such contact holes, via holes, typically A1 (Al Miniumu) and W (tungsten), or these are mainly alloy. To form a contact between the good UNA metal or alloy and the underlying silicon (Si) substrate or a polysilicon (poly- Si) layer, T Kakarimaku the inner side of the contact hole or via hole prior to these embedded ( for example Ti film) and TiN-based film (e.g. TiN film) and that have been made to be deposited.

[0067] For the deposition of these films, progressing miniaturization and high integration of devices can also be electrical resistance forms a high-quality film without increasing tooth strength can also be improved step coverage CVD (chemical vapor deposition: chemical vapor deposition) method has been used. By forming a Ti film by CVD of TiCl as reaction gases For example, under the Ti film

Four

It is reacted with the silicon substrate of the earth self-aligning manner by selective growth TiSi on a silicon diffusion layer of the bottom of the contact hole, thereby obtaining good Omikku resistance.

2

[0068] When forming such a CVD-Ti film, TiCl gas as described above as a reaction gas

4 scan is generally used, H gas or the like is used as the reducing gas. Yui TiCl gas

2 4 Go energy is rather high, the thermal energy alone does not decompose if not a high temperature of about 1200 ° C. Accordingly, the plasma CVD method to use a plasma energy, is carried out normally, the film formation at a process temperature 650 ° C approximately.

[0069] Here, in such a metal deposition, in order to obtain a good contact resistance, processing to remove the natural oxide film formed on the base before the film forming process is performed. The removal of such natural Sani 匕膜 generally have been made by dilute hydrofluoric acid, removing the natural Sani 匕膜 by the plasma to form an inductively coupled plasma using hydrogen gas and Al argon gas there Chi can be.

While [0070] and Kaka, when a Ti film in the conventional plasma CVD method as described above, there is a tendency that the particle size will be uneven TiSi crystals formed. In other words, the formation of the conventional TiSi film

Because it was ヽ performing a natural oxide film is removed by dry cleaning using an argon plasma prior to 2 2, and Si diffusion layer surface is damaged and unevenly amorphous, Ti film by plasma CVD at that state When forming a, TiSi crystals summer even more uneven it is formed

2

And is the cause. Then, TiSi crystals such heterogeneous conditions present in relatively sparse

2

To reason, high resistivity contact between the TiSi film and the base becomes non-uniform. And therefore

2

, The contact resistance is increased.

[0071] In this respect, according to this embodiment, as a pretreatment, which is formed on the wafer through without the water component and the plasma V ヽ a ヽ deposit removal process use (for example, the COR processing and PHT processing) after removing the natural Sani 匕膜 the contact hole or the via hole, Ti Keimaku及 beauty TiN-based film is deposited. Thus, it is possible to prevent the base before forming a Ti-based film and TiN-based film, that inflict charge-up damage of the plasma caused.従Tsu Te, also by forming a Ti film by plasma CVD method, can be performed without wires force 卩E of damage, also, it is possible to form a film having a good contact resistance. The adhesion of the film of Ti-based film and the Ti N-based film, it is possible strength improved.

[0072] Here, a specific example of a Ti-based film forming process as the first film formation process. The Ti-based film forming process, for example, CVD-T i film formation process for forming a Ti film by plasma CVD as described above is performed. CVD-Ti film formation process, for example, the supply of the TiCl gas and gas

Four

And performing scan the supply and plasma generation supply and H gases at the same time, the supply of the NH 3 gas

twenty three

C by a step of supplying a plasma generation supply and H 2 gas of the Ar gas performed at the same time as

2

VD- Ti film is a process of forming a. In this case, the temperature is set to 650 ° C.

[0073] In addition, Ti-based film forming process is not limited to the above. For example, it may be executed SFD (Sequential Flow Deposit ion) -Ti film formation process for forming a Ti film by plasma CVD than the 650 ° C at a low temperature of 40 0 ​​° C~450 ° C. SFD- Ti film formation process, for example stroke and TiCl to supply the feed and H 2 gas supply and Ar gas TiCl gas and plasma generation in the same period

2

A step of stopping only the supply of gas after repeated several times, the supply of NH 3 gas and Ar gas

4 3

By performing the process for supplying the supply of H 2 gas and the plasma generated in the same period, SF

2

A process for forming a D-Ti film.

[0074] Further, as another Ti film formation process, atomic layer deposition (ALD: Atomic Layered Deposition) good also perform ALD-Ti film formation process using techniques ヽ. ALD-Ti film formation process, for example supply and plasma raw feed and H 2 gas of the Ar gas after supplying only TiCl gas

4 2

A step of performing Chengdu at the same time after repeated several times, the supply of feed and Ar gas NH 3 gas

3

The supply and the plasma generation H gas by performing the steps performed at the same time, ALD-Ti

2

Film is a process of forming a.

[0075] In addition, H and supply and plasma generation supply and Ar gas TiCl gas after the same period

4 2 After repeating several times the step of supplying a gas, supply and H of supply and Ar gas NH 3 gas

3 2 gas supply and a plasma generation by performing the steps performed at the same time, it may also be adapted to deposit a ALD-Ti film ヽ.

[0076] Moreover, the supply and the plasma generation supply and Ar gas TiCl gas after the same period

Four

Several times repeatedly step for supplying a plasma generation supply and Ar gas H gas at the same time

2

After supply a plasma generating and the same time of the feed and H 2 gas supply and Ar gas NH 3 gas

3 2

By performing the steps performed may be deposited ALD-Ti film.

[0077] On the other hand, TiN-based film forming process as a second film formation process, for example as described above, TiCl

4 using a gas and NH 3 gas as a reaction gas, as set the set temperature to five hundred to six hundred ten ° C,

3

A process of forming a TiN film by thermal CVD.

[0078] (Configuration Example of the processing chamber)

Next, processing chamber of usage scenario (arrangement example) in the substrate processing apparatus 100 for performing the processing as described above. The substrate processing apparatus 100 according to this embodiment, as described above, removed by a chemical reaction and heat treatment of the gas component which does not depend deposits such as natural Sani 匕膜 on wafer and plasma without the water component a deposit removing process for, adapted to run continuously and the film forming process, the forming a predetermined thin film on a wafer to which the deposit removing process has been performed. [0079] Thus, among the processing chambers 104A-104D, one of the at least two processing chambers are configured as a deposit removal processed chamber other is configured as a deposition treatment chamber.

[0080] In addition, deposit removal process, as described above, may also be by sequentially executing the processing of multiple stages UniNatsu, constituting the deposit removal process chamber a plurality of processing chambers in which case it may be. More specifically, for example, when performing the two-step process with the product formation process as described above (e.g., COR processing) and the product removal process (e.g. PHT treatment), of the processing chamber 104 A~104D two processing chambers may be configured as a deposit removal processing chamber. In this case, one of the processing chamber is configured as a product generation process chamber configured the other processing chamber as product removal processed chamber.

[0081] Further, the film forming process, be formed continuously different film Yo ヽ. In that case, the deposition treatment chamber may be constituted by a plurality of processing chambers. Specifically, when the continuously formed a first layer (e.g., Ti-based film) and the second film (e.g., TiN-based film), the processing chamber 104A~104D sac Chino two processing chambers formed It may be configured as a membrane processing chamber. In this case, it is configured as a first film formation processing chamber in which one of the processing chamber to deposit a first layer, configured as a second film formation processing chamber for the other processing chamber to deposit the second layer. Thus, in accordance with the contents of the deposit removal process and the deposition process performed by the substrate processing apparatus 100, the configuration of the processing chambers 104A~104D is determined.

[0082] Here, for example, a contact hole or wafer W via hole is formed is introduced into the substrate processing apparatus 100, COR processing and PHT processing as extraneous material removal process as described above is continuously against the wafer W after being executed Te shows configuration example of the processing chamber in the substrate processing apparatus 100 in the case where Ti film formation process and the TiN film formation process as the film forming process is performed continuously (arrangement example) in FIG. 2 .

[0083] In the configuration example shown in FIG. 2, the processing chamber 104A, 104B, 104C, 104D force respectively, COR processing chamber, PHT processing chamber, Ti film formation processing chamber is configured as a TiN film formation processing chamber. Processing in each processing chamber 104A~104D, respectively, are performed based on the process handling program 364 EC stored in the program data storage unit 360 provided in the (equipment controller) 300 of the control unit 200 described later . That is, reads necessary program CPU310 of EC300 from the process processing program 364, the processing data storage means 370 to the stored process processing information (e.g., process recipe information) out reads the necessary information from 374, the processing Execute. The detailed structure of the control unit 200 will be described later.

[0084] (Specific examples of the substrate transport process)

Next, a description will be given of the process of transporting the wafer W in the substrate processing apparatus 100 configured as shown in FIG. Because processing in each processing chamber 104A~104D for the wafer W is performed in the above order, the transport path of the wafer W is as solid arrows shown in FIG. Such wafer transfer processing is performed based on the EC (equipment controller) to be described later provided in the 300 program data storage conveyance processing program 362 stored in the unit 360 of the control unit 200. That is, by reading the CPU310 is necessary information from the transport processing information (e.g. conveying path information) 372 that is stored in the processing data storage means 370 of the EC 300, by executing the transport process program 362, executes the process of transporting the wafer than it is.

[0085] Here, as an example, it is assumed that the center of the inlet port 112B in the installed cassette pretreated wafer W (carrier also including) such as contact hole or via hole from is formed is Desa taken. Also, two load lock chambers 108A, any hand of the load lock chamber of 108B, where Irare use the load lock chamber 108A, is for loading the pre-processing the wafer W, the other load lock chamber 108B process used for the carrying-out of already wafer W. Now, it is the wafer W respectively accommodated in each of the processing chambers 104A-104D, force each processing is completed, or, it is assumed that almost finished verge.

[0086] Now, it will be described first conveying process of loading transfer chamber 110. In the load-locking chamber 108B for unloading, assuming that the wafer W processed for processing in the processing chamber 104D is finished is housed, the processed wafer W, the loading transfer mechanism 116, the transport as shown in route XI 1, it is accommodated is transported to a central inlet port 112B.

[0087] On the other hand, the wafer W before processing, which is accommodated in the center of the inlet port 112B is the carry-in side conveyance mechanism 116, as shown in the transport path XI 2, is carried to the orienter 114. And, the alignment of the wafer W before treatment with orienter 114 is performed, then the wafer W before processing is to match positions by the loading transfer mechanism 116, as shown in the transport path X13, for carrying is conveyed to the load lock chamber 108A, it is housed. Wafer W before processing is on standby in the load lock chamber 108A. More transfer operation, for each processing of the wafer W proceeds, are repeatedly performed.

[0088] Next, a description will be given transport process of a wafer in the common transfer chamber 102. First, the conveyor structure 118, the wafer W processed the processing chamber was housed in 104D is taken out, as shown in conveyance path Yl 1, is transferred into the load lock chamber 108B in the free state.

[0089] Then, by the transport mechanism 118, © E C W of processed processing chamber has been accommodated in the 104C is taken out, as shown in the transport path Y12, it is carried into the empty processing chamber 104D. Thereafter, the processing in the processing chamber 104D is started.

[0090] Subsequently, by the transport mechanism 118, the wafer W processed the processing chamber has been accommodated in the 104B is taken out, as shown in the transport path Y13, it is carried into the empty processing chamber 104C. Thereafter, processing in the processing chamber 104C is started.

By [0091] Then, the transport mechanism 118, © E C W of processed processing chamber has been accommodated in the 104A is taken out, as shown in the transport path Y14, it is carried into the empty processing chamber 104B. Thereafter, processing in the processing chamber 104B is started.

[0092] Subsequently, by the transport mechanism 118, © perilla pretreatment waiting in the load lock chamber 108A, W is taken out, as shown in the transport path Y15, transportable entry into idle state processing chamber 104A It is. Thereafter, processing in the processing chamber 104A is started.

[0093] Incidentally, upon carrying in and carrying out of the wafer W, the gate valves 106A to 106D, 107A, only the gate valve required of 107B are opened and closed. Further, Ueno Te in the processing chambers 104A-104D, for each processing of W is completed, the above operation is repeated.

[0094] In this way, the wafer W before processing a contact hole or via hole is formed, in the process chamber 104A~ processing chamber 104D, COR processing respectively, PHT processing, Ti film forming process, TiN film the film formation process is performed continuously. Therefore, the contact hall or the inner wall of the via hole of the wafer W, in a state in which deposits have been removed, such as a natural oxide film by the COR processing and PHT processing, Ti Maku及 by Ti film formation process and the TiN film formation process barrier layer of fine TiN film is formed.

[0095] Thus, the adhesion and strength of the film is improved. Further, since it is prevented that inflict charge-up damage of the plasma due to the base film of the wafer, Do damage, it is possible to perform wiring processing, it is possible to form a film having a good contact resistance . [0096] Note that the configuration of the processing chambers 104A-104D (arrangement) is not limited to that shown in FIG. Processing chambers which process chamber COR processing chamber of the 104A-104D, PHT processing chamber, Ti film formation processing chamber may be configured as a TiN film formation processing chamber. Therefore, even with the conveyance order of the wafer, because it is conveyed to the COR processing chamber → PHT processing chamber → Ti film formation processing chamber → TiN film formation processing chamber and ヽ U order, the processing chamber 104A → the processing chamber 104B → treatment may not be the order say the chamber 104C → processing chamber 104D.

[0097] (example configuration of the control unit)

It will be described below with reference to FIG. 3 an example of the configuration of the control unit 200 of the substrate processing apparatus 100. Figure 3 is a block diagram showing a configuration example of a control section (system controller) 200. 3, the control unit 200 includes a device controller (EC Equipment Controller) 300, a plurality of module control unit (MC: Module Controller) 230A, 230B, and 230C ..., EC 300 and each MC230A, 230B, 230C a switching hub (hUB) 220 that connects ... and each comprise a.

[0098] EC 300 of the control unit 200, for example via a LAN (Local Area Network) 202, it is connected to the MES (Manufacturing E xecution System) 204 for managing the entire factory manufacturing process where the substrate processing apparatus 100 is installed there. MES204 is constituted by, for example, a computer. MES204, in cooperation with the controller 200, while feeding back the real-time information about the various steps in a factory in basic operation system (not shown), a determination is made as to various steps in view of the overall plant load, etc. (or decision which is to assist) as the.

[0099] EC 300 constitute MC230A, 230B, a main control unit for controlling the substrate processing apparatus 100 overall operation oversees 230C ... a (master control unit). Switching hub 220, in accordance with the 帘 U control signal EC300 Chikarara switches MC230A as a connection destination of EC300, 230B, and 230C ....

[0100] Each MC230A, 230B, 230C ... are each a common transfer chamber 10 2 of the substrate processing apparatus 100, the processing chamber 104A-104D, the load lock chambers 108A, 108B, the transport chamber 110, each module, such as orienter 11 4 constitute sub-control unit for controlling the operation (slave controller). Each M C230A, 230B, 230C ... are each, DIST (Distribution) boards 234A, 234B, by 234C ..., for example via a GHOST network 206, each I / O (input-output) modular Yunore 236A, 236B, 236. - - - - This connection has been! Ru. Here, the GHOST network 206 is a network which is realized by the called LSI and MC GHOST mounted on (module control unit) (General High-Speed ​​Optimu m Scalable Transceiver). The GHO ST network 206 can be connected to 31 I / O modules at the most. Your name, in the GHOST network 206, MC is equivalent to a master, I / O module corresponds to the slave.

[0101] Each I / O module 236A, 236B, 236C ..., respectively, components of each module, such as the processing chamber 104A-104D (hereinafter, "end devices" and referred.) Connected to the a plurality of IZO portion 238A, 238Β, 238C ... it will force performs a reception (transmission) of the output signal from the supply (transfer) and the respective end devices of the control signals to the respective end devices. For example, the end devices processing chamber 104, APC valve for controlling the exhaust from the mass flow controller and the processing chamber 104 that controls the flow rate of the gas introduced into the processing chamber 104, and the like.

[0102] Each GHOST network 206, I / O section 238A, 238B, digital signal at 238C ..., an analog signal, (not shown) IZO board for controlling input and output of the serial signal is also connected.

[0103] Here, an example of the configuration of the EC300 as shown in FIG. 3 will be described with reference to FIG. Figure 4 is a block diagram showing a configuration example of EC 300. As shown in FIG. 4, EC 300 is, EC a CPU (central processing unit) 310 that comprises the body, RAM memory area or the like is provided (random access' memories to be used for various data processes CPU310 performs ) and 320, a display unit 330 constituted by a liquid crystal display for displaying the operation screen and a selection screen, the process recipe Ya process to the input and a predetermined storage medium of various data such as input and editing process recipe by the operator 'and output means 340 can output various data such as the output of the log, the notification unit 350, such as alarm (eg a buzzer) for notifying when the abnormality of electric leakage or the like occurs in the substrate processing apparatus 100, equipped with a, Ru.

[0104] In addition, EC 300 includes a program data storage unit 360 that stores processing Purodara arm for performing various processing of the substrate processing apparatus 100, information necessary for executing the processing program (data) stored further comprising a processing data storage means 370 that is, a. Program data storing means 360 and a processing data storage means 370 is constructed for example in a storage area such as Nono Dodeisu click (HDD).

[0105] and CPU 310, a RAM 320, a display unit 330, an input unit 340, a notification unit 350, a program data storage unit 360, etc. The process data storage means 370, a bus line such as control Basuyade bus are placed They are connected by. The Bruno Surain, also connected like the switching hub 220, Ru.

[0106] CPU 310 may optionally reads a necessary program and necessary data from the program data storage unit 360 and the processing data storage means 370, performs various processing programs.

[0107] Here, a description will be given on a control example of the substrate processing apparatus 100 by the control unit 200 configured as described above.

[0108] In each of the processing chambers 104A-104D, for example, COR processing as described above on the wafer W, P HT process, Ti film formation process, if the process treatment such as TiN film formation process is performed, the EC 300 CPU310 reads a processing program for executing a process program 364 force the program data storage unit 360, also the information of the process recipe corresponding to the processing to be executed from the process processing information 374 of the processing data storage means 370 reads, these and based executes respective processes. More specifically, CPU 310, according to the processing program, the switching hub 220 via the IZO unit 238 in the processing chamber to control the 104A~104D MC230, GHOST network 206 and IZO module 236, the desired end devices executing each process by sending a control signal to.

[0109] In the process chamber 104A configured as eg COR processing chamber, a case will be described in which COR processing is performed on the wafer W. In this case, CPU 310 by sending a control signal to the mass flow controller of the gas supply system of the processing chamber 104A (e.g. a mass flow controller of the ammonia gas supply pipe and the hydrogen fluoride gas supply pipe), ammonia gas definitive processing chamber 104A and while modulating the volumetric flow ratio of hydrogen fluoride gas to a desired value, by sending a control signal to the exhaust system vacuum pump (e.g. Taumyuro) and pressure regulator valve (e.g. APC valve), the processing chamber 104A adjusting the pressure of a desired value. At this time, the pressure gauge is sent to CPU310 of EC300 pressure value of the processing chamber 104A as an output signal. CPU310 based on the value of the pressure in the processing chamber 104A, which has been transmitted, ammoxidation Niagasu and mass flow controllers of the feed pipe and the hydrogen fluoride gas supply pipe, APC determines the valve and control parameters of TMP such as (modified) to.

[0110] Further, in the processing chamber 104B that is configured as a PHT processing chamber, a case will be described in which the PHT processing is performed on the wafer W. In this case, CPU 310 by sending a control signal to and exhaust system pressure control valve (mass flow controller such as nitrogen gas supply pipe) processing chamber 104B gas supply system mass flow controller (e.g. APC valve), the processing chamber the pressure in 104B is adjusted to a desired value. On the other hand, adjusted Ueno by sending a control signal to the stage heater, the temperature of the W to a desired temperature. At this time, the pressure gauge sends to CPU310 of EC300 pressure value of the processing chamber 104B as the output signal. CPU 3 10, based on the value of the pressure in the processing chamber 104B that has been transmitted, determines the control parameters of the MF C and the APC valve 69 in the nitrogen gas supply pipe (corrected) to.

[0111] The control unit shown in FIG. 3, (System Controller) 200, Do plurality of end devices are connected directly to the EC 30 0, in, constituting the ΙΖΟ module IZO unit connected to a plurality of end devices are modularized are doing. The ΙΖΟ module force MC230 and because it is connected to the EC300 through the sweep rate Tsuchinguno ヽ Bed 220, that the communication system is obtained is simplified.

[0112] Here, the control signal CPU310 of EC300 sends, desired end devices connected to the ΙΖΟ portion of the address, and includes an address of ΙΖΟ module including the ΙΖΟ portion. Thus, the switching hub 220 refers to the address of ΙΖΟ Mojiyu Le in the control signal, also GHOST206 of MC230, reference may be made to address the I / O unit in the control signal. That is, it is not necessary to the switching hub 220 and MC230 performs transmission destination inquiry CPU 31 0 to the control signal. Thus, it is possible to realize a circular smooth transmission of the control signal.

[0113] Thus, in the substrate processing apparatus 100 according to the first embodiment, before performing a film forming process, Do with deposits and natural Sani 匕膜 attached to wafer plasma, with after being removed by performing a kimono removal treatment (e.g., COR processing and ΡΗΤ process), since the © E c can perform a film forming process are continuously Nag be exposed to the atmosphere, the adhesion of the film it can be improved and sex and strength. Since it removes the natural Sani 匕膜 without using the plasma, can be performed without wires force 卩E of damage, it is possible to form a film having a good contact resistance.

[0114] In the processing of forming the barrier layer of a contact hole or via hole as described above, it has been described that is possible to perform the COR processing and PHT processing as pre-process is effective. !, Even while However, the present invention is not limited to this as a film-forming process, carry out the COR processing and PHT processing as another deposition processing of the previous step, such as follows.

[0115] (Other examples of film-forming process)

Here, a description will be given of another specific example of applicable film forming process in the present invention. Here, as the COR processing and PHT processing effective film forming process be performed as a pre-process, a gate insulating film of the MOS device, such as a MOSFET T high dielectric (High- K) material process of forming by will be described .

[0116] MOS devices of the gate insulating film, the progress of miniaturization, it is in recent years requires lnm or less of the thickness of the film of silicon Sani 匕膜 phase equivalent is Ru. This corresponds to a thickness of 3-4 atomic layers. When this much thinner, an increase of the tunnel current, diffusion of elements doped in the gate electrode, a decrease or the like of the reliability, silicon Sani 匕膜 can not be used. Therefore, development of a film having a high dielectric constant (-called High- K film) has been developed in a very momentum. In other words, ZrO, HfO

Transition metal oxide film such as 2 2, such as La O earth Sani 匕膜, and, as their silicates

twenty three

Etc. is to have a high dielectric constant, it has a high thermal stability, and, since it has a high energy barrier against the holes and electrons in Si, the gate of MO S devices such next-generation MOSFET It is extensively studied as an insulating film.

[0117] However, between these high dielectric constant film and the Si substrate, the composition transition layer consisting of silicate is formed, the intermediate Sani spoon state mosquito ゝ et of Si between the silicate layer and the Si substrate composition transition layer is formed. Therefore, in order to prevent these compositions the transition layer is formed, it is necessary to form a base acid I 匕膜 (e.g. SiO film) as earlier Sani spoon prevention layer. like this

2

Base acid I 匕膜 by interposing between the silicate layer and the Si substrate, it is possible to prevent the device characteristics degradation, i.e. a decrease in mobility. [0118] In such a high-dielectric (High- K) forming the gate insulating film by material, it is necessary to control at an atomic layer level. Therefore, before performing the film formation process of the gate insulating film, Do using plasma, a dry cleaning deposit removal process (e.g., the COR processing and PHT processing) deposits and natural Sani 匕膜 running by removing the can improve the adhesion and strength of the film.

[0119] Moreover, if by removing the natural Sani 匕膜 with plasma, there is a possibility that inflict charge-up damage of the plasma excitation under land forming a gate insulating film. In this way forming a left gate Sani 匕膜 leaving damage under ground, depending on the degree of damage, inviting breakage of the gate Sani 匕膜, characteristics of the MOS device itself is likely to deteriorate . Point of this, by the deposit removal process according to the present embodiment (e.g., the COR processing and PHT processing) lever, since the plasma is not used, there is no Rukoto damage the underlying forming a gate insulating film . Therefore, it is possible to prevent the characteristics of the MOS device is degraded

[0120] In such a high-dielectric (High- K) process for deposition of the gate insulating film (high dielectric gate insulating film) of the material, on the wafer i.e. silicon substrate, a very thin, preferably lnm thickness below, after forming the base acid I 匕膜 such as SiO films previously, High- K

2

Film (e.g., a silicate membrane such as HfSiO) is deposited. Here, the base oxide film forming treatment

2

Management corresponds to the first film formation process, High- K film formation process corresponds to the second film forming process.

[0121] Base oxide film forming process (first film formation process) is performed, for example, by radical Sani spoon processing using ultraviolet excitation oxygen radicals. Specifically, the ultraviolet excitation radical Sani spoon processing of the silicon substrate can be stably formed with good reproducibility a base acid I 匕膜 a thickness corresponding to 2 to 3 molecular layers. Thus, by the oxygen radicals, SiO atomic layer, for example, about a substantially 0. 5 nm as the base acid I 匕膜 on the surface of the silicon substrate is formed. This

2

Processing time when the is, for example, 300 seconds.

[0122] High- K film deposition process in the (second film formation process), the base oxide film forming process by the wafer base Ichisusani 匕膜 is formed, for example, metal organic chemical vapor deposition ( due MOCVD) method, a metal Sani 匕膜 (e.g. silicate film such as HfSiO) is formed. Specifically, for example, a substrate having SiO atomic layer is formed as the base acid I 匕膜 to 400 to 600 ° C

2

A heated state, the raw material gas is introduced onto the substrate, and the raw material gas is decomposed and thin silicate film such as on a substrate, for example HfSiO is formed. Processing time in this case and

2

It is to, for example, 343 seconds.

[0123] (another example of the processing chamber)

Next, a configuration example of a processing chamber in the substrate processing apparatus 100 for performing such processing. The substrate processing apparatus 100 according to this embodiment, COR processing, PHT process, based oxide film forming process (UV treatment) is performed continuously High- K film deposition process (MOCVD process).

[0124] Thus, among the processing chambers 104A-104D, each of the at least two processing chambers forces, CO R processing is configured as a deposit removal processing chamber for performing the PHT process, the other two process chambers forces respectively, oxide film deposition process (UV treatment), configured as a deposition treatment chamber for performing a High- K film deposition process (MOCVD process).

[0125] Here, the processing chamber 104A in the substrate processing apparatus 100, 104B, 104C, 104D force it respectively, COR processing chamber, PHT processing chamber, oxide film forming process (UV treatment) chamber, High- K film deposition processing example configured as (MOCVD process) chamber illustrated in FIG. Processing in the oxide film forming process (UV treatment) chamber, and, High- K film deposition process for processing in (MOCVD process) chambers, respectively, of the control unit 200 described above EC (equipment controller) 300 of the program based on the process handling program 364 stored in the data storage unit 360 Ru is executed. The CPU310 of EC 300, with reading a necessary program from the process processing program 364, reads the necessary information from the processing data storage process stored in the unit 370 processing information (e.g. flop Rosesureshipi information) 374, each processing Execute.

[0126] In addition, the conveyance of the wafer W in the substrate processing apparatus 1 00 in the case of constituting the respective processing chambers 104A~104D as shown in FIG. 5, is similar to the case of the configuration shown in FIG. 2, the details It omitted Do explanation.

[0127] (example of a substrate treating apparatus according to the second embodiment)

Next, a description will be an example of a configuration of a substrate processing apparatus according to a second embodiment with reference to the drawings. Figure 6 is a schematic block diagram of a substrate processing apparatus according to the second embodiment. As shown in Figure 6, in the substrate processing apparatus 101, the vacuum processing apparatus and a common transfer chamber and a plurality of processing chambers, and a plurality coupled. Also in the substrate processing apparatus 101 having such a configuration, it is possible to apply the present onset bright.

[0128] In the substrate processing apparatus 101 shown in FIG. 6, the common conveyance chamber in the substrate processing apparatus 100 shown in FIG. 1 represented as a first common transfer chamber 102, Ru. The first common transfer chamber 102 and two load-locking chamber 108A, between 108B, another second common transfer chamber 120 is interposed. The second common transfer chamber 120 is configured to substantially polygonal shape (e.g. irregular heptagon), two process chambers 104E on its two sides, 104F each gate valves 106E, linked via a 106F ing. The vacuum processing apparatus having four processing chamber connected thereto a first common transfer chamber 102 and a (processing chamber 104 A~104D) is an example of a first vacuum processing apparatus, the second common transfer chamber 120 vacuum processing apparatus having the two processing chamber connected thereto (processing chamber 104E, 104F) is an example of a second vacuum processing apparatus.

[0129] The first common transfer chamber 102 is provided between the second common transfer chamber 120, the path 122 can temporarily hold the wafer W with the two common transfer chamber 102, 120 to communicate is provided. In transferring the wafer between the first Common transport chamber 102 and the second common transfer chamber 120, so that the wafer W is temporarily held by this path portion 1 22. In this case, the shape of the first common transfer chamber 102 to connect the path portion 122 is molded into irregular heptagon. The junction of the first common transfer chamber 102 and path 122, the gate valve 126 is provided. By opening and closing the gate valve 126, it is possible to communicate 及 beauty blocking between both common transfer chamber 102, 120.

[0130] The processing chamber 104E and the processing chamber 104F, similar to the other processing chambers 104A-104D, © E c W hold the mounting table 105E, 105F, respectively. The second common transportable Okushitsu 120, similarly to the first common transfer chamber 102, two picks 124A, the transport mechanism 124 is provided which is adapted to allow bending and turning with the 124B. Transport mechanism 124 of the second common transfer chamber 120, in the same operation as the transport mechanism 118 of the first common transfer chamber 102, so as to transfer the wafer efficiently, Ru.

[0131] Incidentally, either one of the second common transfer chamber 120 and two load lock chambers, for example, low-locked chamber 108A, transfer port 152A of the connecting portion between the wafer W second common transfer chamber 120 used as carry-dedicated opening for loading to, transfer port 152B of the connecting portion between the second common transfer chamber 120 and the other load lock chamber 108B is out dedicated port for unloading out the wafer W from the second common transfer chamber 120 used as.

[0132] (Configuration Example of the processing chamber)

Next, explaining an example of the configuration of the processing chamber (arrangement example) in the substrate processing apparatus 101 shown in FIG. Also the substrate processing apparatus 101 according to this embodiment, with the removal Te cowpea deposits such as natural oxide film on the wafer in a chemical reaction and heat treatment of the ヽ gas components such depend on and plasma not a use ヽ the water component a kimono removal process, so the film forming process for forming a predetermined thin film on a wafer to which the deposit removing process has been performed, the continuous run! / Ru.

[0133] Thus, among the processing chambers 104A~104F, one of the at least two processing chambers are configured as a deposit removal processed chamber other is configured as a deposition treatment chamber.

[0134] In addition, deposit removal process, as described above, may also be by sequentially executing the processing of multiple stages UniNatsu, constituting the deposit removal process chamber a plurality of processing chambers in which case it may be. More specifically, for example, when performing the two-step process with the product formation process as described above (e.g., COR processing) and the product removal process (e.g. PHT treatment), of the processing chamber 104 A~104F two processing chambers may be configured as a deposit removal processing chamber. In this case, one of the processing chamber is configured as a product generation process chamber configured the other processing chamber as product removal processed chamber.

[0135] Further, the film forming process, be formed continuously different film Yo ヽ. In that case, the deposition treatment chamber may be constituted by a plurality of processing chambers. Specifically, when the continuously formed a first layer (e.g., Ti-based film) and the second film (e.g., TiN-based film), the processing chamber 104A~104F sac Chino two processing chambers formed It may be configured as a membrane processing chamber. In this case, it is configured as a first film formation processing chamber in which one of the processing chamber to deposit a first layer, configured as a second film formation processing chamber for the other processing chamber to deposit the second layer. Thus, in accordance with the contents of the deposit removal process and the deposition process performed by the substrate processing apparatus 101, the configuration of the processing chambers 104A~104F is determined.

[0136] Here, for example, a contact hole or wafer W via hole is formed is introduced into the substrate processing apparatus 101, COR processing and PHT processing as extraneous material removal process as described above is continuously against the wafer W after being executed Te shows configuration example of the processing chamber in the substrate processing apparatus 101 in a case where Ti film formation process and the TiN film formation process as the film forming process is performed continuously (arrangement example) in FIG. 7 .

[0137] In the configuration example shown in FIG. 7, the processing chamber 104A, 104B, 104C, 104D force respectively, COR processing chamber, PHT processing chamber, Ti film formation processing chamber is configured as a TiN film formation processing chamber.

[0138] (conveying process wafer)

Next, a description will be given of the process of transporting the wafer W in the substrate processing apparatus 101 configured as shown in FIG. Because processing in each processing chamber 104A~104D for the wafer W is performed in the above order, the transport path of the wafer W is as solid arrows shown in FIG.

[0139] Here, as an example, it is assumed that the center of the inlet port 112B in the installed cassette pretreated wafer W (carrier also including) such as contact hole or via hole from is formed is Desa taken. Also, two load lock chambers 108A, any hand of the load lock chamber of 108B, where Irare use the load lock chamber 108A, is for loading the pre-processing the wafer W, the other load lock chamber 108B process used for the carrying-out of already wafer W. Now, it is the wafer W respectively accommodated in each of the processing chambers 104A-104D, force each processing is completed, or, it is assumed that almost finished verge.

[0140] First, the transfer process of the wafer W loading transfer chamber 110 shown in FIG. 7 is the same as that shown in FIG. Therefore, detailed description thereof is omitted. In this case, the transport route X21~X23 shown in FIG. 7 corresponds to the conveyance path XI 1~X13 respectively shown in Figure 2.

[0141] The process of transporting the wafer W of the first common transfer chamber 102 is substantially same as the case shown in FIG. 2, in the process of transporting the first common transfer chamber 102 in FIG. 7, the wafer W is conveyed to and from the path portion 122. In this respect, it differs from the case of FIG. 2 for carrying the wafer W load lock chamber 108A, with the 108B.

[0142] Specifically, the conveying path Y21~Y25 shown in FIG. 7 corresponds to the conveyance path Upsilon 11~Upushiron15 respectively shown in Figure 2. Here, the conveyance path Y21, the wafer W is processed chamber 104D force is also conveyed to the path 122, the conveying path Υ25 the wafer W is transported from the path 122 to the processing chamber 104A. In these respects, different from the transport path Yl l, Y15.

[0143] For transport process of the wafer W of the second common transfer chamber 120, first, the transport mechanism 124 Accordingly, the wafer W processed that is housed in the path portion 122 is taken out, as shown in the transport path Z21 to, it is transferred into the load lock chamber 108B of the free state. Then, retrieved by the wafer W force transfer mechanism 124 of the preprocessing waiting in the load lock chamber 108A, as shown in the transport path Z22, it is conveyed to the path 122.

[0144] Incidentally, upon carrying in and carrying out of the wafer W, the gate valves 106a to 106f, 107A, only the gate valve required of 107B, 126 are opened and closed. Then, the processing of the wafer W in each processing chamber 104A~ 104D within each completed, the above operation is repeated.

[0145] In this way, the wafer W before processing a contact hole or via hole is formed, in the process chamber 104A~ processing chamber 104D, COR processing respectively, PHT processing, Ti film forming process, TiN film the film formation process is performed continuously.

[0146] Thus, according to the configuration of the processing chamber shown in FIG. 7 (arranged), connected processing chamber 104A~ processing chamber 104D to the first common transfer chamber 102, respectively, COR processing chamber, PHT processing chamber , Ti film formation processing chamber, since it is configured as a TiN film formation processing chamber, the processing chamber being connected to a second common transfer chamber 120 104E, for 104F, and a processing chamber for performing other processing on the wafer it can be configured.

[0147] For example, the processing chamber 104E or processing chamber 104F may be configured as a metal-based film forming chamber for forming a tungsten film to fill the contact hole or the via hole. If this is processed by the processing chamber 104A~ processing chamber 104D wafer W is transported into the processing chamber 10 4E or 104F, on the barrier layer of Ti film and TiN film formed on the wafer W, the tungsten film There may be formed. Thus, a plasma-less cleaning process of the contact hole or the via hole, Roh rear layer forming process of a Ti film and TiN film, embedding untreated tungsten film can be performed continuously.

[0148] Note that the configuration of the processing chamber of a substrate processing apparatus 101 (arrangement) is not limited to the above. For example, in the case of performing the base oxide film forming process as a film forming process (UV treatment) and High- K film deposition process (MOCVD process), as shown in FIG. 8, the processing chamber 104C, a 104D, it respectively, the base oxide film forming process (UV treatment) chamber, High- K film deposition process may be configured as (MOCVD process) chamber. Carrying process in this case is the same as that shown in FIG. 7, a detailed description thereof is omitted. [0149] In addition, the process chamber 104A~ processing chamber 104D which is connected to a first common transfer chamber 102 configured as a deposition treatment chamber, connected to a second common transfer chamber 120 are processing chambers 104E, deposits dividing 104F it may be configured as a processed chamber (e.g. COR processing chamber and the PHT processing chamber). In this case, for example, as shown in FIG. 9, it may also constitute a processing chamber 104A~ 104D connected to the first common transfer chamber 102 as deposition treatment chamber of dual ヽ.

The [0150] Specifically, as shown in FIG. 9, the process chamber 104A, 1 04B connected to the first common transfer chamber 102, first line, i.e., the ITi film formation processing chamber, the ITiN film forms configured as a deposition treatment chamber, constituting the processing chamber 104C, a 104D, the second system, i.e., the 2Ti film formation processing chamber, as the 2TiN film deposition processing chamber. In the first system and the second system, Yo is also possible to execute the film formation process in the same process recipe, and, for example, even such as gas flow rate and pressure so as to perform a film forming process with different process recipe good. On the other hand, the processing chamber being connected to a second common transfer chamber 120 104E, the processing chamber 104F, respectively, COR processing chamber, configured as the PHT processing chamber.

[0151] Here, we describe the transport process of the substrate processing apparatus 101 configured as shown in FIG. As shown in FIG. 9, the second common transfer chamber 120, the wafer W is processed chamber 104E, it is accommodated in the path portion 122 is processed in the order of 104F. Then, the first common transfer chamber 102, © E wafer W is processed is conveyed from the path portion 122 the processing chamber 104A, on the order of 104B (first system). At the same time, the wafer W is processed chamber 104C from the path 122, which may be processed are conveyed to the order of 104D (second system). These Ru two processing power selectively execute der lineage. These two systems processing may be executed in parallel, it may also be performed only process one of the system in continuous ヽ.

[0152] Here, the conveyance process of the wafer W loading transfer chamber 110 shown in FIG. 9 is similar to the case shown in FIG. Therefore, detailed description thereof is omitted. In this case, the conveying path X31~X33 shown in FIG. 9, corresponding to the transport path XI 1~X13 respectively shown in Figure 2.

[0153] Next, the process of transporting the wafer W to the second common transfer chamber 120, first, by the transport mechanism 124, the processing Risumi in the processing chamber 104B or processing chamber 104D has been accommodated in the path portion 122 wafer W is taken out, as shown in the transport path Z31, is transferred into the load lock chamber 108B in the free state. [0154] Then, by the transport mechanism 124, the wafer W processed in the processing chamber 104F is taken, as shown in the transport path Z32, it is transported in the path 122 of the idle state. Subsequently, the transport mechanism 124, Ueno processed in the processing chamber 104E, W is taken out, as shown in the transport path Z3 3, it is carried into the empty processing chamber 104F. Thereafter, the processing in the processing chamber 104F is started.

[0155] Then, the wafer W before processing that has been waiting in the load lock chamber 108A is taken out by the transport mechanism 124, as shown in the transport path Z34, it is carried into the empty processing chamber 104E. Thereafter, the processing in the processing chamber 104E is started.

[0156] Next, a description will be given transport process of the wafer W of the first common transfer chamber 102. For wafers of the first common transfer chamber 102, as described above, the processing of two systems are feasible

[0157] The first system (processing chamber 104A, 104B) When performing the process, the first, Te transport mechanism 118 Niyotsu, the processing chamber wafer W processed that is housed in the 104B is taken out, the conveying path Ya31 as shown in, it is conveyed to the path 122 of the idle state.

By [0158] Then, the transport mechanism 118, © E C W of processed processing chamber has been accommodated in the 104A is taken out, as shown in the transport path Ya32, it is carried into the empty processing chamber 104B. Thereafter, processing in the processing chamber 104B is started.

[0159] Subsequently, the wafer W carried from the second common transfer chamber 120 in the path 122 carrying mechanism 1

Extracted by 18, as shown in the transport path Ya33, it is carried into the empty processing chamber 104A. Thereafter, processing in the processing chamber 104A is started.

[0160] On the other hand, the second system (processing chamber 104C, 104D) when processing, first, by the transport mechanism 118, the wafer W processed the processing chamber was housed in a 104D are taken, the conveying path

As shown in Yb31, it is conveyed to the path 122 of the idle state.

[0161] Then, by the transport mechanism 118, © E C W of processed processing chamber has been accommodated in the 104C is taken out, as shown in the transport path Yb32, it is carried into the empty processing chamber 104D. Thereafter, the processing in the processing chamber 104D is started.

[0162] Subsequently, the wafer W carried from the second common transfer chamber 120 in the path 122 carrying mechanism 1

Extracted by 18, as shown in the transport path Yb33, it is carried into the empty processing chamber 104C. Thereafter, processing in the processing chamber 104C is started.

[0163 Incidentally, upon carrying in and carrying out of the wafer W, the gate valves 106a to 106f, 107A, 107B

, Only the gate valve required of 126 are opened and closed. In addition, the processing chamber 104E and 10

4F, the process chamber 104A and 104B, are processed in the processing chamber 104C and 104D are performed, the wafer

For each processing of W is completed, the above operation is repeated.

[0164] in this way, the wafer W before processing a contact hole or via hole is formed, COR processing, PHT processing, Ti film formation process, TiN film formation process is performed continuously.

[0165] Thus, according to the configuration of the processing chamber shown in FIG. 9, connected processing chamber 104A~ processing chamber 104D to the first common transfer chamber 102, the two systems Ti film formation processing chamber and a TiN film because it is constituted as a deposition treatment chamber, by executing in parallel the processing of these two systems, it is possible to greatly improve the throughput of the entire apparatus. Because usually, the film-forming process (Ti film formation process here, TiN film formation process) towards the deposit removal process (COR treatment here, PHT processing) since time than Cal force, COR processing while executing the film forming process in the processing chamber of one system, if completed cleaning process such as the PHT, because it is possible to immediately execute the film forming process in processing chamber of the other system it is.

[0166] Further, since the concentrates the deposition treatment chamber in a second common transfer chamber 120 side of the (second vacuum processing apparatus) can be easily distinguished from the first common transfer chamber of the processing chamber There, i.e., more efficient in performing cleaning of each deposition treatment chamber and a second common transfer chamber 120. By dividing this by the type of processing the vacuum processing apparatus (first vacuum processing apparatus and the second vacuum processing apparatus), it can also be cleaned, for example, in each vacuum processing apparatus, the efficiency is good

[0167] (example of a substrate treating apparatus according to the third embodiment)

Next, referring to a force explain the drawings exemplary configuration of a substrate processing apparatus according to a third embodiment of the present invention. Figure 10 is a schematic diagram showing an example of a substrate processing apparatus according to the third embodiment. The substrate processing apparatus shown in FIG. 10 103, the substrate processing apparatus 101 shown in FIG. 7, was fitted with a measuring process chamber 400 capable of measuring the measurement and particles of the film thickness of the wafer W (including the deposits above) it is intended. [0168] measuring process chamber 400, out of each side of the first common transfer chamber 102 and the second common transfer chamber 120, if an empty part, may be mounted in any position. In the configuration example shown in FIG. 10, measurement processing chamber 400 is mounted to the first common transfer chamber 102. The measurement process chamber 400 is summer to be controlled by EC (equipment controller) 300 of the controller 200 shown in FIG. 10. In this case, through the EC300 and the switching hub 220 of the control unit 200 shown in FIG. 3, MC for controlling the measurement process chamber 400 (the module control unit) is connected. The MC in the connected thereto e.g. IZO module 236K through DISTC board, each part of the measurement process chamber 4 00 are connected. Thus, with the measurement process chamber 400 and EC300 control unit 200, control signals and data exchange may be performed.

[0169] Here, a configuration example of a measurement process chamber 400 in FIG. 11. The measurement process chamber 400 includes a stage (turntable) 405 for holding and mounting the the wafer W, a motor 407 for rotating the stage 405, a. Motor 407, based, driven Te to a drive signal from the configured motor drive unit 408 such as, for example, a motor drive. The motor drive unit 408, for example, are connected to the EC300 via the I / O modules 236Κ and the MC, it is controlled by a control signal from the MC or EC300.

[0170] measuring process chamber 400 of this embodiment includes a thickness measuring unit 410 for measuring the thickness of a thin film formed on the wafer W, and pattern recognition by imaging the surface image of the wafer W an image processing unit 420 for performing, and a party cycle measuring unit 430 for measuring the particles on the wafer W, a.

[0171] The film thickness measuring unit 410 includes a light source 414 for irradiating toward the wafer W, for example, a laser beam, a light receiving portion 416 is irradiated from the light source 414 receives light reflected by the wafer W, the light receiving portion 416 in has a signal processing unit 412 for processing the received light signal received, the. The signal processing unit 412, for example, are connected to the EC300 via the I / O modules 236Kappa. More this, EC 300 via the signal processing unit 412 is capable of receiving data on the film thickness on the wafer W (film thickness For example data, the film thickness evaluation data, etc.).

[0172] The film thickness measuring unit 410 uses a laser beam from a light source 414, for example, to measure by connexion thickness spectroscopic ellipsometry method. The spectroscopic ellipsometry method, generally, based on the this polarization change amount of the reflected light from the incident light and the wafer of the laser beam (amplitude, phase difference) is an amount proportional to the film thickness X optical constant, a thickness it is a method of measurement.

[0173] The image processing unit 420 is used, the number and the image pickup device 424 such as a CCD (Charge Coupled Devic es) for imaging the surface image of the wafer W, a signal processing section 422 for processing an image signal from the imaging element 424, the are doing. The signal processing unit 422 is connected to the EC 30 0 via the IZO module 236K. Thus, EC 300, via the signal processing unit 422 is capable of receiving data relating to the surface image of the wafer W.

[0174] particle measurement unit 430 includes a light source 43 4 for irradiating toward the wafer W, for example, a laser beam, a light receiving portion 436 is irradiated from the light source 434 for receiving the scattered light scattered on the wafer W, the light receiving portion 436 in has a signal processing unit 432 for processing the received light signal received, the. Signal processing unit 432 is connected to the EC300 through ΙΖΟ module 236Kappa. More this, EC 300 via the signal processing unit 432, can receive data on particles on the wafer W (for example pixel data, particle evaluation data, etc.).

[0175] Next, an example of the structure of EC300 of the control unit 200 according to the third embodiment will be described with reference to the drawings. Figure 12 is a block diagram showing a configuration example of a EC300 according to the third embodiment. In EC300 shown in FIG. 12, the measurement processing program 460 of the measurement process chamber 400 is added to the program data storage unit 3 60 shown in FIG. 4, the measurement processing information 470 in the processing data storage means 370 is added.

[0176] The film thickness measuring unit 410, the image processing unit 420 and the particle measurement unit 430, respectively, is constructed as an optical science system unit, the optical unit is configured to be movable in a radial direction of the wafer W there. Thus, while holding and rotating the wafer W at stage 405 by moving the respective optical system unit to the center force the end portion of the wafer W, the measurement process © E c entire can be performed. This makes it possible to be able to shorten the movement distance of the optical system unit (scanning distance), space saving of the measurement process chamber 400. Ie, the measurement process chamber 400 itself can be miniaturized. The film thickness measuring unit 410, the images processing unit 420 and a particle measurement unit 430 may be configured as a movable one optical system unit. Further, constitutes a film thickness measuring unit 410 and a particle measurement unit 430 as one optical system unit movable, the image processing unit 420 may be that the fixed [0177] measurement processing program 460, the film thickness measurement program 462 the image processing program 464 includes Pas one tickle measurement program 466, such as a stage driving program 468, various programs for the measurement processing carried out by controlling each unit of the measurement processing chamber 40 0 ​​evaluating the measurement results . The measurement processing information 470, the film thickness evaluation information 472, including particles evaluation information 474 and measuring conditions recipe 476, Ru.

[0178] The stage driving program 468 controls the motor 407 of the stage 405, the rotation timing of the wafer W, the rotational speed, a program that controls the rotational speed.

[0179] The film thickness measurement program 462 controls the respective parts of the film thickness measuring unit 410 based on the measurement conditions recipe 476, Ueno, and executes the measurement of a thickness of W, the film thickness based on the measurement result evaluation is intended to carry out. Specifically, for example, by receiving the light thus reflected on the wafer W irradiated with laser light toward the wafer W from the light source 414 while moving the film thickness measurement section 410 while rotating the wafer W, film thickness measurement of the wafer W is performed.

More preferably [0180], in a stationary state of the wafer W, moves the film thickness measurement unit 410, a laser beam also source 414 power is irradiated toward the measurement point of the wafer W, the film thickness measurement wafer W I do. Ueno, when the measurement points of W there are multiple, each measurement point the laser beam irradiation shines on, perform film thickness measurement at each measurement point. Thus, the measurement result as for example film thickness data is obtained. Then, based on the thickness data, for example, the thickness of the target is formed! / Ru or such a film thickness evaluation data for evaluating the created, which is stored as the film thickness evaluation information 472.

[0181] The image processing program 464 controls the respective parts of the image processing unit 420 on the basis of the measurement conditions recipe 476, with imaging the surface image of the wafer W by the image sensor 424, the pattern recognition based on the imaging result and performs image processing such as. For example, by performing a pattern recognition process on the basis of the surface image of the wafer W, can be utilized to pattern matching, it identifies the measurement point to be the film thickness measurement and particle measurement of the wafer W.

[0182] particle measurement program 466, based on the measurement conditions recipe 476! /, And controls each unit of the particle measurement unit 430 Te, co Running the particle measurement of the surface of the wafer W, based on the measurement result and performs particle evaluation. Specifically, if for example, by receiving a laser beam is irradiated toward the wafer W scattered light from the light source 434 while moving the particle measurement section 430 while rotating the wafer W, Pate Ital measurement of the wafer W It is carried out. As the measurement result, for example, pixel data associated with the presence of the particles is obtained. Then, based on the pixel data, for example Pate Ital there the pixel data is created 2 Nei匕 data or Ranaru particle evaluation data corresponding to whether or exceeds the set value, which is a film thickness evaluation information 472 stored Ru.

[0183] (Configuration Example of the processing chamber)

Next, explaining an example of the configuration of the processing chamber (arrangement example) in the substrate processing apparatus 103 shown in FIG. 10. The substrate processing apparatus 103 according to the present embodiment also, with the removal Te cowpea deposits such as natural oxide film on the wafer in a chemical reaction and heat treatment of the ヽ gas components such depend on and plasma not a use ヽ the water component a kimono removal process, so the film forming process for forming a predetermined thin film on a wafer to which the deposit removing process has been performed, the continuous run! / Ru.

[0184] Here, for example, the wafer W where the contact hole or via hole is formed is introduced into the substrate processing apparatus 103, COR processing and PHT processing as extraneous material removal process as described above is continuously against the wafer W after being executed Te shows configuration example of the processing chamber in the substrate processing apparatus 103 in the case of Ti film formation process and the TiN film formation process as the film forming process is performed continuously (arrangement example) in FIG. 13 .

[0185] In the configuration example shown in FIG. 13, the first common transfer chamber 102 to the connected processing chamber 104A, 104B, 104C, 104D force respectively, COR processing chamber, PHT processing chamber, Ti film formation processing chamber, TiN film It is configured as a film forming treatment chamber Ru.

[0186] (transport process of the wafer)

Such be describes the transport process Nitsu of the wafer W in the substrate processing apparatus 103 having the configuration shown in FIG. 13. Because processing in each processing chamber 104A~104D for the wafer W is performed in the above order, the transport path of the wafer W is as solid arrows shown in FIG. 13.

[0187] Here, as an example, it is assumed that the center of the inlet port 112B in the installed cassette pretreated wafer W (carrier also including) such as contact hole or via hole from is formed is Desa taken. Also, two load lock chambers 108A, any hand of the load lock chamber of 108B, where Irare use the load lock chamber 108A, is for loading the pre-processing the wafer W, the other load lock chamber 108B process already Ueno, used for unloading of W. Further, here, the wafer W to the COR processing and PHT processing is ended, after receiving the film thickness measurement and particle measurement by the measuring process chamber 400, the following film forming process (Ti film formation process and TiN MakuNaru and summer as moves to membrane treatment). Now, though wafer W respectively are accommodated in each the processing chambers 104A~104D and the measurement process chamber 400, the force each process has ended or, it is assumed that almost finished verge.

[0188] First, the transfer process of the transfer process and the wafer W of the second common transfer chamber 120 of the wafer W loading transfer chamber 110 shown in FIG. 13 is the same as that shown in FIG. Therefore, its detailed Do description thereof will be omitted. In this case, conveyance path X41~X43 shown in FIG. 13, Z41, Z42 is, the conveyance path X21~X23 shown in FIG. 7, respectively, corresponding to Z21, Z22.

[0189] Next, a description will be given transport process of the wafer W of the first common transfer chamber 102. First, the conveyance mechanism 118, the processing chamber is housed in 104D!, Was processed in the wafer W is taken out, as shown in the transport path Y41, it is transported in the path 122 of the idle state.

[0190] Then, by the transport mechanism 118, © E C W of processed processing chamber has been accommodated in the 104C is taken out, as shown in the transport path Y42, it is carried into the empty processing chamber 104D. Thereafter, the processing in the processing chamber 104D is started.

[0191] Subsequently, by the transport mechanism 118, the measurement process chamber 400 measured processed wafer W is housed in is taken, as shown in the transport path Y43, it is carried into the empty processing chamber 104C. Thereafter, processing in the processing chamber 104C is started.

By [0192] Then, the transport mechanism 118, the wafer W processed the processing chamber was housed in a 104B is taken out, as shown in the transport path Y44, it is conveyed to the measurement of the empty process chamber 400. Thereafter, the measurement process in the measurement process chamber 400 is initiated.

By [0193] Then, the transport mechanism 118, © E C W of processed processing chamber has been accommodated in the 104A is taken out, as shown in the transport path Y45, it is carried into the empty processing chamber 104B. Thereafter, processing in the processing chamber 104B is started.

[0194] Subsequently, the wafer W is carried into the path section 122, the wafer W is taken out depending on the conveyance mechanism 118, as shown in the transport path Y46, it is carried into the empty processing chamber 104A . Thereafter, processing in the processing chamber 104A is started.

[0195] Incidentally, upon carrying in and carrying out of the wafer W, the gate valves 106A to 106D, 107A, only the gate valve required of 107B, 406 are opened and closed. Then, the processing chambers 104A~ 104D, processing of the wafer W by the measuring process chamber 400 for each completed, the above operation is returned Shi performed repeatedly.

[0196] In this way, for wafer W [this before processing the contact hole or via holes are formed, the processing chamber 104A, 104B, ¾ constant process chamber 400, the processing chamber 104C, 104D [trowel, their respective COR processing, PHT processing, measurement process, Ti film formation process, TiN film formation process is performed continuously.

[0197] That is, firstly, by the COR processing and PHT processing, were or contact hole of the wafer W from the inner wall and the bottom of the via hole, deposits and natural Sani 匕膜 is removed. And it at the measurement processing chamber 400, is performed and the film thickness measurement and particle measurement, whether actually naturally Sani or deposits such 匕膜 is (sufficiently) removal is confirmed. On top of that, the following Ti film formation process and the TiN film formation process, the barrier layer is deposited consisting of Ti film and TiN film. Thus, in a state where deposits are reliably removed, such as natural Sani 匕膜 from the wafer W, it is possible to form the Noria layer.

[0198] Moreover, as it can be performed and the film thickness measurement and particle measurement in one measurement process chamber 400, more reliably inspect whether or not executed properly the natural oxide film is removed by the COR processing and PHT processing can do. For example, if the PHT is excessive, it may be an oxide film will be made form, such a state can be checked by the film thickness measurement (detection). Also, if the PHT is insufficient, it is sometimes the complex formed COR processing is left as Baipuro duct (byproduct), to check (detect) Te cowpea in this state particle measurement it can.

[0199] As described above, according to the force mow the substrate processing apparatus in this embodiment, the measurement process in the measurement process chamber 400 continuously after the deposit removal process (C OR processing and PHT processing) is performed Runode, whether deposit removal process the wafer is properly executed, by measuring the film thickness and particles of the wafer W (including the deposit), as possible out be reliably inspected. Also force, immediately subjected to extraneous material removal process on the wafer, for the wafer without having to go through exposure to the atmosphere, it can be a measurement process performed at measurement process chamber 400 continuously, deposits on the wafer removed surface without re natural oxide film (e.g., exposed surface of such bottom of the contact hole formed on the wafer) is attached, be inspected by performing the film thickness measurement and Pate Ital measurement on the wafer it can. Thus, the effect of the deposit removal process, it is possible to accurately and reliably inspected.

[0200] In this case, based on the measurement results of the thickness measurement and particle measurement of the wafer W, to correct the process recipe of deposit removal process (COR processing and the PHT processing) (process conditions for the deposit removal process) it may be so. By doing so, always adhered material removal processes (COR processing and PHT processing) can be executed properly. Accordingly, it is possible to perform the actual processing result deposit removal process in accordance with, can be removed reliably deposit containing natural oxidation film from the wafer W.

[0201] Further, based on the measurement result of the thickness measurement and particle measurement Te, it may be determined whether the force not to perform the subsequent film formation process (film formation step). In this case, for example, if the film thickness measurement and particle measurement and measurement result measured by within the allowable range, while determining that can execute the following film forming process, to be in the allowable range, the subsequent film formation process it may be determined as unfeasible. Thus, at all times since a state in which deposits have been removed, including the nature Sani 匕膜 on the wafer W can be performed subsequent film formation process, Ueno, uniform film quality of a film deposition on W it is possible to ensure the sex.

[0202] In addition, the measurement process in the measurement process chamber 400 to be performed after the deposit removal process, in addition to the measurement for checking whether the power not the extraneous material removal process as described above has been properly executed, the following film forming process may include a measurement of a thickness of the base film to be applied for. In this case, measured at a constant process chamber 400, a film thickness measurement of a surface deposit removal process on the wafer has been subjected (e.g. exposed surface such as the bottom of the contact hole formed on the wafer), the following while the measurement of a thickness of the base film (e.g., film serving as a base formed on the wafer) which film deposition process is performed, is performed, deposits removal processing is performed deposits measurements decorated surface. According to this, the film thickness measurement for deposit removal process to inspect properly or executed mosquito ゝ not, the film thickness measurement of the base film next film processing is performed are performed simultaneously since, it is possible to significantly reduce the force hunt time measurement processing. [0203] In addition, the measurement process in the measurement process chamber 400 may be performed after the film formation process. If this is for example the film thickness measurement of the film formed by the deposition process may be performed. This ensures that whether the film forming process has been properly executed, can be tested by the film thickness measurement. In addition, such on the basis of the measured measurement results, it is also possible to correct the process recipe for performing a film forming process (process condition of the deposition process). This makes it possible to perform the always proper film formation process in the subsequent processing of the wafer. The measurement process in the measurement process chamber 400 may be performed before deposit removal process.

[0204] (measurement processing of the measurement process chamber)

Here, the measurement process in such measurement process chamber 400, reference Shinano the drawings et be described. Figure 14 is a flow chart showing an example of a measurement process. As shown in FIG. 14, first, at step S110, setting of the measurement conditions recipe is performed. Specifically, based on the measurement conditions recipe 476 measurement processing information 470, Te, for example, conditions such as rotation speed and the measuring range of the stage 405 is set.

[0205] Then, in step S 120, the wafer W is carried into the measurement process chamber 400, in step S 13 0, it is performed and the film thickness measurement and particle measurement. In this case, prior to the film thickness measurement and Pate Ital measured, for example, performed alignment of the wafer by the notch detection, if necessary, the surface image of the wafer W is imaged pattern recognition is performed by the image processing unit 420 . Then, for example, the measurement points obtained by pattern recognition (or measurement range), is performed and the film thickness measurement and particle measurement. In this case, for example, from taking place the film thickness measurement of the measuring point of the wafer W by the film thickness measuring unit 410 are kept stationary wafer W, particle measurement of the wafer W surface by the particle measuring unit 430 while rotating the wafer W It is carried out.

[0206] Subsequently, at step S140, based on the measurement results of the thickness measurement and particle measurement, each evaluation data is created. At step S150, the obtained measurement result 及 beauty evaluation data is transmitted to the EC300 of the control unit 200. Then, in step S140, the wafer W is carried out.

[0207] As described above, since the first common transfer chamber 102 to the measurement process chamber 400 of the substrate processing apparatus 103 is connected, without exposing the processed wafers W to the atmosphere, the film thickness measurement and Pate Ital measure can be immediately implemented. That is, it is possible to immediately performed without the film thickness measurement and particles measurement to deterioration state of a wafer by, for example, natural Sani 匕膜 the wafer w is generated. For example, as described above, after the COR processing and PHT processing, without exposing the wafer W to the atmosphere, it can be immediately carried out film thickness measurement and particle measurement. Thus, without adhering, for example, natural Sani 匕膜 to the wafer W, it is possible to perform the following film forming process.

[0208] In the present embodiment, it constitutes the measurement process chamber 400 as a module of a substrate processing apparatus (unit). Thus, even for an existing substrate processing apparatus, the measurement process chamber 400 can be easily attached. Moreover, the measurement process chamber 400 since the mounting as a module (unit) to the substrate processing apparatus can perform measurement processing only carries the wafer W to the measurement process chamber 400. That is, as compared with the case of configuring the measurement processing chamber as a separate device, the time and labor required for the film thickness measurement and particle measurement can be greatly reduced

[0209] Further, since the film thickness measurement and particle measurement at one measurement process chamber 400, as compared to apparatus for the installation two to perform each measurement in a separate unit, significant footprint it can be to cut Gensa. Moreover, since the measurement processing chamber 400 itself can be made compact I spoon, it can be further reduced footprint.

[0210] Incidentally, FIG. 13, I child stranded 〖performing the measurement process in the measurement process chamber 400 after the COR processing and PHT processing, is removed natural oxide film, Tsu when checks Luke, Te Ru shows! / ヽ, but the present invention is not necessarily limited to this. Film formation treatment (Ti film formation process, TiN film formation process) even after the performed measurement process in the measurement process chamber 400, also it is desired film thickness checks whether has been deposited good. The measurement process by the measurement processing chamber 400, Yo ヽ be performed both film thickness measurement and particles measured as described above, V ヽ deviation or the other may be at line swallow.

[0211] The configuration of a processing chamber of a substrate processing apparatus 103 is not limited to that shown in FIG. 13. For example, the base oxide film forming process as a film forming process (UV treatment) and High- When performing K film formation processes (MOCVD process), the processing chamber 104C, a 104D, respectively, base oxide film forming process (UV treatment) chamber, High- K film deposition process may be configured as (MOCVD process) chamber. Carrying process in this case is the same as that shown in FIG. 13.

[0212] Further, the mounting position of the measuring process chamber 400 is not limited to the case shown in FIG. 10. For example, the portion attached to the processing chamber of the first common transfer chamber 102 and the second common transfer chamber 120 can be mounted anywhere. Further, in this embodiment, the measurement process chamber 400, for example has been described for the case where a plurality of common transfer chamber as shown in FIG. 6 attached preparative to the substrate processing apparatus of the type connected, this limited It is not. For example, it is mounted on the type of substrate processing apparatus having a single common transfer chamber as shown in FIG. 1,. For example, if the substrate processing apparatus shown in FIG. 1, by forming the common transfer chamber 102 to the polygonal heptagonal or more, and this mounting the measurement processing chamber 400 by Tsuika卩 the processing chamber 104A~104D but leave in.

[0213] Further, the present invention may be applied to a plurality of devices mosquito ゝ et configured system, may be applied to only a force is also device a single device.

[0214] Further, by supplying the storage medium storing the software program for realizing the various functions of the embodiments to a system or device, to the system or the apparatus computer (CPU or MPU) by executing to read out Purodara beam stored in the medium such as the storage medium, the various functions of the embodiments may be implemented (formed ren).

[0215] In this case, such a program itself, and, the medium such as a storage medium body which stores such a program should also be included in the protection scope of the present invention.

[0216] Examples of the storage medium for supplying the program are a floppy (floppy) disk, a hard disk, an optical disk, CD-ROM, CD- R, CD-RW, DVD-ROM, DVD -RAM, DVD-RW, DVD + RW, magnetic tape, non-volatile memory card, ROM, or the like downloaded via a network use! /, can Rukoto.

[0217] Incidentally, not only when the previous SL functions of the embodiments are realized by executing only the program read medium strength, such as a storage medium, and running on the computer based on the instructions of the program if the functions of the embodiments, such as by being the OS performs a part or all of actual processing is implemented, such programs themselves, and, such as a storage medium storing such a program medium is included in the protection scope of the present invention behenate is.

[0218] Furthermore, the program is also read medium strength, such as a storage medium, after being written to a memory provided in a function expansion unit connected to a function expansion board inserted into the computer or to an instruction of the program If the functionality of some or form of the respective embodiments perform all of the actual processing the function expansion board or a CPU equipped on those said function expansion unit is realized on the basis also, such a program itself, and, the storage medium storing such a program are included in the protection scope of the present invention behenate is.

[0219] above with reference to the accompanying drawings have been described preferred embodiments of the present invention, the present invention is not limited to the embodiment. Those skilled in the art within the scope described in the claims, it would be appreciated by the can conceive changes and modifications are embraced in the technical scope of the present invention as about it al It is understood that.

Claims

The scope of the claims
[1] a plurality of processing chambers for performing predetermined process on a target substrate,
Commonly connected to said plurality of processing chambers, the common transfer chamber for loading and unloading of the target substrate with respect to each of said plurality of processing chambers,
Equipped with a,
Wherein the plurality of processing chambers,
Wherein the deposit removal process chamber to remove by chemical reaction and heat treatment of the ヽ gas component deposits such depend to a plasma comprising a spontaneous Sani 匕膜 attached on the substrate to be processed, on the substrate to be treated and the film deposition processing chamber for performing a film forming process to,
A measurement processing chamber for performing a measurement process of the substrate to be processed,
It is included
A substrate processing apparatus, characterized in that.
[2] The deposit removal processing chamber,
Wherein the product generation process chamber for generating a product of said deposits on the substrate to be processed by a chemical reaction gas component,
A product removal process chamber for the removal by the product Netsusho physical generated on the substrate to be processed in the product generation process chamber,
It is composed of two processing chambers, Ru
The substrate processing apparatus according to claim 1, characterized in that.
[3] The deposition treatment chamber,
A first film formation processing chamber for forming a first film on the target substrate,
A second film forming treatment chamber for forming a second film on the formed first film in the first film formation processing chamber,
It is composed of two processing chambers, Ru
The substrate processing apparatus according to claim 1, characterized in that.
[4] The measurement process chamber,
A film thickness measuring section for measuring the thickness of the deposited film on the target substrate,
The substrate processing apparatus according to claim 1, characterized in that it comprises a particle measurement unit for measuring the particles on the substrate to be processed, a.
[5] The measuring process chamber is provided with an image processing unit for recognizing by imaging the surface image of the target substrate
The substrate processing apparatus according to claim 1, characterized in that.
[6] a plurality of processing chambers for performing predetermined processing on a substrate to be processed, to transport a common transfer chamber which is consolidated commonly, the substrate to be processed is provided in the common transfer chamber to said plurality of processing chambers a plurality of vacuum processing apparatus provided with the order of the transfer mechanism, respectively,
And a path portion connecting said plurality of vacuum processing apparatus with each other,
Equipped with a,
Wherein the plurality of processing chambers,
Wherein the deposit removal process chamber to remove by chemical reaction and heat treatment of the ヽ gas component deposits such depend to a plasma comprising a spontaneous Sani 匕膜 attached on the substrate to be processed, on the substrate to be treated and the film deposition processing chamber for performing a film forming process to,
A measurement processing chamber for performing a measurement process of the substrate to be processed,
It is included
A substrate processing apparatus, characterized in that.
[7] The deposit removal processing chamber,
Wherein the product generation process chamber for generating a product of said deposits on the substrate to be processed by a chemical reaction gas component,
A product removal process chamber for the removal by the product Netsusho physical generated on the substrate to be processed in the product generation process chamber,
It is composed of two processing chambers, Ru
The substrate processing apparatus according to claim 6, characterized in that.
[8] The deposition treatment chamber,
A first film formation processing chamber for forming a first film on the target substrate,
A second film forming treatment chamber for forming a second film on the formed first film in the first film formation processing chamber,
Is composed of two processing chambers, Ru that the substrate processing apparatus according to claim 6, wherein.
[9] The deposition treatment chamber,
A first film formation processing chamber for forming a first film on the target substrate,
A second film forming treatment chamber for forming a second film on the formed first film in the first film formation processing chamber,
Two of the processing chamber set multiple comprise of! /, Ru
The substrate processing apparatus according to claim 6, characterized in that.
[10] the target substrate to be processed in the deposit removal process chamber is a substrate to be processed contact hole or via hole Lumpur is formed,
The film forming processing chamber,
A first barrier layer deposition treatment chamber for forming a first burr § layer on the inside of the contact hole or via hole formed on a substrate to be processed,
A second barrier layer deposition treatment chamber for forming a second barrier layer on the upper side of the first barrier layer formed in the first barrier layer deposition treatment chamber,
And it is made of
The substrate processing apparatus according to claim 1 or 6, characterized in that.
[11] the target substrate to be processed in the deposit removal process chamber, a silicon substrate,
The film forming processing chamber,
A base oxide layer deposition treatment chamber for forming a base oxide film layer by oxygen radicals on the substrate to be treated,
Configuration and high dielectric gate oxide film deposition treatment chamber for depositing the high dielectric gate oxide film to be processed board that the base oxide film layer is deposited by the base oxide layer deposition treatment chamber, by be
The substrate processing apparatus according to claim 1 or 6, characterized in that.
[12] such depend on the plasma deposits containing a natural oxide film which is deposited on the substrate to be processed! A deposit removal step of removing by a chemical reaction and heat treatment of the / ヽ gas Ingredient,
After the deposit removing step, a measuring step of performing a measurement process of the substrate to be processed, after the measuring step, and further comprising a, a film forming step of performing a film forming process on the target substrate substrate processing method to be.
[13] The deposit removal step,
The deposits of the target substrate and product generation step of generating a product by a chemical reaction and gas components,
A product removal step of removing the Netsusho sense the products produced on the substrate to be treated by the product make step,
The substrate processing method according to claim 12, characterized in that it comprises a.
[14] The measuring step is a step of performing an inspection measurement processing checks the deposit removing mosquito step has been properly performed ゝ
The substrate processing method according to claim 13, characterized in that.
[15] The measuring step,
A film thickness measuring step of performing film thickness measurements of the deposit removal step is subjected the surface of the target substrate,
A deposit measurement step of performing deposit measurement of the deposit removal step is subjected the surface of the target substrate,
A has,
The film thickness measuring step and the deposit measurement step are executed in a single measurement process chamber
The substrate processing method according to claim 14, characterized in that.
[16] The measuring step, recipe said film thickness measuring step and based on the deposit measured measured measured results Te cowpea step Te, corrects the pro Sesureshipi for executing the deposit removal step further includes a correction step
The substrate processing method according to claim 15, characterized in that.
[17] The measuring step, the determination step of Te based ヽ the measured measurement results Te cowpea to the film thickness measuring step and the deposit measurement step, it is determined whether the power not to perform the subsequent film formation step further it has a, Ru
The substrate processing method according to claim 15, characterized in that.
[18] The measuring step,
A test measurement step of checks mosquitoes ゝ not said extraneous material removal step is properly performed,
The substrate processing method according to claim 13, characterized in that it comprises a base film thickness measuring step of measuring the thickness of the base film subsequent film formation step is performed, the.
[19] The measuring step,
A film thickness measuring step of performing film thickness measurements of the deposit removal step is subjected the surface of the target substrate,
A deposit measurement step of performing deposit measurement of the deposit removal step is subjected the surface of the target substrate,
A base film thickness measuring step of measuring the thickness of the base film subsequent film formation step is performed, it has a,
The film thickness measuring step, the deposits measurement step and the underlying film thickness measuring step is performed in a single measurement process chamber
The substrate processing method according to claim 15, characterized in that.
[20] The film forming step,
A first film forming step of forming a first film on the target substrate,
A second Narumakusu Tetsupu of forming a second film on the formed first film in the first film forming step,
The substrate processing method according to claim 12, characterized in that it comprises a.
[21] such depend on the plasma deposits containing natural Sani 匕膜 which is attached on the substrate to be processed, and the deposit removal step of removing by a chemical reaction and heat treatment of the gas Ingredient,
After the deposit removing step, the film formation Sutetsu flop for performing a film forming process on the target substrate,
The substrate processing method characterized in that after the deposition step, provided with a measurement step of performing a measurement process of the target substrate.
[22] The measuring step, the substrate processing method according to claim 21, characterized in that it comprises a formed film thickness measuring step of film thickness measurement of the film formed by the film forming step.
[23] The measuring step, the NarumakuAtsu Measurement results based Dzu measured at step Te, further comprises a recipe correction scan Tetsupu for correcting a process recipe for performing the film forming step
The substrate processing method according to claim 22, characterized in that.
[24] a measuring step of performing measurement processing of the substrate,
After said measuring step, a deposit removing step of removing the by chemical reaction and heat treatment of the gas component deposits not due to plasma including spontaneous Sani 匕膜 attached on the substrate to be processed,
After the deposit removing step, the film formation Sutetsu flop for performing a film forming process on the target substrate,
The substrate processing method characterized by comprising a.
[25] on the computer,
Such independent deposits containing a natural oxide film which is deposited on the substrate to be processed in a plasma! A deposit removal step of removing by a chemical reaction and heat treatment of the / ヽ gas Ingredient,
A measuring step of performing measurement processing of the substrate,
After the deposit removing step, the film formation Sutetsu flop for performing a film forming process on the target substrate,
Program for the execution.
[26] on the computer,
Such independent deposits containing a natural oxide film which is deposited on the substrate to be processed in a plasma! A deposit removal step of removing by a chemical reaction and heat treatment of the / ヽ gas Ingredient,
A measuring step of performing measurement processing of the substrate,
After the deposit removing step, the film formation Sutetsu flop for performing a film forming process on the target substrate,
A computer-readable recording medium storing a program for executing the.
PCT/JP2006/316747 2005-08-25 2006-08-25 Substrate processing apparatus and substrate processing method WO2007023951A1 (en)

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Citations (6)

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Publication number Priority date Publication date Assignee Title
JP2003098112A (en) * 2001-09-25 2003-04-03 Hitachi Ltd Method for detecting/outputting surface image of thin film device, apparatus therefor, method for manufacturing thin film device using the same, and apparatus therefor
JP2003297822A (en) * 2002-03-29 2003-10-17 Tokyo Electron Ltd Method of forming insulation film
JP2004071796A (en) * 2002-08-06 2004-03-04 Hitachi Kokusai Electric Inc Vertical type semiconductor manufacturing equipment
JP2004119635A (en) * 2002-09-25 2004-04-15 Tokyo Electron Ltd Method of transferring processing object
JP2004363316A (en) * 2003-06-04 2004-12-24 Tokyo Electron Ltd Plasma treatment method
JP2005039185A (en) * 2003-06-24 2005-02-10 Tokyo Electron Ltd Work processing apparatus, work processing method therefor, pressure control method, work carrying method, and carrying apparatus

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003098112A (en) * 2001-09-25 2003-04-03 Hitachi Ltd Method for detecting/outputting surface image of thin film device, apparatus therefor, method for manufacturing thin film device using the same, and apparatus therefor
JP2003297822A (en) * 2002-03-29 2003-10-17 Tokyo Electron Ltd Method of forming insulation film
JP2004071796A (en) * 2002-08-06 2004-03-04 Hitachi Kokusai Electric Inc Vertical type semiconductor manufacturing equipment
JP2004119635A (en) * 2002-09-25 2004-04-15 Tokyo Electron Ltd Method of transferring processing object
JP2004363316A (en) * 2003-06-04 2004-12-24 Tokyo Electron Ltd Plasma treatment method
JP2005039185A (en) * 2003-06-24 2005-02-10 Tokyo Electron Ltd Work processing apparatus, work processing method therefor, pressure control method, work carrying method, and carrying apparatus

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