JP2007088401A - Substrate processing device, substrate processing method, program, and record medium recorded therewith - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To surely remove an affix including a natural oxide film, for improved adhesion of the film formed on a substrate, to be processed, in a next film-forming process. <P>SOLUTION: A substrate processing device 103 is connected in common to process chambers 104A-104D and a measurement process chamber 400, and comprises a common transfer chamber 102 for delivery of wafers to/from the process chambers. The process chambers 104A-104D are, respectively, a product generation process chamber (COR process chamber) in which gas component and affix including a natural oxide film on the wafer are chemically reacted with each other to generate a product, a product removable process chamber (PHT process chamber) for removing a product of affix formed on the wafer in thermal treatment, a Ti film forming process chamber for forming Ti film on the wafer, and a TiN film forming process chamber for forming TiN film on the Ti film. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a substrate processing apparatus, a substrate processing method, a program, and a recording medium recording the program.

  In general, in a semiconductor device manufacturing process, various types of thin film deposition processing, oxidation diffusion processing, annealing processing, etching processing, and the like are sequentially performed on a semiconductor wafer (hereinafter simply referred to as “wafer”). The For example, a thin film may be formed in multiple layers on a semiconductor wafer. As such a substrate processing apparatus for performing various processes, for example, there is a so-called cluster type substrate processing apparatus in which a plurality of processing chambers capable of performing consecutive processing are commonly connected to one transfer chamber (for example, Patent Document 1). In this substrate processing apparatus, a wafer is transferred so as to walk between processing chambers, and necessary processing is continuously and efficiently performed in each processing chamber each time.

  By the way, since contamination such as particles, metals, organic substances, surface coatings such as adsorbed molecules, and native oxide film (Silicon Native Oxide) adhere to the wafer, it is necessary to do this before performing the film forming process. It is necessary to remove deposits such as a natural oxide film.

  For this reason, conventionally, for example, after the natural oxide film is removed by wet cleaning using, for example, dilute hydrofluoric acid (DHF) outside the substrate processing apparatus, the cleaned wafer is taken into the substrate processing apparatus. A membrane treatment was to be performed.

JP 2004-119635 A JP 2002-166237 A Japanese Patent Laid-Open No. 04-336426 JP 2004-327546 A Japanese Patent Laid-Open No. 03-283618

  However, even if the natural oxide film on the wafer is removed outside the substrate processing apparatus, the wafer surface is exposed to the atmosphere when the wafer is taken into the substrate processing apparatus in order to perform a film forming process. In some cases, a natural oxide film may be newly generated. Depending on the thickness of the natural oxide film thus generated, the characteristics of the semiconductor device formed thereafter are greatly affected. For example, when a natural oxide film having a film thickness of 0.5 nm or more is newly formed on the wafer surface, it becomes a serious problem when a gate insulating film having a film thickness of 65 nm or less is formed.

In addition, although the natural oxide film on the wafer surface is removed by the above wet cleaning, a new watermark (for example, a silicon oxide film locally formed on the wafer surface via water droplets during the transfer or drying of the wafer ( (SiO ₂ ) and the like) may occur. That is, since the natural oxide film on the wafer surface is removed by the DHF cleaning liquid, the underlying silicon is exposed, the wafer surface becomes hydrophobic, and water droplets remain on the surface when the wafer is pulled up from the DHF cleaning liquid. This water droplet can become a watermark after spin drying. Such a watermark may be an impediment factor in a film forming process performed after the cleaning process, and may deteriorate the characteristics of the semiconductor device.

  In this regard, in order to suppress the generation of watermarks and natural oxide films, there is a method using isopropyl alcohol (IPA) in the drying process after wet cleaning (see, for example, Patent Document 2). However, IPA molecules (organic matter such as carbon) may remain on the wafer surface after IPA drying. This IPA molecule may adversely affect the gate oxide film characteristics, for example. (See K. MOTAI, T. Itoga, and T. Irie, Extended Abstruct of 1997, International Conference on Solid State Devices and Materials, Hamamatsu, pp. 24-25 (1997)).

  Therefore, in recent years, there has been known a method of removing a natural oxide film on a wafer by a dry cleaning method using plasma, instead of the wet cleaning method. As this dry cleaning method, for example, there is a method of removing a natural oxide film on a wafer by forming inductively coupled plasma using hydrogen gas and argon gas (see, for example, Patent Document 3). According to such a dry cleaning method, since a water component such as a cleaning solution by a wet cleaning method is not used, a natural oxide film can be removed without generating a watermark.

  However, when the dry cleaning method is performed by plasma processing, there is a risk that charge-up damage due to plasma may be caused to the wafer. If a semiconductor device is generated on a wafer with such damage remaining, there is a problem that the characteristics of the semiconductor device deteriorate due to, for example, destruction of a gate insulating film.

  By the way, if the film thickness and particles on the wafer can be measured to check whether or not deposits such as a natural oxide film on the wafer have actually been removed, the film is formed by the following film forming process. There are many advantages such as ensuring uniformity of film quality.

  However, in the conventional particle measuring device (see, for example, Patent Document 4) and film thickness measuring device (see, Patent Document 5), the film thickness on the wafer is continuously removed after removing deposits such as a natural oxide film on the wafer. And particles cannot be measured. When the wet cleaning is performed outside the substrate processing apparatus, it must be exposed to the atmosphere when the wafer is loaded into the measurement apparatus as described above. There is a risk of film formation.

  Therefore, the present invention has been made in view of such problems, and its object is to remove deposits including a natural oxide film on a substrate without using a water component and without using plasma, It is an object of the present invention to provide a substrate processing apparatus or the like that can continuously perform measurement processing, film formation processing, and the like without exposing the substrate to the atmosphere.

  In order to solve the above-described problems, according to one aspect of the present invention, a plurality of processing chambers for performing a predetermined process on a substrate to be processed and a common connection to these processing chambers, A substrate processing apparatus comprising a common transfer chamber for carrying in and out of a substrate to be processed, wherein the plurality of processing chambers are configured to remove deposits including a natural oxide film deposited on the substrate to be processed from gas components that do not depend on plasma. A deposit removal processing chamber for removing by chemical reaction and heat treatment, a film forming chamber for performing a film forming process on the substrate to be processed, and a measurement for performing a measurement process on the substrate to be processed A substrate processing apparatus including a processing chamber is provided. In this case, the deposit removal processing chamber includes, for example, a product generation processing chamber for generating a product by chemically reacting the deposit on the substrate to be processed and a gas component, and a substrate on the substrate to be processed. It is comprised by two process chambers with the product removal process chamber for removing the formed product of the said deposit | attachment by heat processing. The film formation chamber includes, for example, a first film formation chamber that forms a first film on the substrate to be processed, and a second film formation process that forms a second film on the first film. It consists of two processing chambers with a chamber.

  According to the present invention, the deposit containing the natural oxide film is removed by a chemical reaction with a gas component that does not depend on plasma and heat treatment, so that no water component such as wet cleaning is used. It is possible to prevent the occurrence of a watermark or the like. Further, since plasma is not used, it is possible to prevent the substrate to be processed from being charged with damage due to plasma. In addition, since the measurement process and the film formation process can be continuously performed after the deposit removal process in the substrate processing apparatus, a natural oxide film is newly formed on the substrate to be processed before the film formation process. Can be prevented. As described above, the deposit including the natural oxide film can be surely removed, so that the adhesion of the film formed on the substrate to be processed can be further improved by the next film forming process, and the strength is further improved. Can be made.

  The measurement processing chamber includes, for example, a film thickness measuring unit that measures the film thickness on the substrate to be processed and a particle measuring unit that measures particles on the substrate to be processed. Thereby, since both a film thickness and a particle can be measured in one measurement processing chamber, the throughput can be improved. The measurement processing chamber may further include an image processing unit for capturing and recognizing a surface image of the substrate to be processed. Thereby, since pattern matching of the surface of the substrate to be processed can be performed, for example, a measurement point on the substrate to be processed for measuring a film thickness or particles can be specified.

  In order to solve the above problems, according to another aspect of the present invention, a plurality of processing chambers for performing a predetermined process on a substrate to be processed, a common transfer chamber connected in common to these processing chambers, and this common A substrate processing apparatus comprising: a plurality of vacuum processing apparatuses each having a transport mechanism for transporting the target substrate provided in a transport chamber; , A deposit removing treatment chamber for removing deposits including a natural oxide film deposited on the substrate to be processed by a chemical reaction with a gas component that does not depend on plasma and heat treatment; and a film forming process on the substrate to be treated There is provided a substrate processing apparatus including a film formation processing chamber for performing a measurement process and a measurement processing chamber for performing a measurement process on the substrate to be processed. In this case, the deposit removal processing chamber includes, for example, a product generation processing chamber for generating a product by chemically reacting the deposit on the substrate to be processed and a gas component, and a substrate on the substrate to be processed. It is comprised by two process chambers with the product removal process chamber for removing the formed product of the said deposit | attachment by heat processing. The film formation chamber includes, for example, a first film formation chamber that forms a first film on the substrate to be processed, and a second film formation process that forms a second film on the first film. It consists of two processing chambers with a chamber.

  Also according to the present invention, deposits including a natural oxide film are removed by a chemical reaction with a gas component that does not depend on plasma and heat treatment, so that no watermark is generated, no charge-up damage is caused, and further natural oxidation is achieved. A film is not newly formed. As described above, the deposit including the natural oxide film can be surely removed, so that the adhesion of the film formed on the substrate to be processed can be further improved by the next film forming process, and the strength is further improved. Can be made.

  The film formation chamber includes a first film formation chamber for forming a first film on the substrate to be processed and a second film formation chamber for forming a second film on the first film. A plurality of sets of two processing chambers may be included. As a result, for example, film forming processes can be performed in parallel by a plurality of sets of film forming processing apparatuses, so that the throughput of the entire apparatus can be greatly improved.

  Further, the substrate to be processed in the deposit removal processing chamber is, for example, a substrate to be processed in which a contact hole or a via hole is formed, and the film formation processing chamber is, for example, a contact hole formed in the substrate to be processed. Alternatively, the first barrier layer film forming process chamber for forming the first barrier layer inside the via hole and the second barrier layer film forming process chamber for forming the second barrier layer above the first barrier layer are configured. Is done. According to this, the first barrier layer and the second barrier layer can be formed after reliably removing deposits such as a natural oxide film adhering to the contact hole or via hole formed in the substrate to be processed. Therefore, these adhesiveness can be improved more and intensity | strength can also be improved more.

  Further, the substrate to be processed in the deposit removal processing chamber is, for example, a silicon substrate, and the film formation processing chamber is a base oxide film that forms a base oxide film layer on the substrate to be processed by oxygen radicals. A layer deposition processing chamber and a high dielectric gate oxide film deposition processing chamber for depositing a high dielectric gate oxide film on the substrate to be processed on which the base oxide film layer is formed. According to this, the base oxide film layer and the high dielectric gate oxide film can be formed after reliably removing the deposits such as the natural oxide film attached to the silicon substrate. The strength can be further improved.

  In order to solve the above-described problems, according to another aspect of the present invention, the deposit including the natural oxide film deposited on the substrate to be processed is removed by a chemical reaction with a gas component that does not depend on plasma and a heat treatment. A deposit removal processing step, a measurement processing step for performing measurement processing on the substrate to be processed after the deposit removal processing, and a film deposition processing step for performing film deposition processing on the substrate to be processed after the measurement processing. A substrate processing method is provided. In this case, the deposit removal processing step includes, for example, a step of chemically reacting the deposit on the substrate to be processed and a gas component to generate a product, and the deposit formed on the substrate to be processed. Removing the product by heat treatment. Further, the film forming process step includes, for example, a step of forming a first film on the substrate to be processed and a step of forming a second film on the first film.

  According to the present invention as described above, the deposit including the natural oxide film can be reliably obtained by continuously executing the deposit removal process (product generation process, product removal process), the measurement process, and the film formation process. Therefore, the adhesion of the film formed on the substrate to be processed can be further improved by the next film forming process, and the strength can be further improved.

  Moreover, the said measurement process step performs the measurement for test | inspecting whether the deposit | attachment removal process was performed appropriately, for example. In this case, the measurement processing step includes a step of measuring the film thickness of the surface on which the deposit removal process has been performed on the substrate to be processed, and a measurement of the deposit on the surface on which the deposit removal process has been performed. Preferably, the steps are performed in one measurement processing chamber. In this way, by measuring both the film thickness and the particles, it is possible to reliably inspect whether or not the deposits including the natural oxide film have been removed from the substrate to be processed.

  The measurement processing step may further correct a process recipe for executing the deposit removal process based on the measurement results measured by the film thickness measurement step and the particle measurement step. Thereby, since the deposit removal processing step according to the actual processing result can be executed, deposits including the natural oxide film can be reliably removed from the substrate to be processed.

  The measurement processing step may further determine whether or not to execute the next film formation processing step based on the measurement results measured by the film thickness measurement step and the particle measurement step. . In this case, for example, if the measurement results measured by the film thickness measurement step and the particle measurement step are within an allowable range, it is determined that the next film forming process step can be performed. You may make it judge that the film-forming process step cannot be performed. As a result, the next film forming process step can be executed in a state where the deposits including the natural oxide film on the substrate to be processed are always removed, so that the uniformity of the film quality formed on the substrate to be processed can be improved. Can be secured.

  In the measurement processing step, measurement for inspecting whether or not the deposit removal process has been performed properly and measurement of the thickness of the underlying film on which the next film formation process is performed are performed. May be. In this case, the measurement processing step includes a step of measuring a film thickness of the surface on which the deposit removal process is performed on the substrate to be processed and a film thickness measurement of a base film on which the film formation process is performed, It is preferable to perform the step of measuring the deposit on the surface subjected to the deposit removing process in one measurement processing chamber. According to this, the film thickness measurement for inspecting whether or not the deposit removal process has been properly executed and the film thickness measurement of the base film to be subjected to the next film formation process can be performed simultaneously. Processing time can be greatly reduced.

  In order to solve the above-described problems, according to another aspect of the present invention, the deposit including the natural oxide film deposited on the substrate to be processed is removed by a chemical reaction with a gas component that does not depend on plasma and a heat treatment. A deposit removal process step, a deposition process step for performing a deposition process on the target substrate after the deposit removal process, and a measurement process step for performing a measurement process on the target substrate after the deposition process; A substrate processing method is provided. In this case, the measurement processing step includes, for example, a step of measuring a film thickness of the film formed by the film forming process. Thereby, the state after film formation can also be inspected.

  In the measurement process step, a process recipe for executing the film formation process may be corrected based on the measurement result measured in the film thickness measurement step. Thereby, it is possible to always execute an appropriate film forming process on the subsequent substrates to be processed.

  In order to solve the above problems, according to another aspect of the present invention, a measurement processing step for performing a measurement process on the substrate to be processed, and a natural oxide film adhering to the substrate to be processed after the measurement process are provided. A deposit removal treatment step for removing the deposits by a chemical reaction with a gas component that does not depend on plasma and heat treatment; and a film deposition treatment step for performing a film deposition process on the substrate to be processed after the deposit removal treatment. A substrate processing method is provided. As described above, the measurement processing of the substrate to be processed may be performed before the deposit removal processing.

  In order to solve the above-described problems, according to another aspect of the present invention, a computer includes a deposit including a natural oxide film deposited on the substrate to be processed by a chemical reaction with a gas component that does not depend on plasma and a heat treatment. An adhesion removing process step to be removed; a measurement processing step for performing a measurement process on the substrate to be processed; and a film forming process step for performing a film forming process on the substrate to be processed from which the deposit has been removed. A program is provided.

  In order to solve the above-described problems, according to another aspect of the present invention, a computer includes a deposit including a natural oxide film deposited on the substrate to be processed by a chemical reaction with a gas component that does not depend on plasma and a heat treatment. An adhesion removing process step to be removed; a measurement processing step for performing a measurement process on the substrate to be processed; and a film forming process step for performing a film forming process on the substrate to be processed from which the deposit has been removed. A computer-readable recording medium on which a program for recording is recorded is provided.

  According to such a program or a program recorded on a recording medium, the deposit removal processing (product generation processing, product removal processing), measurement processing, and film formation processing according to the present invention are continuously executed. Can do. As a result, the deposits including the natural oxide film can be surely removed, so that the adhesion of the film formed on the substrate to be processed by the next film forming process can be further improved and the strength can be further improved. be able to.

  As described above, according to the present invention, the deposit including the natural oxide film is removed by the chemical reaction with the gas component that does not depend on the plasma and the heat treatment, and then the measurement process and the film forming process are continuously performed. Therefore, it is possible to remove deposits including a natural oxide film on the substrate without using water components and without using plasma, and then continuously perform film formation without exposing the substrate to the atmosphere. be able to. For this reason, a watermark or the like is not generated, there is no charge-up damage, and a natural oxide film is not newly formed, and the deposits including the natural oxide film can be reliably removed. Therefore, the adhesion of the film formed on the substrate to be processed by the next film formation process can be further improved, and the strength can be further improved.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the present specification and drawings, components having substantially the same functional configuration are denoted by the same reference numerals, and redundant description is omitted.

(Configuration Example of Substrate Processing Apparatus According to First Embodiment)
First, a configuration example of a substrate processing apparatus according to a first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a schematic configuration diagram illustrating an example of a substrate processing apparatus according to the first embodiment. As shown in FIG. 1, this substrate processing apparatus 100 includes one common transfer chamber 102 formed in a substantially polygonal shape (for example, hexagonal shape) and a plurality (for example, four) processing chambers configured to be evacuated. 104A to 104D.

  The processing chambers 104A to 104D are connected to the periphery of the common transfer chamber 102 via gate valves 106A to 106D, respectively. The processing chambers 104A to 104D are provided with mounting tables 105A to 105D on which a substrate to be processed, for example, a semiconductor wafer (hereinafter also simply referred to as “wafer”) W is mounted. Each of the processing chambers 104A to 104D can perform a predetermined process on the wafer W mounted on the mounting tables 105A to 105D, respectively.

  The common transfer chamber 102 is connected to a substantially rectangular loading-side transfer chamber 110 via two load lock chambers 108A and 108B configured to be evacuated. Gate valves 107A and 107B are interposed at connecting portions between the load lock chambers 108A and 108B and the common transfer chamber 102 and the carry-in transfer chamber 110, respectively.

  In the carry-in transfer chamber 110, for example, three introduction ports 112A to 112C on which a cassette capable of storing a plurality of wafers W is placed, and the wafer W is rotated to optically determine the amount of eccentricity and to perform alignment. 114 are connected.

  In the carry-in side transfer chamber 110, a carry-in side transfer mechanism 116 having two picks 116A and 116B for holding the wafer W and configured to bend, stretch, turn, move up and down and move linearly is provided. In the common transfer chamber 102, a transfer mechanism 118 having two picks 118 </ b> A and 118 </ b> B for holding the wafer W and capable of bending and stretching and turning is provided. A control unit 200 is connected to the substrate processing apparatus 100, and each unit of the substrate processing apparatus 100 is controlled by the control unit 200.

  It should be noted that one of the common transfer chamber 102 and the two load lock chambers, for example, the transfer port 109A of the connecting portion with the load lock chamber 108A is used as a transfer inlet for carrying the wafer W into the common transfer chamber 102 exclusively. The transfer port 109B connected to the other load lock chamber 108B is used as a carry-out port for carrying the wafer W out of the common transfer chamber 102 exclusively.

(Specific example of wafer processing)
The substrate processing apparatus 100 according to the present embodiment includes a deposit removal process for removing deposits (for example, contamination and natural oxide film) on a wafer by a chemical reaction with a gas component not using plasma and heat treatment. A film forming process for forming a predetermined thin film on the wafer subjected to the kimono removal process is continuously executed.

(Adherent removal processing)
First, the deposit removal process executed as a pre-process of the film forming process will be described in detail. In this embodiment, the deposit removal process is performed without using water components and without using plasma. This deposit removal processing includes, for example, a product generation process that generates a product by chemically reacting a deposit including a natural oxide film attached to a wafer and a gas component, and a product generated on the wafer by heat treatment. It consists of a two-stage process including a product removal process to be removed.

The product generation process is, for example, a COR (Chemical Oxide Removal) process, and the product removal process is, for example, a PHT (Post Heat Treatment) process. The COR processing is performed by chemically reacting an oxide film such as a natural oxide film deposited on a wafer with gas molecules such as ammonia (NH ₃ ) gas and hydrogen fluoride (HF) gas. This is a process for generating (NH ₄ ) ₂ SiF ₆ ). The PHT process is a process in which a wafer subjected to the COR process is heated to vaporize (sublimate) a product generated on the wafer by a chemical reaction of the COR process and remove it from the wafer.

  As described above, the COR process and the PHT process, particularly the COR process, can remove deposits such as a natural oxide film on the wafer without using a water component and without using a plasma. This corresponds to (dry cleaning treatment).

  For example, by using ammonia gas and hydrogen fluoride gas as reaction gases in COR processing and PHT processing, deposits such as a natural oxide film are removed using the following chemical reaction.

[Chem chemical reaction formula]
SiO ₂ + 4HF → SiF ₄ + 2H ₂ O ↑
SiF ₄ + 2NH ₃ + 2HF → (NH ₄ ) ₂ SiF ₆

[Chemical reaction formula of PHT treatment]
(NH ₄ ) ₂ SiF ₆ → SiF ₄ ↑ + 2NH ₃ ↑ + 2HF ↑

The COR process and the PHT process using the chemical reaction described above have the following characteristics. In the PHT process, a small amount of N ₂ and H ₂ is also generated.

[Characteristics of COR processing and PHT processing]
(1) The thermal oxide film has a high selectivity (removal rate). Specifically, in the COR process and the PHT process, the selectivity of the thermal oxide film is high, while the selectivity of polysilicon is low. Therefore, the surface layer of the insulating film made of the SiO ₂ film, which is a thermal oxide film, and the natural oxide film and watermark on the pseudo-SiO ₂ layer or silicon surface layer having the same characteristics as the SiO ₂ film can be efficiently removed.

(2) The growth rate of the natural oxide film on the surface of the insulating film from which the surface layer and the pseudo SiO ₂ layer are removed is slow. Specifically, on the surface of a wafer whose surface is exposed by wet etching, the growth time of a natural oxide film having a thickness of 3 angstroms is about 10 minutes, whereas the wafer whose surface is exposed by COR processing and PHT processing. On the surface, the growth time of a natural oxide film having a thickness of 3 angstroms is approximately 2 hours or more. Therefore, in the cleaning process by the COR process and the PHT process, a new watermark is not generated, and the growth of the natural oxide film with the passage of time after the cleaning process is suppressed, so that the reliability of the semiconductor device is improved. be able to.

(3) The reaction proceeds in a dry environment. Specifically, water is not used for the reaction in the COR treatment. Further, even if water molecules are generated by the COR process, the COR process is performed in a substantially vacuum state, so that the water molecules are generated in a gas state. Accordingly, since water molecules do not adhere to the wafer in a liquid state, a watermark or the like is not generated on the surface of the wafer. Further, since the PHT process is performed at a high temperature, a watermark or the like is not generated on the surface of the wafer, and OH groups are not arranged on the surface of the wafer where the surface is exposed. Therefore, since the surface of the wafer is not passivated and becomes hydrophilic, the surface of the wafer does not absorb moisture, thereby preventing a reduction in wiring reliability of the semiconductor device.

(4) The production amount of the product (complex) is relaxed after a predetermined time. Specifically, after a predetermined time has elapsed, the amount of product produced does not increase even if the watermark is continuously exposed to a mixed gas of ammonia gas and hydrogen fluoride gas. The amount of product produced is determined by the parameters of the gas mixture, such as the pressure of the gas mixture and the volumetric flow ratio. Therefore, it is possible to easily control the removal amount of the watermark.

(5) Generation of particles is very small. Specifically, for example, even when the natural oxide film is removed from 2000 wafers, adhesion of particles is hardly observed on the processing chamber or the inner wall of the processing chamber. Therefore, there is no occurrence of a short circuit of wiring via particles in the semiconductor device, and the reliability of the semiconductor device can be improved.

(Deposition process)
Next, the film forming process will be described. Here, as a film formation process, a barrier layer having a two-layer structure, for example, a Ti film as a first film and a TiN film as a second film is formed inside a contact hole or via hole formed on a wafer. Execute the process. Before performing such a film forming process, the adhesion removal and the strength of the film can be improved by executing the deposit removing process without using a water component and without using plasma as described above. In addition, since the deposit removal process according to the present embodiment does not use plasma, it is possible to prevent charge-up damage caused by plasma from being applied to the underlying film of the wafer, so that wiring processing without damage can be performed. In addition, a film having good contact resistance can be formed.

  In the manufacture of semiconductor devices, the circuit configuration tends to be a multilayer wiring structure in response to the recent demand for higher density and higher integration. For this reason, an embedding technique for electrical connection between layers such as a contact hole which is a connection portion between a lower semiconductor device and an upper wiring layer and a via hole which is a connection portion between upper and lower wiring layers becomes important. Yes. In general, Al (aluminum), W (tungsten), or an alloy mainly composed of these is used for filling such contact holes and via holes. In order to form a contact between such a metal or alloy and the underlying silicon (Si) substrate or polysilicon (poly-Si) layer, a Ti-based film (for example, inside the contact hole or via hole prior to filling them) A TiN film) and a TiN-based film (for example, a TiN film) are formed.

These films can be formed by CVD (Chemical Vapor), which is capable of forming high-quality films without increasing the electrical resistance even when device miniaturization and high integration are advanced, and also providing good step coverage. Deposition (chemical vapor deposition) method is used. Then, for example, a Ti film is formed by a CVD method using TiCl ₄ as a reaction gas to react with the underlying silicon substrate to selectively grow TiSi ₂ in a self-aligned manner on the silicon diffusion layer at the bottom of the contact hole. Ohmic resistance is obtained.

When such a CVD-Ti film is formed, TiCl ₄ gas is generally used as the reaction gas as described above, and H ₂ gas or the like is used as the reducing gas. The binding energy of this TiCl ₄ gas is quite high, and thermal energy alone does not decompose unless it is a high temperature of about 1200 ° C. Therefore, a film is usually formed at a process temperature of about 650 ° C. by plasma CVD using plasma energy. Yes.

  On the other hand, in such metal film formation, in order to obtain good contact resistance, a process of removing a natural oxide film formed on the base is performed prior to the film formation process. Such removal of the natural oxide film has been generally carried out with dilute hydrofluoric acid, but there is also a method of removing the natural oxide film by forming inductively coupled plasma using hydrogen gas and argon gas.

However, when a Ti film is formed by a conventional plasma CVD method, TiSi ₂ crystals having a non-uniform grain size tend to be formed. In other words, since the natural oxide film was removed by dry cleaning using argon plasma prior to the formation of the TiSi ₂ film, the Si diffusion layer surface was damaged and became non-uniformly amorphous. When a Ti film is formed by plasma CVD, the TiSi ₂ crystal to be formed becomes more uneven. Since such a non-uniform TiSi ₂ crystal exists relatively sparsely, the specific resistance is high and the contact between the TiSi ₂ film and the base becomes non-uniform. Therefore, the contact resistance increases.

  In this respect, in the present embodiment, the natural oxide film in the contact hole or via hole formed on the wafer by the deposit removal process (for example, the COR process and the PHT process) that does not use the water component and does not use the plasma as the pretreatment. Then, a Ti film and a TiN film are formed. As a result, it is possible to prevent the plasma base charge-up damage from being applied to the base before the Ti-based film and TiN-based film are formed. Wiring can be performed without any problem, and a film having good contact resistance can be formed. In addition, the adhesion and strength of each of the Ti film and the TiN film can be improved.

Here, a specific example of the Ti-based film forming process as the first film forming process will be described. As the Ti-based film forming process, for example, as described above, a CVD-Ti film forming process for forming a Ti film by plasma CVD is performed. The CVD-Ti film forming process includes, for example, a process of supplying TiCl ₄ gas, Ar gas, H ₂ gas, and generating plasma at the same time, supplying NH ₃ gas, supplying Ar gas, and H _2. A CVD-Ti film is formed by a process of supplying gas and generating plasma at the same time. In this case, the temperature is set to 650 ° C.

The Ti-based film forming process is not limited to the above, and SFD (Sequential Flow Deposition) is used to form a Ti film by plasma CVD at a temperature lower than 650 ° C., which is set to 400 ° C. to 450 ° C. A Ti film forming process may be executed. In the SFD-Ti film forming process, for example, a TiCl ₄ gas supply, an Ar gas supply, a H ₂ gas supply, and a plasma generation are performed at the same time to stop the supply of TiCl ₄ gas a plurality of times. An SFD-Ti film is formed by performing a process of supplying NH ₃ gas, Ar gas, H ₂ gas, and generating plasma at the same time.

Further, as another Ti film forming process, an ALD-Ti film forming process using an atomic layer deposition (ALD) technique may be executed. As the ALD-Ti film forming process, for example, after supplying TiCl ₄ gas, the process of supplying Ar gas, supplying H ₂ gas, and generating plasma is repeated a plurality of times, then supplying NH ₃ gas and Ar An ALD-Ti film is formed by performing a process of supplying gas, supplying H ₂ gas, and generating plasma at the same time.

Further, after repeating several times the step of supplying the supply of the H ₂ gas supply and plasma generation supply and Ar gas supply and TiCl ₄ gas TiCl ₄ gas after the same time, the supply of NH ₃ gas The ALD-Ti film may be formed by performing a process of supplying Ar gas, supplying H ₂ gas, and generating plasma at the same time.

Further, a plurality of steps for supplying the plasma generation supply and Ar gas of the H ₂ gas at the same time times after the supply and plasma generation supply and Ar gas supply and TiCl ₄ gas TiCl ₄ gas at the same time After repeating, an ALD-Ti film may be formed by performing a process of supplying NH ₃ gas, Ar gas, H ₂ gas, and generating plasma at the same time.

Next, the TiN-based film forming process as the second film forming process is performed by using, for example, plasma CVD with TiCl ₄ gas and NH ₃ gas as reaction gases and a set temperature of 500 to 610 ° C. as described above. A Ti film is formed by the above.

(Configuration example of processing chamber)
Next, a configuration example of a processing chamber in the substrate processing apparatus 100 for performing the above processing will be described. As described above, the substrate processing apparatus 100 according to the present embodiment removes deposits such as a natural oxide film on a wafer by a chemical reaction with a gas component that does not use a water component and does not depend on plasma, and a heat treatment. The removing process and the film forming process for forming a predetermined thin film on the wafer subjected to the deposit removing process are continuously executed.

  For this reason, one of at least two processing chambers among the processing chambers 104A to 104D is configured as a deposit removal processing chamber, and the other processing chamber is configured as a film forming processing chamber. Further, as described above, the deposit removing process may be performed in a plurality of stages continuously. In this case, the deposit removing process chamber may be constituted by a plurality of process chambers. Specifically, in the case of performing the two-stage processing of the product generation processing (for example, COR processing) and the product removal processing (for example, PHT processing) as described above, two processing out of the processing chambers 104A to 104D. The chamber is configured as a deposit removal processing chamber. In this case, one processing chamber is configured as a product generation processing chamber, and the other processing chamber is configured as a product removal processing chamber.

  In the film forming process, different films may be successively formed. In this case, the film forming process chamber may be composed of a plurality of process chambers. Specifically, in the case where a first film (for example, a Ti-based film) and a second film (for example, a TiN-based film) are continuously formed, two of the processing chambers 104A to 104D are formed. Configure as a chamber. In this case, one processing chamber is configured as a first film deposition processing chamber for depositing a first film, and the other processing chamber is configured as a second film deposition processing chamber for depositing a second film. Thus, the configuration of each of the processing chambers 104A to 104D is determined according to the contents of the deposit removal process and the film forming process executed by the substrate processing apparatus 100.

  Here, for example, a wafer W in which contact holes or via holes are formed is introduced into the substrate processing apparatus 100, and the COR processing and the PHT processing as the deposit removal processing as described above are continuously performed on the wafer W. Thereafter, FIG. 2 shows a configuration example of the processing chamber in the substrate processing apparatus 100 when the Ti film forming process and the TiN film forming process as the film forming process are successively executed.

  In the configuration example shown in FIG. 2, the processing chambers 104A, 104B, 104C, and 104D are configured as a COR processing chamber, a PHT processing chamber, a Ti film deposition processing chamber, and a TiN film deposition processing chamber, respectively. Processing in each of the processing chambers 104A to 104D is executed based on a process processing program 364 stored in a program data storage unit 360 provided in an EC (apparatus control unit) 300 of the control unit 200 described later. That is, the CPU 310 of the EC 300 reads a necessary processing program from the process processing program 364, reads necessary information from the process processing information (for example, process recipe information) 374 stored in the processing data storage unit 370, and executes each processing. Details of the configuration of the control unit 200 will be described later.

(Specific example of substrate transfer processing)
Next, the wafer W transfer process in the substrate processing apparatus 100 configured as shown in FIG. 2 will be described. Since the order of processing in the processing chambers 104A to 104D for the wafer W is performed in the above-described order, the transfer path of the wafer W is as shown by a solid line arrow shown in FIG. Such wafer transfer processing is executed based on a transfer processing program 362 stored in a program data storage unit 360 (described later) provided in an EC (apparatus control unit) 300 of the control unit 200. That is, the CPU 310 of the EC 300 reads the necessary information from the transfer process information (for example, transfer path information) 372 stored in the process data storage unit 370 and executes the transfer process program 362 to execute the wafer transfer process.

  Here, as an example, it is assumed that, for example, a pre-process wafer W in which a contact hole or a via hole is formed is taken out from a cassette (including a carrier) installed in the central introduction port 112B, and one of the two load lock chambers 108A and 108B. One of the load lock chambers, for example, the load lock chamber 108A is used for loading the unprocessed wafer W, and the other load lock chamber 108B is used for unloading the processed wafer W. Now, it is assumed that the wafers W are accommodated in the respective processing chambers 104A to 104D, and the respective processes are finished or almost finished.

  First, the transfer process in the carry-in transfer chamber 110 will be described. If the processed wafer W that has been processed in the processing chamber 104D is stored in the load lock chamber 108B, the processed wafer W is transferred to the transfer path X11 by the transfer-side transfer mechanism 116 as shown in FIG. Are conveyed to and accommodated in the central introduction port 112B.

  The unprocessed wafer W accommodated in the central introduction port 112B is transferred to the orienter 114 as shown by the transfer path X12 by the transfer-side transfer mechanism 116, and after aligning the wafer W, the wafer W is aligned again. As shown in the transfer path X13 by the transfer-side transfer mechanism 116, the aligned wafer W is accommodated in the other load lock chamber 108A and kept in a standby state. The above operation is repeated every time the processing of the wafer W proceeds.

  Next, wafer transfer processing in the common transfer chamber 102 will be described. First, the processed wafer W accommodated in the processing chamber 104D is picked up by the transfer mechanism 118, and placed in the empty load lock chamber 108B as indicated by the transfer path Y11. Next, the processed wafer W accommodated in the processing chamber 104C is picked up by the transfer mechanism 118, and is loaded into the empty processing chamber 104D and placed as shown in the transfer path Y12. Start processing within.

  Subsequently, the processed wafer W accommodated in the processing chamber 104B is picked up by the transfer mechanism 118, and is loaded into the empty processing chamber 104C as shown by the transfer path Y13, and is then set in the processing chamber 104C. Start processing within. Next, the processed wafer W accommodated in the processing chamber 104A is picked up by the transfer mechanism 118, and loaded into the empty processing chamber 104B as shown in the transfer path Y14, and placed in the processing chamber 104B. Start processing within.

  Subsequently, the unprocessed wafer W waiting in the load lock chamber 108A is picked up by the transfer mechanism 118, and is loaded into the empty process chamber 104A as shown in the transfer path Y15. Processing in the processing chamber 104A is started. When the wafer W is loaded / unloaded, among the gate valves 106A to 106D, 107A, 107B, a gate valve necessary for loading / unloading the wafer W is opened / closed. The above operation is repeated each time the processing of the wafer W is completed in each of the processing chambers 104A to 104D.

  In this way, the COR process, the PHT process, the Ti film forming process, and the TiN film forming process are successively performed in the processing chamber 104A to the processing chamber 104D on the unprocessed wafer W in which the contact hole or the via hole is formed. Is done. Therefore, on the inner wall of the contact hole or via hole of the wafer W, the deposits such as a natural oxide film are removed by the COR process and the PHT process, and the Ti film and the TiN film are formed by the Ti film formation process and the TiN film formation process. A barrier layer of the film is formed.

  As a result, not only the adhesion and strength of the film are improved, but also it is possible to prevent the charge-up damage caused by the plasma from being applied to the underlying film of the wafer, so that wiring processing without damage can be performed. In addition, a film having good contact resistance can be formed.

  The configuration of each of the processing chambers 104A to 104D is not limited to that shown in FIG. For example, any of the processing chambers 104A to 104D may be configured as a COR processing chamber, a PHT processing chamber, a Ti film deposition processing chamber, and a TiN film deposition processing chamber. Therefore, if the wafers are transferred in the order of the COR processing chamber, the PHT processing chamber, the Ti film deposition processing chamber, and the TiN film deposition processing chamber among the processing chambers 104A to 104D, the processing chambers 104A to 104A are not necessarily transferred. The order may not be 104D.

(Configuration example of control unit)
A configuration example of the control unit 200 of the substrate processing apparatus 100 will be described with reference to the drawings. FIG. 3 is a block diagram illustrating a configuration of the control unit (system controller) 200. As shown in FIG. 3, the control unit 200 includes an apparatus control unit (EC) 300, a plurality of module control units (MC) 230A, 230B, 230C,..., An EC 300, and MCs 230A, 230B. 230C... Are respectively connected to a switching hub (HUB) 220.

  The control unit 200 is connected from the EC 300 to a manufacturing execution system (MES) 204 that manages the manufacturing process of the entire factory where the substrate processing apparatus 100 is installed, for example, via a LAN (local area network) 202. The MES 204 is configured by a computer, for example. The MES 204 cooperates with the control unit 200 to feed back real-time information related to the process in the factory to a basic business system (not shown), and makes a determination regarding the process in consideration of the burden of the entire factory.

  The EC 300 constitutes a main control unit (master control unit) that controls the overall operation of the substrate processing apparatus 100 by supervising the MCs 230A, 230B, 230C. The switching hub 220 switches MCs 230A, 230B, 230C... As connection destinations of the EC 300 according to a control signal from the EC 300.

  Each of the MCs 230A, 230B, 230C,... Is a sub-control that controls the operation of each module such as the common transfer chamber 102, the process chambers 104A to 104D, the load lock chambers 108A and 108B, the transfer chamber 110, the orienter 114, etc. Part (slave control part). Each of the MCs 230A, 230B, 230C,... Is connected to each of the I / O (input / output) modules 236A, 236B, 236C, etc. via the GHOST network 206 by DIST (Distribution) boards 234A, 234B, 234C,. The GHOST network 206 is a network realized by an LSI called GHOST (General High-Speed Optimum Scalable Transceiver) mounted on the MC board of the EC 300. A maximum of 31 I / O modules can be connected to the GHOST network 206. In the GHOST network 206, MC corresponds to the master and the I / O module corresponds to the slave.

  Each of the I / O modules 236A, 236B, 236C,..., Includes a plurality of I / O units 238A, 238A to 238A connected to each component (hereinafter referred to as “end device”) of each module such as the processing chambers 104A to 104D. 238B, 238C..., And transmits a control signal to each end device and an output signal from each end device. For example, examples of the end device of the processing chamber 104 include a mass flow controller that controls the flow rate of the gas introduced into the processing chamber 104, and an APC valve that controls exhaust from the processing chamber 104.

  Also connected to each GHOST network 206 is an I / O board (not shown) that controls input / output of digital signals, analog signals, and serial signals in the I / O units 238A, 238B, 238C.

  Here, a configuration example of the EC 300 shown in FIG. 3 will be described with reference to the drawings. FIG. 4 is a block diagram showing a configuration example of EC300. As shown in FIG. 4, an EC 300 includes a CPU (Central Processing Unit) 310 constituting an EC main body, a RAM (Random Access Memory) 320 provided with a memory area used for various data processing performed by the CPU 310, Display means 330 including a liquid crystal display for displaying an operation screen, a selection screen, etc., input of various data such as process recipe input and editing by an operator, and output of process recipes and process logs to a predetermined storage medium, etc. An input / output unit 340 capable of outputting various data and the like, and an informing unit 350 such as an alarm device (for example, a buzzer) for informing when an abnormality such as electric leakage occurs in the substrate processing apparatus 100 are provided.

  The EC 300 includes a program data storage unit 360 that stores processing programs for executing various processes of the substrate processing apparatus 100, and a processing data storage unit that stores information (data) necessary to execute the processing programs. 370. The program data storage unit 360 and the processing data storage unit 370 are constructed in a storage area such as a hard disk (HDD). The CPU 310 reads necessary programs, data, and the like from the program data storage unit 360 and the processing data storage unit 370 as necessary, and executes various processing programs.

  The CPU 310, the RAM 320, the display means 330, the input / output means 340, the notification means 350, the program data storage means 360, the processing data storage means 370, etc. are connected by a bus line such as a control bus or a data bus. The switching hub 220 and the like are also connected to the bus line.

  Here, a control example of the substrate processing apparatus 100 by the control unit 200 having the above-described configuration will be described. In each of the processing chambers 104A to 104D, for example, when the wafer W is subjected to process processing such as COR processing, PHT processing, Ti film formation processing, TiN film formation processing as described above, the CPU 310 of the EC 300 stores program data. A processing program to be executed is read from the process processing program 364 of the means 360, and each processing is executed based on the process recipe processing information of the processing to be executed from the process processing information 374 of the processing data storage means 370. That is, the CPU 310 performs a desired end device via the MC 230, the GHOST network 206, and the I / O module 236 in the I / O module 236 that controls the switching hub 220 and the processing chambers 104A to 104D according to each processing program. Each process is executed by transmitting a control signal to the.

  Specifically, for example, in the processing chamber 104A configured as a COR processing chamber, when the COR processing is performed on the wafer W, the CPU 310 performs a gas flow system mass flow controller (for example, an ammonia gas supply pipe and a hydrogen fluoride) in the processing chamber 104A. The volume flow ratio of ammonia gas and hydrogen fluoride gas in the processing chamber 104A is adjusted to a desired value by transmitting a control signal to the mass flow controller of the gas supply pipe), and the exhaust system vacuum pump (eg, TMP) and pressure adjustment The pressure in the processing chamber 104A is adjusted to a desired value by transmitting a control signal to a valve (for example, an APC valve). At this time, the pressure gauge transmits the pressure value in the processing chamber 104A as an output signal to the CPU 310 of the EC 300, and the CPU 300 supplies the ammonia gas supply pipe and the hydrogen fluoride gas supply based on the transmitted pressure value in the processing chamber 104A. The control parameters of the pipe mass flow controller, APC valve and TMP are determined.

  Further, in the processing chamber 104B configured as a PHT processing chamber, when performing PHT processing on the wafer W, the CPU 310 performs a gas flow system mass flow controller (for example, a mass flow controller of a nitrogen gas supply pipe) and an exhaust system in the processing chamber 104B. The pressure in the processing chamber 104B is adjusted to a desired value by transmitting a control signal to a pressure adjusting valve (for example, an APC valve). Then, the temperature of the wafer W is adjusted to a desired temperature by transmitting a control signal to the stage heater. At this time, the pressure gauge transmits the pressure value in the processing chamber 104B as an output signal to the CPU 310 of the EC 300, and the CPU 310 based on the transmitted pressure value in the processing chamber 104B and the MFC and APC valve 69 of the nitrogen gas supply pipe. Determine the control parameters.

  In such a control unit (system controller) 200 shown in FIG. 3, a plurality of end devices are not directly connected to the EC 300, but the I / O units connected to the plurality of end devices are modularized to form I / Os. Configure the O module. Since this I / O module is connected to the EC 300 via the MC and the switching hub 220, the communication system can be simplified.

  The control signal transmitted by the CPU 310 of the EC 300 includes the address of the I / O unit connected to the desired end device and the address of the I / O module including the I / O unit. The hub 220 refers to the address of the I / O module in the control signal, and the GHOST of the MC refers to the address of the I / O unit in the control signal, so that the switching hub 220 or the MC inquires the CPU 310 about the destination of the control signal. Thus, smooth transmission of the control signal can be realized.

  As described above, in the substrate processing apparatus 100 according to the first embodiment, before the film forming process, the deposits such as a natural oxide film attached to the wafer are removed from the deposits without using plasma (for example, COR processing and PHT). Since the film formation process can be performed continuously without exposing the wafer to the atmosphere after the removal by performing the process, the adhesion and strength of the film can be improved. Further, since the natural oxide film can be removed without using plasma, wiring processing without damage can be performed, and a film having good contact resistance can be formed.

  In the process of forming the contact hole or via hole barrier layer as described above, it has been described that the COR process and the PHT process are effective as the previous process, but the film forming process is not limited thereto. Instead, the COR process and the PHT process may be performed as a pre-process of another film forming process as described below.

(Other specific examples of film forming process)
Here, another specific example of the film forming process applicable to the present invention will be described. Here, a process for forming a gate insulating film of a MOS device such as a MOSFET with a high dielectric (High-K) material will be described as a film forming process in which it is effective to perform the COR process and the PHT process as the previous process.

With the progress of miniaturization, in recent years, a gate insulating film equivalent to a silicon oxide film having a thickness of 1 nm or less is required for a MOS device. This corresponds to a thickness of 3-4 atomic layers. At such a thin film, a silicon oxide film cannot be used due to an increase in tunneling current, diffusion of an element doped in the gate electrode, a decrease in reliability, etc., so development of a film having a high dielectric constant (so-called High-K film) It is proceeding at a rapid pace. That is, transition metal oxide films such as ZrO ₂ and HfO ₂ , rare earth oxide films such as La ₂ O _3, and silicates thereof have high dielectric constant, high thermal stability, resistance to holes and electrons in Si. Since it has a high energy barrier, it has been energetically studied as a gate insulating film in MOS devices such as next-generation MOSFETs.

A composition transition layer made of silicate is formed between these high dielectric constant films and the Si substrate, and a composition transition layer made of an intermediate oxidation state of Si is formed between the silicate layer and the Si substrate. Therefore, in order to prevent these composition transition layers from being formed, it is necessary to form a base oxide film (for example, SiO ₂ film) as an antioxidant layer first. Thus, by interposing the base oxide film between the silicate layer and the Si substrate, there is an effect of preventing deterioration of device characteristics, that is, reduction of mobility.

  When forming a gate insulating film using such a high dielectric (High-K) material, it is necessary to control at the atomic layer level, so that plasma is not used before the gate insulating film forming process is performed. The adhesion and strength of the film can be improved by performing the deposit removal process (for example, COR process and PHT process), which is dry cleaning, to remove deposits such as a natural oxide film.

  Further, if the natural oxide film is removed using plasma, there is a risk of causing charge-up damage due to plasma excitation to the base on which the gate insulating film is formed. If a gate oxide film is formed with damage on the underlying layer as described above, the gate oxide film may be destroyed depending on the degree of the damage, and the characteristics of the MOS device itself may be deteriorated. In this regard, in the deposit removal processing (for example, COR processing and PHT processing) according to the present embodiment, plasma is not used, and therefore, the substrate on which the gate insulating film is formed is not damaged. Deterioration can be prevented.

The process of forming such a high dielectric (High-K) gate insulating film (high dielectric gate insulating film) is very thin on the wafer, that is, on the silicon substrate, preferably with a film thickness of 1 nm or less. After forming a base oxide film such as a SiO ₂ film, a High-K film (for example, a silicate film such as HfSiO ₂ ) is formed. The base oxide film forming process corresponds to the first film forming process, and the High-K film forming process corresponds to the second film forming process.

The base oxide film forming process (first film forming process) is performed by radical oxidation using, for example, ultraviolet light-excited oxygen radicals. Specifically, a base oxide film having a film thickness corresponding to 2 to 3 molecular layers can be stably formed with good reproducibility by ultraviolet light excited radical oxidation treatment of a silicon substrate. Thus, an SiO ₂ atomic layer of about 0.5 nm, for example, is formed as a base oxide film on the surface of the silicon substrate by oxygen radicals. In this case, the processing time is, for example, 300 seconds.

The High-K film deposition process (second film deposition process) is performed by, for example, metal oxide chemical vapor deposition (MOCVD) on the wafer on which the base oxide film is formed by the base oxide film deposition process. A film (for example, a silicate film such as HfSiO ₂ ) is formed. Specifically, for example, when a source gas is introduced onto a substrate on which a SiO ₂ atomic layer as a base oxide film is heated to 400 to 600 ° C., the source gas is decomposed and, for example, HfSiO _{2 is} deposited on the substrate. A thin film of a silicate film such as is formed. The processing time in this case is, for example, 343 seconds.

(Other configuration examples of processing chamber)
Next, a configuration example of a processing chamber in the substrate processing apparatus 100 for performing such processing will be described. The substrate processing apparatus 100 according to the present embodiment sequentially performs COR processing, PHT processing, base oxide film formation processing (UV processing), and High-K film formation processing (MOCVD processing).

  Therefore, one of at least two processing chambers among the processing chambers 104A to 104D is configured as a deposit removal processing chamber for performing COR processing and PHT processing, respectively, and the other two processing chambers are respectively formed with oxide film deposition processing ( UV processing), and a film forming process chamber for performing a High-K film forming process (MOCVD process).

  Here, the processing chambers 104A, 104B, 104C, and 104D in the substrate processing apparatus 100 are a COR processing chamber, a PHT processing chamber, an oxide film deposition processing (UV processing) chamber, and a High-K film deposition processing (MOCVD processing) chamber, respectively. An example configured as shown in FIG. The processes in the oxide film deposition process (UV process) chamber and the High-K film deposition process (MOCVD process) chamber are stored in the program data storage unit 360 of the EC (apparatus control unit) 300 of the control unit 200 described above, respectively. It is executed based on the processed process program 364. The CPU 310 of the EC 300 reads a necessary processing program from the process processing program 364, reads necessary information from the process processing information (for example, process recipe information) 374 stored in the processing data storage unit 370, and executes each processing.

  The wafer W transfer process in the substrate processing apparatus 100 when each of the processing chambers 104A to 104D is configured as shown in FIG. 5 is the same as that in the configuration shown in FIG. Omitted.

(Configuration Example of Substrate Processing Apparatus According to Second Embodiment)
Next, a configuration example of the substrate processing apparatus according to the second embodiment will be described with reference to the drawings. FIG. 6 is a schematic configuration diagram of a substrate processing apparatus according to the second embodiment. As shown in FIG. 6, the substrate processing apparatus 101 has a configuration in which a plurality of vacuum processing apparatuses including a common transfer chamber for connecting a plurality of processing chambers are connected. The present invention can also be applied to the substrate processing apparatus 101 having such a configuration.

  A substrate processing apparatus 101 shown in FIG. 6 has a first common transfer chamber 102 and two load lock chambers 108A and 108B, if the common transfer chamber in the substrate processing apparatus 100 shown in FIG. This is an example in which another second common transfer chamber 120 is interposed between the two. The second common transfer chamber 120 has a substantially polygonal shape (for example, an irregular heptagon), and the processing chambers 104E and 104F are connected to two sides via gate valves 106E and 106F, respectively. . Note that the vacuum processing apparatus including the first common transfer chamber 102 and the processing chambers (processing chambers 104A to 104D) connected to the first common transfer chamber 102 constitutes an example of the first vacuum processing apparatus. A vacuum processing apparatus including processing chambers (processing chambers 104E and 104F) to be connected constitutes an example of a second vacuum processing apparatus.

  Between the first common transfer chamber 102 and the second common transfer chamber 120, a path unit 122 that connects both the common transfer chambers 102 and 120 and temporarily holds the wafer W is connected. When the wafer is transferred between the first common transfer chamber 102 and the second common transfer chamber 120, the wafer W is temporarily held in the path unit 122. In this case, the shape of the first common transfer chamber 102 is formed into an irregular heptagon in order to connect the path portion 122. A gate valve 126 is provided at the junction between the first common transfer chamber 102 and the pass unit 122. By opening and closing the gate valve 126, the common transfer chambers 102 and 120 can be connected and disconnected.

  In the processing chambers 104E and 104F, mounting tables 105E and 105F for holding the wafer W are provided similarly to the other processing chambers 104A to 104D. In the second common transfer chamber 120, similarly to the first common transfer chamber 102, a transfer mechanism 124 having two picks 124A and 124B that can be bent and stretched is provided. The transfer mechanism 124 of the second common transfer chamber 120 efficiently transfers the wafer by the same operation as that of the transfer mechanism 118 of the first common transfer chamber 102.

  Note that one of the second common transfer chamber 120 and the two load lock chambers, for example, the transfer port 152A of the connecting portion with the load lock chamber 108A, carries the wafer W into the second common transfer chamber 120 exclusively. The transfer port 152B, which is used as a carry-in port and connected to the other load lock chamber 108B, is used as a carry-out port for carrying out the wafer W exclusively from the second common transfer chamber 120.

(Configuration example of processing chamber)
Next, a configuration example of the processing chamber in the substrate processing apparatus 101 illustrated in FIG. 6 will be described. Also in the substrate processing apparatus 101 according to the second embodiment, the deposit removal process for removing deposits such as a natural oxide film on the wafer without using a water component and without using plasma, and the deposit removal process are performed. A film forming process for forming a predetermined thin film on the formed wafer can be continuously performed.

  One of at least two processing chambers among the processing chambers 104A to 104F is configured as a deposit removal processing chamber, and the other two processing chambers are configured as a film forming processing chamber. Further, as described above, the deposit removing process may be performed in a plurality of stages continuously. In this case, the deposit removing process chamber may be constituted by a plurality of process chambers. Specifically, in the case of performing the two-stage processing of the product generation processing (for example, COR processing) and the product removal processing (for example, PHT processing) as described above, two processing out of the processing chambers 104A to 104F. The chamber is configured as a deposit removal processing chamber. In this case, one processing chamber is configured as a product generation processing chamber, and the other processing chamber is configured as a product removal processing chamber.

  In the film forming process, different films may be successively formed. In this case, the film forming process chamber may be composed of a plurality of process chambers. Specifically, in the case where a first film (for example, a Ti-based film) and a second film (for example, a TiN-based film) are continuously formed, two of the processing chambers 104A to 104F are formed. Configure as a chamber. In this case, one processing chamber is configured as a first film deposition processing chamber for depositing a first film, and the other processing chamber is configured as a second film deposition processing chamber for depositing a second film. As described above, the configuration of each of the processing chambers 104A to 104F is determined according to the contents of the deposit removal process and the film forming process executed by the substrate processing apparatus 101.

  Here, for example, a wafer W in which contact holes or via holes are formed is introduced into the substrate processing apparatus 101, and the COR processing and the PHT processing as the deposit removal processing as described above are continuously performed on the wafer W. Thereafter, FIG. 7 shows a configuration example of the processing chamber in the substrate processing apparatus 101 when the Ti film forming process and the TiN film forming process as the film forming process are successively executed.

  In the configuration example shown in FIG. 7, the processing chambers 104A, 104B, 104C, and 104D connected to the first common transfer chamber 102 are a COR processing chamber, a PHT processing chamber, a Ti film deposition processing chamber, and a TiN film deposition processing chamber, respectively. It is constituted as follows.

(Wafer transfer processing)
The wafer W transfer process in the substrate processing apparatus 101 configured as shown in FIG. 7 will be described. Since the order of processing in the processing chambers 104A to 104D for the wafer W is performed in the above-described order, the transfer path of the wafer W is as shown by a solid line arrow shown in FIG.

  Here, as an example, it is assumed that the pre-process wafer W in which, for example, a contact hole or a via hole is formed is taken out from a cassette (including a carrier) installed in the central introduction port 112B, and one of the two load lock chambers 108A and 108B. One of the load lock chambers, for example, the load lock chamber 108A is used for loading the unprocessed wafer W, and the other load lock chamber 108B is used for unloading the processed wafer W. Now, it is assumed that the wafers W are accommodated in the respective processing chambers 104A to 104D, and the respective processes are finished or almost finished.

  First, the transfer process of the wafer W in the carry-in transfer chamber 110 shown in FIG. 7 is the same as that shown in FIG. In this case, the transport paths X21 to X23 shown in FIG. 7 correspond to the transport paths X11 to X13 shown in FIG.

  Also, the transfer process of the wafer W in the first common transfer chamber 102 is almost the same as that shown in FIG. 2, but in the transfer process in the first common transfer chamber 102 in FIG. 2 is different from the case of FIG. 2 in which the wafer W is transferred between the load lock chambers 108A and 108B.

  Specifically, the transfer paths Y21 to Y25 shown in FIG. 7 correspond to the transfer paths Y11 to Y15 shown in FIG. 2, respectively, but the transfer path Y21 transfers the wafer W from the processing chamber 104D to the pass unit 122 and transfers it. The route Y25 is different from the transfer routes Y11 and Y15 in that the wafer W is transferred from the path unit 122 to the processing chamber 104A.

  As for the transfer processing of the wafer W in the second common transfer chamber 120, first, the processed wafer W accommodated in the pass unit 122 is picked up by the transfer mechanism 124, and the empty state as shown in the transfer path Z21. In the load lock chamber 108B. Next, the unprocessed wafer W waiting in the load lock chamber 108A is picked up by the transfer mechanism 124, and is transferred into the pass section 122 as indicated by the transfer path Z22.

  When the wafer W is loaded / unloaded, among the gate valves 106A to 106F, 107A, 107B, 126, a gate valve necessary for loading / unloading the wafer W is opened / closed. The above operation is repeated each time the processing of the wafer W is completed in each of the processing chambers 104A to 104D.

  Thus, the COR process, the PHT process, the Ti film forming process, and the TiN film forming process are successively performed in the processing chamber 104A to the processing chamber 104D on the pre-processing wafer W in which the contact hole or the via hole is formed. The

  Thus, according to the configuration of the processing chamber shown in FIG. 7, the processing chamber 104A to the processing chamber 104D connected to the first common transfer chamber 102 are respectively connected to the COR processing chamber, the PHT processing chamber, the Ti film deposition processing chamber, TiN. Since it is configured as a film deposition processing chamber, the processing chambers 104E and 104F connected to the second common transfer chamber 120 can be configured as processing chambers for performing other processing on the wafer.

  For example, the processing chamber 104E or 104F may be configured as a metal film deposition chamber for depositing a tungsten film or the like for filling in a contact hole or a via hole. In this case, the wafer W processed by the processing chamber 104A to the processing chamber 104D is transferred to the processing chamber 104E or 104F, and a tungsten film is formed on the Ti film and the TiN film barrier layer formed on the wafer W. You may do it. Thereby, the plasmaless cleaning process in the contact hole or the via hole, the barrier film forming process of the Ti film and the TiN film, and the filling process of the tungsten film can be continuously performed.

  Note that the configuration of the processing chamber of the substrate processing apparatus 101 is not limited to the above. For example, when a base oxide film forming process (UV process) or a high-K film forming process (MOCVD process) is performed as a film forming process, the process chambers 104C and 104D are formed in the base oxide film as shown in FIG. You may comprise as a process (UV process) chamber and a High-K film-forming process (MOCVD process) chamber. Since the carrying process in this case is the same as that shown in FIG. 7, a detailed description thereof will be omitted.

  Further, the processing chamber 104A to the processing chamber 104D connected to the first common transfer chamber 102 is configured as a film forming processing chamber, and the processing chambers 104E and 104F connected to the second common transfer chamber 120 are set to be a deposit removal processing chamber ( For example, a COR processing chamber and a PHT processing chamber may be configured. In this case, for example, as shown in FIG. 9, the processing chambers 104A to 104D connected to the first common transfer chamber 102 may be configured as two systems of film forming processing chambers.

  Specifically, as shown in FIG. 9, the processing chambers 104A and 104B connected to the first common transfer chamber 102 are configured as a first system, that is, a first Ti film deposition processing chamber and a first TiN film deposition processing chamber. The chambers 104C and 104D are configured as a second system, that is, a second Ti film deposition process chamber and a second TiN film deposition process chamber. In the first system and the second system, the film forming process may be executed with the same process recipe, or the film forming process may be executed with process recipes having different gas flow rates or pressures, for example. On the other hand, the processing chamber 104E and the processing chamber 104F connected to the second common transfer chamber 120 are configured as a COR processing chamber and a PHT processing chamber, respectively.

  Here, the transfer process of the substrate processing apparatus 101 configured as shown in FIG. 9 will be described. In FIG. 9, in the second common transfer chamber 120, the wafers W are processed in the order of the processing chambers 104 </ b> E and 104 </ b> F and stored in the pass unit 122. In the first common transfer chamber 102, the wafer W is transferred from the pass section 122 to the process chambers 104A and 104B in this order and processed, and the wafer W is transferred from the pass section 122 to the process chambers 104C and 104D. Two systems of processing can be executed, with the second system being transported and processed in this order. These two systems may be executed in parallel, or only one of the systems may be executed.

  First, the transfer process of the wafer W in the carry-in transfer chamber 110 shown in FIG. 9 is the same as that shown in FIG. In this case, the transport paths X31 to X33 shown in FIG. 9 correspond to the transport paths X11 to X13 shown in FIG.

  Next, the transfer process of the wafer W in the second common transfer chamber 120 will be described. First, the wafer W that has been processed in the processing chamber 104B or the processing chamber 104D accommodated in the pass section 122 is taken by the transfer mechanism 124, and this is put into the empty load lock chamber 108B as indicated by the transfer path Z31. Put.

  Next, the wafer W that has been processed in the processing chamber 104F is picked up by the transfer mechanism 124, and is placed in the empty path section 122 as indicated by the transfer path Z32. Subsequently, the wafer W that has been processed in the processing chamber 104E is picked up by the transfer mechanism 124, and is loaded into the empty processing chamber 104F and placed in the empty processing chamber 104F as indicated by the transfer path Z33. Start processing.

  Next, the unprocessed wafer W waiting in the load lock chamber 108A is picked up by the transfer mechanism 124, and is loaded into the empty process chamber 104E as shown in the transfer path Z34. Processing in the processing chamber 104E is started.

  Next, transfer processing of the wafer W in the first common transfer chamber 102 will be described. In the first common transfer chamber 102, two systems of processing can be executed as described above. When processing is performed in the first system (processing chambers 104A and 104B), first, the processed wafer W accommodated in the processing chamber 104B is picked up by the transfer mechanism 118, and this is emptied as indicated by the transfer path Ya31. Place it in the path portion 122 of the state.

  Next, the processed wafer W accommodated in the processing chamber 104A is picked up by the transfer mechanism 118, and is loaded into the empty processing chamber 104B as shown by the transfer path Ya32, and is set in the processing chamber 104B. Start processing within. Subsequently, the wafer W transferred from the second common transfer chamber 120 into the pass unit 122 is picked up by the transfer mechanism 118, and is loaded into the empty processing chamber 104A as indicated by the transfer path Ya33. Then, processing in the processing chamber 104A is started.

  When processing is performed in the second system (processing chambers 104C and 104D), first, the processed wafer W accommodated in the processing chamber 104D is picked up by the transfer mechanism 118, and as shown in the transfer path Yb31. Is placed in the empty path section 122.

  Next, the processed wafer W accommodated in the processing chamber 104C is picked up by the transfer mechanism 118, and is loaded into the empty processing chamber 104D and placed as shown in the transfer path Yb32. Start processing within. Subsequently, the wafer W transferred from the second common transfer chamber 120 into the pass unit 122 is picked up by the transfer mechanism 118, and is loaded into the empty processing chamber 104C as indicated by a transfer path Yb33. Then, processing in the processing chamber 104C is started.

  When the wafer W is loaded / unloaded, among the gate valves 106A to 106F, 107A, 107B, 126, a gate valve necessary for loading / unloading the wafer W is opened / closed. Then, the processing is performed in the processing chambers 104E and 104F, the processing chambers 104A and 104B, and the processing chambers 104C and 104D, and the above operation is repeated every time the processing of the wafer W is completed. In this way, the COR process, the PHT process, the Ti film forming process, and the TiN film forming process are successively performed on the unprocessed wafer W on which the contact hole or the via hole is formed.

  As described above, according to the configuration of the processing chamber shown in FIG. 9, the processing chamber 104A to the processing chamber 104D connected to the first common transfer chamber 102 are used as two systems of Ti film deposition processing chambers and TiN film deposition processing chambers. Because of the configuration, if these two systems are executed in parallel, the overall throughput of the apparatus can be greatly improved. This is because the film formation process (here, Ti film formation process, TiN film formation process) takes longer than the deposit removal process (here, COR process, PHT process). If the cleaning process such as the COR process and the PHT process is completed while the film forming process of this system is being executed, the film forming process can be executed immediately if the other process chamber is available. is there.

  Further, since the film forming process chambers are concentrated in one second common transfer chamber 120, the film forming process chambers can be separated from the process chambers of the first common transfer chamber, and each film forming process chamber and the second common transfer chamber 120 are cleaned. Efficient. Thus, by separating the vacuum processing apparatuses (the first vacuum processing apparatus and the second vacuum processing apparatus) according to the type of processing, for example, cleaning can be performed for each vacuum processing apparatus, which is efficient.

(Configuration Example of Substrate Processing Apparatus According to Third Embodiment)
Next, a configuration example of a substrate processing apparatus according to a third embodiment of the present invention will be described with reference to the drawings. FIG. 10 is a schematic configuration diagram illustrating an example of a substrate processing apparatus according to the third embodiment. A substrate processing apparatus 103 shown in FIG. 10 is obtained by attaching a measurement processing chamber 400 capable of measuring the film thickness of the wafer W and measuring particles (including the deposits) to the substrate processing apparatus 101 shown in FIG. It is.

  The measurement processing chamber 400 may be attached to any position of the sides of the first common transfer chamber 102 and the second common transfer chamber 120 as long as they are vacant. In the configuration example shown in FIG. 10, the measurement processing chamber 400 is attached to the first common transfer chamber 102. Note that the measurement processing chamber 400 is controlled by an EC (apparatus control unit) 300 of the control unit 200 shown in FIG. In this case, an MC (module control unit) that controls the measurement processing chamber 400 is connected to the control unit 200 shown in FIG. 3 via the EC 300 and the switching hub 220, and this MC is connected to the MC via a DISTC board, for example, Each part of the measurement processing chamber 400 is connected to the O module 236K. As a result, control signals and data can be exchanged between the measurement processing chamber 400 and the EC 300 of the control unit 200.

  Here, a configuration example of the measurement processing chamber 400 is shown in FIG. The measurement processing chamber 400 includes a stage (turn table) 405 for mounting and holding the wafer W, and a motor 407 for rotating the stage 405. The motor 407 is driven based on a drive signal from a motor drive unit 408 configured by, for example, a motor drive. The motor drive unit 408 is connected to the EC 300 via, for example, the I / O module 236K and the MC, and is controlled by a control signal from the MC or EC 300.

  The measurement processing chamber 400 includes a film thickness measuring unit 410 for measuring the film thickness of a thin film formed on the wafer W, an image processing unit 420 for capturing a surface image of the wafer W, performing pattern recognition, and the like. And a particle measuring unit 430 for measuring particles on the wafer W.

  The film thickness measuring unit 410 receives, for example, a light source 414 that emits laser light toward the wafer W, a light receiving unit 416 that receives reflected light that is irradiated from the light source 414 and reflected from the wafer W, and the light receiving unit 416 receives the light. A signal processing unit 412 for processing the received light signal. The signal processing unit 412 is connected to the EC 300 via, for example, the I / O module 236K. As a result, the EC 300 can receive data relating to the film thickness on the wafer W (for example, film thickness data, film thickness evaluation data, etc.) via the signal processing unit 412.

  The film thickness measurement unit 410 measures the film thickness by using, for example, a spectroscopic ellipso method using laser light from the light source 414. Spectral ellipsometry generally measures film thickness based on the fact that the amount of change in polarization (amplitude and phase difference) between the incident light of the laser beam and the reflected light from the wafer is proportional to the film thickness x optical constant. Is the method.

  The image processing unit 420 includes an imaging device 424 such as a CCD (Charge Coupled Devices) that captures a surface image of the wafer W, and a signal control unit 422 that processes an image signal from the imaging device 424. The signal processing unit 422 is connected to the EC 300 via the I / O module 236K. As a result, the EC 300 can receive data relating to the surface image of the wafer W via the signal processing unit 422.

  The particle measuring unit 430 receives, for example, a light source 434 that emits laser light toward the wafer W, a light receiving unit 436 that receives scattered light irradiated from the light source 434 and scattered on the wafer W, and the light receiving unit 436 receives the light. A signal processing unit 432 for processing the received light signal. The signal processing unit 432 is connected to the EC 300 via the I / O module 236K. As a result, the EC 300 can receive data (for example, pixel data, particle evaluation data, etc.) regarding particles on the wafer W via the signal processing unit 432.

  Next, a configuration example of the EC 300 of the control unit 200 according to the third embodiment will be described with reference to the drawings. FIG. 12 is a block diagram showing a configuration example of the EC 300 according to the third embodiment. The EC 300 shown in FIG. 12 is obtained by adding the measurement processing program 460 of the measurement processing chamber 400 to the program data storage unit 360 shown in FIG. 4 and adding the measurement processing information 470 to the processing data storage unit 370.

  The film thickness measurement unit 410, the image processing unit 420, and the particle measurement unit 430 are each configured as an optical system unit, and each optical system unit is configured to be movable in the radial direction of the wafer W. As a result, measurement processing of the entire surface of the wafer can be performed by merely allowing each optical system unit to move from the center to the end of the wafer W while holding the wafer W on the stage 405 and rotating it. Thereby, the moving distance of the optical system unit can be shortened, the space for the measurement processing chamber 400 can be saved, and the measurement processing chamber 400 itself can be miniaturized. Note that the film thickness measurement unit 410, the image processing unit 420, and the particle measurement unit 430 may be configured to be movable by one optical system unit. Further, the film thickness measurement unit 410 and the particle measurement unit 430 may be configured to be movable by one optical system unit, and the image processing unit 420 may be fixed.

  The measurement processing program 460 controls each part of the measurement processing chamber 400 such as the film thickness measurement program 462, the image processing program 464, the particle measurement program 466, the stage drive program 468, etc., and performs measurement processing to evaluate the measurement results. Provide a program. The measurement processing information 470 includes film thickness evaluation information 472, particle evaluation information 474, and a measurement condition recipe 476. The stage drive program 468 controls the motor 407 of the stage 405 to control the rotation timing, rotation speed, rotation speed, etc. of the wafer W.

  The film thickness measurement program 462 controls each part of the film thickness measurement unit 410 based on the measurement condition recipe 476 to execute the film thickness measurement of the wafer W, and evaluates the film thickness based on the measurement result. Specifically, the film thickness measurement unit 410 is moved while rotating the wafer W, and laser light from the light source 414 is irradiated toward the wafer W to measure the film thickness of the wafer W. More preferably, the film thickness measurement unit 410 is moved while the wafer W is stationary, the laser light from the light source 414 is irradiated toward the measurement point of the wafer W, and the film thickness of the wafer W is measured. When there are a plurality of measurement points on the wafer W, the film thickness is measured for each measurement point by irradiating each measurement point with laser light. Then, for example, film thickness data is obtained as a measurement result. Based on the film thickness data, for example, film thickness evaluation data for evaluating whether a target film thickness is formed or the like is created and stored as film thickness evaluation information 472.

  The image processing program 464 controls each unit of the image processing unit 420 based on the measurement condition recipe 476, captures the surface image of the wafer W by the image sensor 424, and performs image processing such as pattern recognition based on the result. It is. For example, by recognizing a pattern based on the surface image of the wafer W, pattern matching can be performed to specify a measurement point that is an object of film thickness measurement or particle measurement of the wafer W.

  The particle measurement program 466 controls each part of the particle measurement unit 430 based on the measurement condition recipe 476, performs particle measurement on the surface of the wafer W, and performs particle evaluation based on the measurement result. Specifically, the particle measuring unit 430 is moved while rotating the wafer W, and laser light from the light source 434 is irradiated toward the wafer W to measure the particles on the wafer W. Then, for example, pixel data associated with the presence or absence of particles is obtained as a measurement result. Then, based on the pixel data, for example, particle evaluation data composed of binarized data corresponding to whether or not pixel data with particles exceeds a set value is created and stored as film thickness evaluation information 472.

(Process chamber configuration example and wafer transfer process)
Next, a configuration example of the processing chamber in the substrate processing apparatus 103 illustrated in FIG. 10 will be described. Also in the substrate processing apparatus 103 according to the third embodiment, the deposit removal process for removing deposits such as a natural oxide film on the wafer by a chemical reaction with a gas component that does not use a water component and does not depend on plasma and a heat treatment. And a film forming process for forming a predetermined thin film on the wafer on which the deposit removal process has been performed.

  Here, for example, a wafer W in which contact holes or via holes are formed is introduced into the substrate processing apparatus 103, and the COR processing and the PHT processing as the deposit removal processing as described above are continuously performed on the wafer W. FIG. 13 shows a configuration example of the processing chamber in the substrate processing apparatus 103 when the Ti film forming process and the TiN film forming process as the film forming process are subsequently executed.

  In the configuration example shown in FIG. 13, the processing chambers 104A, 104B, 104C, and 104D connected to the first common transfer chamber 102 are a COR processing chamber, a PHT processing chamber, a Ti film deposition processing chamber, and a TiN film deposition processing chamber, respectively. It is constituted as follows.

  The wafer W transfer process in the substrate processing apparatus 101 configured as shown in FIG. 13 will be described. Since the order of processing in the processing chambers 104A to 104D for the wafer W is performed in the order described above, the transfer path of the wafer W is as shown by a solid arrow in FIG.

  Here, as an example, it is assumed that the pre-process wafer W in which, for example, a contact hole or a via hole is formed is taken out from a cassette (including a carrier) installed in the central introduction port 112B, and one of the two load lock chambers 108A and 108B. One of the load lock chambers, for example, the load lock chamber 108A is used for loading the unprocessed wafer W, and the other load lock chamber 108B is used for unloading the processed wafer W. Further, here, after the film thickness measurement and particle measurement are performed in the measurement processing chamber 400 on the wafer W that has undergone the COR process and the PHT process, the next film formation process (Ti film formation process and TiN film formation process) is performed. ) Will be described. Now, it is assumed that the wafers W are accommodated in the processing chambers 104A to 104D and the measurement processing chamber 400, and the respective processes are completed or almost finished.

  First, the transfer process of the wafer W in the carry-in transfer chamber 110 and the transfer process of the wafer W in the second common transfer chamber 120 shown in FIG. 13 are the same as those shown in FIG. Is omitted. In this case, the transport paths X41 to X43, Z41, and Z42 shown in FIG. 13 correspond to the transport paths X21 to X23, Z21, and Z22 shown in FIG.

  Next, the transfer process of the wafer W in the first common transfer chamber 120 will be described. First, the processed wafer W accommodated in the processing chamber 104D is picked up by the transfer mechanism 118, and is placed in the empty path section 122 as indicated by the transfer path Y41. Next, the processed wafer W accommodated in the processing chamber 104C is picked up by the transfer mechanism 118, and is loaded into the empty processing chamber 104D as shown in the transfer path Y42. Start processing within.

  Subsequently, the wafer W that has been subjected to the measurement processing stored in the measurement processing chamber 400 is taken by the transfer mechanism 118, and is loaded into the empty processing chamber 104C as shown in the transfer path Y43, where the processing is performed. Processing in the chamber 104C is started. Next, the processed wafer W accommodated in the processing chamber 104B is picked up and loaded into the empty measurement processing chamber 400 as indicated by the transfer path Y44. Start the measurement process. Next, the processed wafer W accommodated in the processing chamber 104A is picked up by the transfer mechanism 118, and is loaded into the empty processing chamber 104B as shown in the transfer path Y45, and is set in the processing chamber 104B. Start processing within.

  Subsequently, when the wafer W is loaded into the pass unit 122, the wafer W is picked up by the transfer mechanism 118, and is loaded into the empty processing chamber 104A as shown in the transfer path Y46. , Processing in the processing chamber 104A is started. When the wafer W is loaded / unloaded, among the gate valves 106A to 106D, 107A, 107B, 406, a gate valve necessary for loading / unloading the wafer W is opened / closed. Each time the processing of the wafer W is completed in each of the processing chambers 104A to 104D and the measurement processing chamber 400, the above operation is repeated.

  Thus, the COR process, the PHT process, the measurement process, and the Ti film formation are performed on the unprocessed wafer W in which the contact hole or the via hole is formed in the process chambers 104A and 104B, the measurement process chamber 400, and the process chambers 104C and 104D, respectively. The process and the TiN film forming process are continuously performed.

  That is, first, deposits such as a natural oxide film are removed from the inner wall and bottom of the contact hole or via hole of the wafer W by COR processing and PHT processing. Then, by performing film thickness measurement and particle measurement in the measurement processing chamber 400, it is confirmed whether or not deposits such as a natural oxide film are actually removed, and then the next Ti film deposition process and TiN are performed. A barrier layer of a Ti film and a TiN film is formed by the film forming process. As a result, the barrier layer can be formed in a state where deposits such as a natural oxide film are reliably removed from the wafer W.

  In addition, since the film thickness measurement and the particle measurement can be performed in one measurement processing chamber 400, it is possible to more reliably inspect whether or not the natural oxide film removal by the COR process and the PHT process has been properly executed. For example, if the PHT process is excessive, an oxide film may be formed. In this case, the inspection can be performed by measuring the film thickness. In addition, when the PHT treatment is insufficient, the complex formed by the COR treatment may remain as a biproduct (byproduct), but in this case, it can be inspected by particle measurement.

  As described above, according to the substrate processing apparatus of this embodiment, since the measurement process is continuously performed in the measurement processing chamber 400 after the deposit removal process (COR process and PHT process), the deposit removal process is performed on the wafer. Can be inspected by measuring the film thickness and particles (including deposits) of the wafer W. In addition, immediately after the deposit removal process is performed on the wafer, the measurement process can be continuously performed in the measurement processing chamber 400 without exposing the wafer to the atmosphere. Therefore, the film thickness and particles on the wafer can be measured without the natural oxide film adhering again to the surface from which the deposits on the wafer have been removed (for example, the exposed surface such as the bottom of a contact hole formed on the wafer). Can be inspected. Thereby, the effect of the deposit removal process can be accurately inspected.

  In this case, the process recipe (process conditions for the deposit removal process) of the deposit removal process (COR process and PHT process) may be corrected based on the measurement result of the film thickness and particles of the wafer W. By doing so, the deposit removal process (COR process and PHT process) can always be properly performed. As a result, the deposit removal process according to the actual processing result can be executed, so that deposits including the natural oxide film can be reliably removed from the wafer W.

  Further, based on the measurement results of the film thickness measurement and the particle measurement, it may be determined whether or not to execute the next film forming process step. In this case, for example, if the measurement results measured by the film thickness measurement and the particle measurement are within the allowable range, it is determined that the next film forming process can be performed, and if it is not within the allowable range, the next film forming process cannot be performed. You may make it judge. As a result, the next film forming process can be executed in a state where the deposits including the natural oxide film on the wafer W are always removed, so that the uniformity of the film quality formed on the wafer W is ensured. Can do.

  In addition, the measurement process performed by the measurement processing chamber 400 after the deposit removal process includes the following film forming process in addition to the measurement for checking whether or not the deposit removal process as described above is properly performed. It is also possible to measure the film thickness of the underlying film. In this case, the film thickness measurement on the surface (for example, the exposed surface such as the bottom of a contact hole formed on the wafer) on the wafer in the measurement processing chamber 400 and the next film formation process are performed. In addition to measuring the film thickness of a base film (for example, a base film formed on a wafer) to be subjected to deposition, the surface of the surface subjected to the deposit removal process is measured. According to this, the film thickness measurement for inspecting whether or not the deposit removal process has been properly executed and the film thickness measurement of the base film to be subjected to the next film formation process can be performed simultaneously. Processing time can be greatly reduced.

  Further, the measurement process by the measurement process chamber 400 may be executed after the film formation process. In this case, for example, the film thickness of the film formed by the film forming process is measured. Thereby, it can be inspected by measuring the film thickness whether or not the film forming process is properly executed. Further, based on the measurement result thus measured, a process recipe (process conditions for the film forming process) for executing the film forming process can be corrected. Thus, it is possible to always execute an appropriate film forming process in subsequent wafer processing. Note that the measurement process in the measurement process chamber 400 may be performed before the deposit removal process.

(Measurement processing in the measurement processing room)
Here, the measurement process in the measurement process chamber 400 will be described with reference to the drawings. FIG. 14 is a flowchart showing an example of the measurement process. As shown in FIG. 14, first, a measurement condition recipe is set in step S110. Specifically, conditions such as the rotational speed of the stage 405 and the measurement range are set based on the measurement condition recipe 476 of the measurement processing information 470.

  Next, in step S120, the wafer W is loaded into the measurement processing chamber 400, and in step S130, film thickness measurement and particle measurement are executed. At this time, prior to film thickness measurement and particle measurement, for example, wafer alignment is performed by notch detection, and pattern recognition is performed by capturing an image of the surface of the wafer W by the image processing unit 420 as necessary. Then, for example, the film thickness and particles at the measurement point (or measurement range) obtained by pattern recognition are measured. At this time, for example, the film thickness measurement unit 410 measures the film thickness at the measurement point of the wafer W while the wafer W is stationary, and then the particle measurement unit 430 measures the particle on the surface of the wafer W while rotating the wafer W. Do.

  In step S140, evaluation data is created based on the film thickness and particle measurement results. In step S150, the measurement result and evaluation data are transmitted to the EC 300 of the control unit 200, and the wafer W is unloaded in step S140.

  Thus, since the measurement processing chamber 400 is connected to the first common transfer chamber 102 of the substrate processing apparatus 103, the film thickness and particles can be measured without exposing the processed wafer W to the atmosphere. For example, a natural oxide film is formed on the wafer W, and the measurement can be performed immediately without changing the state of the wafer. For example, as described above, after the COR process and the PHT process, the film thickness and particles can be measured immediately without exposing the wafer W to the atmosphere. Thereby, the next film forming process can be executed without, for example, a natural oxide film adhering to the wafer W.

  In the present embodiment, since the measurement processing chamber 400 is configured as one module (unit) of the substrate processing apparatus, even an existing substrate processing apparatus can be easily attached. In addition, since the measurement processing chamber 400 is attached to the substrate processing apparatus as a module (unit), the measurement processing can be executed simply by loading the wafer W into the measurement processing chamber 400. Therefore, when the measurement processing chamber is configured as a separate apparatus. In comparison, the time and labor required for film thickness measurement and particle measurement can be greatly reduced.

  In addition, since the film thickness measurement and the particle measurement can be performed in one measurement processing chamber 400, the footprint can be greatly reduced as compared with the case where two measurement processing chambers are installed as separate devices. Moreover, since the measurement processing chamber 400 itself can be made compact, the footprint can be further reduced.

  Although FIG. 13 illustrates the case where it is inspected whether the natural oxide film has been removed by performing the measurement process in the measurement process chamber 400 after the COR process and the PHT process, the present invention is not necessarily limited to this. In addition, after the film formation process (Ti film formation process, TiN film formation process), the measurement process is performed in the measurement processing chamber 400 to check whether a desired film thickness is formed. Good. Moreover, as described above, both the film thickness measurement and the particle measurement may be performed in the measurement processing chamber 400, or one of them may be performed.

  Further, the configuration of the processing chamber of the substrate processing apparatus 103 is not limited to that shown in FIG. For example, when a base oxide film forming process (UV process) and a High-K film forming process (MOCVD process) are performed as the film forming process, the processing chambers 104C and 104D are formed as base oxide film forming processes (UV processing) chambers. , High-K film forming process (MOCVD process) chamber. The conveyance process in this case is the same as that shown in FIG.

  Further, the mounting position of the measurement processing chamber 400 is not limited to the case shown in FIG. For example, the first common transfer chamber 102 and the second common transfer chamber 120 can be mounted anywhere on the portion where the processing chamber can be mounted. Furthermore, in the present embodiment, the case where the measurement processing chamber 400 is attached to a substrate processing apparatus of a type connecting a plurality of common transfer chambers as shown in FIG. 6 is described, but the present invention is not limited to this. You may attach to the type of substrate processing apparatus provided with the single common conveyance chamber as shown in FIG. For example, in the case of a substrate processing apparatus as shown in FIG. 1, the measurement processing chamber 400 may be attached in addition to the processing chambers 104 </ b> A to 104 </ b> D by configuring the common transfer chamber 102 to be a heptagon or more polygon. .

  In addition, the present invention described in detail in the above embodiment may be applied to a system composed of a plurality of devices or an apparatus composed of a single device. A medium such as a storage medium storing software programs for realizing the functions of the above-described embodiments is supplied to the system or apparatus, and the computer (or CPU or MPU) of the system or apparatus is stored in the medium such as the storage medium. It goes without saying that the present invention can also be achieved by reading and executing the program.

  In this case, the program itself read from the medium such as a storage medium realizes the functions of the above-described embodiment, and the medium such as the storage medium storing the program constitutes the present invention. Examples of the medium such as a storage medium for supplying the program include a floppy (registered trademark) disk, a hard disk, an optical disk, a magneto-optical disk, a CD-ROM, a CD-R, a CD-RW, a DVD-ROM, and a DVD-RAM. , DVD-RW, DVD + RW, magnetic tape, non-volatile memory card, ROM, or network download.

  Note that by executing the program read by the computer, not only the functions of the above-described embodiments are realized, but also an OS or the like running on the computer is part of the actual processing based on the instructions of the program. Alternatively, the case where the functions of the above-described embodiment are realized by performing all the processing and the processing is included in the present invention.

  Furthermore, after a program read from a medium such as a storage medium is written to a memory provided in a function expansion board inserted into the computer or a function expansion unit connected to the computer, the function is determined based on the instructions of the program. The present invention also includes a case where the CPU or the like provided in the expansion board or the function expansion unit performs part or all of the actual processing and the functions of the above-described embodiments are realized by the processing.

  As mentioned above, although preferred embodiment of this invention was described referring an accompanying drawing, it cannot be overemphasized that this invention is not limited to the example which concerns. It will be apparent to those skilled in the art that various changes and modifications can be made within the scope of the claims, and these are naturally within the technical scope of the present invention. Understood.

  The present invention can be applied to a substrate processing apparatus, a substrate processing method, a program, and a recording medium on which a program is recorded, which performs a predetermined process on a substrate to be processed such as a semiconductor wafer.

It is sectional drawing which shows the structural example of the substrate processing apparatus concerning 1st Embodiment of this invention. It is a figure which shows the structural example of the process chamber in the substrate processing apparatus shown in FIG. It is a block diagram which shows the structural example of the control part (system controller) shown in FIG. It is a block diagram which shows the structural example of EC (apparatus control part) in the embodiment. It is a figure which shows the other structural example of the process chamber in the substrate processing apparatus shown in FIG. It is sectional drawing which shows the structural example of the substrate processing apparatus concerning 2nd Embodiment of this invention. It is a figure which shows the structural example of the process chamber in the substrate processing apparatus shown in FIG. It is a figure which shows the other structural example of the process chamber in the substrate processing apparatus shown in FIG. It is a figure which shows the other structural example of the process chamber in the substrate processing apparatus shown in FIG. It is sectional drawing which shows the structural example of the substrate processing apparatus concerning 3rd Embodiment of this invention. It is a block diagram which shows the structural example of the measurement process chamber shown in FIG. It is a block diagram which shows the structural example of EC (apparatus control part) in the embodiment. It is a figure which shows the structural example of the process chamber in the substrate processing apparatus shown in FIG. It is a flowchart which shows the specific example of the measurement process in the measurement process chamber shown in FIG.

Explanation of symbols

100, 101, 103 Substrate processing apparatus 102, 120 Common transfer chamber 104 (104A-104F) Processing chamber 105 (105A-105F) Mounting table 106 (106A-106F) Gate valve 107A, 107B Gate valve 108A, 108B Load lock chamber 109A , 109B Transport port 110 Carry-in side transport chambers 112A to 112C Introduction port 114 Orienter 116 Carry-in side transport mechanism 116A, 116B Pick 118 Transport mechanism (first transport mechanism)
118A, 118B Pick 122 Pass part 124 Transport mechanism (second transport mechanism)
124A, 124B Pick 126 Gate valve 152A, 152B Transport port 200 Control unit (system controller)
202 LAN
204 MES
206 GHOST network 220 switching hub 230A, 230B, 230C MC (module control unit)
234A, 234B, 234C DIST board 236A, 236B, 236C Module 300 EC (apparatus control unit)
310 CPU
320 RAM
330 Display means 340 Input / output means 350 Notification means 360 Program data storage means 362 Transport processing program 364 Process processing program 370 Processing data storage means 372 Transport processing information 374 Process processing information 400 Measurement processing chamber 405 Stage 406 Gate valve 407 Motor 408 Motor drive Unit 410 film thickness measurement unit 412, 422, 432 signal processing unit 414, 434 light source 416, 436 light receiving unit 420 image processing unit 424 image sensor 430 particle measurement unit 460 measurement processing program 462 film thickness measurement program 464 image processing program 466 particle measurement Program 468 Stage drive program 470 Measurement processing information 472 Film thickness evaluation information 474 Particle evaluation information 476 Measurement condition recipe W Wafer

Claims (26)

A substrate processing apparatus comprising: a plurality of processing chambers that perform predetermined processing on a substrate to be processed; and a common transfer chamber that is commonly connected to these processing chambers and carries the processing substrate into and out of each processing chamber. Because
The plurality of processing chambers include a deposit removal processing chamber for removing deposits including a natural oxide film deposited on the substrate to be processed by a chemical reaction with a gas component that does not depend on plasma and heat treatment; A substrate processing apparatus comprising: a film forming process chamber for performing a film forming process on a substrate; and a measurement processing chamber for performing a measurement process on the substrate to be processed. The deposit removal processing chamber includes a product generation processing chamber for generating a product by chemically reacting the deposit on the substrate to be processed with a gas component, and the substrate formed on the substrate to be processed. The substrate processing apparatus according to claim 1, wherein the substrate processing apparatus includes two processing chambers, a product removal processing chamber for removing a product of deposits by heat treatment. The film forming chamber includes a first film forming chamber for forming a first film on the substrate to be processed and a second film forming chamber for forming a second film on the first film. The substrate processing apparatus according to claim 1, comprising two processing chambers. The said measurement process chamber is provided with the film thickness measurement part which measures the film thickness on the said to-be-processed substrate, and the particle measurement part which measures the particle on the said to-be-processed substrate, The Claim 1 characterized by the above-mentioned. Substrate processing equipment. The substrate processing apparatus according to claim 1, wherein the measurement processing chamber further includes an image processing unit for capturing and recognizing a surface image of the substrate to be processed. A plurality of processing chambers for performing predetermined processing on the substrate to be processed; a common transfer chamber commonly connected to these processing chambers; and a transfer mechanism for transferring the substrate to be processed provided in the common transfer chamber; A substrate processing apparatus in which a plurality of vacuum processing apparatuses each including a plurality of vacuum processing apparatuses are connected via a path unit,
The plurality of processing chambers include a deposit removal processing chamber for removing deposits including a natural oxide film deposited on the substrate to be processed by a chemical reaction with a gas component that does not depend on plasma and heat treatment; A substrate processing apparatus comprising: a film forming process chamber for performing a film forming process on a substrate; and a measurement processing chamber for performing a measurement process on the substrate to be processed. The deposit removal processing chamber includes a product generation processing chamber for generating a product by chemically reacting the deposit on the substrate to be processed with a gas component, and the substrate formed on the substrate to be processed. The substrate processing apparatus according to claim 6, wherein the substrate processing apparatus includes two processing chambers, a product removal processing chamber for removing a deposit product by heat treatment. The film forming chamber includes a first film forming chamber for forming a first film on the substrate to be processed and a second film forming chamber for forming a second film on the first film. The substrate processing apparatus according to claim 6, comprising two processing chambers. The film forming chamber includes a first film forming chamber for forming a first film on the substrate to be processed and a second film forming chamber for forming a second film on the first film. The substrate processing apparatus according to claim 6, comprising a plurality of sets of two processing chambers configured. The substrate to be processed in the deposit removal processing chamber is a substrate to be processed in which contact holes or via holes are formed,
The film formation chamber includes a first barrier layer film formation chamber that forms a first barrier layer inside a contact hole or via hole formed in the substrate to be processed, and a second barrier layer above the first barrier layer. The substrate processing apparatus according to claim 1, wherein the substrate processing apparatus is configured by a second barrier layer film formation processing chamber in which a barrier layer is formed. The substrate to be processed in the deposit removal chamber is a silicon substrate,
The film forming chamber includes a base oxide film forming film forming chamber for forming a base oxide film layer on the substrate to be processed by oxygen radicals, and a high dielectric on the substrate to be processed on which the base oxide film layer is formed. 7. The substrate processing apparatus according to claim 1, comprising a high dielectric gate oxide film forming chamber for forming a gate oxide film. A deposit removal treatment step for removing deposits including a natural oxide film deposited on the substrate to be processed by a chemical reaction with a gas component that does not depend on plasma and heat treatment;
A measurement processing step for performing measurement processing on the substrate to be processed after the deposit removal processing;
A film forming process step of performing a film forming process on the substrate to be processed after the measurement process;
A substrate processing method comprising: The deposit removal processing step includes a step of chemically reacting the deposit on the substrate to be processed with a gas component to generate a product, and a product of the deposit formed on the substrate to be processed. The substrate processing method according to claim 12, further comprising a step of removing by heat treatment. The substrate processing method according to claim 13, wherein the measurement processing step performs measurement for inspecting whether or not the deposit removal processing is properly executed. The measurement processing step includes a step of measuring a film thickness of the surface subjected to the deposit removal process on the substrate to be processed, and a step of performing a deposit measurement of the surface subjected to the deposit removal process. The substrate processing method according to claim 14, wherein the substrate processing method is performed in one measurement processing chamber. The measurement processing step further includes correcting a process recipe for executing the deposit removal processing based on measurement results measured by the film thickness measurement step and the deposit measurement step. 15. The substrate processing method according to 15. The measurement processing step further determines whether or not to execute the next film formation processing step based on measurement results measured by the film thickness measurement step and the particle measurement step. 15. The substrate processing method according to 15. The measurement processing step performs a measurement for inspecting whether or not the deposit removal process is properly performed, and a film thickness measurement of a base film on which the next film formation process is performed. The substrate processing method according to claim 13. The measurement processing step includes a step of measuring a film thickness of a surface on which the deposit removal process is performed on the substrate to be processed and a film thickness measurement of a base film on which the film formation process is performed, and the deposit removal 19. The substrate processing method according to claim 18, wherein the step of measuring a deposit on the surface subjected to the processing is performed in one measurement processing chamber. The film forming process step includes a step of forming a first film on the substrate to be processed and a step of forming a second film on the first film. Substrate processing method. A deposit removal treatment step for removing deposits including a natural oxide film deposited on the substrate to be processed by a chemical reaction with a gas component that does not depend on plasma and heat treatment;
A film forming process step of performing a film forming process on the substrate to be processed after the deposit removing process;
A measurement processing step for performing measurement processing on the substrate to be processed after the film formation processing;
A substrate processing method comprising: The substrate processing method according to claim 21, wherein the measurement processing step includes a step of measuring a film thickness of the film formed by the film forming process. 23. The substrate processing method according to claim 22, wherein the measurement processing step further corrects a process recipe for executing the film formation processing based on a measurement result measured by the film thickness measurement step. . A measurement processing step for performing measurement processing on the substrate to be processed;
A deposit removal treatment step for removing deposits including a natural oxide film deposited on the substrate to be treated by a chemical reaction with a gas component that does not depend on plasma and heat treatment after the measurement process;
A film forming process step of performing a film forming process on the substrate to be processed after the deposit removing process;
A substrate processing method comprising: Computer
A deposit removal treatment step for removing deposits including a natural oxide film deposited on the substrate to be processed by a chemical reaction with a gas component that does not depend on plasma and heat treatment;
A measurement processing step for performing measurement processing on the substrate to be processed;
A film forming process step of performing a film forming process on the substrate to be processed from which the deposits have been removed;
A program for running Computer
A deposit removal treatment step for removing deposits including a natural oxide film deposited on the substrate to be processed by a chemical reaction with a gas component that does not depend on plasma and heat treatment;
A measurement processing step for performing measurement processing on the substrate to be processed;
A film forming process step of performing a film forming process on the substrate to be processed from which the deposits have been removed;
The computer-readable recording medium which recorded the program for performing this.

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