WO2007008653A2 - Method for depositing silicon-containing films - Google Patents

Method for depositing silicon-containing films Download PDF

Info

Publication number
WO2007008653A2
WO2007008653A2 PCT/US2006/026506 US2006026506W WO2007008653A2 WO 2007008653 A2 WO2007008653 A2 WO 2007008653A2 US 2006026506 W US2006026506 W US 2006026506W WO 2007008653 A2 WO2007008653 A2 WO 2007008653A2
Authority
WO
WIPO (PCT)
Prior art keywords
silicon
process chamber
silylamine
nitrogen
film
Prior art date
Application number
PCT/US2006/026506
Other languages
French (fr)
Other versions
WO2007008653A3 (en
Inventor
Yoshikazu Okuyama
Jon S. Owyang
Helmuth Treichel
Original Assignee
Aviza Technology, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Aviza Technology, Inc. filed Critical Aviza Technology, Inc.
Priority to EP06786601A priority Critical patent/EP1907599A2/en
Priority to JP2008520410A priority patent/JP2009500857A/en
Publication of WO2007008653A2 publication Critical patent/WO2007008653A2/en
Publication of WO2007008653A3 publication Critical patent/WO2007008653A3/en

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/308Oxynitrides
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/34Nitrides
    • C23C16/345Silicon nitride
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40Oxides
    • C23C16/401Oxides containing silicon
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40Oxides
    • C23C16/401Oxides containing silicon
    • C23C16/402Silicon dioxide
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • C23C16/45544Atomic layer deposition [ALD] characterized by the apparatus
    • C23C16/45546Atomic layer deposition [ALD] characterized by the apparatus specially adapted for a substrate stack in the ALD reactor
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • C23C16/45553Atomic layer deposition [ALD] characterized by the use of precursors specially adapted for ALD
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45563Gas nozzles
    • C23C16/45578Elongated nozzles, tubes with holes
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/458Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
    • C23C16/4582Rigid and flat substrates, e.g. plates or discs
    • C23C16/4583Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially horizontally
    • C23C16/4584Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially horizontally the substrate being rotated

Definitions

  • the present invention relates generally to methods for depositing silicon containing films on the surface of a substrate.
  • Such silicon-containing films comprise silicon-nitrogen, silicon-oxygen, and silicon-nitrogen-oxygen dielectric materials used in the processing of semiconductors. More specifically, embodiments of the present invention provide use of silylamine moieties in the deposition of the silicon containing films carried out at low temperatures, preferably less than approximately 55O 0 C.
  • Silicon nitride, silicon dioxide, and silicon oxynitride are dielectric materials widely used in the manufacture of semiconductor devices. These films are typically deposited from silicon sources such as silane (SiH 4 ), disilane (Si 2 H 6 ), dichlorosilane (DCS) (SiCl 2 H 2 ), and others with various reactant sources such as ammonia (NH 3 ), oxygen (O 2 ), ozone (O 3 ), nitrous oxide (N 2 O), nitrogen dioxide (NO 2 ), nitric oxide (NO), and others depending on the desired material composition.
  • the deposition temperatures of these processes are typically greater than 600 0 C. The high speed requirements of advanced semiconductor devices dictate that the overall thermal budget of the device manufacture be lowered.
  • Silicon tetraiodide can be used to deposit silicon nitride at temperatures between 400 0 C and 500 0 C. However, this precursor is a solid at room temperature and produces a by-product OfNH 4 I that condenses on cool surfaces and causes particle problems.
  • Hexachlorodisilane (HCD) Si 2 Cl 6
  • HCD Hexachlorodisilane
  • an aminosilane compound such as bis(t-butylamino silane) (BTBAS) (SiC 8 N 2 H 22 ) is a halogen-free precursor that can be reacted with O 2 , N 2 O, or NH 3 to form the various dielectric materials of interest, but only at temperatures greater than about 550 0 C.
  • materials formed with this precursor are not of sufficient quality for wide use in the manufacture of semiconductor devices. It is clear that the development of a new precursor and method for depositing dielectric materials at a low temperature without the problems of forming condensable by-products and incorporation of unwanted moieties into the film is desired.
  • the dielectric materials will find uses in the manufacture of semiconductor structures such as spacers, etch stops, hard masks, gates dielectrics, capacitor dielectrics, and the like.
  • the methods provide for the deposition of the dielectric materials using silylamine precursors at low temperatures.
  • the inventors have discovered methods that provide for the deposition of a silicon-nitrogen dielectric material (such as silicon nitride) by reacting a silylamine precursor with a nitrogen containing reactant at a temperature of equal to or less than 55O 0 C.
  • the methods are practiced within process chambers adapted to contain a single substrate as well as within process chambers adapted to contain a plurality of substrates, and are carried out using chemical vapor deposition (CVD) techniques, and in an alternative embodiment by atomic layer deposition (ALD) techniques.
  • CVD chemical vapor deposition
  • ALD atomic layer deposition
  • the inventors have discovered methods that provide for the deposition of a silicon-oxygen dielectric material (such as silicon dioxide) by reacting a silylamine precursor with an oxygen containing reactant at a temperature of equal to or less than 55O 0 C.
  • the methods are practiced within process chambers adapted to contain a single substrate as well as within process chambers adapted to contain a plurality of substrates, and are carried out using chemical vapor deposition (CVD) techniques, and in an alternative embodiment by atomic layer deposition (ALD) techniques.
  • CVD chemical vapor deposition
  • ALD atomic layer deposition
  • the inventors have discovered methods that provide for the deposition of a silicon-nitrogen-oxygen dielectric material (such as silicon oxynitride) by reacting a silylamine precursor with an oxygen containing reactant and a nitrogen containing reactant at a process temperature of equal to or less than 55O 0 C.
  • the methods are practiced within process cnamoers adapted to contain a single substrate as well as within process chambers adapted to contain a plurality of substrates and are carried out using chemical vapor deposition (CVD) techniques, and in an alternative embodiment by atomic layer deposition (ALD) techniques.
  • CVD chemical vapor deposition
  • ALD atomic layer deposition
  • methods of forming a silicon containing film on the surface of one or more substrates are provided, characterized in that: a silylamine moiety and one or more reactant precursors are reacted in a process chamber by flowing the silylamine moiety and the one or more reactant precursors, either concurrently or sequentially, across a top surface of the one or more substrates to form a film thereon.
  • FIG. 1 is a cross-sectional view of one example of a vertical batch thermal processing system having across-flow injector system which may be employed to carry out methods according to some embodiments of the present invention
  • FIG. 2 illustrates a cross-sectional side view of a portion of the thermal processing system of FIG. 1 showing positions of injector orifices in relation to the liner and of exhaust slots in relation to the wafers according to some embodiments of the present invention
  • FIG. 3 is a plan view of a portion of the thermal processing system of FIG. 1 taken along the line A-A of FIG. 1 showing gas flow from orifices of a primary and a secondary injector across a wafer and to an exhaust port according to some exemplary embodiments of the present invention
  • FIG. 4 depicts a plan view of a portion of the thermal processing system of FIG. 1 taken along the line A-A of FIG. 1 showing gas flow from orifices of a primary and a secondary injector across a wafer and to an exhaust port according to other embodiments of the present invention
  • FIG. 5 is a plan view of a portion of the thermal processing system of FIG. 1 taken along the line A-A of FIG. 1 showing gas flow from orifices of a primary and a secondary injector across a wafer and to an exhaust port according to yet another embodiment of the present invention
  • FIG. 6 illustrates deposition rate and WIWNU as a function of deposition temperature for oxide films deposited in a single wafer thermal processing apparatus by chemical vapor deposition according to embodiments of the present invention
  • FIG. 7 depicts silicon nitride deposition rate as a function of deposition temperature for silicon nitride films deposited in a batch thermal processing apparatus by chemical vapor deposition according to embodiments of the present invention.
  • the inventors have discovered methods that provide for the deposition of silicon containing dielectric materials.
  • the dielectric materials will find uses in the manufacture of semiconductor structures such as spacers, etch stops, hard masks, gates dielectrics, capacitor dielectrics, and the like.
  • the methods provide for the deposition of the dielectric materials using silylamine precursors by chemical vapor deposition (CVD) .
  • CVD chemical vapor deposition
  • ALD atomic layer deposition
  • a first class of the silylamines has the general formula:
  • silylamine precursors having the general formula:
  • silylamine is used as a precursor to deposit a silicon containing dielectric film on a substrate.
  • silicon oxide films are formed with silylamine precursors of the above formulas, by chemical vapor deposition or atomic vapor deposition, said deposition processes being carried out at a deposition temperature in the range of approximately 150 - 550 0 C.
  • the deposition temperature is in the range of approximately 150 - 450 0 C.
  • the deposition temperature is in the range of approximately 500 - 520 0 C.
  • silicon nitride films are formed with silylamine precursors of the above formulas, by chemical vapor deposition or atomic layer deposition, said deposition processes being carried out at a deposition temperature in the range of approximately 300 - 800 0 C, and preferably at 550 0 C and below. In other embodiments the deposition temperature is in the range of approximately 500 - 520 0 C.
  • deposition is carried out using chemical vapor deposition (CVD) techniques.
  • a process chamber is provided that is adapted to hold at least one substrate.
  • Silylamine is used as a precursor to deposit a silicon containing dielectric film on the substrate(s).
  • silylamine and other reactant precursors are injected together into a chamber, where the precursors react and form a film or layer of desired material on the surface of one or more substrates.
  • the substrate(s) is controlled to a desired temperature, typically 55O 0 C or less, and the pressure in the process chamber is controlled to a desired pressure, typically between 0.01 mTorr and 760 Torr.
  • the reaction of the reactant precursors with the silylamine forms a silicon-nitrogen, silicon-oxygen, silicon-nitrogen-oxygen film, or the like on the substrate(s) depending on the chemical nature of the reactant(s).
  • suitable reactant precursors for reaction with the silylamine precursor include, but are not limited to: ammonia (NH 3 ), hydrazine (N 2 H 4 ), water vapor (H 2 O), oxygen (O 2 ), ozone (O 3 ), nitrous oxide (N 2 O), nitric oxide (NO), nitrogen dioxide (NO 2 ), and the like.
  • deposition is carried out using atomic layer deposition (ALD) techniques.
  • a process chamber is provided that is adapted to hold at least one substrate.
  • the substrate is controlled to a desired temperature, typically 55O 0 C or less, and the pressure in the process chamber is controlled to a desired pressure, typically between 0.01 mTorr and 760 Torr.
  • the silylamine precursor is introduced into the process chamber and allowed to form a monolayer on the surface of the substrate(s). Excess amounts of the silylamine are removed from the process chamber.
  • One or more reactants are then introduced into the process chamber either sequentially or simultaneously and allowed to react with the monolayer of the silylamine that was previously formed on the substrate(s).
  • Films are formed comprised of silicon- nitrogen, silicon-oxygen, or silicon-nitrogen-oxygen film on the substrate(s) depending on the chemical nature of the reactant(s). Excess amounts of the reactant(s) are removed from the process chamber. This sequence is repeated until the desired thickness of the dielectric material is deposited on the substrate(s).
  • suitable reactants include, but are not limited to: ammonia (NH 3 ), hydrazine (N 2 H 4 ), water vapor (H 2 O), oxygen (O 2 ), ozone (O 3 ), nitrous oxide (N 2 O), nitric oxide (NO), nitrogen dioxide (NO 2 ), and the like.
  • a silylamine such as N(SiH 3 ) 3 designated as "trisilylamine” (TSA) is used as a precursor to deposit a silicon-nitrogen containing dielectric film on a substrate.
  • the process chamber is adapted to hold a single substrate.
  • the substrate is controlled to a desired temperature, typically 55O 0 C or less, and most preferably 400 0 C or less.
  • the pressure in the process chamber is controlled to a desired pressure, typically between 0.01 mTorr and 760 Torr, most preferably less than 10 Torr.
  • TSA precursor is introduced into the process chamber and allowed to form a monolayer on the surface of the substrate(s).
  • TSA precursor Excess amounts of TSA precursor are removed from the process chamber.
  • a nitrogen containing reactant is conveyed into the process chamber and allowed to react with the monolayer of the TSA that was previously formed on the substrate(s).
  • TMs sequence is repeated until the desired thickness of the silicon-nitrogen dielectric material is deposited on the substrate(s).
  • TSA precursor and the nitrogen containing reactant are conveyed to the process chamber concurrently.
  • suitable nitrogen containing reactants comprise ammonia (NH 3 ), hydrazine (N 2 H 4 ), azides, and the like.
  • the reaction of the nitrogen containing reactant with TSA forms a silicon-nitrogen dielectric film on the substrate(s).
  • a vertical furnace is used to hold a plurality of silicon wafers, preferably 300 mm wafers. Typically the wafers number between 1 and 100 for a single batch process.
  • One embodiment of a preferred vertical batch thermal processing furnace technology includes "across-flow" technology as described in detail in U.S. patent application serial nos. 10/521,619 and 10/946,849 which are hereby incorporated by reference in their entirety.
  • the wafers are loaded into the furnace and the pressure is reduced to ⁇ 10,000 mTorr, preferably between 500 and 5000 mTorr.
  • the temperature is controlled to between 100 0 C and 55O 0 C. This embodiment of the method may be carried out using CVD, or ALD techniques.
  • deposition is initiated by conveying to the process chamber TSA and a nitrogen containing reactant, such as NH 3 .
  • a nitrogen containing reactant such as NH 3 .
  • the flowrate of TSA is in the range of approximately 1 seem and 100 seem, and the flowrate of NH 3 is in the range of approximately 50 seem and 10,000 seem.
  • TSA and NH 3 react and form a layer of silicon nitride on the surface of one or more substrates.
  • the CVD process is carried out until a desired thickness of the film is achieved.
  • This process sequence can be used to deposit high quality silicon-nitrogen dielectric films with a within-wafer uniformity of ⁇ 3.0% 3-sigma, a wafer-to-wafer uniformity of ⁇ 3.0% 3- sigma, a silicon to nitrogen ratio [Si:N] of between 0.65 and 0.85, and a refractive index of between 1.9 and 2.1.
  • deposition is initialed by flowing between 1 seem and 100 seem of "trisilylamine” (TSA) and allowed to form a monolayer on the wafers. Excess amounts of TSA are removed by purging with N 2 .
  • a nitrogen containing reactant such as NH 3 is introduced to the process chamber by flowing between 50 seem and 10,000 seem OfNH 3 .
  • the NH 3 reacts with the monolayer of TSA to form a silicon-nitrogen dielectric layer. Excess amounts of the NH 3 are removed by purging with N 2 .
  • total gas flows throughout the process are less than 20,000 seem. This results in the deposition of a silicon-nitrogen dielectric layer with an effective deposition rate of between 0.2 and 5.0 A per cycle. This sequence is repeated until the desired thickness of the silicon-nitrogen dielectric film is deposited.
  • the pressure in the process chamber is then increased to one atmosphere and the wafers are removed from the process chamber.
  • a vertical batch thermal processing system 100 which may be used to carry out embodiments of the present invention.
  • the system 100 provides for delivering precursors in an "across-flow" manner according to embodiments of the present invention.
  • Conveying the precursor(s) to the substrate(s) in a cross-flow manner generally comprises injecting precursor(s) near one peripheral region of the substrate, and flowing the precursor(s) across the surface of the substrate , where the precursor(s) then exits at an opposite peripheral region of the substrate.
  • the batch thermal system 100 may be operated in CVD or ALD mode, and thus may be utilized for these two different embodiments of the present invention.
  • the system 100 generally comprises a vessel 101 that encloses a volume to form a process chamber 102 having a support 104 adapted for receiving a carrier or boat 106 with a batch of wafers 108 held therein, and heat source or furnace 110 having a number of heating elements 112-1, 112-2 and 112-3 (referred to collectively hereinafter as heating elements 112) for raising the temperature of the wafers to the desired deposition temperature for thermal processing.
  • a vessel 101 that encloses a volume to form a process chamber 102 having a support 104 adapted for receiving a carrier or boat 106 with a batch of wafers 108 held therein, and heat source or furnace 110 having a number of heating elements 112-1, 112-2 and 112-3 (referred to collectively hereinafter as heating elements 112) for raising the temperature of the wafers to the desired deposition temperature for thermal processing.
  • the thermal processing system 100 typically includes one or more injectors for conveying a fluid, such as a gas or vapor, into the process chamber 102 for processing and/or cooling the wafers 108, and one or more purge ports or vents for conveying a gas to purge the process chamber and/or to cool the wafers.
  • a liner 120 may be used to increase the concentration of processing gas or vapor near the wafers 108 in a region or process zone in which the wafers are processed, and reduces contamination of the wafers from flaking or peeling of deposits that can form on interior surfaces of the process chamber 102. Processing gas or vapor exits the process zone through exhaust ports or slots 182 in the chamber liner 120.
  • injectors 216 are used in the thermal processing system 100.
  • the injectors 116 are distributive or across(X)-flow injectors in which reactant precursors or other gas or vapor is introduced through injector openings or orifices 180 on one side of the wafers 108 and boat 106 and caused to flow across the surfaces of the wafers in a laminar flow type manner to exit exhaust ports or slots 182 in the chamber line 120 on opposite the side.
  • X-flow injectors 116 can serve other purposes, including the injection of gases for cool-down (e.g., helium, nitrogen, hydrogen) for forced convective cooling between the wafers 108.
  • gases for cool-down e.g., helium, nitrogen, hydrogen
  • Use of X-flow injectors 116 results in a more uniform cooling between wafers 108 whether disposed at the bottom or top of the stack or batch and those wafers that are disposed in the middle, as compared with earlier up-flow or down flow configurations.
  • the injector orifices 180 are sized, shaped and position to provide a spray pattern that promotes forced convective cooling between the wafers 108 in a manner that does not create a large temperature gradient across the wafer. FIG.
  • FIG. 2 is a cross-sectional side view of a portion of the thermal processing system 100 of FIG. 1 showing illustrative portions of the injector orifices 180 in relation to the chamber liner 120 and the exhaust slots 182 in relation to the wafers 108.
  • FIG. 3 is a plan view of a portion of the thermal processing apparatus 100 of FIG. 1 taken along the line A-A of FIG. 1.
  • the injector 116 is comprised of primary and secondary injectors.
  • FIG 3 illustrates laminar gas flow from orifices 180-1 and 180-2 of primary and secondary injectors 184, 186 respectively, across an illustrative one of the wafers 108 and to exhaust slots 182-1 and 182-2. It should be noted that the position of the exhaust slot 182 as shown in FIG. 1 have been shifted from the position of exhaust slots 182-1 and 182-2 shown in FIG. 3 to allow illustration of the exhaust slot and injector 116 in a single a cross- sectional view of a thermal processing apparatus.
  • the process gas or vapor is initially directed away from the wafers 108 and toward the liner 120 to promote mixing of the process gas or vapor before it reaches the wafers.
  • This configuration of orifices 180-1 and 180-2 is particularly useful for processes or recipes in which different reactants are introduced from each of the primary and secondary injectors 184, 186, for example to form a multi-component film or layer.
  • FIG. 4 is another plan view of a portion of the thermal processing system 100 of FIG. 1 taken along the line A-A of FIG. 1 showing an alternative gas flow path from the orifices 180 of the primary and secondary injector 184, 186, across an illustrative on of the wafer 108 and to the exhaust slots 182 according to another embodiment.
  • FIG. 5 is another plan view of a portion of the thermal processing system 100 of FIG. 1 taken along the line A-A of FIG. 1 showing an alternative gas flow path from the orifices 180 of the primary and secondary injector 184, 186, across an illustrative on of the wafer 108 and to the exhaust slots 182 according to yet another embodiment.
  • injector 116 is shown comprised of primary and secondary injectors 184 and 186, injector 116 maybe comprised of a single injection tube.
  • across flow technology is described with reference to a batch vertical furnace, it is to be understood that the across flow technology can be practiced in a single wafer system as well, hi such a system, the precursors are conveyed in across-flow type manner over the top surface of the single substrate. Embodiments of the method described herein in a single wafer system may be carried out in such across flow manner.
  • Methods are also carried out in a single wafer thermal processing system to deposit a silicon-nitrogen containing dielectric film on a wafer.
  • the system comprises a single wafer process chamber used to support a single silicon wafer, such as a 300mm substrate.
  • the wafer is loaded into the process chamber and the pressure is reduced to ⁇ 10,000 mTorr.
  • the temperature is controlled to between 100 0 C and 500 0 C.
  • an ALD process is employed and is initialed by flowing between 1 and 50 seem of "trisilylamine" (TSA) and allowed to form a monolayer on the wafer. Excess amounts of TSA are removed by purging with N 2 .
  • TSA trisilylamine
  • a nitrogen containing reactant such as NH 3 is introduced to the process chamber by flowing between 50 seem and 1000 seem of NH 3 .
  • the NH 3 reacts with the monolayer of TSA to form a silicon-nitrogen dielectric layer. Excess amounts of NH 3 are removed by purging with N 2 . Typically, total gas flows throughout the process are less than 20,000 seem. This results in the deposition of a silicon-nitrogen dielectric layer with an effective deposition rate of between 0.2 and 5.0 A per cycle. This sequence is repeated until the desired thickness of the silicon-nitrogen dielectric film is deposited. The wafer is then removed from the process chamber.
  • TSA and the nitrogen containing reactant precursors, such as NH 3 are conveyed together to the chamber, where they react and form the desired film on the surface of the wafer(s).
  • the flowrate of TSA is in the range of approximately 1 seem and 100 seem, and the flowrate of NH 3 is in the range of approximately 50 seem and 10,000 seem.
  • the deposition temperature is typically in the range of approximately 300 - 800 0 C, and preferably at 550 0 C and below.
  • This process sequence can be used to deposit high quality silicon-nitrogen dielectric films with a within-wafer uniformity of ⁇ 3% 3-sigma, a wafer-to-wafer uniformity of ⁇ 3% 3-sigma, a silicon to nitrogen ratio [Si:N] of between 0.65 and 0.85, and a refractive index of between 1.9 and 2.1.
  • the methods described herein may be carried out in either equipment platform, i.e. in either a single wafer thermal processing system or a batch thermal processing system.
  • TSA is used to deposit a silicon-oxygen containing dielectric film on a substrate or wafer.
  • the deposition may be accomplished using either ALD or CVD techniques.
  • the process chamber can be adapted to hold a single substrate or the process chamber can be adapted to hold a plurality of substrates.
  • the substrate is controlled to a desired temperature, typically 55O 0 C or less, and most preferably 400 0 C or less, and in some embodiments the temperature is in the range of approximately 150 - 550 0 C .
  • the pressure in the process chamber is controlled to a desired pressure, typically between 0.01 mTorr and 760 Torr, most preferably less than 10 Torr.
  • TSA precursor When depositing by ALD, TSA precursor is introduced into the process chamber and allowed to form a monolayer on the surface of the substrate(s). Excess amounts of TSA precursor are removed from the process chamber.
  • An oxygen containing reactant is introduced into the process chamber and allowed to react with the monolayer of TSA that was previously formed on the substrate(s). Examples of suitable oxygen containing reactants comprise oxygen (O 2 ), ozone (O 3 ), water vapor (H 2 O), hydrogen peroxide (H 2 O 2 ) and the like.
  • suitable oxygen containing reactants comprise oxygen (O 2 ), ozone (O 3 ), water vapor (H 2 O), hydrogen peroxide (H 2 O 2 ) and the like.
  • the reaction of the oxygen containing reactant with TSA forms a silicon-oxygen dielectric film on the substrate(s). Excess amounts of the oxygen containing reactant are removed from the process chamber.
  • the substrate is controlled at a deposition temperature, typically 55O 0 C or less, and most preferably 400 0 C or less, and in some embodiments the temperature is in the range of approximately 150 - 550 0 C .
  • TSA and an oxygen containing reactant precursor are conveyed to the chamber where the precursors react and form a silicon-oxygen film on the surface of the substrate. Deposition is carried out until the desired film thickness is achieved.
  • the precursor(s) may be conveyed to the substrate in a cross-flow manner, that is the precursor is injected near one peripheral region of the substrate, and flows across the surface of the substrate , where the precursor(s) then exits at an opposite peripheral region of the substrate.
  • a vertical furnace configured to hold a plurality of silicon wafers, such as 300mm wafers, deposit a silicon-oxygen containing dielectric film.
  • the wafers number between 1 and 100 for a single batch process, hi some embodiments the preferred vertical furnace technology includes the across-flow technology as described above.
  • the wafers are loaded into the furnace and the pressure is reduced to ⁇ 10,000 mTorr.
  • the temperature is controlled to between 100 0 C and 500 0 C.
  • TSA and an oxygen containing reactant precursor such as O 3 or O 2
  • the precursors react and form a silicon-oxygen film on the surface of the substrate.
  • the flowrate of TSA is typically between 1 seem and 100 seem, and the flow rate of O 3 or O 2 is in the range of about 500 seem and 10,000 seem. Deposition is carried out until the desired film thickness is achieved.
  • This process sequence can be used to deposit high quality silicon-oxygen dielectric films with a within- wafer uniformity of ⁇ 3% 3-sigma, a wafer-to-wafer uniformity of ⁇ 3% 3- sigma, a silicon to oxygen ratio [Si:O] of between 0.25 to 0.45, and a refractive index of between 1.40 and 1.50.
  • the process is initialed by flowing between 1 seem and 100 seem of "trisilylamine” (TSA) and allowed-to form a monolayer on the wafers. Excess amounts of TSA are removed by purging with N 2 . An oxygen containing reactant such as O 3 or O 2 is introduced to the process chamber by flowing between 50 seem and 10,000 seem of O 3 . The O 3 reacts with the monolayer of TSA to form a silicon-oxygen dielectric layer. Excess amounts of the O 3 are removed by purging with N 2 . Typically, total gas flows throughout the process are less than 20,000 seem. This results in the deposition of a silicon-oxygen dielectric layer with an effective deposition rate of between 0.2 and 5 A per cycle.
  • TSA trisilylamine
  • the precursor(s) may be conveyed to the substrate in a cross-flow manner, that is the precursor is injected near one peripheral region of the substrate, and flows across the surface of the substrate , where the precursor(s) then exits at an opposite peripheral region of the substrate.
  • a single wafer process chamber is used to hold a single silicon wafer, such as a 300mm wafer, to deposit a silicon-oxygen containing dielectric film on the surface of the wafer .
  • the wafer is loaded into the process chamber and the pressure is reduced to ⁇ 10,000 mTorr.
  • the temperature is controlled to between 100 0 C and 500 0 C.
  • TSA trisilylamine
  • Excess amounts of TSA are removed by purging with N 2 .
  • An oxygen containing reactant such as O 3 or O 2 is introduced to the process chamber by flowing between 50 seem and 1000 seem of O 3 .
  • the O 3 reacts with the monolayer of TSA to form a silicon-oxygen dielectric layer. Excess amounts of the O 3 are removed by purging with N 2 . Typically, total gas flows throughout the process are less than 20,000 seem. This results in the deposition of a silicon-oxygen dielectric layer with an effective deposition rate of between 0.2 and 5.0 A per cycle. This sequence is repeated until the desired thickness of the silicon-oxygen dielectric film is deposited. The wafer is removed from the process chamber. When depositing the silicon oxide film by CVD, TSA and an oxygen containing reactant precursor, such O 3 or O 2 , are conveyed to the chamber concurrently. The precursors react and form a silicon-oxygen film on the surface of the substrate.
  • an oxygen containing reactant precursor such O 3 or O 2
  • the flowrate of TSA is typically between 1 seem and 100 seem, and the flow rate of O 3 or O 2 is in the range of about 500 seem and 10,000 seem.
  • Deposition is carried out until the desired film thickness is achieved.
  • the precursor(s) may be conveyed to the substrate in a cross-flow manner, that is the precursor is injected near one peripheral region of the substrate, and flows across the surface of the substrate , where the precursor(s) then exits at an opposite peripheral region of the substrate.
  • TSA is used as a precursor to deposit a silicon-nitrogen-oxygen containing dielectric film on a substrate.
  • the deposition is accomplished using ALD .
  • the method may be carried out by CVD techniques.
  • the process chamber is adapted to hold a single substrate or the process chamber can be adapted to hold a plurality of substrates.
  • the substrate is controlled to a desired temperature, typically 55O 0 C or less, and most preferably 400 0 C or less.
  • the pressure in the process chamber is controlled to a desired pressure, typically between 0.01 mTorr and 760 Torr, most preferably less than 10 Torr.
  • TSA When depositing the silicon-nitrogen-oxygen film by CVD, TSA, and an oxygen/nitrogen containing reactant precursor are conveyed concurrently to the process chamber.
  • the reactants react and form a film on the surface of the substrate.
  • suitable oxygen and nitrogen containing reactants comprise nitrous oxide (N 2 O), nitric oxide (NO), nitrogen dioxide (NO 2 ), and the like.
  • NO nitrous oxide
  • NO 2 nitrogen dioxide
  • two separate compounds may provide the oxygen and nitrogen constituents.
  • Deposition is carried out until the desired film thickness is achieved.
  • TSA precursor is introduced into the process chamber and allowed to form a monolayer on the surface of the substrate(s). Excess amounts of TSA precursor are removed from the process chamber.
  • An oxygen and nitrogen containing reactant is introduced into the process chamber and allowed to react with the monolayer of TSA that was previously formed on the substrate(s).
  • suitable oxygen and nitrogen containing reactants comprise nitrous oxide (N 2 O), nitric oxide (NO), nitrogen dioxide (NO 2 ), and the like.
  • the reaction of the oxygen and nitrogen containing reactant with TSA forms a silicon-nitrogen-oxygen dielectric film on the substrate(s). Excess amounts of the oxygen and nitrogen containing reactant are removed from the process chamber. This sequence is repeated until the desired thickness of the silicon-nitrogen-oxygen dielectric material is deposited on the substrate(s).
  • a vertical furnace is used to hold a plurality of silicon wafers is used to form a silicon-nitrogen-oxygen containing dielectric film on the wafers.
  • the wafers number between 1 and 100 for a single batch process.
  • the preferred vertical furnace technology includes the beneficial "across-flow" technology as above.
  • the wafers are loaded into the furnace and the pressure is reduced to ⁇ 10,000 mTorr.
  • the temperature is controlled to between 100 0 C and 500 0 C.
  • ALD trisilylamine
  • the process is initialed by flowing between 1 seem and 100 seem of "trisilylamine" (TSA) and allowed to form a monolayer on the wafers. Excess amounts of TSA are removed by purging with N 2 .
  • a nitrogen-oxygen containing reactant such as N 2 O (or a mixture of reactants such as NH 3 and O 2 ) is introduced to the process chamber by flowing between 50 seem and 10,000 seem ofN 2 O.
  • the N 2 O reacts with the monolayer of TSA to form a silicon-nitrogen-oxygen dielectric layer. Excess amounts of the N 2 O are removed by purging with N 2 . Typically, total gas flows throughout the process are less than 20,000 seem. This results in the deposition of a silicon-nitrogen-oxygen dielectric layer with an effective deposition rate of between 0.2 and 5.0 A per cycle. This sequence is repeated until the desired thickness of the silicon-nitrogen-oxygen dielectric film is deposited. The pressure in the process chamber is then increased to one atmosphere and the wafers are removed from the process chamber.
  • a single wafer process chamber is used to hold a single silicon wafer to form a silicon-nitrogen-oxygen containing dielectric film on the surface of the wafer.
  • the wafer is loaded into the process chamber and the pressure is reduced to ⁇ 10,000 mTorr.
  • the temperature is controlled to between 100 0 C and 500 0 C.
  • TSA trisilylamine
  • a nitrogen-oxygen containing reactant such as N 2 O (or a mixture of reactants such as NH 3 and O 2 is introduced to the process chamber by flowing between 50 seem and 1000 seem of N 2 O.
  • the N 2 O reacts with the monolayer of TSA to form a silicon-nitrogen-oxygen dielectric layer. Excess amounts of the N 2 O are removed by purging with N 2 . Typically, total gas flows throughout the process are less than 20,000 seem.
  • a nitrogen containing reactant such as NH 3 OrN 2 O is introduced into the process chamber by flowing between 50 seem and 10,000 seem OfNH 3 .
  • the NH 3 reacts with the monolayer of TSA to form a silicon-nitrogen dielectric layer.
  • Excess amounts of the NH 3 are removed by purging with N 2 . If the two reactants are introduced sequentially, either the oxygen containing or nitrogen containing reactant may be introduced first. This sequence is repeated until the desired thickness of the silicon- nitrogen-oxygen dielectric film is deposited. The wafer is removed from the process chamber.
  • TSA precursor is introduced into the process chamber sequentially or concurrently with a separate oxygen containing reactant and a nitrogen containing reactant, depending upon whether the process is carried out by CVD or ALD.
  • CVD deposition is started by conveying TSA , and oxygen containing reactant, and a nitrogen containing reactant, all to the process chamber.
  • the reactants all react and form a layer of silicon-oxygen-nitrogen on the surface of the substrate.
  • Suitable oxygen reactants include O 3 .
  • Suitable nitrogen reactants include NH 3 and N 2 O. Deposition continues until the desired thickness of the film is achieved.
  • This process sequence can be used to deposit high quality silicon-nitrogen-oxygen dielectric films with a within-wafer uniformity of ⁇ 3% 3- sigma, a wafer-to-wafer uniformity of ⁇ 3% 3-sigma, a silicon to nitrogen to oxygen ratio [Si:N:O] of about 1:1:1, and a refractive index of between 1.40 and 1.70.
  • suitable oxygen containing reactants comprise oxygen (O 2 ), ozone (O 3 ), water vapor (H 2 O), nitrous oxide (N 2 O), nitric oxide (NO), nitrogen dioxide (NO 2 ), and the like.
  • suitable nitrogen containing reactants comprise ammonia (NH 3 ), hydrazine (N 2 H 4 ), nitrous oxide (N 2 O), nitric oxide (NO), nitrogen dioxide (NO 2 ), and the like.
  • the reaction of the oxygen containing reactant and the nitrogen containing reactant with the TSA forms a silicon-nitrogen-oxygen dielectric film on the substrate(s). This is carried out until the desired thickness of the silicon-nitrogen-oxygen dielectric material is deposited on the substrate(s).
  • the precursor(s) may be conveyed to the substrate in a cross-flow manner, that is the precursor is injected near one peripheral region of the substrate, and flows across the surface of the substrate , where the precursor(s) then exits at an opposite peripheral region of the substrate.
  • FIG. 6 is a graph illustrating the deposition rate and within-wafer uniformity (WIWNU) as a function of deposition temperature for silicon oxide films deposited by CVD in a single wafer thermal processing apparatus according to some embodiments of the method of the present invention.
  • the method was carried out using TSA flowrate of 11 seem and an oxygen flowrate of 200 seem.
  • the pressure was maintained at 7 Torr.
  • high deposition rates of greater than 180 A/min are achieved at temperatures below 500 0 C, while the films exhibit good quality uniformity.
  • FIG. 7 is a graph showing certain properties for silicon nitride films deposited by CVD in a batch thermal processing apparatus according to different embodiments of the present invention. Silicon nitride deposition rate as a function of deposition temperature for silicon nitride films deposited in a batch thermal processing apparatus is shown on the far left of the graph. These results are compared to deposition carried out with other precursors, namely BTBAS, HCD and DCS.

Landscapes

  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Vapour Deposition (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

Methods for forming silicon containing films using silylamine moieties are disclosed. In some embodiments, silylamine moieties are employed to deposit silicon-nitrogen, silicon-oxygen, or silicon-nitrogen-oxygen materials at temperatures of less than 550°C. In some embodiments methods are practiced within process chambers adapted to contain a single substrate as well as within process chambers adapted to contain a plurality of substrates, where the silylamine moieties are conveyed to the chambers in across flow type manner.

Description

METHOD FOR DEPOSITING SILICON-CONTAINING FILMS
Inventor(s) = Yoshikazu Okyama, Jon S. Owyang, Helmuth Treichel
Cross Reference To Related Applications
This application claims the benefit of, and priority to, of United States Provisional Patent Application Serial no. 60/697,763 filed on July 8, 2005, entitled "Method for Depositing Silicon-Containing Films Using ALD" the entire disclosure of which is incorporated herein by reference.
Field of the Invention
The present invention relates generally to methods for depositing silicon containing films on the surface of a substrate. Such silicon-containing films comprise silicon-nitrogen, silicon-oxygen, and silicon-nitrogen-oxygen dielectric materials used in the processing of semiconductors. More specifically, embodiments of the present invention provide use of silylamine moieties in the deposition of the silicon containing films carried out at low temperatures, preferably less than approximately 55O0C. Background of the Invention
Silicon nitride, silicon dioxide, and silicon oxynitride are dielectric materials widely used in the manufacture of semiconductor devices. These films are typically deposited from silicon sources such as silane (SiH4), disilane (Si2H6), dichlorosilane (DCS) (SiCl2H2), and others with various reactant sources such as ammonia (NH3), oxygen (O2), ozone (O3), nitrous oxide (N2O), nitrogen dioxide (NO2), nitric oxide (NO), and others depending on the desired material composition. The deposition temperatures of these processes are typically greater than 6000C. The high speed requirements of advanced semiconductor devices dictate that the overall thermal budget of the device manufacture be lowered. Several new silicon precursors have been developed to address the need for lower temperature dielectric deposition. Silicon tetraiodide can be used to deposit silicon nitride at temperatures between 4000C and 5000C. However, this precursor is a solid at room temperature and produces a by-product OfNH4I that condenses on cool surfaces and causes particle problems. Hexachlorodisilane (HCD) (Si2Cl6) can be used to form silicon nitride below 600 0C, however, this precursor produces a by-product OfNH4Cl that condenses on cool surfaces and causes particle problems. Finally, an aminosilane compound such as bis(t-butylamino silane) (BTBAS) (SiC8N2H22) is a halogen-free precursor that can be reacted with O2, N2O, or NH3 to form the various dielectric materials of interest, but only at temperatures greater than about 5500C. Generally, materials formed with this precursor are not of sufficient quality for wide use in the manufacture of semiconductor devices. It is clear that the development of a new precursor and method for depositing dielectric materials at a low temperature without the problems of forming condensable by-products and incorporation of unwanted moieties into the film is desired.
New classes of precursors have been investigated including aminosilanes, silazanes, silyl alkyl compounds. However, these precursors contain carbon moieties that can incorporate carbon into the deposited material and degrade the dielectric properties of the film. Also, other classes of precursors have been investigated including silylamines using thermal chemical vapor deposition (CVD) techniques. Since the silylamines do not contain carbon, their dielectric properties are superior to the various aminosilanes referenced above. However, the CVD techniques were practical only at process temperatures of greater than 55O0C, and the resultant silicon containing films are of poor quality. It is clear that the development of a method for depositing dielectric materials at a low temperature (for example <5500C) is desired.
Brief Summary of the Invention hi general, the inventors have discovered methods that provide for the deposition of silicon containing dielectric materials. The dielectric materials will find uses in the manufacture of semiconductor structures such as spacers, etch stops, hard masks, gates dielectrics, capacitor dielectrics, and the like. The methods provide for the deposition of the dielectric materials using silylamine precursors at low temperatures.
In some embodiments of the present invention, the inventors have discovered methods that provide for the deposition of a silicon-nitrogen dielectric material (such as silicon nitride) by reacting a silylamine precursor with a nitrogen containing reactant at a temperature of equal to or less than 55O0C. The methods are practiced within process chambers adapted to contain a single substrate as well as within process chambers adapted to contain a plurality of substrates, and are carried out using chemical vapor deposition (CVD) techniques, and in an alternative embodiment by atomic layer deposition (ALD) techniques.
In other embodiments of the present invention, the inventors have discovered methods that provide for the deposition of a silicon-oxygen dielectric material (such as silicon dioxide) by reacting a silylamine precursor with an oxygen containing reactant at a temperature of equal to or less than 55O0C. The methods are practiced within process chambers adapted to contain a single substrate as well as within process chambers adapted to contain a plurality of substrates, and are carried out using chemical vapor deposition (CVD) techniques, and in an alternative embodiment by atomic layer deposition (ALD) techniques.
In yet other embodiments of the present invention, the inventors have discovered methods that provide for the deposition of a silicon-nitrogen-oxygen dielectric material (such as silicon oxynitride) by reacting a silylamine precursor with an oxygen containing reactant and a nitrogen containing reactant at a process temperature of equal to or less than 55O0C. The methods are practiced within process cnamoers adapted to contain a single substrate as well as within process chambers adapted to contain a plurality of substrates and are carried out using chemical vapor deposition (CVD) techniques, and in an alternative embodiment by atomic layer deposition (ALD) techniques.
In another aspect, methods of forming a silicon containing film on the surface of one or more substrates are provided, characterized in that: a silylamine moiety and one or more reactant precursors are reacted in a process chamber by flowing the silylamine moiety and the one or more reactant precursors, either concurrently or sequentially, across a top surface of the one or more substrates to form a film thereon.
Brief Description of the Drawings
These and various other features and advantages of the present invention will be apparent upon reading of the following detailed description in conjunction with the accompanying drawings and the appended claims provided below, where:
FIG. 1 is a cross-sectional view of one example of a vertical batch thermal processing system having across-flow injector system which may be employed to carry out methods according to some embodiments of the present invention;
FIG. 2 illustrates a cross-sectional side view of a portion of the thermal processing system of FIG. 1 showing positions of injector orifices in relation to the liner and of exhaust slots in relation to the wafers according to some embodiments of the present invention;
FIG. 3 is a plan view of a portion of the thermal processing system of FIG. 1 taken along the line A-A of FIG. 1 showing gas flow from orifices of a primary and a secondary injector across a wafer and to an exhaust port according to some exemplary embodiments of the present invention;
FIG. 4 depicts a plan view of a portion of the thermal processing system of FIG. 1 taken along the line A-A of FIG. 1 showing gas flow from orifices of a primary and a secondary injector across a wafer and to an exhaust port according to other embodiments of the present invention;
FIG. 5 is a plan view of a portion of the thermal processing system of FIG. 1 taken along the line A-A of FIG. 1 showing gas flow from orifices of a primary and a secondary injector across a wafer and to an exhaust port according to yet another embodiment of the present invention;
FIG. 6 illustrates deposition rate and WIWNU as a function of deposition temperature for oxide films deposited in a single wafer thermal processing apparatus by chemical vapor deposition according to embodiments of the present invention; and
FIG. 7 depicts silicon nitride deposition rate as a function of deposition temperature for silicon nitride films deposited in a batch thermal processing apparatus by chemical vapor deposition according to embodiments of the present invention.
Detailed Description of the Invention
In general, the inventors have discovered methods that provide for the deposition of silicon containing dielectric materials. The dielectric materials will find uses in the manufacture of semiconductor structures such as spacers, etch stops, hard masks, gates dielectrics, capacitor dielectrics, and the like. In some embodiments the methods provide for the deposition of the dielectric materials using silylamine precursors by chemical vapor deposition (CVD) . hi alternative embodiments, atomic layer deposition (ALD) is used. In one embodiment of the present invention, a first class of the silylamines has the general formula:
HmN(SiH3)n where n is an integer from 1 to 3 and m is equal to 3 — n. hi another embodiment, silylamine precursors are provided having the general formula:
HmN(Si2H5)n where n is an integer from 1 to 3 and m is equal to 3 - n. hi the present invention, the term "silylamine(s)" will be understood to include all members of both classes of these compounds.
In a general embodiment of the present invention, silylamine is used as a precursor to deposit a silicon containing dielectric film on a substrate. In some embodiments, silicon oxide films are formed with silylamine precursors of the above formulas, by chemical vapor deposition or atomic vapor deposition, said deposition processes being carried out at a deposition temperature in the range of approximately 150 - 550 0C. hi other embodiments the deposition temperature is in the range of approximately 150 - 450 0C. In additional embodiments , the deposition temperature is in the range of approximately 500 - 520 0C.
In other embodiments, silicon nitride films are formed with silylamine precursors of the above formulas, by chemical vapor deposition or atomic layer deposition, said deposition processes being carried out at a deposition temperature in the range of approximately 300 - 8000C, and preferably at 550 0C and below. In other embodiments the deposition temperature is in the range of approximately 500 - 520 0C.
Li some embodiments, deposition is carried out using chemical vapor deposition (CVD) techniques. A process chamber is provided that is adapted to hold at least one substrate. Silylamine is used as a precursor to deposit a silicon containing dielectric film on the substrate(s). During CVD, silylamine and other reactant precursors are injected together into a chamber, where the precursors react and form a film or layer of desired material on the surface of one or more substrates. During deposition the substrate(s) is controlled to a desired temperature, typically 55O0C or less, and the pressure in the process chamber is controlled to a desired pressure, typically between 0.01 mTorr and 760 Torr. The reaction of the reactant precursors with the silylamine forms a silicon-nitrogen, silicon-oxygen, silicon-nitrogen-oxygen film, or the like on the substrate(s) depending on the chemical nature of the reactant(s). Examples of suitable reactant precursors for reaction with the silylamine precursor include, but are not limited to: ammonia (NH3), hydrazine (N2H4), water vapor (H2O), oxygen (O2), ozone (O3), nitrous oxide (N2O), nitric oxide (NO), nitrogen dioxide (NO2), and the like.
In other embodiments deposition is carried out using atomic layer deposition (ALD) techniques. A process chamber is provided that is adapted to hold at least one substrate. The substrate is controlled to a desired temperature, typically 55O0C or less, and the pressure in the process chamber is controlled to a desired pressure, typically between 0.01 mTorr and 760 Torr. The silylamine precursor is introduced into the process chamber and allowed to form a monolayer on the surface of the substrate(s). Excess amounts of the silylamine are removed from the process chamber. One or more reactants are then introduced into the process chamber either sequentially or simultaneously and allowed to react with the monolayer of the silylamine that was previously formed on the substrate(s). Films are formed comprised of silicon- nitrogen, silicon-oxygen, or silicon-nitrogen-oxygen film on the substrate(s) depending on the chemical nature of the reactant(s). Excess amounts of the reactant(s) are removed from the process chamber. This sequence is repeated until the desired thickness of the dielectric material is deposited on the substrate(s). Examples of suitable reactants include, but are not limited to: ammonia (NH3), hydrazine (N2H4), water vapor (H2O), oxygen (O2), ozone (O3), nitrous oxide (N2O), nitric oxide (NO), nitrogen dioxide (NO2), and the like. hi one embodiment of the present invention, a silylamine such as N(SiH3)3 designated as "trisilylamine" (TSA) is used as a precursor to deposit a silicon-nitrogen containing dielectric film on a substrate. In this embodiment, the process chamber is adapted to hold a single substrate. The substrate is controlled to a desired temperature, typically 55O0C or less, and most preferably 4000C or less. The pressure in the process chamber is controlled to a desired pressure, typically between 0.01 mTorr and 760 Torr, most preferably less than 10 Torr. In an ALD embodiment, TSA precursor is introduced into the process chamber and allowed to form a monolayer on the surface of the substrate(s). Excess amounts of TSA precursor are removed from the process chamber. A nitrogen containing reactant is conveyed into the process chamber and allowed to react with the monolayer of the TSA that was previously formed on the substrate(s). TMs sequence is repeated until the desired thickness of the silicon-nitrogen dielectric material is deposited on the substrate(s). In a CVD embodiment, TSA precursor and the nitrogen containing reactant are conveyed to the process chamber concurrently. Examples of suitable nitrogen containing reactants comprise ammonia (NH3), hydrazine (N2H4), azides, and the like. The reaction of the nitrogen containing reactant with TSA forms a silicon-nitrogen dielectric film on the substrate(s).
An alternative embodiment to deposit a silicon-nitrogen containing dielectric film on a substrate is illustrated. A vertical furnace is used to hold a plurality of silicon wafers, preferably 300 mm wafers. Typically the wafers number between 1 and 100 for a single batch process. One embodiment of a preferred vertical batch thermal processing furnace technology includes "across-flow" technology as described in detail in U.S. patent application serial nos. 10/521,619 and 10/946,849 which are hereby incorporated by reference in their entirety. The wafers are loaded into the furnace and the pressure is reduced to <10,000 mTorr, preferably between 500 and 5000 mTorr. The temperature is controlled to between 1000C and 55O0C. This embodiment of the method may be carried out using CVD, or ALD techniques.
When using a CVD process, deposition is initiated by conveying to the process chamber TSA and a nitrogen containing reactant, such as NH3. The flowrate of TSA is in the range of approximately 1 seem and 100 seem, and the flowrate of NH3 is in the range of approximately 50 seem and 10,000 seem. TSA and NH3 react and form a layer of silicon nitride on the surface of one or more substrates. The CVD process is carried out until a desired thickness of the film is achieved. This process sequence can be used to deposit high quality silicon-nitrogen dielectric films with a within-wafer uniformity of <3.0% 3-sigma, a wafer-to-wafer uniformity of <3.0% 3- sigma, a silicon to nitrogen ratio [Si:N] of between 0.65 and 0.85, and a refractive index of between 1.9 and 2.1.
When using an ALD process, deposition is initialed by flowing between 1 seem and 100 seem of "trisilylamine" (TSA) and allowed to form a monolayer on the wafers. Excess amounts of TSA are removed by purging with N2. A nitrogen containing reactant such as NH3 is introduced to the process chamber by flowing between 50 seem and 10,000 seem OfNH3. The NH3 reacts with the monolayer of TSA to form a silicon-nitrogen dielectric layer. Excess amounts of the NH3 are removed by purging with N2. Typically, total gas flows throughout the process are less than 20,000 seem. This results in the deposition of a silicon-nitrogen dielectric layer with an effective deposition rate of between 0.2 and 5.0 A per cycle. This sequence is repeated until the desired thickness of the silicon-nitrogen dielectric film is deposited. The pressure in the process chamber is then increased to one atmosphere and the wafers are removed from the process chamber.
Referring to FIGs. 1 to 5, one embodiment of a vertical batch thermal processing system 100 is shown which may be used to carry out embodiments of the present invention. Of particular advantage, the system 100 provides for delivering precursors in an "across-flow" manner according to embodiments of the present invention. Conveying the precursor(s) to the substrate(s) in a cross-flow manner generally comprises injecting precursor(s) near one peripheral region of the substrate, and flowing the precursor(s) across the surface of the substrate , where the precursor(s) then exits at an opposite peripheral region of the substrate. The batch thermal system 100 may be operated in CVD or ALD mode, and thus may be utilized for these two different embodiments of the present invention. In general, the system 100 generally comprises a vessel 101 that encloses a volume to form a process chamber 102 having a support 104 adapted for receiving a carrier or boat 106 with a batch of wafers 108 held therein, and heat source or furnace 110 having a number of heating elements 112-1, 112-2 and 112-3 (referred to collectively hereinafter as heating elements 112) for raising the temperature of the wafers to the desired deposition temperature for thermal processing. The thermal processing system 100 typically includes one or more injectors for conveying a fluid, such as a gas or vapor, into the process chamber 102 for processing and/or cooling the wafers 108, and one or more purge ports or vents for conveying a gas to purge the process chamber and/or to cool the wafers. A liner 120 may be used to increase the concentration of processing gas or vapor near the wafers 108 in a region or process zone in which the wafers are processed, and reduces contamination of the wafers from flaking or peeling of deposits that can form on interior surfaces of the process chamber 102. Processing gas or vapor exits the process zone through exhaust ports or slots 182 in the chamber liner 120.
In some embodiments, of particular advantage, injectors 216 are used in the thermal processing system 100. The injectors 116 are distributive or across(X)-flow injectors in which reactant precursors or other gas or vapor is introduced through injector openings or orifices 180 on one side of the wafers 108 and boat 106 and caused to flow across the surfaces of the wafers in a laminar flow type manner to exit exhaust ports or slots 182 in the chamber line 120 on opposite the side.
Additionally, X-flow injectors 116 can serve other purposes, including the injection of gases for cool-down (e.g., helium, nitrogen, hydrogen) for forced convective cooling between the wafers 108. Use of X-flow injectors 116 results in a more uniform cooling between wafers 108 whether disposed at the bottom or top of the stack or batch and those wafers that are disposed in the middle, as compared with earlier up-flow or down flow configurations. Preferably, the injector orifices 180 are sized, shaped and position to provide a spray pattern that promotes forced convective cooling between the wafers 108 in a manner that does not create a large temperature gradient across the wafer. FIG. 2 is a cross-sectional side view of a portion of the thermal processing system 100 of FIG. 1 showing illustrative portions of the injector orifices 180 in relation to the chamber liner 120 and the exhaust slots 182 in relation to the wafers 108.
FIG. 3 is a plan view of a portion of the thermal processing apparatus 100 of FIG. 1 taken along the line A-A of FIG. 1. hi this embodiment the injector 116 is comprised of primary and secondary injectors. FIG 3 illustrates laminar gas flow from orifices 180-1 and 180-2 of primary and secondary injectors 184, 186 respectively, across an illustrative one of the wafers 108 and to exhaust slots 182-1 and 182-2. It should be noted that the position of the exhaust slot 182 as shown in FIG. 1 have been shifted from the position of exhaust slots 182-1 and 182-2 shown in FIG. 3 to allow illustration of the exhaust slot and injector 116 in a single a cross- sectional view of a thermal processing apparatus. It should also be noted that the dimensions of the injectors 184, 186, and the exhaust slots 182-1 and 182-2 relative to the wafer 108 and the chamber liner 120 have been exaggerated to more clearly illustrate the gas flow from the injectors to the exhaust slots.
Also as shown in FIG. 3, the process gas or vapor is initially directed away from the wafers 108 and toward the liner 120 to promote mixing of the process gas or vapor before it reaches the wafers. This configuration of orifices 180-1 and 180-2 is particularly useful for processes or recipes in which different reactants are introduced from each of the primary and secondary injectors 184, 186, for example to form a multi-component film or layer.
FIG. 4 is another plan view of a portion of the thermal processing system 100 of FIG. 1 taken along the line A-A of FIG. 1 showing an alternative gas flow path from the orifices 180 of the primary and secondary injector 184, 186, across an illustrative on of the wafer 108 and to the exhaust slots 182 according to another embodiment.
FIG. 5 is another plan view of a portion of the thermal processing system 100 of FIG. 1 taken along the line A-A of FIG. 1 showing an alternative gas flow path from the orifices 180 of the primary and secondary injector 184, 186, across an illustrative on of the wafer 108 and to the exhaust slots 182 according to yet another embodiment. Thus, as will be appreciated by those of ordinary skill in the art, a variety of gas flow paths may be achieved within the teaching of embodiments of the present invention. Additionally, while injector 116 is shown comprised of primary and secondary injectors 184 and 186, injector 116 maybe comprised of a single injection tube.
While the across flow technology is described with reference to a batch vertical furnace, it is to be understood that the across flow technology can be practiced in a single wafer system as well, hi such a system, the precursors are conveyed in across-flow type manner over the top surface of the single substrate. Embodiments of the method described herein in a single wafer system may be carried out in such across flow manner.
Methods are also carried out in a single wafer thermal processing system to deposit a silicon-nitrogen containing dielectric film on a wafer. Typically, the system comprises a single wafer process chamber used to support a single silicon wafer, such as a 300mm substrate. The wafer is loaded into the process chamber and the pressure is reduced to <10,000 mTorr. The temperature is controlled to between 1000C and 5000C. hi this embodiment, an ALD process is employed and is initialed by flowing between 1 and 50 seem of "trisilylamine" (TSA) and allowed to form a monolayer on the wafer. Excess amounts of TSA are removed by purging with N2. A nitrogen containing reactant such as NH3 is introduced to the process chamber by flowing between 50 seem and 1000 seem of NH3. The NH3 reacts with the monolayer of TSA to form a silicon-nitrogen dielectric layer. Excess amounts of NH3 are removed by purging with N2. Typically, total gas flows throughout the process are less than 20,000 seem. This results in the deposition of a silicon-nitrogen dielectric layer with an effective deposition rate of between 0.2 and 5.0 A per cycle. This sequence is repeated until the desired thickness of the silicon-nitrogen dielectric film is deposited. The wafer is then removed from the process chamber.
Alternatively, the above methods are carried out using chemical vapor deposition, hi this embodiment, TSA and the nitrogen containing reactant precursors, such as NH3, are conveyed together to the chamber, where they react and form the desired film on the surface of the wafer(s). The flowrate of TSA is in the range of approximately 1 seem and 100 seem, and the flowrate of NH3 is in the range of approximately 50 seem and 10,000 seem. The deposition temperature is typically in the range of approximately 300 - 800 0C, and preferably at 550 0C and below. This process sequence can be used to deposit high quality silicon-nitrogen dielectric films with a within-wafer uniformity of <3% 3-sigma, a wafer-to-wafer uniformity of <3% 3-sigma, a silicon to nitrogen ratio [Si:N] of between 0.65 and 0.85, and a refractive index of between 1.9 and 2.1.
The methods described herein may be carried out in either equipment platform, i.e. in either a single wafer thermal processing system or a batch thermal processing system.
In another embodiment of the present invention TSA is used to deposit a silicon-oxygen containing dielectric film on a substrate or wafer. The deposition may be accomplished using either ALD or CVD techniques. The process chamber can be adapted to hold a single substrate or the process chamber can be adapted to hold a plurality of substrates. The substrate is controlled to a desired temperature, typically 55O0C or less, and most preferably 4000C or less, and in some embodiments the temperature is in the range of approximately 150 - 550 0C . The pressure in the process chamber is controlled to a desired pressure, typically between 0.01 mTorr and 760 Torr, most preferably less than 10 Torr. When depositing by ALD, TSA precursor is introduced into the process chamber and allowed to form a monolayer on the surface of the substrate(s). Excess amounts of TSA precursor are removed from the process chamber. An oxygen containing reactant is introduced into the process chamber and allowed to react with the monolayer of TSA that was previously formed on the substrate(s). Examples of suitable oxygen containing reactants comprise oxygen (O2), ozone (O3), water vapor (H2O), hydrogen peroxide (H2O2) and the like. The reaction of the oxygen containing reactant with TSA forms a silicon-oxygen dielectric film on the substrate(s). Excess amounts of the oxygen containing reactant are removed from the process chamber. This sequence is repeated until the desired thickness of the silicon-oxygen dielectric material is deposited on the substrate(s). When depositing the silicon oxide film by CVD, the substrate is controlled at a deposition temperature, typically 55O0C or less, and most preferably 4000C or less, and in some embodiments the temperature is in the range of approximately 150 - 550 0C . TSA and an oxygen containing reactant precursor are conveyed to the chamber where the precursors react and form a silicon-oxygen film on the surface of the substrate. Deposition is carried out until the desired film thickness is achieved. In either embodiment, the precursor(s) may be conveyed to the substrate in a cross-flow manner, that is the precursor is injected near one peripheral region of the substrate, and flows across the surface of the substrate , where the precursor(s) then exits at an opposite peripheral region of the substrate. hi another example, a vertical furnace configured to hold a plurality of silicon wafers, such as 300mm wafers, deposit a silicon-oxygen containing dielectric film. Typically the wafers number between 1 and 100 for a single batch process, hi some embodiments the preferred vertical furnace technology includes the across-flow technology as described above. The wafers are loaded into the furnace and the pressure is reduced to <10,000 mTorr. The temperature is controlled to between 1000C and 5000C. When depositing the silicon oxide film by CVD, TSA and an oxygen containing reactant precursor, such O3 or O2 , are conveyed to the chamber concurrently. The precursors react and form a silicon-oxygen film on the surface of the substrate. The flowrate of TSA is typically between 1 seem and 100 seem, and the flow rate of O3 or O2 is in the range of about 500 seem and 10,000 seem. Deposition is carried out until the desired film thickness is achieved. This process sequence can be used to deposit high quality silicon-oxygen dielectric films with a within- wafer uniformity of <3% 3-sigma, a wafer-to-wafer uniformity of <3% 3- sigma, a silicon to oxygen ratio [Si:O] of between 0.25 to 0.45, and a refractive index of between 1.40 and 1.50.
When employing ALD, the process is initialed by flowing between 1 seem and 100 seem of "trisilylamine" (TSA) and allowed-to form a monolayer on the wafers. Excess amounts of TSA are removed by purging with N2. An oxygen containing reactant such as O3 or O2 is introduced to the process chamber by flowing between 50 seem and 10,000 seem of O3. The O3 reacts with the monolayer of TSA to form a silicon-oxygen dielectric layer. Excess amounts of the O3 are removed by purging with N2. Typically, total gas flows throughout the process are less than 20,000 seem. This results in the deposition of a silicon-oxygen dielectric layer with an effective deposition rate of between 0.2 and 5 A per cycle. This sequence is repeated until the desired thickness of the silicon-oxygen dielectric film is deposited. The pressure in the process chamber is then increased to one atmosphere and the wafers are removed from the process chamber. In either embodiments the precursor(s) may be conveyed to the substrate in a cross-flow manner, that is the precursor is injected near one peripheral region of the substrate, and flows across the surface of the substrate , where the precursor(s) then exits at an opposite peripheral region of the substrate.
In further examples a single wafer process chamber is used to hold a single silicon wafer, such as a 300mm wafer, to deposit a silicon-oxygen containing dielectric film on the surface of the wafer . The wafer is loaded into the process chamber and the pressure is reduced to <10,000 mTorr. The temperature is controlled to between 1000C and 5000C. When using ALD, the process is initialed by flowing between 1 seem and 50 seem of "trisilylamine" (TSA) and allowed to form a monolayer on the wafer. Excess amounts of TSA are removed by purging with N2. An oxygen containing reactant such as O3 or O2 is introduced to the process chamber by flowing between 50 seem and 1000 seem of O3. The O3 reacts with the monolayer of TSA to form a silicon-oxygen dielectric layer. Excess amounts of the O3 are removed by purging with N2. Typically, total gas flows throughout the process are less than 20,000 seem. This results in the deposition of a silicon-oxygen dielectric layer with an effective deposition rate of between 0.2 and 5.0 A per cycle. This sequence is repeated until the desired thickness of the silicon-oxygen dielectric film is deposited. The wafer is removed from the process chamber. When depositing the silicon oxide film by CVD, TSA and an oxygen containing reactant precursor, such O3 or O2 , are conveyed to the chamber concurrently. The precursors react and form a silicon-oxygen film on the surface of the substrate. The flowrate of TSA is typically between 1 seem and 100 seem, and the flow rate of O3 or O2 is in the range of about 500 seem and 10,000 seem. Deposition is carried out until the desired film thickness is achieved. In either process, the precursor(s) may be conveyed to the substrate in a cross-flow manner, that is the precursor is injected near one peripheral region of the substrate, and flows across the surface of the substrate , where the precursor(s) then exits at an opposite peripheral region of the substrate.
In another embodiment of the present invention, TSA is used as a precursor to deposit a silicon-nitrogen-oxygen containing dielectric film on a substrate. In one embodiment, the deposition is accomplished using ALD . Alternatively, the method may be carried out by CVD techniques. The process chamber is adapted to hold a single substrate or the process chamber can be adapted to hold a plurality of substrates. The substrate is controlled to a desired temperature, typically 55O0C or less, and most preferably 4000C or less. The pressure in the process chamber is controlled to a desired pressure, typically between 0.01 mTorr and 760 Torr, most preferably less than 10 Torr. When depositing the silicon-nitrogen-oxygen film by CVD, TSA, and an oxygen/nitrogen containing reactant precursor are conveyed concurrently to the process chamber. The reactants react and form a film on the surface of the substrate. Examples of suitable oxygen and nitrogen containing reactants comprise nitrous oxide (N2O), nitric oxide (NO), nitrogen dioxide (NO2), and the like. Alternatively, two separate compounds may provide the oxygen and nitrogen constituents. Deposition is carried out until the desired film thickness is achieved. hi an ALD embodiment, TSA precursor is introduced into the process chamber and allowed to form a monolayer on the surface of the substrate(s). Excess amounts of TSA precursor are removed from the process chamber. An oxygen and nitrogen containing reactant is introduced into the process chamber and allowed to react with the monolayer of TSA that was previously formed on the substrate(s). Examples of suitable oxygen and nitrogen containing reactants comprise nitrous oxide (N2O), nitric oxide (NO), nitrogen dioxide (NO2), and the like. The reaction of the oxygen and nitrogen containing reactant with TSA forms a silicon-nitrogen-oxygen dielectric film on the substrate(s). Excess amounts of the oxygen and nitrogen containing reactant are removed from the process chamber. This sequence is repeated until the desired thickness of the silicon-nitrogen-oxygen dielectric material is deposited on the substrate(s). hi other embodiments, a vertical furnace is used to hold a plurality of silicon wafers is used to form a silicon-nitrogen-oxygen containing dielectric film on the wafers. Typically the wafers number between 1 and 100 for a single batch process. In some embodiments the preferred vertical furnace technology includes the beneficial "across-flow" technology as above. The wafers are loaded into the furnace and the pressure is reduced to <10,000 mTorr. The temperature is controlled to between 1000C and 5000C. When using ALD to deposit the film, the process is initialed by flowing between 1 seem and 100 seem of "trisilylamine" (TSA) and allowed to form a monolayer on the wafers. Excess amounts of TSA are removed by purging with N2. A nitrogen-oxygen containing reactant such as N2O (or a mixture of reactants such as NH3 and O2) is introduced to the process chamber by flowing between 50 seem and 10,000 seem ofN2O. The N2O reacts with the monolayer of TSA to form a silicon-nitrogen-oxygen dielectric layer. Excess amounts of the N2O are removed by purging with N2. Typically, total gas flows throughout the process are less than 20,000 seem. This results in the deposition of a silicon-nitrogen-oxygen dielectric layer with an effective deposition rate of between 0.2 and 5.0 A per cycle. This sequence is repeated until the desired thickness of the silicon-nitrogen-oxygen dielectric film is deposited. The pressure in the process chamber is then increased to one atmosphere and the wafers are removed from the process chamber.
Alternatively, a single wafer process chamber is used to hold a single silicon wafer to form a silicon-nitrogen-oxygen containing dielectric film on the surface of the wafer. The wafer is loaded into the process chamber and the pressure is reduced to <10,000 mTorr. The temperature is controlled to between 1000C and 5000C. When employing ALD, the process is initialed by flowing between 1 seem and 50 seem of "trisilylamine" (TSA) and allowed to form a monolayer on the wafer. Excess amounts of TSA are removed by purging with N2. A nitrogen-oxygen containing reactant such as N2O (or a mixture of reactants such as NH3 and O2 is introduced to the process chamber by flowing between 50 seem and 1000 seem of N2O. The N2O reacts with the monolayer of TSA to form a silicon-nitrogen-oxygen dielectric layer. Excess amounts of the N2O are removed by purging with N2. Typically, total gas flows throughout the process are less than 20,000 seem. Alternatively either simultaneously or sequentially with the oxygen containing reactant, a nitrogen containing reactant such as NH3 OrN2O is introduced into the process chamber by flowing between 50 seem and 10,000 seem OfNH3. The NH3 reacts with the monolayer of TSA to form a silicon-nitrogen dielectric layer. Excess amounts of the NH3 are removed by purging with N2. If the two reactants are introduced sequentially, either the oxygen containing or nitrogen containing reactant may be introduced first. This sequence is repeated until the desired thickness of the silicon- nitrogen-oxygen dielectric film is deposited. The wafer is removed from the process chamber.
In an alternative embodiment TSA precursor is introduced into the process chamber sequentially or concurrently with a separate oxygen containing reactant and a nitrogen containing reactant, depending upon whether the process is carried out by CVD or ALD. When employing CVD, deposition is started by conveying TSA , and oxygen containing reactant, and a nitrogen containing reactant, all to the process chamber. The reactants all react and form a layer of silicon-oxygen-nitrogen on the surface of the substrate. Suitable oxygen reactants include O3. Suitable nitrogen reactants include NH3 and N2O. Deposition continues until the desired thickness of the film is achieved. This process sequence can be used to deposit high quality silicon-nitrogen-oxygen dielectric films with a within-wafer uniformity of <3% 3- sigma, a wafer-to-wafer uniformity of <3% 3-sigma, a silicon to nitrogen to oxygen ratio [Si:N:O] of about 1:1:1, and a refractive index of between 1.40 and 1.70.
Examples of suitable oxygen containing reactants comprise oxygen (O2), ozone (O3), water vapor (H2O), nitrous oxide (N2O), nitric oxide (NO), nitrogen dioxide (NO2), and the like. Examples of suitable nitrogen containing reactants comprise ammonia (NH3), hydrazine (N2H4), nitrous oxide (N2O), nitric oxide (NO), nitrogen dioxide (NO2), and the like. The reaction of the oxygen containing reactant and the nitrogen containing reactant with the TSA forms a silicon-nitrogen-oxygen dielectric film on the substrate(s). This is carried out until the desired thickness of the silicon-nitrogen-oxygen dielectric material is deposited on the substrate(s).
In either embodiments the precursor(s) may be conveyed to the substrate in a cross-flow manner, that is the precursor is injected near one peripheral region of the substrate, and flows across the surface of the substrate , where the precursor(s) then exits at an opposite peripheral region of the substrate.
Films deposited according to embodiments of the present invention were tested for certain properties. FIG. 6 is a graph illustrating the deposition rate and within-wafer uniformity (WIWNU) as a function of deposition temperature for silicon oxide films deposited by CVD in a single wafer thermal processing apparatus according to some embodiments of the method of the present invention. The method was carried out using TSA flowrate of 11 seem and an oxygen flowrate of 200 seem. The pressure was maintained at 7 Torr. As shown in the data, high deposition rates of greater than 180 A/min are achieved at temperatures below 5000C, while the films exhibit good quality uniformity.
FIG. 7 is a graph showing certain properties for silicon nitride films deposited by CVD in a batch thermal processing apparatus according to different embodiments of the present invention. Silicon nitride deposition rate as a function of deposition temperature for silicon nitride films deposited in a batch thermal processing apparatus is shown on the far left of the graph. These results are compared to deposition carried out with other precursors, namely BTBAS, HCD and DCS.
The foregoing descriptions of specific embodiments of the present invention have been presented for the purpose of illustration and description. They are not intended to be exhaustive or to limit the invention to the precise forms disclosed, and obviously many modifications, embodiments, and variations are possible in lights of the above teaching. It is intended that the scope of the invention be defined by the Claims appended hereto and their equivalents.

Claims

What is claimed is:
1. A method of forming a silicon containing film on the surface of one or more substrates, characterized in that: a silylamine moiety and one or more reactant precursors are reacted in a process chamber by flowing the silylamine moiety and the one or more reactant precursors across a top surface of the one or more substrates to form a film thereon.
2. The method of Claim 1 wherein the method is carried out at a deposition temperature of less than 55O0C.
3. The method of Claim 1 wherein said silylamine moiety is comprised of the formula:
HmN(SiH3)n where n is an integer from 1 to 3 and m is equal to 3 - n.
4. The method of claim 1 wherein said silylamine moiety is comprised of the formula:
HmN(Si2H5)n where n is an integer from 1 to 3 and m is equal to 3 — n.
5. The method of claim 1 wherein a silicon oxide film is formed on the surface of the substrate and the method is carried out a deposition temperature in the range of approximately 150 - 550 0C.
6. The method of claim 1 wherein a silicon nitride film is formed on the surface of the substrate and the method is carried out a deposition temperature in the range of approximately 300 - 800 0C,
7. The method of claim 6 wherein the deposition temperature is in the range of approximately 500 - 520 0C.
8. The method of claim 1 where the silylamine moiety and precursors are flowed into the process chamber concurrently.
9. The method of claim 1 where the silylamine moiety and precursors are flowed into the process chamber sequentially.
10. A method of forming a silicon containing film on one or more substrates in a process chamber comprising: conveying to the process chamber, either sequentially or concurrently, a precursor comprising a silylamine moiety and at least one reactant containing nitrogen to form a silicon-nitrogen film on the surface of one or more substrates.
11. The method of Claim 10 wherein the process chamber is configured to contain a single substrate.
12. The method of Claim 10 wherein the process chamber is configured to contain a plurality of substrates.
13. The method of Claim 10 wherein: the method is performed at a temperature in the range of approximately 300 to 80O0C; at a pressure between O.OlmTorr and 760 Torr; and using total precursor flow rates between 0 and 20,000 seem.
14. The method of Claim 10 wherein said silylamine moiety is comprised of the formula:
HmN(SiH3)n where n is an integer from 1 to 3 and m is equal to 3 - n.
15. The method of claim 10 wherein said silylamine moiety is comprised of the formula:
HmN(Si2H5)n where n is an integer from 1 to 3 and m is equal to 3 - n.
16. The method of claim 10 wherein the silylamine moiety and the at least one reactant precursor, are flowed concurrently and across a top surface of the one or more substrates to form a film thereon.
17. The method of claim 10 wherein the deposition temperature is in the range of approximately 500 - 550 0C.
18. A method of forming a silicon containing film on one or more substrates in a process chamber comprising: conveying to a process chamber, either sequentially or concurrently, a precursor comprising a silylamine moiety and at least one reactant containing oxygen to form a silicon-oxygen film on the one or more substrates.
19. The method of Claim 18 wherein the process chamber is configured to contain a single substrate.
20. The method of Claim 18 wherein the process chamber is configured to contain a plurality of substrates.
21. The method of Claim 18 wherein: the method is performed at a temperature of less than 55O0C; at a pressure between O.OlmTorr and 760 Torr; and using total precursor flow rates between 0 and 20,000 seem.
22. The method of Claim 18 wherein said silylamine moiety is comprised of the formula:
HmN(SiH3)n where n is an integer from 1 to 3 and m is equal to 3 - n.
23. The method of claim 18 wherein said silylamine moiety is comprised of the formula:
H1nN(Si2Hs)n where n is an integer from 1 to 3 and m is equal to 3 - n.
24. The method of claim 18 wherein the silylamine moiety and the at least one reactant, are flowed concurrently and across a top surface of the one or more substrates to form a film thereon.
25. The method of claim 18 wherein the method is carried out at a deposition temperature in the range of approximately 150 - 550 0C.
26. A method of forming a film on one or more substrates in a process chamber comprising: conveying a first precursor comprising a silylamine moiety to the process chamber sequence to form a first layer on the substrate; conveying a second reactant containing both nitrogen and oxygen to react with the first layer to form a silicon-nitrogen-oxygen film; and repeating the above steps until the desired thickness of the silicon-nitrogen- oxygen film is formed.
27. The method of Claim 26 wherein the process chamber is configured to contain a single substrate.
28. The method of Claim 26 wherein the process chamber is configured to contain a plurality of substrates.
29. The method of Claim 26 wherein: the method is performed at a temperature of less than 55O0C; at a pressure between O.OlmTorr and 760 Torr; and using total precursor flow rates between 0 and 20,000 seem.
30. A method comprising: conveying, either sequentially or concurrently, a first precursor comprising a silylamine moiety to the process chamber a second reactant containing nitrogen and a third reactant containing oxygen to form a silicon- nitrogen-oxygen film.
31. The method of Claim 30 wherein the process chamber is configured, to contain a single substrate.
32. The method of Claim 30 wherein the process chamber is configured to contain a plurality of substrates.
33. The method of Claim 30 wherein: the method is performed at a temperature of less than 55O0C; at a pressure between O.OlmTorr and 760 Torr; and using total precursor flow rates between 0 and 20,000 seem.
34. The method of Claim 30 where the silylamine moiety, the second reactant containing nitrogen and the third reactant containing oxygen are conveyed concurrently and flow across a top surface of the one or more substrates to form a film thereon.
PCT/US2006/026506 2005-07-08 2006-07-07 Method for depositing silicon-containing films WO2007008653A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP06786601A EP1907599A2 (en) 2005-07-08 2006-07-07 Method for depositing silicon-containing films
JP2008520410A JP2009500857A (en) 2005-07-08 2006-07-07 Method for depositing silicon-containing film

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US69776305P 2005-07-08 2005-07-08
US60/697,763 2005-07-08

Publications (2)

Publication Number Publication Date
WO2007008653A2 true WO2007008653A2 (en) 2007-01-18
WO2007008653A3 WO2007008653A3 (en) 2007-11-01

Family

ID=37637766

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/026506 WO2007008653A2 (en) 2005-07-08 2006-07-07 Method for depositing silicon-containing films

Country Status (6)

Country Link
US (1) US20070031598A1 (en)
EP (1) EP1907599A2 (en)
JP (1) JP2009500857A (en)
KR (1) KR20080028963A (en)
TW (1) TW200715376A (en)
WO (1) WO2007008653A2 (en)

Families Citing this family (412)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7825038B2 (en) * 2006-05-30 2010-11-02 Applied Materials, Inc. Chemical vapor deposition of high quality flow-like silicon dioxide using a silicon containing precursor and atomic oxygen
US8232176B2 (en) * 2006-06-22 2012-07-31 Applied Materials, Inc. Dielectric deposition and etch back processes for bottom up gapfill
US7883746B2 (en) * 2006-07-27 2011-02-08 Panasonic Corporation Insulating film formation method which exhibits improved thickness uniformity and improved composition uniformity
US7867923B2 (en) * 2007-10-22 2011-01-11 Applied Materials, Inc. High quality silicon oxide films by remote plasma CVD from disilane precursors
US20090197014A1 (en) * 2008-02-04 2009-08-06 Atomic Energy Council - Institute Of Nuclear Energy Research Apparatus and method for coating diamond on work pieces via hot filament chemical vapor deposition
US8357435B2 (en) * 2008-05-09 2013-01-22 Applied Materials, Inc. Flowable dielectric equipment and processes
US20100081293A1 (en) * 2008-10-01 2010-04-01 Applied Materials, Inc. Methods for forming silicon nitride based film or silicon carbon based film
US10378106B2 (en) 2008-11-14 2019-08-13 Asm Ip Holding B.V. Method of forming insulation film by modified PEALD
US9394608B2 (en) 2009-04-06 2016-07-19 Asm America, Inc. Semiconductor processing reactor and components thereof
US8980382B2 (en) * 2009-12-02 2015-03-17 Applied Materials, Inc. Oxygen-doping for non-carbon radical-component CVD films
US8741788B2 (en) * 2009-08-06 2014-06-03 Applied Materials, Inc. Formation of silicon oxide using non-carbon flowable CVD processes
US8802201B2 (en) * 2009-08-14 2014-08-12 Asm America, Inc. Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species
US20110136347A1 (en) * 2009-10-21 2011-06-09 Applied Materials, Inc. Point-of-use silylamine generation
US8449942B2 (en) 2009-11-12 2013-05-28 Applied Materials, Inc. Methods of curing non-carbon flowable CVD films
US20110151677A1 (en) 2009-12-21 2011-06-23 Applied Materials, Inc. Wet oxidation process performed on a dielectric material formed from a flowable cvd process
US20110159213A1 (en) * 2009-12-30 2011-06-30 Applied Materials, Inc. Chemical vapor deposition improvements through radical-component modification
KR20120111738A (en) * 2009-12-30 2012-10-10 어플라이드 머티어리얼스, 인코포레이티드 Dielectric film growth with radicals produced using flexible nitrogen/hydrogen ratio
US8329262B2 (en) * 2010-01-05 2012-12-11 Applied Materials, Inc. Dielectric film formation using inert gas excitation
JP2013517616A (en) * 2010-01-06 2013-05-16 アプライド マテリアルズ インコーポレイテッド Flowable dielectrics using oxide liners
CN102714156A (en) 2010-01-07 2012-10-03 应用材料公司 In-situ ozone cure for radical-component CVD
CN102844848A (en) * 2010-03-05 2012-12-26 应用材料公司 Conformal layers by radical-component cvd
US8236708B2 (en) * 2010-03-09 2012-08-07 Applied Materials, Inc. Reduced pattern loading using bis(diethylamino)silane (C8H22N2Si) as silicon precursor
US8524004B2 (en) 2010-06-16 2013-09-03 Applied Materials, Inc. Loadlock batch ozone cure
US8318584B2 (en) 2010-07-30 2012-11-27 Applied Materials, Inc. Oxide-rich liner layer for flowable CVD gapfill
US7947551B1 (en) * 2010-09-28 2011-05-24 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming a shallow trench isolation structure
US9285168B2 (en) 2010-10-05 2016-03-15 Applied Materials, Inc. Module for ozone cure and post-cure moisture treatment
US8664127B2 (en) 2010-10-15 2014-03-04 Applied Materials, Inc. Two silicon-containing precursors for gapfill enhancing dielectric liner
US10283321B2 (en) 2011-01-18 2019-05-07 Applied Materials, Inc. Semiconductor processing system and methods using capacitively coupled plasma
US8450191B2 (en) 2011-01-24 2013-05-28 Applied Materials, Inc. Polysilicon films by HDP-CVD
US8716154B2 (en) 2011-03-04 2014-05-06 Applied Materials, Inc. Reduced pattern loading using silicon oxide multi-layers
US8445078B2 (en) 2011-04-20 2013-05-21 Applied Materials, Inc. Low temperature silicon oxide conversion
US8466073B2 (en) 2011-06-03 2013-06-18 Applied Materials, Inc. Capping layer for reduced outgassing
US9312155B2 (en) 2011-06-06 2016-04-12 Asm Japan K.K. High-throughput semiconductor-processing apparatus equipped with multiple dual-chamber modules
US9793148B2 (en) 2011-06-22 2017-10-17 Asm Japan K.K. Method for positioning wafers in multiple wafer transport
US10364496B2 (en) 2011-06-27 2019-07-30 Asm Ip Holding B.V. Dual section module having shared and unshared mass flow controllers
US10854498B2 (en) 2011-07-15 2020-12-01 Asm Ip Holding B.V. Wafer-supporting device and method for producing same
US9404178B2 (en) 2011-07-15 2016-08-02 Applied Materials, Inc. Surface treatment and deposition for reduced outgassing
US20130023129A1 (en) 2011-07-20 2013-01-24 Asm America, Inc. Pressure transmitter for a semiconductor processing environment
US8617989B2 (en) 2011-09-26 2013-12-31 Applied Materials, Inc. Liner property improvement
US8551891B2 (en) 2011-10-04 2013-10-08 Applied Materials, Inc. Remote plasma burn-in
US9096931B2 (en) 2011-10-27 2015-08-04 Asm America, Inc Deposition valve assembly and method of heating the same
US9341296B2 (en) 2011-10-27 2016-05-17 Asm America, Inc. Heater jacket for a fluid line
US9017481B1 (en) 2011-10-28 2015-04-28 Asm America, Inc. Process feed management for semiconductor substrate processing
WO2013077321A1 (en) * 2011-11-21 2013-05-30 株式会社日立国際電気 Apparatus for manufacturing semiconductor device, method for manufacturing semiconductor device, and recoding medium
US9167625B2 (en) 2011-11-23 2015-10-20 Asm Ip Holding B.V. Radiation shielding for a substrate holder
US9005539B2 (en) 2011-11-23 2015-04-14 Asm Ip Holding B.V. Chamber sealing member
US9202727B2 (en) 2012-03-02 2015-12-01 ASM IP Holding Susceptor heater shim
US8946830B2 (en) 2012-04-04 2015-02-03 Asm Ip Holdings B.V. Metal oxide protective layer for a semiconductor device
TWI622664B (en) 2012-05-02 2018-05-01 Asm智慧財產控股公司 Phase-stabilized thin films, structures and devices including the thin films, and methods of forming same
US8728832B2 (en) 2012-05-07 2014-05-20 Asm Ip Holdings B.V. Semiconductor device dielectric interface layer
US8933375B2 (en) 2012-06-27 2015-01-13 Asm Ip Holding B.V. Susceptor heater and method of heating a substrate
US9064694B2 (en) 2012-07-12 2015-06-23 Tokyo Electron Limited Nitridation of atomic layer deposited high-k dielectrics using trisilylamine
US9558931B2 (en) 2012-07-27 2017-01-31 Asm Ip Holding B.V. System and method for gas-phase sulfur passivation of a semiconductor surface
US9117866B2 (en) 2012-07-31 2015-08-25 Asm Ip Holding B.V. Apparatus and method for calculating a wafer position in a processing chamber under process conditions
US9169975B2 (en) 2012-08-28 2015-10-27 Asm Ip Holding B.V. Systems and methods for mass flow controller verification
US9659799B2 (en) 2012-08-28 2017-05-23 Asm Ip Holding B.V. Systems and methods for dynamic semiconductor process scheduling
US8889566B2 (en) 2012-09-11 2014-11-18 Applied Materials, Inc. Low cost flowable dielectric films
US9021985B2 (en) 2012-09-12 2015-05-05 Asm Ip Holdings B.V. Process gas management for an inductively-coupled plasma deposition reactor
US9324811B2 (en) 2012-09-26 2016-04-26 Asm Ip Holding B.V. Structures and devices including a tensile-stressed silicon arsenic layer and methods of forming same
US10714315B2 (en) 2012-10-12 2020-07-14 Asm Ip Holdings B.V. Semiconductor reaction chamber showerhead
US9640416B2 (en) 2012-12-26 2017-05-02 Asm Ip Holding B.V. Single-and dual-chamber module-attachable wafer-handling chamber
US9018108B2 (en) 2013-01-25 2015-04-28 Applied Materials, Inc. Low shrinkage dielectric films
US20160376700A1 (en) 2013-02-01 2016-12-29 Asm Ip Holding B.V. System for treatment of deposition reactor
US8894870B2 (en) 2013-02-01 2014-11-25 Asm Ip Holding B.V. Multi-step method and apparatus for etching compounds containing a metal
EP2770526B1 (en) 2013-02-22 2018-10-03 IMEC vzw Oxygen monolayer on a semiconductor
US9484191B2 (en) 2013-03-08 2016-11-01 Asm Ip Holding B.V. Pulsed remote plasma method and system
US9589770B2 (en) 2013-03-08 2017-03-07 Asm Ip Holding B.V. Method and systems for in-situ formation of intermediate reactive species
US8993054B2 (en) 2013-07-12 2015-03-31 Asm Ip Holding B.V. Method and system to reduce outgassing in a reaction chamber
CN105392919B (en) * 2013-07-16 2018-01-02 3M创新有限公司 Sheet material coating method
US9018111B2 (en) 2013-07-22 2015-04-28 Asm Ip Holding B.V. Semiconductor reaction chamber with plasma capabilities
US9793115B2 (en) 2013-08-14 2017-10-17 Asm Ip Holding B.V. Structures and devices including germanium-tin films and methods of forming same
US9396934B2 (en) 2013-08-14 2016-07-19 Asm Ip Holding B.V. Methods of forming films including germanium tin and structures and devices including the films
US9240412B2 (en) 2013-09-27 2016-01-19 Asm Ip Holding B.V. Semiconductor structure and device and methods of forming same using selective epitaxial process
EP3049499B1 (en) 2013-09-27 2020-07-22 L'air Liquide, Société Anonyme Pour L'Étude Et L'exploitation Des Procédés Georges Claude Amine substituted trisilylamine and tridisilylamine compounds
US9556516B2 (en) 2013-10-09 2017-01-31 ASM IP Holding B.V Method for forming Ti-containing film by PEALD using TDMAT or TDEAT
US9605343B2 (en) 2013-11-13 2017-03-28 Asm Ip Holding B.V. Method for forming conformal carbon films, structures conformal carbon film, and system of forming same
US10179947B2 (en) 2013-11-26 2019-01-15 Asm Ip Holding B.V. Method for forming conformal nitrided, oxidized, or carbonized dielectric film by atomic layer deposition
US10683571B2 (en) 2014-02-25 2020-06-16 Asm Ip Holding B.V. Gas supply manifold and method of supplying gases to chamber using same
US10167557B2 (en) 2014-03-18 2019-01-01 Asm Ip Holding B.V. Gas distribution system, reactor including the system, and methods of using the same
US9447498B2 (en) 2014-03-18 2016-09-20 Asm Ip Holding B.V. Method for performing uniform processing in gas system-sharing multiple reaction chambers
US11015245B2 (en) 2014-03-19 2021-05-25 Asm Ip Holding B.V. Gas-phase reactor and system having exhaust plenum and components thereof
US9404587B2 (en) 2014-04-24 2016-08-02 ASM IP Holding B.V Lockout tagout for semiconductor vacuum valve
JP6225837B2 (en) 2014-06-04 2017-11-08 東京エレクトロン株式会社 Film forming apparatus, film forming method, storage medium
US9412581B2 (en) 2014-07-16 2016-08-09 Applied Materials, Inc. Low-K dielectric gapfill by flowable deposition
US10858737B2 (en) 2014-07-28 2020-12-08 Asm Ip Holding B.V. Showerhead assembly and components thereof
US9543180B2 (en) 2014-08-01 2017-01-10 Asm Ip Holding B.V. Apparatus and method for transporting wafers between wafer carrier and process tool under vacuum
US9890456B2 (en) 2014-08-21 2018-02-13 Asm Ip Holding B.V. Method and system for in situ formation of gas-phase compounds
US10941490B2 (en) 2014-10-07 2021-03-09 Asm Ip Holding B.V. Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same
US9657845B2 (en) 2014-10-07 2017-05-23 Asm Ip Holding B.V. Variable conductance gas distribution apparatus and method
EP3431629B1 (en) 2014-10-24 2021-11-24 Versum Materials US, LLC Compositions and methods using same for deposition of silicon-containing films
KR102300403B1 (en) 2014-11-19 2021-09-09 에이에스엠 아이피 홀딩 비.브이. Method of depositing thin film
JP6354539B2 (en) * 2014-11-25 2018-07-11 東京エレクトロン株式会社 Substrate processing apparatus, substrate processing method, and storage medium
KR102263121B1 (en) 2014-12-22 2021-06-09 에이에스엠 아이피 홀딩 비.브이. Semiconductor device and manufacuring method thereof
US10354860B2 (en) 2015-01-29 2019-07-16 Versum Materials Us, Llc Method and precursors for manufacturing 3D devices
US20160225652A1 (en) 2015-02-03 2016-08-04 Applied Materials, Inc. Low temperature chuck for plasma processing systems
US9478415B2 (en) 2015-02-13 2016-10-25 Asm Ip Holding B.V. Method for forming film having low resistance and shallow junction depth
US10529542B2 (en) 2015-03-11 2020-01-07 Asm Ip Holdings B.V. Cross-flow reactor and method
US10276355B2 (en) 2015-03-12 2019-04-30 Asm Ip Holding B.V. Multi-zone reactor, system including the reactor, and method of using the same
US9777025B2 (en) 2015-03-30 2017-10-03 L'Air Liquide, Société pour l'Etude et l'Exploitation des Procédés Georges Claude Si-containing film forming precursors and methods of using the same
US11124876B2 (en) 2015-03-30 2021-09-21 L'Air Liquide, Société Anonyme pour l'Etude et l'Exploitation des Procédés Georges Claude Si-containing film forming precursors and methods of using the same
US10458018B2 (en) 2015-06-26 2019-10-29 Asm Ip Holding B.V. Structures including metal carbide material, devices including the structures, and methods of forming same
US10600673B2 (en) 2015-07-07 2020-03-24 Asm Ip Holding B.V. Magnetic susceptor to baseplate seal
US9899291B2 (en) 2015-07-13 2018-02-20 Asm Ip Holding B.V. Method for protecting layer by forming hydrocarbon-based extremely thin film
US10043661B2 (en) 2015-07-13 2018-08-07 Asm Ip Holding B.V. Method for protecting layer by forming hydrocarbon-based extremely thin film
US10083836B2 (en) 2015-07-24 2018-09-25 Asm Ip Holding B.V. Formation of boron-doped titanium metal films with high work function
US10087525B2 (en) 2015-08-04 2018-10-02 Asm Ip Holding B.V. Variable gap hard stop design
US9647114B2 (en) 2015-08-14 2017-05-09 Asm Ip Holding B.V. Methods of forming highly p-type doped germanium tin films and structures and devices including the films
US9711345B2 (en) 2015-08-25 2017-07-18 Asm Ip Holding B.V. Method for forming aluminum nitride-based film by PEALD
US9960072B2 (en) 2015-09-29 2018-05-01 Asm Ip Holding B.V. Variable adjustment for precise matching of multiple chamber cavity housings
US9909214B2 (en) 2015-10-15 2018-03-06 Asm Ip Holding B.V. Method for depositing dielectric film in trenches by PEALD
US10211308B2 (en) 2015-10-21 2019-02-19 Asm Ip Holding B.V. NbMC layers
US10322384B2 (en) 2015-11-09 2019-06-18 Asm Ip Holding B.V. Counter flow mixer for process chamber
US9455138B1 (en) 2015-11-10 2016-09-27 Asm Ip Holding B.V. Method for forming dielectric film in trenches by PEALD using H-containing gas
US9905420B2 (en) 2015-12-01 2018-02-27 Asm Ip Holding B.V. Methods of forming silicon germanium tin films and structures and devices including the films
US9607837B1 (en) 2015-12-21 2017-03-28 Asm Ip Holding B.V. Method for forming silicon oxide cap layer for solid state diffusion process
KR102458309B1 (en) 2015-12-28 2022-10-24 삼성전자주식회사 Method of forming a SiOCN material layer and method of fabricating a semiconductor device
US9735024B2 (en) 2015-12-28 2017-08-15 Asm Ip Holding B.V. Method of atomic layer etching using functional group-containing fluorocarbon
US9627221B1 (en) 2015-12-28 2017-04-18 Asm Ip Holding B.V. Continuous process incorporating atomic layer etching
US11139308B2 (en) 2015-12-29 2021-10-05 Asm Ip Holding B.V. Atomic layer deposition of III-V compounds to form V-NAND devices
US20170207078A1 (en) * 2016-01-15 2017-07-20 Taiwan Semiconductor Manufacturing Co., Ltd. Atomic layer deposition apparatus and semiconductor process
US10468251B2 (en) 2016-02-19 2019-11-05 Asm Ip Holding B.V. Method for forming spacers using silicon nitride film for spacer-defined multiple patterning
US9754779B1 (en) 2016-02-19 2017-09-05 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US10529554B2 (en) 2016-02-19 2020-01-07 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US10501866B2 (en) 2016-03-09 2019-12-10 Asm Ip Holding B.V. Gas distribution apparatus for improved film uniformity in an epitaxial system
US10343920B2 (en) 2016-03-18 2019-07-09 Asm Ip Holding B.V. Aligned carbon nanotubes
JP6470468B2 (en) * 2016-03-18 2019-02-13 株式会社Kokusai Electric Semiconductor device manufacturing method, substrate processing apparatus, and program
US9892913B2 (en) 2016-03-24 2018-02-13 Asm Ip Holding B.V. Radial and thickness control via biased multi-port injection settings
US10190213B2 (en) 2016-04-21 2019-01-29 Asm Ip Holding B.V. Deposition of metal borides
US10865475B2 (en) 2016-04-21 2020-12-15 Asm Ip Holding B.V. Deposition of metal borides and silicides
US10087522B2 (en) 2016-04-21 2018-10-02 Asm Ip Holding B.V. Deposition of metal borides
US10367080B2 (en) 2016-05-02 2019-07-30 Asm Ip Holding B.V. Method of forming a germanium oxynitride film
US10032628B2 (en) 2016-05-02 2018-07-24 Asm Ip Holding B.V. Source/drain performance through conformal solid state doping
KR102592471B1 (en) 2016-05-17 2023-10-20 에이에스엠 아이피 홀딩 비.브이. Method of forming metal interconnection and method of fabricating semiconductor device using the same
US11453943B2 (en) 2016-05-25 2022-09-27 Asm Ip Holding B.V. Method for forming carbon-containing silicon/metal oxide or nitride film by ALD using silicon precursor and hydrocarbon precursor
US10388509B2 (en) 2016-06-28 2019-08-20 Asm Ip Holding B.V. Formation of epitaxial layers via dislocation filtering
US10612137B2 (en) 2016-07-08 2020-04-07 Asm Ip Holdings B.V. Organic reactants for atomic layer deposition
US9859151B1 (en) 2016-07-08 2018-01-02 Asm Ip Holding B.V. Selective film deposition method to form air gaps
US9793135B1 (en) 2016-07-14 2017-10-17 ASM IP Holding B.V Method of cyclic dry etching using etchant film
US10714385B2 (en) 2016-07-19 2020-07-14 Asm Ip Holding B.V. Selective deposition of tungsten
KR102354490B1 (en) 2016-07-27 2022-01-21 에이에스엠 아이피 홀딩 비.브이. Method of processing a substrate
KR102532607B1 (en) 2016-07-28 2023-05-15 에이에스엠 아이피 홀딩 비.브이. Substrate processing apparatus and method of operating the same
US9812320B1 (en) 2016-07-28 2017-11-07 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10395919B2 (en) 2016-07-28 2019-08-27 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10177025B2 (en) 2016-07-28 2019-01-08 Asm Ip Holding B.V. Method and apparatus for filling a gap
US9887082B1 (en) 2016-07-28 2018-02-06 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10090316B2 (en) 2016-09-01 2018-10-02 Asm Ip Holding B.V. 3D stacked multilayer semiconductor memory using doped select transistor channel
US10410943B2 (en) 2016-10-13 2019-09-10 Asm Ip Holding B.V. Method for passivating a surface of a semiconductor and related systems
US10643826B2 (en) 2016-10-26 2020-05-05 Asm Ip Holdings B.V. Methods for thermally calibrating reaction chambers
US11532757B2 (en) 2016-10-27 2022-12-20 Asm Ip Holding B.V. Deposition of charge trapping layers
US10643904B2 (en) 2016-11-01 2020-05-05 Asm Ip Holdings B.V. Methods for forming a semiconductor device and related semiconductor device structures
US10714350B2 (en) 2016-11-01 2020-07-14 ASM IP Holdings, B.V. Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10229833B2 (en) 2016-11-01 2019-03-12 Asm Ip Holding B.V. Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10435790B2 (en) 2016-11-01 2019-10-08 Asm Ip Holding B.V. Method of subatmospheric plasma-enhanced ALD using capacitively coupled electrodes with narrow gap
US10134757B2 (en) 2016-11-07 2018-11-20 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by using the method
KR102546317B1 (en) 2016-11-15 2023-06-21 에이에스엠 아이피 홀딩 비.브이. Gas supply unit and substrate processing apparatus including the same
US10340135B2 (en) 2016-11-28 2019-07-02 Asm Ip Holding B.V. Method of topologically restricted plasma-enhanced cyclic deposition of silicon or metal nitride
KR20180068582A (en) 2016-12-14 2018-06-22 에이에스엠 아이피 홀딩 비.브이. Substrate processing apparatus
US11447861B2 (en) 2016-12-15 2022-09-20 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus and a method of forming a patterned structure
US11581186B2 (en) 2016-12-15 2023-02-14 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus
US9916980B1 (en) 2016-12-15 2018-03-13 Asm Ip Holding B.V. Method of forming a structure on a substrate
KR102700194B1 (en) 2016-12-19 2024-08-28 에이에스엠 아이피 홀딩 비.브이. Substrate processing apparatus
US10269558B2 (en) 2016-12-22 2019-04-23 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10867788B2 (en) 2016-12-28 2020-12-15 Asm Ip Holding B.V. Method of forming a structure on a substrate
US11390950B2 (en) 2017-01-10 2022-07-19 Asm Ip Holding B.V. Reactor system and method to reduce residue buildup during a film deposition process
US10655221B2 (en) 2017-02-09 2020-05-19 Asm Ip Holding B.V. Method for depositing oxide film by thermal ALD and PEALD
US10468261B2 (en) 2017-02-15 2019-11-05 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures
US10529563B2 (en) 2017-03-29 2020-01-07 Asm Ip Holdings B.V. Method for forming doped metal oxide films on a substrate by cyclical deposition and related semiconductor device structures
US10283353B2 (en) 2017-03-29 2019-05-07 Asm Ip Holding B.V. Method of reforming insulating film deposited on substrate with recess pattern
US10103040B1 (en) 2017-03-31 2018-10-16 Asm Ip Holding B.V. Apparatus and method for manufacturing a semiconductor device
USD830981S1 (en) 2017-04-07 2018-10-16 Asm Ip Holding B.V. Susceptor for semiconductor substrate processing apparatus
KR102457289B1 (en) 2017-04-25 2022-10-21 에이에스엠 아이피 홀딩 비.브이. Method for depositing a thin film and manufacturing a semiconductor device
US10892156B2 (en) 2017-05-08 2021-01-12 Asm Ip Holding B.V. Methods for forming a silicon nitride film on a substrate and related semiconductor device structures
US10446393B2 (en) 2017-05-08 2019-10-15 Asm Ip Holding B.V. Methods for forming silicon-containing epitaxial layers and related semiconductor device structures
US10770286B2 (en) 2017-05-08 2020-09-08 Asm Ip Holdings B.V. Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures
US10504742B2 (en) 2017-05-31 2019-12-10 Asm Ip Holding B.V. Method of atomic layer etching using hydrogen plasma
US10886123B2 (en) 2017-06-02 2021-01-05 Asm Ip Holding B.V. Methods for forming low temperature semiconductor layers and related semiconductor device structures
US12040200B2 (en) 2017-06-20 2024-07-16 Asm Ip Holding B.V. Semiconductor processing apparatus and methods for calibrating a semiconductor processing apparatus
US11306395B2 (en) 2017-06-28 2022-04-19 Asm Ip Holding B.V. Methods for depositing a transition metal nitride film on a substrate by atomic layer deposition and related deposition apparatus
US10685834B2 (en) 2017-07-05 2020-06-16 Asm Ip Holdings B.V. Methods for forming a silicon germanium tin layer and related semiconductor device structures
KR20190009245A (en) 2017-07-18 2019-01-28 에이에스엠 아이피 홀딩 비.브이. Methods for forming a semiconductor device structure and related semiconductor device structures
US11374112B2 (en) 2017-07-19 2022-06-28 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US11018002B2 (en) 2017-07-19 2021-05-25 Asm Ip Holding B.V. Method for selectively depositing a Group IV semiconductor and related semiconductor device structures
US10541333B2 (en) 2017-07-19 2020-01-21 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US10312055B2 (en) 2017-07-26 2019-06-04 Asm Ip Holding B.V. Method of depositing film by PEALD using negative bias
US10605530B2 (en) 2017-07-26 2020-03-31 Asm Ip Holding B.V. Assembly of a liner and a flange for a vertical furnace as well as the liner and the vertical furnace
US10590535B2 (en) 2017-07-26 2020-03-17 Asm Ip Holdings B.V. Chemical treatment, deposition and/or infiltration apparatus and method for using the same
US10692741B2 (en) 2017-08-08 2020-06-23 Asm Ip Holdings B.V. Radiation shield
US10770336B2 (en) 2017-08-08 2020-09-08 Asm Ip Holding B.V. Substrate lift mechanism and reactor including same
US10249524B2 (en) 2017-08-09 2019-04-02 Asm Ip Holding B.V. Cassette holder assembly for a substrate cassette and holding member for use in such assembly
US11139191B2 (en) 2017-08-09 2021-10-05 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US11769682B2 (en) 2017-08-09 2023-09-26 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US10236177B1 (en) 2017-08-22 2019-03-19 ASM IP Holding B.V.. Methods for depositing a doped germanium tin semiconductor and related semiconductor device structures
USD900036S1 (en) 2017-08-24 2020-10-27 Asm Ip Holding B.V. Heater electrical connector and adapter
US11830730B2 (en) 2017-08-29 2023-11-28 Asm Ip Holding B.V. Layer forming method and apparatus
US11056344B2 (en) 2017-08-30 2021-07-06 Asm Ip Holding B.V. Layer forming method
KR102491945B1 (en) 2017-08-30 2023-01-26 에이에스엠 아이피 홀딩 비.브이. Substrate processing apparatus
US11295980B2 (en) 2017-08-30 2022-04-05 Asm Ip Holding B.V. Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
KR102401446B1 (en) 2017-08-31 2022-05-24 에이에스엠 아이피 홀딩 비.브이. Substrate processing apparatus
US10607895B2 (en) 2017-09-18 2020-03-31 Asm Ip Holdings B.V. Method for forming a semiconductor device structure comprising a gate fill metal
KR102630301B1 (en) 2017-09-21 2024-01-29 에이에스엠 아이피 홀딩 비.브이. Method of sequential infiltration synthesis treatment of infiltrateable material and structures and devices formed using same
US10844484B2 (en) 2017-09-22 2020-11-24 Asm Ip Holding B.V. Apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US10658205B2 (en) 2017-09-28 2020-05-19 Asm Ip Holdings B.V. Chemical dispensing apparatus and methods for dispensing a chemical to a reaction chamber
US10403504B2 (en) 2017-10-05 2019-09-03 Asm Ip Holding B.V. Method for selectively depositing a metallic film on a substrate
US10319588B2 (en) 2017-10-10 2019-06-11 Asm Ip Holding B.V. Method for depositing a metal chalcogenide on a substrate by cyclical deposition
US10923344B2 (en) 2017-10-30 2021-02-16 Asm Ip Holding B.V. Methods for forming a semiconductor structure and related semiconductor structures
US10910262B2 (en) 2017-11-16 2021-02-02 Asm Ip Holding B.V. Method of selectively depositing a capping layer structure on a semiconductor device structure
KR102443047B1 (en) 2017-11-16 2022-09-14 에이에스엠 아이피 홀딩 비.브이. Method of processing a substrate and a device manufactured by the same
US11022879B2 (en) 2017-11-24 2021-06-01 Asm Ip Holding B.V. Method of forming an enhanced unexposed photoresist layer
WO2019103610A1 (en) 2017-11-27 2019-05-31 Asm Ip Holding B.V. Apparatus including a clean mini environment
JP7214724B2 (en) 2017-11-27 2023-01-30 エーエスエム アイピー ホールディング ビー.ブイ. Storage device for storing wafer cassettes used in batch furnaces
US10290508B1 (en) 2017-12-05 2019-05-14 Asm Ip Holding B.V. Method for forming vertical spacers for spacer-defined patterning
US10872771B2 (en) 2018-01-16 2020-12-22 Asm Ip Holding B. V. Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures
CN111630203A (en) 2018-01-19 2020-09-04 Asm Ip私人控股有限公司 Method for depositing gap filling layer by plasma auxiliary deposition
TWI799494B (en) 2018-01-19 2023-04-21 荷蘭商Asm 智慧財產控股公司 Deposition method
USD903477S1 (en) 2018-01-24 2020-12-01 Asm Ip Holdings B.V. Metal clamp
US11018047B2 (en) 2018-01-25 2021-05-25 Asm Ip Holding B.V. Hybrid lift pin
US10535516B2 (en) 2018-02-01 2020-01-14 Asm Ip Holdings B.V. Method for depositing a semiconductor structure on a surface of a substrate and related semiconductor structures
USD880437S1 (en) 2018-02-01 2020-04-07 Asm Ip Holding B.V. Gas supply plate for semiconductor manufacturing apparatus
US11081345B2 (en) 2018-02-06 2021-08-03 Asm Ip Holding B.V. Method of post-deposition treatment for silicon oxide film
JP7124098B2 (en) 2018-02-14 2022-08-23 エーエスエム・アイピー・ホールディング・ベー・フェー Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US10896820B2 (en) 2018-02-14 2021-01-19 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US10731249B2 (en) 2018-02-15 2020-08-04 Asm Ip Holding B.V. Method of forming a transition metal containing film on a substrate by a cyclical deposition process, a method for supplying a transition metal halide compound to a reaction chamber, and related vapor deposition apparatus
US10658181B2 (en) 2018-02-20 2020-05-19 Asm Ip Holding B.V. Method of spacer-defined direct patterning in semiconductor fabrication
KR102636427B1 (en) 2018-02-20 2024-02-13 에이에스엠 아이피 홀딩 비.브이. Substrate processing method and apparatus
US10975470B2 (en) 2018-02-23 2021-04-13 Asm Ip Holding B.V. Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment
US11473195B2 (en) 2018-03-01 2022-10-18 Asm Ip Holding B.V. Semiconductor processing apparatus and a method for processing a substrate
US11629406B2 (en) 2018-03-09 2023-04-18 Asm Ip Holding B.V. Semiconductor processing apparatus comprising one or more pyrometers for measuring a temperature of a substrate during transfer of the substrate
US11114283B2 (en) 2018-03-16 2021-09-07 Asm Ip Holding B.V. Reactor, system including the reactor, and methods of manufacturing and using same
KR102646467B1 (en) 2018-03-27 2024-03-11 에이에스엠 아이피 홀딩 비.브이. Method of forming an electrode on a substrate and a semiconductor device structure including an electrode
US10510536B2 (en) 2018-03-29 2019-12-17 Asm Ip Holding B.V. Method of depositing a co-doped polysilicon film on a surface of a substrate within a reaction chamber
US11088002B2 (en) 2018-03-29 2021-08-10 Asm Ip Holding B.V. Substrate rack and a substrate processing system and method
US11230766B2 (en) 2018-03-29 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
KR102501472B1 (en) 2018-03-30 2023-02-20 에이에스엠 아이피 홀딩 비.브이. Substrate processing method
US12025484B2 (en) 2018-05-08 2024-07-02 Asm Ip Holding B.V. Thin film forming method
TWI843623B (en) 2018-05-08 2024-05-21 荷蘭商Asm Ip私人控股有限公司 Methods for depositing an oxide film on a substrate by a cyclical deposition process and related device structures
KR20190129718A (en) 2018-05-11 2019-11-20 에이에스엠 아이피 홀딩 비.브이. Methods for forming a doped metal carbide film on a substrate and related semiconductor device structures
KR102596988B1 (en) 2018-05-28 2023-10-31 에이에스엠 아이피 홀딩 비.브이. Method of processing a substrate and a device manufactured by the same
TWI840362B (en) 2018-06-04 2024-05-01 荷蘭商Asm Ip私人控股有限公司 Wafer handling chamber with moisture reduction
US11718913B2 (en) 2018-06-04 2023-08-08 Asm Ip Holding B.V. Gas distribution system and reactor system including same
US11286562B2 (en) 2018-06-08 2022-03-29 Asm Ip Holding B.V. Gas-phase chemical reactor and method of using same
KR102568797B1 (en) 2018-06-21 2023-08-21 에이에스엠 아이피 홀딩 비.브이. Substrate processing system
US10797133B2 (en) 2018-06-21 2020-10-06 Asm Ip Holding B.V. Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures
WO2020003000A1 (en) 2018-06-27 2020-01-02 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
TW202409324A (en) 2018-06-27 2024-03-01 荷蘭商Asm Ip私人控股有限公司 Cyclic deposition processes for forming metal-containing material
KR102686758B1 (en) 2018-06-29 2024-07-18 에이에스엠 아이피 홀딩 비.브이. Method for depositing a thin film and manufacturing a semiconductor device
US10612136B2 (en) 2018-06-29 2020-04-07 ASM IP Holding, B.V. Temperature-controlled flange and reactor system including same
US10755922B2 (en) 2018-07-03 2020-08-25 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10388513B1 (en) 2018-07-03 2019-08-20 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10767789B2 (en) 2018-07-16 2020-09-08 Asm Ip Holding B.V. Diaphragm valves, valve components, and methods for forming valve components
US10483099B1 (en) 2018-07-26 2019-11-19 Asm Ip Holding B.V. Method for forming thermally stable organosilicon polymer film
US11053591B2 (en) 2018-08-06 2021-07-06 Asm Ip Holding B.V. Multi-port gas injection system and reactor system including same
US10883175B2 (en) 2018-08-09 2021-01-05 Asm Ip Holding B.V. Vertical furnace for processing substrates and a liner for use therein
US10829852B2 (en) 2018-08-16 2020-11-10 Asm Ip Holding B.V. Gas distribution device for a wafer processing apparatus
US11430674B2 (en) 2018-08-22 2022-08-30 Asm Ip Holding B.V. Sensor array, apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US11024523B2 (en) 2018-09-11 2021-06-01 Asm Ip Holding B.V. Substrate processing apparatus and method
KR102707956B1 (en) 2018-09-11 2024-09-19 에이에스엠 아이피 홀딩 비.브이. Method for deposition of a thin film
US11049751B2 (en) 2018-09-14 2021-06-29 Asm Ip Holding B.V. Cassette supply system to store and handle cassettes and processing apparatus equipped therewith
TWI844567B (en) 2018-10-01 2024-06-11 荷蘭商Asm Ip私人控股有限公司 Substrate retaining apparatus, system including the apparatus, and method of using same
US11232963B2 (en) 2018-10-03 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
KR102592699B1 (en) 2018-10-08 2023-10-23 에이에스엠 아이피 홀딩 비.브이. Substrate support unit and apparatuses for depositing thin film and processing the substrate including the same
US10847365B2 (en) 2018-10-11 2020-11-24 Asm Ip Holding B.V. Method of forming conformal silicon carbide film by cyclic CVD
US10811256B2 (en) 2018-10-16 2020-10-20 Asm Ip Holding B.V. Method for etching a carbon-containing feature
KR102546322B1 (en) 2018-10-19 2023-06-21 에이에스엠 아이피 홀딩 비.브이. Substrate processing apparatus and substrate processing method
KR102605121B1 (en) 2018-10-19 2023-11-23 에이에스엠 아이피 홀딩 비.브이. Substrate processing apparatus and substrate processing method
USD948463S1 (en) 2018-10-24 2022-04-12 Asm Ip Holding B.V. Susceptor for semiconductor substrate supporting apparatus
US10381219B1 (en) 2018-10-25 2019-08-13 Asm Ip Holding B.V. Methods for forming a silicon nitride film
US11087997B2 (en) 2018-10-31 2021-08-10 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
KR20200051105A (en) 2018-11-02 2020-05-13 에이에스엠 아이피 홀딩 비.브이. Substrate support unit and substrate processing apparatus including the same
US11572620B2 (en) 2018-11-06 2023-02-07 Asm Ip Holding B.V. Methods for selectively depositing an amorphous silicon film on a substrate
US11031242B2 (en) 2018-11-07 2021-06-08 Asm Ip Holding B.V. Methods for depositing a boron doped silicon germanium film
US10818758B2 (en) 2018-11-16 2020-10-27 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
US10847366B2 (en) 2018-11-16 2020-11-24 Asm Ip Holding B.V. Methods for depositing a transition metal chalcogenide film on a substrate by a cyclical deposition process
US10559458B1 (en) 2018-11-26 2020-02-11 Asm Ip Holding B.V. Method of forming oxynitride film
US12040199B2 (en) 2018-11-28 2024-07-16 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
US11217444B2 (en) 2018-11-30 2022-01-04 Asm Ip Holding B.V. Method for forming an ultraviolet radiation responsive metal oxide-containing film
KR102636428B1 (en) 2018-12-04 2024-02-13 에이에스엠 아이피 홀딩 비.브이. A method for cleaning a substrate processing apparatus
US11158513B2 (en) 2018-12-13 2021-10-26 Asm Ip Holding B.V. Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures
JP7504584B2 (en) 2018-12-14 2024-06-24 エーエスエム・アイピー・ホールディング・ベー・フェー Method and system for forming device structures using selective deposition of gallium nitride - Patents.com
TWI819180B (en) 2019-01-17 2023-10-21 荷蘭商Asm 智慧財產控股公司 Methods of forming a transition metal containing film on a substrate by a cyclical deposition process
KR20200091543A (en) 2019-01-22 2020-07-31 에이에스엠 아이피 홀딩 비.브이. Semiconductor processing device
CN111524788B (en) 2019-02-01 2023-11-24 Asm Ip私人控股有限公司 Method for topologically selective film formation of silicon oxide
TWI845607B (en) 2019-02-20 2024-06-21 荷蘭商Asm Ip私人控股有限公司 Cyclical deposition method and apparatus for filling a recess formed within a substrate surface
KR102626263B1 (en) 2019-02-20 2024-01-16 에이에스엠 아이피 홀딩 비.브이. Cyclical deposition method including treatment step and apparatus for same
JP2020136678A (en) 2019-02-20 2020-08-31 エーエスエム・アイピー・ホールディング・ベー・フェー Method for filing concave part formed inside front surface of base material, and device
KR20200102357A (en) 2019-02-20 2020-08-31 에이에스엠 아이피 홀딩 비.브이. Apparatus and methods for plug fill deposition in 3-d nand applications
TWI842826B (en) 2019-02-22 2024-05-21 荷蘭商Asm Ip私人控股有限公司 Substrate processing apparatus and method for processing substrate
US11742198B2 (en) 2019-03-08 2023-08-29 Asm Ip Holding B.V. Structure including SiOCN layer and method of forming same
KR20200108243A (en) 2019-03-08 2020-09-17 에이에스엠 아이피 홀딩 비.브이. Structure Including SiOC Layer and Method of Forming Same
KR20200108242A (en) 2019-03-08 2020-09-17 에이에스엠 아이피 홀딩 비.브이. Method for Selective Deposition of Silicon Nitride Layer and Structure Including Selectively-Deposited Silicon Nitride Layer
KR20200116033A (en) 2019-03-28 2020-10-08 에이에스엠 아이피 홀딩 비.브이. Door opener and substrate processing apparatus provided therewith
KR20200116855A (en) 2019-04-01 2020-10-13 에이에스엠 아이피 홀딩 비.브이. Method of manufacturing semiconductor device
KR20200123380A (en) 2019-04-19 2020-10-29 에이에스엠 아이피 홀딩 비.브이. Layer forming method and apparatus
KR20200125453A (en) 2019-04-24 2020-11-04 에이에스엠 아이피 홀딩 비.브이. Gas-phase reactor system and method of using same
KR20200130118A (en) 2019-05-07 2020-11-18 에이에스엠 아이피 홀딩 비.브이. Method for Reforming Amorphous Carbon Polymer Film
KR20200130121A (en) 2019-05-07 2020-11-18 에이에스엠 아이피 홀딩 비.브이. Chemical source vessel with dip tube
KR20200130652A (en) 2019-05-10 2020-11-19 에이에스엠 아이피 홀딩 비.브이. Method of depositing material onto a surface and structure formed according to the method
JP2020188254A (en) 2019-05-16 2020-11-19 エーエスエム アイピー ホールディング ビー.ブイ. Wafer boat handling device, vertical batch furnace, and method
JP2020188255A (en) 2019-05-16 2020-11-19 エーエスエム アイピー ホールディング ビー.ブイ. Wafer boat handling device, vertical batch furnace, and method
USD947913S1 (en) 2019-05-17 2022-04-05 Asm Ip Holding B.V. Susceptor shaft
USD975665S1 (en) 2019-05-17 2023-01-17 Asm Ip Holding B.V. Susceptor shaft
USD935572S1 (en) 2019-05-24 2021-11-09 Asm Ip Holding B.V. Gas channel plate
USD922229S1 (en) 2019-06-05 2021-06-15 Asm Ip Holding B.V. Device for controlling a temperature of a gas supply unit
KR20200141003A (en) 2019-06-06 2020-12-17 에이에스엠 아이피 홀딩 비.브이. Gas-phase reactor system including a gas detector
KR20200143254A (en) 2019-06-11 2020-12-23 에이에스엠 아이피 홀딩 비.브이. Method of forming an electronic structure using an reforming gas, system for performing the method, and structure formed using the method
USD944946S1 (en) 2019-06-14 2022-03-01 Asm Ip Holding B.V. Shower plate
USD931978S1 (en) 2019-06-27 2021-09-28 Asm Ip Holding B.V. Showerhead vacuum transport
KR20210005515A (en) 2019-07-03 2021-01-14 에이에스엠 아이피 홀딩 비.브이. Temperature control assembly for substrate processing apparatus and method of using same
JP7499079B2 (en) 2019-07-09 2024-06-13 エーエスエム・アイピー・ホールディング・ベー・フェー Plasma device using coaxial waveguide and substrate processing method
CN112216646A (en) 2019-07-10 2021-01-12 Asm Ip私人控股有限公司 Substrate supporting assembly and substrate processing device comprising same
KR20210010307A (en) 2019-07-16 2021-01-27 에이에스엠 아이피 홀딩 비.브이. Substrate processing apparatus
KR20210010820A (en) 2019-07-17 2021-01-28 에이에스엠 아이피 홀딩 비.브이. Methods of forming silicon germanium structures
KR20210010816A (en) 2019-07-17 2021-01-28 에이에스엠 아이피 홀딩 비.브이. Radical assist ignition plasma system and method
US11643724B2 (en) 2019-07-18 2023-05-09 Asm Ip Holding B.V. Method of forming structures using a neutral beam
KR20210010817A (en) 2019-07-19 2021-01-28 에이에스엠 아이피 홀딩 비.브이. Method of Forming Topology-Controlled Amorphous Carbon Polymer Film
TWI839544B (en) 2019-07-19 2024-04-21 荷蘭商Asm Ip私人控股有限公司 Method of forming topology-controlled amorphous carbon polymer film
CN112309843A (en) 2019-07-29 2021-02-02 Asm Ip私人控股有限公司 Selective deposition method for achieving high dopant doping
CN112309899A (en) 2019-07-30 2021-02-02 Asm Ip私人控股有限公司 Substrate processing apparatus
CN112309900A (en) 2019-07-30 2021-02-02 Asm Ip私人控股有限公司 Substrate processing apparatus
US11227782B2 (en) 2019-07-31 2022-01-18 Asm Ip Holding B.V. Vertical batch furnace assembly
US11587815B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11587814B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
CN118422165A (en) 2019-08-05 2024-08-02 Asm Ip私人控股有限公司 Liquid level sensor for chemical source container
USD965524S1 (en) 2019-08-19 2022-10-04 Asm Ip Holding B.V. Susceptor support
USD965044S1 (en) 2019-08-19 2022-09-27 Asm Ip Holding B.V. Susceptor shaft
JP2021031769A (en) 2019-08-21 2021-03-01 エーエスエム アイピー ホールディング ビー.ブイ. Production apparatus of mixed gas of film deposition raw material and film deposition apparatus
USD949319S1 (en) 2019-08-22 2022-04-19 Asm Ip Holding B.V. Exhaust duct
KR20210024423A (en) 2019-08-22 2021-03-05 에이에스엠 아이피 홀딩 비.브이. Method for forming a structure with a hole
USD940837S1 (en) 2019-08-22 2022-01-11 Asm Ip Holding B.V. Electrode
USD979506S1 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Insulator
USD930782S1 (en) 2019-08-22 2021-09-14 Asm Ip Holding B.V. Gas distributor
KR20210024420A (en) 2019-08-23 2021-03-05 에이에스엠 아이피 홀딩 비.브이. Method for depositing silicon oxide film having improved quality by peald using bis(diethylamino)silane
US11286558B2 (en) 2019-08-23 2022-03-29 Asm Ip Holding B.V. Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film
KR20210029090A (en) 2019-09-04 2021-03-15 에이에스엠 아이피 홀딩 비.브이. Methods for selective deposition using a sacrificial capping layer
KR20210029663A (en) 2019-09-05 2021-03-16 에이에스엠 아이피 홀딩 비.브이. Substrate processing apparatus
US11562901B2 (en) 2019-09-25 2023-01-24 Asm Ip Holding B.V. Substrate processing method
CN112593212B (en) 2019-10-02 2023-12-22 Asm Ip私人控股有限公司 Method for forming topologically selective silicon oxide film by cyclic plasma enhanced deposition process
TWI846953B (en) 2019-10-08 2024-07-01 荷蘭商Asm Ip私人控股有限公司 Substrate processing device
KR20210042810A (en) 2019-10-08 2021-04-20 에이에스엠 아이피 홀딩 비.브이. Reactor system including a gas distribution assembly for use with activated species and method of using same
KR20210043460A (en) 2019-10-10 2021-04-21 에이에스엠 아이피 홀딩 비.브이. Method of forming a photoresist underlayer and structure including same
US12009241B2 (en) 2019-10-14 2024-06-11 Asm Ip Holding B.V. Vertical batch furnace assembly with detector to detect cassette
TWI834919B (en) 2019-10-16 2024-03-11 荷蘭商Asm Ip私人控股有限公司 Method of topology-selective film formation of silicon oxide
US11637014B2 (en) 2019-10-17 2023-04-25 Asm Ip Holding B.V. Methods for selective deposition of doped semiconductor material
KR20210047808A (en) 2019-10-21 2021-04-30 에이에스엠 아이피 홀딩 비.브이. Apparatus and methods for selectively etching films
KR20210050453A (en) 2019-10-25 2021-05-07 에이에스엠 아이피 홀딩 비.브이. Methods for filling a gap feature on a substrate surface and related semiconductor structures
US11646205B2 (en) 2019-10-29 2023-05-09 Asm Ip Holding B.V. Methods of selectively forming n-type doped material on a surface, systems for selectively forming n-type doped material, and structures formed using same
KR20210054983A (en) 2019-11-05 2021-05-14 에이에스엠 아이피 홀딩 비.브이. Structures with doped semiconductor layers and methods and systems for forming same
US11501968B2 (en) 2019-11-15 2022-11-15 Asm Ip Holding B.V. Method for providing a semiconductor device with silicon filled gaps
KR20210062561A (en) 2019-11-20 2021-05-31 에이에스엠 아이피 홀딩 비.브이. Method of depositing carbon-containing material on a surface of a substrate, structure formed using the method, and system for forming the structure
KR20210065848A (en) 2019-11-26 2021-06-04 에이에스엠 아이피 홀딩 비.브이. Methods for selectivley forming a target film on a substrate comprising a first dielectric surface and a second metallic surface
CN112951697A (en) 2019-11-26 2021-06-11 Asm Ip私人控股有限公司 Substrate processing apparatus
CN112885693A (en) 2019-11-29 2021-06-01 Asm Ip私人控股有限公司 Substrate processing apparatus
CN112885692A (en) 2019-11-29 2021-06-01 Asm Ip私人控股有限公司 Substrate processing apparatus
JP7527928B2 (en) 2019-12-02 2024-08-05 エーエスエム・アイピー・ホールディング・ベー・フェー Substrate processing apparatus and substrate processing method
KR20210070898A (en) 2019-12-04 2021-06-15 에이에스엠 아이피 홀딩 비.브이. Substrate processing apparatus
TW202125596A (en) 2019-12-17 2021-07-01 荷蘭商Asm Ip私人控股有限公司 Method of forming vanadium nitride layer and structure including the vanadium nitride layer
US11527403B2 (en) 2019-12-19 2022-12-13 Asm Ip Holding B.V. Methods for filling a gap feature on a substrate surface and related semiconductor structures
TW202140135A (en) 2020-01-06 2021-11-01 荷蘭商Asm Ip私人控股有限公司 Gas supply assembly and valve plate assembly
KR20210089079A (en) 2020-01-06 2021-07-15 에이에스엠 아이피 홀딩 비.브이. Channeled lift pin
US11993847B2 (en) 2020-01-08 2024-05-28 Asm Ip Holding B.V. Injector
KR102675856B1 (en) 2020-01-20 2024-06-17 에이에스엠 아이피 홀딩 비.브이. Method of forming thin film and method of modifying surface of thin film
TW202130846A (en) 2020-02-03 2021-08-16 荷蘭商Asm Ip私人控股有限公司 Method of forming structures including a vanadium or indium layer
TW202146882A (en) 2020-02-04 2021-12-16 荷蘭商Asm Ip私人控股有限公司 Method of verifying an article, apparatus for verifying an article, and system for verifying a reaction chamber
US11776846B2 (en) 2020-02-07 2023-10-03 Asm Ip Holding B.V. Methods for depositing gap filling fluids and related systems and devices
US11781243B2 (en) 2020-02-17 2023-10-10 Asm Ip Holding B.V. Method for depositing low temperature phosphorous-doped silicon
TW202203344A (en) 2020-02-28 2022-01-16 荷蘭商Asm Ip控股公司 System dedicated for parts cleaning
KR20210116249A (en) 2020-03-11 2021-09-27 에이에스엠 아이피 홀딩 비.브이. lockout tagout assembly and system and method of using same
KR20210116240A (en) 2020-03-11 2021-09-27 에이에스엠 아이피 홀딩 비.브이. Substrate handling device with adjustable joints
CN113394086A (en) 2020-03-12 2021-09-14 Asm Ip私人控股有限公司 Method for producing a layer structure having a target topological profile
KR20210124042A (en) 2020-04-02 2021-10-14 에이에스엠 아이피 홀딩 비.브이. Thin film forming method
TW202146689A (en) 2020-04-03 2021-12-16 荷蘭商Asm Ip控股公司 Method for forming barrier layer and method for manufacturing semiconductor device
TW202145344A (en) 2020-04-08 2021-12-01 荷蘭商Asm Ip私人控股有限公司 Apparatus and methods for selectively etching silcon oxide films
KR20210128343A (en) 2020-04-15 2021-10-26 에이에스엠 아이피 홀딩 비.브이. Method of forming chromium nitride layer and structure including the chromium nitride layer
US11821078B2 (en) 2020-04-15 2023-11-21 Asm Ip Holding B.V. Method for forming precoat film and method for forming silicon-containing film
US11996289B2 (en) 2020-04-16 2024-05-28 Asm Ip Holding B.V. Methods of forming structures including silicon germanium and silicon layers, devices formed using the methods, and systems for performing the methods
KR20210132600A (en) 2020-04-24 2021-11-04 에이에스엠 아이피 홀딩 비.브이. Methods and systems for depositing a layer comprising vanadium, nitrogen, and a further element
TW202146831A (en) 2020-04-24 2021-12-16 荷蘭商Asm Ip私人控股有限公司 Vertical batch furnace assembly, and method for cooling vertical batch furnace
JP2021172884A (en) 2020-04-24 2021-11-01 エーエスエム・アイピー・ホールディング・ベー・フェー Method of forming vanadium nitride-containing layer and structure comprising vanadium nitride-containing layer
KR20210134226A (en) 2020-04-29 2021-11-09 에이에스엠 아이피 홀딩 비.브이. Solid source precursor vessel
KR20210134869A (en) 2020-05-01 2021-11-11 에이에스엠 아이피 홀딩 비.브이. Fast FOUP swapping with a FOUP handler
TW202147543A (en) 2020-05-04 2021-12-16 荷蘭商Asm Ip私人控股有限公司 Semiconductor processing system
KR20210141379A (en) 2020-05-13 2021-11-23 에이에스엠 아이피 홀딩 비.브이. Laser alignment fixture for a reactor system
TW202146699A (en) 2020-05-15 2021-12-16 荷蘭商Asm Ip私人控股有限公司 Method of forming a silicon germanium layer, semiconductor structure, semiconductor device, method of forming a deposition layer, and deposition system
KR20210143653A (en) 2020-05-19 2021-11-29 에이에스엠 아이피 홀딩 비.브이. Substrate processing apparatus
KR20210145078A (en) 2020-05-21 2021-12-01 에이에스엠 아이피 홀딩 비.브이. Structures including multiple carbon layers and methods of forming and using same
KR102702526B1 (en) 2020-05-22 2024-09-03 에이에스엠 아이피 홀딩 비.브이. Apparatus for depositing thin films using hydrogen peroxide
TW202201602A (en) 2020-05-29 2022-01-01 荷蘭商Asm Ip私人控股有限公司 Substrate processing device
TW202212620A (en) 2020-06-02 2022-04-01 荷蘭商Asm Ip私人控股有限公司 Apparatus for processing substrate, method of forming film, and method of controlling apparatus for processing substrate
TW202218133A (en) 2020-06-24 2022-05-01 荷蘭商Asm Ip私人控股有限公司 Method for forming a layer provided with silicon
TW202217953A (en) 2020-06-30 2022-05-01 荷蘭商Asm Ip私人控股有限公司 Substrate processing method
KR102707957B1 (en) 2020-07-08 2024-09-19 에이에스엠 아이피 홀딩 비.브이. Method for processing a substrate
TW202219628A (en) 2020-07-17 2022-05-16 荷蘭商Asm Ip私人控股有限公司 Structures and methods for use in photolithography
TW202204662A (en) 2020-07-20 2022-02-01 荷蘭商Asm Ip私人控股有限公司 Method and system for depositing molybdenum layers
US12040177B2 (en) 2020-08-18 2024-07-16 Asm Ip Holding B.V. Methods for forming a laminate film by cyclical plasma-enhanced deposition processes
KR20220027026A (en) 2020-08-26 2022-03-07 에이에스엠 아이피 홀딩 비.브이. Method and system for forming metal silicon oxide and metal silicon oxynitride
TW202229601A (en) 2020-08-27 2022-08-01 荷蘭商Asm Ip私人控股有限公司 Method of forming patterned structures, method of manipulating mechanical property, device structure, and substrate processing system
USD990534S1 (en) 2020-09-11 2023-06-27 Asm Ip Holding B.V. Weighted lift pin
USD1012873S1 (en) 2020-09-24 2024-01-30 Asm Ip Holding B.V. Electrode for semiconductor processing apparatus
US12009224B2 (en) 2020-09-29 2024-06-11 Asm Ip Holding B.V. Apparatus and method for etching metal nitrides
KR20220045900A (en) 2020-10-06 2022-04-13 에이에스엠 아이피 홀딩 비.브이. Deposition method and an apparatus for depositing a silicon-containing material
CN114293174A (en) 2020-10-07 2022-04-08 Asm Ip私人控股有限公司 Gas supply unit and substrate processing apparatus including the same
TW202229613A (en) 2020-10-14 2022-08-01 荷蘭商Asm Ip私人控股有限公司 Method of depositing material on stepped structure
KR20220053482A (en) 2020-10-22 2022-04-29 에이에스엠 아이피 홀딩 비.브이. Method of depositing vanadium metal, structure, device and a deposition assembly
TW202223136A (en) 2020-10-28 2022-06-16 荷蘭商Asm Ip私人控股有限公司 Method for forming layer on substrate, and semiconductor processing system
TW202235649A (en) 2020-11-24 2022-09-16 荷蘭商Asm Ip私人控股有限公司 Methods for filling a gap and related systems and devices
TW202235675A (en) 2020-11-30 2022-09-16 荷蘭商Asm Ip私人控股有限公司 Injector, and substrate processing apparatus
US11946137B2 (en) 2020-12-16 2024-04-02 Asm Ip Holding B.V. Runout and wobble measurement fixtures
TW202231903A (en) 2020-12-22 2022-08-16 荷蘭商Asm Ip私人控股有限公司 Transition metal deposition method, transition metal layer, and deposition assembly for depositing transition metal on substrate
USD1023959S1 (en) 2021-05-11 2024-04-23 Asm Ip Holding B.V. Electrode for substrate processing apparatus
USD980813S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas flow control plate for substrate processing apparatus
USD980814S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas distributor for substrate processing apparatus
USD981973S1 (en) 2021-05-11 2023-03-28 Asm Ip Holding B.V. Reactor wall for substrate processing apparatus
USD990441S1 (en) 2021-09-07 2023-06-27 Asm Ip Holding B.V. Gas flow control plate

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050025885A1 (en) * 2003-07-30 2005-02-03 Mcswiney Michael L. Low-temperature silicon nitride deposition
US20050064207A1 (en) * 2003-04-21 2005-03-24 Yoshihide Senzaki System and method for forming multi-component dielectric films

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4200666A (en) * 1978-08-02 1980-04-29 Texas Instruments Incorporated Single component monomer for silicon nitride deposition
US4595775A (en) * 1984-04-06 1986-06-17 Petrarch Systems, Inc. N-methylhydridosilazanes, polymers thereof, methods of making same and silicon nitrides produced therefrom
US5008422A (en) * 1985-04-26 1991-04-16 Sri International Polysilazanes and related compositions, processes and uses
US4719125A (en) * 1985-10-11 1988-01-12 Allied Corporation Cyclosilazane polymers as dielectric films in integrated circuit fabrication technology
US6566281B1 (en) * 1997-10-15 2003-05-20 International Business Machines Corporation Nitrogen-rich barrier layer and structures formed
US5968611A (en) * 1997-11-26 1999-10-19 The Research Foundation Of State University Of New York Silicon nitrogen-based films and method of making the same
JP3819660B2 (en) * 2000-02-15 2006-09-13 株式会社日立国際電気 Semiconductor device manufacturing method and semiconductor manufacturing apparatus
US6630413B2 (en) * 2000-04-28 2003-10-07 Asm Japan K.K. CVD syntheses of silicon nitride materials
EP1421607A2 (en) * 2001-02-12 2004-05-26 ASM America, Inc. Improved process for deposition of semiconductor films
US7294582B2 (en) * 2002-07-19 2007-11-13 Asm International, N.V. Low temperature silicon compound deposition
JP4358492B2 (en) * 2002-09-25 2009-11-04 レール・リキード−ソシエテ・アノニム・プール・レテュード・エ・レクスプロワタシオン・デ・プロセデ・ジョルジュ・クロード Method for producing silicon nitride film or silicon oxynitride film by thermal chemical vapor deposition
US7098150B2 (en) * 2004-03-05 2006-08-29 Air Liquide America L.P. Method for novel deposition of high-k MSiON dielectric films
JP4179311B2 (en) * 2004-07-28 2008-11-12 東京エレクトロン株式会社 Film forming method, film forming apparatus, and storage medium
US20060051975A1 (en) * 2004-09-07 2006-03-09 Ashutosh Misra Novel deposition of SiON dielectric films

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050064207A1 (en) * 2003-04-21 2005-03-24 Yoshihide Senzaki System and method for forming multi-component dielectric films
US20050025885A1 (en) * 2003-07-30 2005-02-03 Mcswiney Michael L. Low-temperature silicon nitride deposition

Also Published As

Publication number Publication date
KR20080028963A (en) 2008-04-02
JP2009500857A (en) 2009-01-08
WO2007008653A3 (en) 2007-11-01
EP1907599A2 (en) 2008-04-09
US20070031598A1 (en) 2007-02-08
TW200715376A (en) 2007-04-16

Similar Documents

Publication Publication Date Title
US20070031598A1 (en) Method for depositing silicon-containing films
TWI753523B (en) High temperature thermal ald silicon nitride films
US7122222B2 (en) Precursors for depositing silicon containing films and processes thereof
US7084076B2 (en) Method for forming silicon dioxide film using siloxane
US7776395B2 (en) Method of depositing catalyst assisted silicates of high-k materials
EP0964441B1 (en) Deposition of silicon dioxide and silicon oxynitride using bis(tertiarybutylamino)silane
US7897208B2 (en) Low temperature ALD SiO2
US20060159847A1 (en) Method and apparatus for low temperature dielectric deposition using monomolecular precursors
EP1383163B1 (en) Methods for forming silicon dioxide layers on substrates using atomic layer deposition
US20070010072A1 (en) Uniform batch film deposition process and films so produced
WO2004010467A2 (en) Low temperature dielectric deposition using aminosilane and ozone
US20060178019A1 (en) Low temperature deposition of silicon oxides and oxynitrides
US20070160774A1 (en) Method for producing silicon nitride films and silicon oxynitride films by chemical vapor deposition
JP2010539730A (en) Method for forming a silicon-containing film
US6465044B1 (en) Chemical vapor deposition of silicon oxide films using alkylsiloxane oligomers with ozone
JP2018515921A (en) Method for depositing dielectric thin films with low dielectric constant and low wet etch rate
CN107924841A (en) The manufacture method of gas supply part, lining processor and semiconductor devices
KR20140059115A (en) Forming method of silicon-containing thin film
KR20050018641A (en) Low temperature dielectric deposition using aminosilane and ozone
JP2004288709A (en) Method of manufacturing semiconductor device

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application
ENP Entry into the national phase

Ref document number: 2008520410

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

WWE Wipo information: entry into national phase

Ref document number: 2006786601

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 1020087001945

Country of ref document: KR