WO2006080594A1 - Solid-state image pickup device using charged-coupled devices and method for fabricating the same - Google Patents

Solid-state image pickup device using charged-coupled devices and method for fabricating the same Download PDF

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Publication number
WO2006080594A1
WO2006080594A1 PCT/KR2005/000252 KR2005000252W WO2006080594A1 WO 2006080594 A1 WO2006080594 A1 WO 2006080594A1 KR 2005000252 W KR2005000252 W KR 2005000252W WO 2006080594 A1 WO2006080594 A1 WO 2006080594A1
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Prior art keywords
film
protective film
type impurity
doped region
impurity doped
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PCT/KR2005/000252
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French (fr)
Inventor
Kyung-Sik Kim
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International Display Solutions Co., Ltd.
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Publication of WO2006080594A1 publication Critical patent/WO2006080594A1/en

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    • A—HUMAN NECESSITIES
    • A47—FURNITURE; DOMESTIC ARTICLES OR APPLIANCES; COFFEE MILLS; SPICE MILLS; SUCTION CLEANERS IN GENERAL
    • A47L—DOMESTIC WASHING OR CLEANING; SUCTION CLEANERS IN GENERAL
    • A47L17/00—Apparatus or implements used in manual washing or cleaning of crockery, table-ware, cooking-ware or the like
    • A47L17/04—Pan or pot cleaning utensils
    • A47L17/08—Pads; Balls of steel wool, wire, or plastic meshes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/148—Charge coupled imagers
    • H01L27/14806—Structural or functional details thereof
    • H01L27/14812—Special geometry or disposition of pixel-elements, address lines or gate-electrodes
    • H01L27/14818—Optical shielding
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • B32B27/42—Layered products comprising a layer of synthetic resin comprising condensation resins of aldehydes, e.g. with phenols, ureas or melamines
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14689—MOS based technologies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/148—Charge coupled imagers
    • H01L27/14806—Structural or functional details thereof

Definitions

  • the present invention relates to a solid-state image pickup device using charged coupled devices (CCD), and more particularly to a method for fabricating a solid-state image pickup device using CCD capable of simplifying processes to increase yield, overcoming imprecise light collection caused by diffuse reflection and preventing light from being incident on adjacent cells, and the solid-state image pickup device using CCD fabricated thereby.
  • CCD charged coupled devices
  • FIG. 1 is a top view illustrating a solid-state image pickup device using CCD with a general honeycomb structure.
  • the solid-state image pickup device using CCD includes a photo-resist part 10 formed on one surface of a semiconductor substrate 1, an interface part 60 formed at the outside of the photo-resist part 10, an output transfer part 70 formed at the outside of the interface part 60 and an output unit 80 adjacently connected to one end of the output transfer part 70.
  • the photo-resist part 10 formed on the semiconductor substrate 1 includes 8 photoelectric conversion element columns 20, 8 photoelectric conversion element rows 21, 4 vertical transfer CCD 30 and 32 readout gate regions 40.
  • Each of the 8 photoelectric conversion element columns 20 includes 4 photoelectric conversion elements 22 in an n-type region within a p-type well. Also, each of the 8 photoelectric conversion element rows 21 includes 4 photoelectric conversion elements 22.
  • Each of the vertical transfer CCD 30 includes a charge transfer channel (not shown) composed in an n-type region within a p-type well, which is formed on one surface of the semiconductor substrate 1, 5 first transfer electrodes 32 formed on an electrical insulation film of the surface of the semiconductor substrate 1, crossing the charge transfer channel, in a plan view, and 4 second transfer electrodes 33 formed on the electrical insulation film of the upper surface of the semiconductor substrate 1, crossing the charge transfer channel, in a plan view.
  • the first and second transfer electrodes 32 and 33 are formed in first and second poly silicon layers, respectively. The first and second transfer electrodes 32 and 33 are alternatively formed along the charge transfer channel.
  • the interface unit 60 includes 12 charge transfer stages connected to one end of the charge transfer channel composing the vertical transfer CCD 30.
  • Each of the 12 charge transfer stages includes an interface unit charge transfer channel (not shown) led to the charge transfer channel, and one of 3 transfer electrodes 61, 62 and 63 formed on the semiconductor substrate 1, crossing the interface unit charge transfer channel in a plan view.
  • FIG. 2 is a cross-sectional view of a pixel of the prior art solid-state image pickup device using CCD.
  • a photodiode (PD) area for the prior art solid-state image pickup device using CCD 200 is formed such that a first p-type well 111, approximately 3mm thick, is formed on an n-type semiconductor substrate 110 using impurity implantation, etc., then an n-type impurity doped region (PDN) 113 is formed on the first p-type well 111, and finally a p-type impurity doped region (PDP) 114 is formed on the surface of the n-type impurity doped region 113.
  • PDN n-type impurity doped region
  • PDP p-type impurity doped region
  • the p-type impurity doped region 114 is doped with a higher concentration of p- type impurities such that it becomes a p+-type doped region, which prevents electrons generated on the surface of the photodiode from inflowing in the photodiode region. Also, the n-type impurity doped region 113 formed under the p-type impurity doped region 114 is doped by implanting ions thereto to accumulate the electrons.
  • the first p-type well 111 is formed under the n-type impurity doped region 113 to control Blooming and shutter control.
  • the first p-type well 111 Since the greater the depth of the first p-type well 111 is the wider the photodiode area is in the depth direction, a relatively large amount of electrons are gathered, thereby increasing sensitivity. However, if the first p-type well 111 is exceedingly deep, since electrons are generated by infrared light as well as red visible light, it may have a negative effect upon color reproduction. Therefore, based on optimum energy and dose units, the first p-type well should be implanted by ions.
  • a second p-type well 115 is formed on the first p-type well 111 on the surface of the n-type semiconductor substrate 110.
  • the second p-type well 115 is spaced from the n-type impurity doped region 113 by a predetermined distance.
  • the second p-type well 115 forms a buried CCD (BCCD) 118 around the surface thereof.
  • BCCD buried CCD
  • a transfer gate (TG) 119 and a channel stop region (CST) 117 are formed between the n-type impurity doped region 113 and the second p-type well 115.
  • the TG 119 connects the n-type impurity doped region 113 with the second p-type well 115, and the CST 117 prevents electrons from jumping to adjacent cells.
  • a first protective film 121 is formed on the surface including the n-type impurity doped region 113 and the second p-type well 115.
  • Poly silicon electrodes 141 and 143 are formed on the first protective film, which is the upper side of the second p-type well 115 using chemical vapor deposition (CVD).
  • a second protective film 123 covers the upper side thereof. After that, a metal light shielding film 124 is formed on the second protective film 123 by etching, such that the n-type impurity doped region 113 is opened.
  • a boron phosphorus silicate glass (BPSG) layer 125 is deposited thereon.
  • a passivation film or planarizing film 126 are formed on the BPSG film 125 and then planarized by a planarizing process.
  • a color filter 130 is formed on the planarized surface of the passivation film or planarizing film 126.
  • the passivation film or planarizing film are made of different materials, their refractive indexes are different from each other. Therefore, diffuse reflection is increased so that light collection cannot be normally performed and adjacent pixels are affected, thereby deteriorating image quality.
  • the present invention has been made in view of the above problems, and it is an object of the present invention to provide a method for fabricating a solid-state image pickup device using CCD capable of simplifying processes to increase yield, overcoming imprecise light collection caused by diffuse reflection and preventing light from being incident on adjacent pixels, and the solid-state image pickup device using CCD fabricated thereby.
  • a solid-state image pickup device using charged-coupled devices (CCD) including an n-type impurity doped region and buried charged-coupled devices (BCCD) region, formed on a surface of the semiconductor substrate.
  • CCD charged-coupled devices
  • BCCD buried charged-coupled devices
  • the solid-state image pickup device comprises a first protective film formed on the n-type impurity doped region and the BCCD region; poly silicon electrodes prepared on the first protective film formed on the BCCD region; a second protective film and a metal light shielding film sequentially coated on the poly silicon electrodes; a planarized BPSG film formed on the metal light shielding film and the first protective film of the surface of the n-type impurity doped region; and a color filter pattern is formed on the planaized BPSG film.
  • the first and second protective film may be formed by one of SiO ,
  • the metal light shielding film may be formed by stacking one of W,
  • the BPSG film has a thickness larger than summation from the first protective film to the metal shielding light film, and the thickness of the BPSG film may be 1200A ⁇ 2000A.
  • a method for fabricating a solid-state image pickup device using charged-coupled devices including an n-type impurity doped region and buried charged-coupled device (BCCD) region formed on a surface of the semiconductor substrate.
  • CCD charged-coupled devices
  • BCCD buried charged-coupled device
  • the method comprises the steps of: forming a first protective film on the n-type impurity doped region and the BCCD region; forming two poly silicon electrodes on the first protective film of the upper part of the BCCD region and then forming a second protective film on the two poly silicon electrodes; forming a metal light shielding film on the second protective film to open the n-type impurity doped region; and forming a BPSG film on the metal light shielding film and the first protective film, and planarizing the upper surface of the BPSG film to form a color filter pattern thereon.
  • the step of forming the metal shielding film may include the steps of: depositing W or WSi to a predetermined thickness using sputtering or CVD; and etching only the upper side of the n-type impurity doped region.
  • the BPSG film may be deposited to have a thickness larger than summation of the metal light shielding film and the poly silicon electrodes.
  • the BPSG film is planarized by chemical mechanical polishing (CMP).
  • the CMP may be proceeded to until concave forms on the BPSG film can be removed therefrom.
  • CCD compact compact disc
  • the method for fabricating the solid-state image pickup device the production processes can be simplified, thereby avoiding performance of unnecessary process and instead increasing yield.
  • the present invention avoids stacking materials whose refraction indexes differ from each other, it can prevent diffuse reflection from increasing such that light can be normally collected, and light from inflowing to adjacent cells such that picture quality cannot be deteriorated.
  • Fig. 1 is a top view illustrating a solid-state image pickup device using CCD with a general honeycomb structure
  • FIG. 2 is a cross-sectional view of a pixel of the prior art solid-state image pickup device using CCD;
  • FIG. 3 is a cross-sectional view of a solid-state image pickup device using CCD according to the present invention.
  • FIGs. 4a to 4c are cross-sectional views describing a method for manufacturing a solid-state image pickup device using CCD according to the present invention.
  • FIG. 3 is a cross-sectional view of a solid-state image pickup device using CCD according to the present invention.
  • the solid-state image pickup device 300 is formed such that a first p-type well layer 211 of approximately 3mm thick is formed on an n-type semiconductor substrate 210 using impurity implantation, etc., then an n-type impurity doped region (PDN) 213 is formed on the first p-type well 211, and finally a p-type impurity doped region (PDP) 214 is formed on the surface of the n-type impurity doped region 213.
  • PDN n-type impurity doped region
  • PDP p-type impurity doped region
  • the p-type impurity doped region 114 is doped with a higher concentration of p- type impurities such that it becomes a p+-type doped region, which prevents electrons generated on the surface of the photodiode from inflowing in the photodiode area.
  • the n-type impurity doped region 213 formed under the p-type impurity doped region 214 is doped by implanting ions thereto to accumulate the electrons.
  • a second p-type well layer 215 is formed on the first p-type well layer 211 on the surface of the n-type semiconductor substrate 210.
  • the second p-type well layer 215 is spaced from the n-type impurity doped region 213 at a predetermined distance.
  • the second p-type well layer 215 forms a buried CCD (BCCD) 218 around the surface thereof.
  • the BCCD 218 accumulates and transfers electrons according to voltages applied to the poly silicon electrodes 241 and 243.
  • a transfer gate (TG) 219 and a channel stop region (CST) 217 are formed between the n-type impurity doped region 213 and the second p-type well layer 215.
  • the TG 219 connects the n-type impurity doped region 213 with the second p-type well 215, and the CST 217 prevents electrons from jumping to adjacent cells.
  • a first protective film 221 is formed on the surfaces of the n-type impurity doped region 213, the second p-type well layer 215, and the BCCD regions 218, prepared on the surface of the n-type impurity doped region 213 and the second p-type well layer 215.
  • the first protective film 221 is formed by stacking one of SiO , SiON, SiN, or any combination thereof.
  • Two poly silicon electrodes 241 and 243 are formed to be partially overlapped on the first protective film 221 of the surface of the BCCD region 218 by chemical vapor deposition (CVD) and etching.
  • CVD chemical vapor deposition
  • the poly silicon electrodes 241 and 243 are covered by a thin second protective film 223 thereon.
  • the second protective film 223 is formed by stacking one of SiO , SiON, SiN, or any combination thereof.
  • the second protective film 223 forms a metal light shielding film 224 thereon such that the n-type impurity doped region 213 cannot be screened.
  • the metal light shielding film 224 is formed by stacking one of W, Mo, Ti or any combination thereof. Also, the metal light shielding film 224 is formed by stacking one of WSi, MoSi, TiSi or any combination thereof.
  • a boron phosphorus silicate glass (BPSG) film 225 is formed on the metal light shielding film 224 opening the n-type impurity doped region 213.
  • the BPSG film 225 is deposited on the upper surface of the n-type impurity doped region 213 as well as the metal light shielding film 224.
  • the BPSG 225 is convex at a portion forming the poly silicon electrodes 241 and 243 and concave at a portion of the n-type impurity doped region 213.
  • the upper surface of the BPSG film 225 is planarized by a planarizing method.
  • a color filter pattern 230 is formed on the planarized surface of the BPSG film 225.
  • the BPSG film 225 should be stacked such that it is thicker than summation from the first protective film 221 to the metal light shielding film 224. Since the upper surface of the BPSG film 225 is planirzed after the BPSG film 225 is stacked, if the thickness of the BPSG film 225 is less thick than summation from the first protective film 221 to the metal light shielding film 224, it may be possible to remove the metal light shielding film 224 therefrom during the planarizing process. Therefore, the BPSG film 225 must be stacked over a predetermined thickness.
  • the BPSG film 225 is formed approximately
  • the ploy silicon electrodes 241 and 243 are formed 800A ⁇ 1000 A thick, and the second protective film 223 is formed 400A ⁇ 800A thick.
  • FIGs. 4a to 4c are cross-sectional views describing a method for manufacturing a solid-state image pickup device using CCD according to the present invention. With reference to the drawings, the characteristic processes are described in detail below.
  • impurity doped regions including an n-type impurity doped region 213 and
  • BCCD region 218 and well layers are formed on the semiconductor substrate 210. Since these processes are the same as the above description, a detailed description is omitted below.
  • a first protective film 221 is formed on the n-type impurity doped region 213 and the BCCD region 218 by stacking one of SiO , SiON, SiN, or any combination thereof.
  • Two poly silicon electrodes 241 and 243 are formed on the first protective film 221 formed on the surface of the BCCD region 218 by deposition and etching.
  • a second protective film 223 is formed on the two poly silicon electrodes 214 and 243 by stacking one of SiO , SiON, SiN, or any combination thereof.
  • a metal light shielding film 224 is formed on the second protective film 223.
  • the metal light shielding film 224 is formed on the n-type impurity doped region 213 by etching such that the upper side of the n-type impurity doped region 213 can be partially opened.
  • the metal light shielding film 224 is formed like that one or more than at least two of W, Mo, Ti, Wsi, MoSi, TiSi are deposited on the first and second protective films 221 and 223 at a predetermined thickness using sputtering or chemical vapor deposition (CVD), and, in order to open the upper side of the n-type impurity doped region 213, only W, etc. stacked on the upper surface of the first protective film 221 formed on the n-type impurity doped region is removed therefrom by etching.
  • CVD chemical vapor deposition
  • a BPSG film 225 with a predetermined thickness is formed on the metal light shielding film 224 and the first protective film 221.
  • the BPSG film 225 is stacked, it is convex at the portion in which the metal light shielding film 224 is formed and concave at the portion in which the opened n- type impurity doped region 213 is formed.
  • the BPSG film 225 should be stacked over a predetermined thickness.
  • the BPSG film 225 can be formed to have a thickness (denoted by 'b' which is larger than summation (denoted by 'a' of the thickness of the metal shielding film 224 and that of the poly silicon electrodes 241 and 243.
  • the BPSG film 225 When the BPSG film 225 is formed with the thickness donated by 'a' in Fig. 4a, the upper surface of the BPSG film 225 is planarized by chemical mechanical polishing (CMP), as shown in Fig. 4b. Also, as shown in Fig. 4c, the BPSG film 225 forms a color filter pattern 230 on the planarized surface thereof.
  • CMP chemical mechanical polishing
  • BPSG film 225 is larger than summation of the metal light shielding film 224 and the poly silicon electrodes 241 and 243, even if the planarizing process is performed until the concave forms are removed on the BPSG film 225 by the CMP, the metal light shielding film 224 or the poly silicon electrodes 241 and 243 may not be damaged thereby.

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  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
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Abstract

A solid-state image pickup device using charged coupled devices (CCD) and a method for fabricating the solid-stat image pickup device are disclosed. The present invention can simplify processes to increase yield, overcome imprecise light collection caused by diffuse reflection and prevent light from being incident on adjacent cells. The solid-state image pickup device using charged-coupled devices (CCD) includes an n-type impurity doped region and buried charged-coupled devices (BCCD) region formed on a surface of the semiconductor substrate. Especially, the solid-state image pickup device comprises a first protective film formed on the n-type impurity doped region and the BCCD region, poly silicon electrodes prepared on the first protective film formed on the BCCD region, a second protective film and a metal light shielding film sequentially coated on the poly silicon electrodes, a planarized BPSG film formed on the metal light shielding film and the first protective film of the surface of the n-type impurity doped region, and a color filter pattern formed on the planaized BPSG film.

Description

Description
SOLID-STATE IMAGE PICKUP DEVICE USING CHARGED- COUPLED DEVICES AND METHOD FOR FABRICATING THE
SAME
Technical Field
[1] The present invention relates to a solid-state image pickup device using charged coupled devices (CCD), and more particularly to a method for fabricating a solid-state image pickup device using CCD capable of simplifying processes to increase yield, overcoming imprecise light collection caused by diffuse reflection and preventing light from being incident on adjacent cells, and the solid-state image pickup device using CCD fabricated thereby.
[2]
Background Art
[3] Fig. 1 is a top view illustrating a solid-state image pickup device using CCD with a general honeycomb structure.
[4] As shown in Fig. 1, the solid-state image pickup device using CCD includes a photo-resist part 10 formed on one surface of a semiconductor substrate 1, an interface part 60 formed at the outside of the photo-resist part 10, an output transfer part 70 formed at the outside of the interface part 60 and an output unit 80 adjacently connected to one end of the output transfer part 70.
[5] The photo-resist part 10 formed on the semiconductor substrate 1 includes 8 photoelectric conversion element columns 20, 8 photoelectric conversion element rows 21, 4 vertical transfer CCD 30 and 32 readout gate regions 40.
[6] Each of the 8 photoelectric conversion element columns 20 includes 4 photoelectric conversion elements 22 in an n-type region within a p-type well. Also, each of the 8 photoelectric conversion element rows 21 includes 4 photoelectric conversion elements 22.
[7] Each of the vertical transfer CCD 30 includes a charge transfer channel (not shown) composed in an n-type region within a p-type well, which is formed on one surface of the semiconductor substrate 1, 5 first transfer electrodes 32 formed on an electrical insulation film of the surface of the semiconductor substrate 1, crossing the charge transfer channel, in a plan view, and 4 second transfer electrodes 33 formed on the electrical insulation film of the upper surface of the semiconductor substrate 1, crossing the charge transfer channel, in a plan view. For example, the first and second transfer electrodes 32 and 33 are formed in first and second poly silicon layers, respectively. The first and second transfer electrodes 32 and 33 are alternatively formed along the charge transfer channel.
[8] The interface unit 60 includes 12 charge transfer stages connected to one end of the charge transfer channel composing the vertical transfer CCD 30. Each of the 12 charge transfer stages includes an interface unit charge transfer channel (not shown) led to the charge transfer channel, and one of 3 transfer electrodes 61, 62 and 63 formed on the semiconductor substrate 1, crossing the interface unit charge transfer channel in a plan view.
[9] Fig. 2 is a cross-sectional view of a pixel of the prior art solid-state image pickup device using CCD.
[10] As shown in Fig. 2, a photodiode (PD) area for the prior art solid-state image pickup device using CCD 200 is formed such that a first p-type well 111, approximately 3mm thick, is formed on an n-type semiconductor substrate 110 using impurity implantation, etc., then an n-type impurity doped region (PDN) 113 is formed on the first p-type well 111, and finally a p-type impurity doped region (PDP) 114 is formed on the surface of the n-type impurity doped region 113.
[11] The p-type impurity doped region 114 is doped with a higher concentration of p- type impurities such that it becomes a p+-type doped region, which prevents electrons generated on the surface of the photodiode from inflowing in the photodiode region. Also, the n-type impurity doped region 113 formed under the p-type impurity doped region 114 is doped by implanting ions thereto to accumulate the electrons.
[12] On the other hand, the first p-type well 111 is formed under the n-type impurity doped region 113 to control Blooming and shutter control. Here, the deeper the first p- type well 111 the larger the regions for accumulating light, thereby increasing its sensitivity.
[13] Since the greater the depth of the first p-type well 111 is the wider the photodiode area is in the depth direction, a relatively large amount of electrons are gathered, thereby increasing sensitivity. However, if the first p-type well 111 is exceedingly deep, since electrons are generated by infrared light as well as red visible light, it may have a negative effect upon color reproduction. Therefore, based on optimum energy and dose units, the first p-type well should be implanted by ions.
[14] A second p-type well 115 is formed on the first p-type well 111 on the surface of the n-type semiconductor substrate 110. The second p-type well 115 is spaced from the n-type impurity doped region 113 by a predetermined distance. The second p-type well 115 forms a buried CCD (BCCD) 118 around the surface thereof. The BCCD 118 accumulates and transfers electrons according to voltages applied to poly-silicon electrodes 141 and 143.
[15] A transfer gate (TG) 119 and a channel stop region (CST) 117 are formed between the n-type impurity doped region 113 and the second p-type well 115. Here, the TG 119 connects the n-type impurity doped region 113 with the second p-type well 115, and the CST 117 prevents electrons from jumping to adjacent cells.
[16] After forming such a structure as mentioned above, a first protective film 121 is formed on the surface including the n-type impurity doped region 113 and the second p-type well 115. Poly silicon electrodes 141 and 143 are formed on the first protective film, which is the upper side of the second p-type well 115 using chemical vapor deposition (CVD).
[17] After forming the poly silicon electrodes 141 and 143, a second protective film 123 covers the upper side thereof. After that, a metal light shielding film 124 is formed on the second protective film 123 by etching, such that the n-type impurity doped region 113 is opened.
[18] After forming the metal light shielding film 124 to open the n-type impurity doped region 113, a boron phosphorus silicate glass (BPSG) layer 125 is deposited thereon. After that, a passivation film or planarizing film 126 are formed on the BPSG film 125 and then planarized by a planarizing process. After that, a color filter 130 is formed on the planarized surface of the passivation film or planarizing film 126.
[19] In the prior art solid-state image pickup device using CCD, since a deposition process of the BPSG film is performed and then the passivation film or planarizing film are formed on the BPSG film, the prior art method has a disadvantage in that it performs unnecessary processes for the solid-state image pickup device.
[20] With performing unnecessary processes, it requires much time and endeavor, costs for fabricating the solid-state image pickup deice using CCD. Also, it decreases yield because of complicated processes.
[21] Also, since the passivation film or planarizing film are made of different materials, their refractive indexes are different from each other. Therefore, diffuse reflection is increased so that light collection cannot be normally performed and adjacent pixels are affected, thereby deteriorating image quality.
[22]
Disclosure of Invention Technical Problem
[23] Therefore, the present invention has been made in view of the above problems, and it is an object of the present invention to provide a method for fabricating a solid-state image pickup device using CCD capable of simplifying processes to increase yield, overcoming imprecise light collection caused by diffuse reflection and preventing light from being incident on adjacent pixels, and the solid-state image pickup device using CCD fabricated thereby.
[24] Technical Solution
[25] In accordance with an aspect of the present invention, the above and other objects can be accomplished by the provision of a solid-state image pickup device using charged-coupled devices (CCD) including an n-type impurity doped region and buried charged-coupled devices (BCCD) region, formed on a surface of the semiconductor substrate. The solid-state image pickup device comprises a first protective film formed on the n-type impurity doped region and the BCCD region; poly silicon electrodes prepared on the first protective film formed on the BCCD region; a second protective film and a metal light shielding film sequentially coated on the poly silicon electrodes; a planarized BPSG film formed on the metal light shielding film and the first protective film of the surface of the n-type impurity doped region; and a color filter pattern is formed on the planaized BPSG film.
[26] Preferably, the first and second protective film may be formed by one of SiO ,
SiON, SiN.
[27] Preferably, the metal light shielding film may be formed by stacking one of W,
Mo. Ti, Wsi, MoSi, TiSi or any combination thereof.
[28] Preferably, the BPSG film has a thickness larger than summation from the first protective film to the metal shielding light film, and the thickness of the BPSG film may be 1200A~2000A.
[29] In accordance with another aspect of the present invention, there is provided a method for fabricating a solid-state image pickup device using charged-coupled devices (CCD) including an n-type impurity doped region and buried charged-coupled device (BCCD) region formed on a surface of the semiconductor substrate. The method comprises the steps of: forming a first protective film on the n-type impurity doped region and the BCCD region; forming two poly silicon electrodes on the first protective film of the upper part of the BCCD region and then forming a second protective film on the two poly silicon electrodes; forming a metal light shielding film on the second protective film to open the n-type impurity doped region; and forming a BPSG film on the metal light shielding film and the first protective film, and planarizing the upper surface of the BPSG film to form a color filter pattern thereon.
[30] Preferably, the step of forming the metal shielding film may include the steps of: depositing W or WSi to a predetermined thickness using sputtering or CVD; and etching only the upper side of the n-type impurity doped region.
[31] Preferably, the BPSG film may be deposited to have a thickness larger than summation of the metal light shielding film and the poly silicon electrodes. Also, the BPSG film is planarized by chemical mechanical polishing (CMP).
[32] Preferably, the CMP may be proceeded to until concave forms on the BPSG film can be removed therefrom.
[33] According to the solid-state image pickup device using charged-coupled devices
(CCD) and the method for fabricating the solid-state image pickup device, the production processes can be simplified, thereby avoiding performance of unnecessary process and instead increasing yield.
[34] Also, since the present invention avoids stacking materials whose refraction indexes differ from each other, it can prevent diffuse reflection from increasing such that light can be normally collected, and light from inflowing to adjacent cells such that picture quality cannot be deteriorated.
[35]
Brief Description of the Drawings
[36] The above and other objects, features and other advantages of the present invention will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:
[37] Fig. 1 is a top view illustrating a solid-state image pickup device using CCD with a general honeycomb structure;
[38] Fig. 2 is a cross-sectional view of a pixel of the prior art solid-state image pickup device using CCD;
[39] Fig. 3 is a cross-sectional view of a solid-state image pickup device using CCD according to the present invention; and
[40] Figs. 4a to 4c are cross-sectional views describing a method for manufacturing a solid-state image pickup device using CCD according to the present invention.
[41]
Mode for the Invention
[42] With reference to the drawings, a solid-state image pick-up device using charged- coupled devices (CCD) according to preferred embodiments of the present invention and a method for fabricating the solid-state image pick-up device are described in detail.
[43] Fig. 3 is a cross-sectional view of a solid-state image pickup device using CCD according to the present invention.
[44] As shown in Fig. 3, the solid-state image pickup device 300 is formed such that a first p-type well layer 211 of approximately 3mm thick is formed on an n-type semiconductor substrate 210 using impurity implantation, etc., then an n-type impurity doped region (PDN) 213 is formed on the first p-type well 211, and finally a p-type impurity doped region (PDP) 214 is formed on the surface of the n-type impurity doped region 213.
[45] The p-type impurity doped region 114 is doped with a higher concentration of p- type impurities such that it becomes a p+-type doped region, which prevents electrons generated on the surface of the photodiode from inflowing in the photodiode area. Also, the n-type impurity doped region 213 formed under the p-type impurity doped region 214 is doped by implanting ions thereto to accumulate the electrons.
[46] A second p-type well layer 215 is formed on the first p-type well layer 211 on the surface of the n-type semiconductor substrate 210. The second p-type well layer 215 is spaced from the n-type impurity doped region 213 at a predetermined distance. The second p-type well layer 215 forms a buried CCD (BCCD) 218 around the surface thereof. The BCCD 218 accumulates and transfers electrons according to voltages applied to the poly silicon electrodes 241 and 243.
[47] A transfer gate (TG) 219 and a channel stop region (CST) 217 are formed between the n-type impurity doped region 213 and the second p-type well layer 215. Here, the TG 219 connects the n-type impurity doped region 213 with the second p-type well 215, and the CST 217 prevents electrons from jumping to adjacent cells.
[48] After forming such a structure as mentioned above, a first protective film 221 is formed on the surfaces of the n-type impurity doped region 213, the second p-type well layer 215, and the BCCD regions 218, prepared on the surface of the n-type impurity doped region 213 and the second p-type well layer 215. Preferably, the first protective film 221 is formed by stacking one of SiO , SiON, SiN, or any combination thereof.
[49] Two poly silicon electrodes 241 and 243 are formed to be partially overlapped on the first protective film 221 of the surface of the BCCD region 218 by chemical vapor deposition (CVD) and etching.
[50] The poly silicon electrodes 241 and 243 are covered by a thin second protective film 223 thereon. Preferably, the second protective film 223 is formed by stacking one of SiO , SiON, SiN, or any combination thereof.
[51] The second protective film 223 forms a metal light shielding film 224 thereon such that the n-type impurity doped region 213 cannot be screened. The metal light shielding film 224 is formed by stacking one of W, Mo, Ti or any combination thereof. Also, the metal light shielding film 224 is formed by stacking one of WSi, MoSi, TiSi or any combination thereof.
[52] A boron phosphorus silicate glass (BPSG) film 225 is formed on the metal light shielding film 224 opening the n-type impurity doped region 213. The BPSG film 225 is deposited on the upper surface of the n-type impurity doped region 213 as well as the metal light shielding film 224. The BPSG 225 is convex at a portion forming the poly silicon electrodes 241 and 243 and concave at a portion of the n-type impurity doped region 213.
[53] Meanwhile, the upper surface of the BPSG film 225 is planarized by a planarizing method. A color filter pattern 230 is formed on the planarized surface of the BPSG film 225.
[54] The BPSG film 225 should be stacked such that it is thicker than summation from the first protective film 221 to the metal light shielding film 224. Since the upper surface of the BPSG film 225 is planirzed after the BPSG film 225 is stacked, if the thickness of the BPSG film 225 is less thick than summation from the first protective film 221 to the metal light shielding film 224, it may be possible to remove the metal light shielding film 224 therefrom during the planarizing process. Therefore, the BPSG film 225 must be stacked over a predetermined thickness.
[55] Preferably, the BPSG film 225 is formed approximately
[56] 1200A-2000A thick. In this case, the ploy silicon electrodes 241 and 243 are formed 800A ~ 1000 A thick, and the second protective film 223 is formed 400A ~ 800A thick.
[57] Figs. 4a to 4c are cross-sectional views describing a method for manufacturing a solid-state image pickup device using CCD according to the present invention. With reference to the drawings, the characteristic processes are described in detail below.
[58] Firstly, impurity doped regions including an n-type impurity doped region 213 and
BCCD region 218 and well layers are formed on the semiconductor substrate 210. Since these processes are the same as the above description, a detailed description is omitted below.
[59] Next, a first protective film 221 is formed on the n-type impurity doped region 213 and the BCCD region 218 by stacking one of SiO , SiON, SiN, or any combination thereof. Two poly silicon electrodes 241 and 243 are formed on the first protective film 221 formed on the surface of the BCCD region 218 by deposition and etching. After that, a second protective film 223 is formed on the two poly silicon electrodes 214 and 243 by stacking one of SiO , SiON, SiN, or any combination thereof.
[60] Now, a metal light shielding film 224 is formed on the second protective film 223.
The metal light shielding film 224 is formed on the n-type impurity doped region 213 by etching such that the upper side of the n-type impurity doped region 213 can be partially opened.
[61] Namely, the metal light shielding film 224 is formed like that one or more than at least two of W, Mo, Ti, Wsi, MoSi, TiSi are deposited on the first and second protective films 221 and 223 at a predetermined thickness using sputtering or chemical vapor deposition (CVD), and, in order to open the upper side of the n-type impurity doped region 213, only W, etc. stacked on the upper surface of the first protective film 221 formed on the n-type impurity doped region is removed therefrom by etching.
[62] After the metal light shielding film 224 is formed by the above process, as shown in Fig. 4a, a BPSG film 225 with a predetermined thickness is formed on the metal light shielding film 224 and the first protective film 221. [63] When the BPSG film 225 is stacked, it is convex at the portion in which the metal light shielding film 224 is formed and concave at the portion in which the opened n- type impurity doped region 213 is formed.
[64] Here, the BPSG film 225 should be stacked over a predetermined thickness.
Namely, the BPSG film 225 can be formed to have a thickness (denoted by 'b' which is larger than summation (denoted by 'a' of the thickness of the metal shielding film 224 and that of the poly silicon electrodes 241 and 243.
[65] When the BPSG film 225 is formed with the thickness donated by 'a' in Fig. 4a, the upper surface of the BPSG film 225 is planarized by chemical mechanical polishing (CMP), as shown in Fig. 4b. Also, as shown in Fig. 4c, the BPSG film 225 forms a color filter pattern 230 on the planarized surface thereof.
[66] The planarizing process for the upper surface of the BPSG film 225 by the chemical mechanical polishing (CMP) is continuously proceeded until all concave forms are removed from the BPSG film 225. This is due to the fact that removal of concave forms from the BPSG film 225 imparts the BPSG film 225 to a planarized upper surface.
[67] On the other hand, the stacked thickness (denoted by 'a' in Figs. 4a to 4c) of the
BPSG film 225 is larger than summation of the metal light shielding film 224 and the poly silicon electrodes 241 and 243, even if the planarizing process is performed until the concave forms are removed on the BPSG film 225 by the CMP, the metal light shielding film 224 or the poly silicon electrodes 241 and 243 may not be damaged thereby.
[68] Although the preferred embodiments of the present invention have been disclosed for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims.
[69]

Claims

Claims
[1] A solid-state image pickup device using charged-coupled devices (CCD) including an n-type impurity doped region and buried charged-coupled devices (BCCD) region formed on a surface of the semiconductor substrate, the solid- state image pickup device comprising: a first protective film formed on the n-type impurity doped region and the BCCD region; poly silicon electrodes prepared on the first protective film formed on the BCCD region; a second protective film and a metal light shielding film sequentially coated on the poly silicon electrodes; a planarized BPSG film formed on the metal light shielding film and the first protective film of the surface of the n-type impurity doped region; and a color filter pattern formed on the planaized BPSG film.
[2] The device as set forth in claim 1, wherein the first and second protective film is formed by one of SiO , SiON, SiN.
[3] The device as set forth in claim 1, wherein the metal light shielding film is formed by stacking one of W, Mo. Ti, Wsi, MoSi, TiSi or any combination thereof.
[4] The device as set forth in claim 1, wherein the BPSG film has a thickness larger than summation from the first protective film to the metal shielding light film.
[5] The device as set forth in claim 4, wherein the thickness of the BPSG film is
1200A ~ 2000A.
[6] A method for fabricating a solid-state image pickup device using charged- coupled devices (CCD) including an n-type impurity doped region and buried charged-coupled devices (BCCD) region formed on a surface of the semiconductor substrate, the method comprising the steps of: forming a first protective film on the n-type impurity doped region and the BCCD region; forming two poly silicon electrodes on the first protective film of the upper part of the BCCD region and then forming a second protective film on the two poly silicon electrodes; forming a metal light shielding film on the second protective film to open the n- type impurity doped region; and forming a BPSG film on the metal light shielding film and the first protective film, and planarizing the upper surface of the BPSG film to form a color filter pattern thereon. [7] The method as set forth in claim 6, wherein the step of forming the metal shielding film includes: depositing W or WSi to a predetermined thickness using sputtering or chemical vapor deposition (CVD); and etching only the upper side of the n-type impurity doped region. [8] The method as set forth in claim 6, wherein the BPSG film is deposited to have a thickness larger than summation of the metal light shielding film and the poly silicon electrodes, and planarized by chemical mechanical polishing (CMP). [9] The method as set forth in claim 8, wherein the CMP is proceeded to until concave forms on the BPSG film can be removed therefrom.
PCT/KR2005/000252 2005-01-25 2005-01-28 Solid-state image pickup device using charged-coupled devices and method for fabricating the same WO2006080594A1 (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05291553A (en) * 1992-04-08 1993-11-05 Sony Corp Solid-state image sensing element
JPH0818025A (en) * 1994-06-30 1996-01-19 Nec Corp Solid image pickup element
JP2002319668A (en) * 2001-04-24 2002-10-31 Fuji Film Microdevices Co Ltd Solid-state imaging device and manufacturing method therefor
JP2003229553A (en) * 2002-02-05 2003-08-15 Sharp Corp Semiconductor device and its manufacturing method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05291553A (en) * 1992-04-08 1993-11-05 Sony Corp Solid-state image sensing element
JPH0818025A (en) * 1994-06-30 1996-01-19 Nec Corp Solid image pickup element
JP2002319668A (en) * 2001-04-24 2002-10-31 Fuji Film Microdevices Co Ltd Solid-state imaging device and manufacturing method therefor
JP2003229553A (en) * 2002-02-05 2003-08-15 Sharp Corp Semiconductor device and its manufacturing method

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