WO2006075242A1

WO2006075242A1 - Fuse for an electronic circuit and method for producing the fuse

Info

Publication number: WO2006075242A1
Application number: PCT/IB2006/000054
Authority: WO
Inventors: Michael Belman; Yaron Kadim
Original assignee: Vishay Israel Ltd.
Priority date: 2005-01-14
Filing date: 2006-01-13
Publication date: 2006-07-20
Also published as: TWI316291B; TW200631160A; DE102005002091A1

Abstract

In order to provide a fuse (100) for an electronic circuit comprising an electrically insulating substrate (1), electrodes (2) and a link (3) between the electrodes (2), which has an increased thermal resistance between the link (3) and a printed circuit board, it is proposed that indentations (5) are formed in an electrically insulating substrate (1) to the side and underneath the link (3) in order to form a pedestal (6) underneath the link (3), and/or high electrical resistivity zone in the link is formed using impurity doping. Furthermore, a method for producing the fuse (100) is provided.

Description

Fuse for an electronic circuit and method for producing the fuse

Field of the invention

The invention relates to: (a) construction of a fuse for an electronic circuit comprising an electrically insulating substrate, two electrodes, and a link between the electrodes; (b) method for producing the fuse.

Background of the invention

Chip fuses for surface mounting on printed circuit boards (PCB) are known and common in the various embodiments to the person skilled in the art. Chip fuse generally consists of an electrically insulating substrate which for its part is electrically and mechanically connected to a PCB by its conductive electrodes between which an electric current flows via a link. As soon as the current intensity exceeds a specific value for the fuse, the Joule heat dissipating in the link results in the link fusing and the electric current termination. Thus electric or electronic component damage by overcurrent is avoided. The burnt fuse on a PCB may be replaced by a new one.

The performance of various fuses having the same rated current and the same time-current characteristic can be classified according to the respective cold resistance. The cold resistance is the internal resistance of a fuse which is determined under a load of no more than ten percent of the rated current load. The cold resistance correlates with such fuse parameters as maximum voltage drop at rated current load and continuous power loss at rated current load. The lower is the cold resistance, the lower are both voltage drop and power loss in the fuse. Therefore, reducing the cold resistance of fuse is beneficial.

The cold resistance of a fuse depends on electrical power required to activate the fuse. Cold resistance may be reduced by increasing the thermal resistance between the fuse link and the ambience. The major part of the heat flow from the link to the ambience runs sequentially through chip substrate and PCB. The smaller are dimensions of the link and the lower is thermal conductivity of substrate material, the higher is the thermal resistance between the link and PCB. Higher thermal resistance means that less heat power escapes from the link into PCB and therefore less electrical power is needed for heating the link up to its fusion.

For example, US 5,367,280 and US 5,453,726 describe fuses in which the link between the electrodes is narrowed in its central section to concentrate electrical resistance of the link in the small zone (heat generating zone) that is destined to burn out. Shrinkage of heat generating zone increases thermal resistance between this zone and PCB.

Relatively high ohmic resistance of the link is necessary for activation of low current fuses. It may be achieved only if the link material has high resistivity. On the other hand high resistivity material gives an opportunity to concentrate almost all resistance (and therefore heat dissipation) in relatively small area where it is deposited and thus higher thermal resistance between the heat generating zone and PCB may be achieved. US 5,367,280 and JP 615 0802 describe the use of a material having a high electrical resistivity in a link. There are three sections with different material resistivity in the mentioned constructions: (a) the electrodes made of low resistivity material, (b) the link made of high resistivity material, (c) the overlaps between the link and the electrodes that have intermediate resistivity as a result of mutual diffusion of two materials in the overlap. The relatively high resistivity overlaps dissipate the energy uselessly.

Furthermore, it is known to increase the thermal resistance between the link and the PCB by using substrate materials having low thermal conductivity. The first possibility is to make the whole fuse substrate of material with low thermal conductivity. The examples of such material are calcium borosilicate, zirconium dioxide or aluminium oxide doped with up to 30% glass or the like, as described in US 5,453,726. A further possibility is using a standard aluminium oxide substrate having high thermal conductivity which is uniformly covered with a thick glass layer having low thermal conductivity, as is disclosed in JP 2001 273 847. A third possibility involves using a standard aluminium oxide substrate and screen printing a low thermal conductivity "glass island" under a link as disclosed in US 5,376,280.

Summary of the present invention

It is to be regarded as disadvantageous here that the first two variants are based on use of the substrates which are unusual in the electronic or semiconductor industry and are expensive to purchase. Under certain circumstances, these substrates can also have compatibility problems with standard metallizing materials such as thick-film inks which were developed for use on aluminium oxide substrates. The third variant is ineffective since the screen-printed glass layer is comparatively thin and results in insignificant increase of thermal resistance.

It is thus the object of the invention to provide a generic fuse which has an increased thermal resistance between the link and the PCB or the insulating substrate. Furthermore, a method for producing the fuse is to be provided.

These objects are attained by the features of claims 1 , 5 and 7.

There are two basic ideas in the invention that independently bring to the same goal - increase of thermal resistance between the fuse link and the PCB. They are:

1. Formation of indentations in the electrically insulating substrate on which the electrodes and the link between the electrodes are attached.

2. Using of impurity doping to increase electrical resistance in as small as possible zone of the fuse link. The said indentations are arranged laterally and beneath the link between the electrodes. With these indentations it is achieved that the electrically insulating substrate material forms a dividing wall between the indentations and underneath the link. This wall looks like a pedestal under the link. It is thus obvious for the person skilled in the art that the most part of the heat flow from the link heated by the electric current to the ambience can only escape via this pedestal. Since the cross section of this pedestal is substantially small the pedestal shows significant resistance to the heat flow. (The heat transfer from the link by air convection and thermal radiation is negligible compared with the thermal conductivity via the pedestal to the rest of the substrate and further to PCB).

Within the scope of the invention, the indentations can be constructed laterally and underneath the central link in an arbitrary fashion by the person skilled in the art.

Impurity doping of the link gives an opportunity to form in the link the smallest possible zone with resistivity that is higher than that in the rest of the link. Almost all electrical energy dissipated in the fuse in the form of heat will be dissipated in this zone. The smaller are dimensions of the high resistivity zone the higher is thermal resistance between this zone and PCB. In the previous art fuses the high resistivity zone was formed by other techniques (for example screen printing) that resulted in overlaps between low and high resistivity parts of the link. The overlaps that have intermediate resistivity uselessly dissipate the part of the energy that result in degrading of fuse performance.

The advantage of the invention is less energy consumption for fuse activation (melting) as a result of the increase in the thermal resistance between the link and the PCB. It means that electrical resistance of the fuse and the voltage drop across the fuse are reduced and thus the power loss in the fuse is reduced. In particular, it is possible to implement such a fuse using standard alumina substrate known per se. Therefore, is no need to use the special materials described previously which are not commonly used in the electronics industry. In this case, the fuses can be produced using conventional thick-film, thin-film or metal-foil technologies.

It is obvious for the person skilled in the art that the fuse according to the invention can be used to protect any electrical or electronic circuits and equipment, especially for surface-mountable electrical circuits on a PCB. These are among others BLDC motor drives, hard disk drives, rechargeable batteries, maintenance circuits, LCD screens and the like.

Advantageous embodiments of the invention are respectively characterised in the dependent claims.

In order to further increase the thermal resistance between the link and the insulating substrate, the indentations, seen transverse to the direction of current flow through the link, can also be extended into the pedestal as far as underneath the link in order to further reduce the thickness of the pedestal (dividing wall).

It is further proposed to fill the indentations with a reinforcing material in order to protect the pedestal and the electrically conductive link arranged thereon from mechanical damage. For this purpose, depending on the material of the insulating substrate and the link, suitable materials can be selected by the person skilled in the art which especially have a low thermal conductivity. It is furthermore proposed that the link is covered with the reinforcing material in order to thus prevent both mechanical damage of the link and possible partial recovery of its electrical conductivity after fuse activation. Furthermore, an additional protective coating can be provided which completely covers the link and the reinforcing material and may partially cover the electrodes. This coating protects the fuse from harsh environment and prevents emission of combustion products during fuse activation. Suitable materials for protection from ambience are known to the person skilled in the art.

It is proposed that in a first embodiment a central section of the link between the two electrodes is narrowed. This means that the cross-sectional area of the link is reduced in this central section in order to increase electrical resistance of the central section. The formation of such a constriction is possible for the person skilled in the art. The link may be formed of the same material as the electrodes and preferably produced integrally with said electrodes. Otherwise, it may be formed (entirely or its central section only) of a material having a higher resistivity than that of the electrodes in order to provide sufficient for activation (melting) heat dissipation in the fuses with low current rating.

In an alternative embodiment the link can be impurity-doped in its possibly shortest central section in order to also achieve a higher thermal resistance between heat dissipating section of the link and PCB.

In order to produce the fuse it is proposed that the connecting electrodes and the link between them are attached to the upper side on an electrically insulating substrate whose material can be selected by the person skilled in the art. In this case, the connecting electrodes and the link can be formed simultaneously and integrally as a single structure or successively, especially if they are made from different materials having different electrical resistivity. In the last case, the link can be constructed as narrowed and/or impurity doped in its central section. For this purpose different methods such as thick-film technology (for example, screen printing of conductive inks), thin-film technology (for example lithography combined with metal layer sputtering) or metal foil technologies, (for example etching of metal clad substrates) can be used.

In particular, depending on the procedure selected, heat treatments can be carried out respectively after one or several process steps, in order to enhance the diffusion between different materials, especially in impurity doped link.

Subsequently two indentations are constructed or cut into the insulating substrate laterally and below the link. For this purpose, a laser technique known to the person skilled in the art can be used for example. In particular, it is possible to extend the indentations underneath the link in order to reduce the width of the pedestal (dividing wall).

The indentations can be filled with a reinforcing material which may overlap the link from the top. For this purpose a screen printing or dispensing known to the person skilled in the art may be used. The materials suitable for this purpose (for example glass) must have low thermal conductivity and sufficient mechanical strengths. If the reinforcing material overlaps the link it may suppress the arc in the event of activation of the fuse and after that prevent the burnt out link from recovery of electrical conduction.

Subsequently, a protective layer covering the entire fuse made of a suitable material for this purpose can also be applied by the screen printing method or by dispensing. This layer protects the fuse from harsh environment and especially prevents the emission of combustion products when the fuse is activated.

It is understood that such fuses are mass produced on a common substrate. In particular step of manufacturing process they are singulated and their terminal electrodes are plated (if needed) with nickel or/and solder for example. Brief description of the drawings

The invention is explained in detail subsequently with reference to drawings in the following figures:

Fig. 1. A fuse from the prior art.

Figs. 2a, 2b. The fuses from the prior art.

Figs. 3a, 3b: The proposed fuse in various perspective views.

Figs. 4a-4d: The further embodiments of the fuse.

Detailed description of the preferred embodiments

A fuse 100 from the prior art, as shown in Figures 1 and 2, has an electrically insulating substrate 1 on which electrodes 2 are arranged. The electrodes are interconnected via a link 3. An electric current flows through the electrodes 2 and the link 3. The link 3 melts (burns out) when the current magnitude exceeds some specified value and thus in electric current flow is interrupted.

In Figure 1 the link 3 has a narrowed section 4, seen in the direction of flow of the current through the fuse 100, as indicated by the arrow.

In Figure 2 the link 3 is made of a material having a higher resistivity that that of the electrodes 2 in order to insure sufficient power dissipation in the link 3 for fuse activation at relatively low rated current. In this case, the material of the link 3 can either be applied to the insulating substrate 1 before the material of the electrodes 2, as shown in Figure 2a, or thereafter, as shown in Figure 2b, wherein accordingly the link 3 is either arranged above the electrodes 2 or conversely. In both cases, overlapping areas 10 are obtained between the link 3 and the electrodes 2. Resistivity in overlap 10 is higher than in a non-overlapped area of the electrode 2 as a result of the mutual diffusion of link and electrode materials. That brings to unnecessary power dissipation in the overlaps and makes the characteristics of the fuses presented in Figure 2 inferior to the characteristics of a fuse constructed without said overlap.

The basic construction of the fuse 100 according to the invention can be seen from Figures 3a, 3b. It substantially consists of an electrically insulating substrate 1 on which electrodes 2 made of an electrically conductive material are deposited. It can be seen from the upper perspective drawing in Figure 3a that the link 3 between the electrodes 2 has a narrowed section 4. Indentations 5 are formed in the insulating substrate to the side and underneath the section 4, seen in the direction S of current flow through the fuse 100, as indicated by the arrow. The indentations form a pedestal 6 (dividing wall) directly underneath the section 4.

As can be seen from the longitudinal sectional view A-A in the bottom left of Figure 3a, the link 3 with its middle section 4 and part of the electrodes 2 can be covered with a reinforcing material 7 and a protective coating 8.

It can be deduced from the cross-sectional view B-B in the bottom left of Figure 3a the reinforcing material 7 overlaps the section 4 and is additionally covered with a protective layer 8. A current S flows here perpendicular to the plane of the drawing.

The dimensions h x 2a x 2b of the pedestal 6 can be deduced from Figure 3b.

Figures 4a to 4c show different implementations of the proposed fuses 100 in plan view, wherein in each case the section 4 is impurity-doped. There is no doping in the implementation shown in Figure 4d. To simplify the drawings, the insulating substrate 1 is not shown. The indentations 5 can either be constructed with approximately equal length and width, as shown in figure 4a or as groove-like indentations with their length significantly exceeding their width as shown in Figures 4b to 4d. In Figure 4d the constriction 4 is formed by two indentations 5 substantially transverse to the link direction.

The impurity doping of a desired part of the fuse 100, especially the section 4, can be implemented by the person skilled in the art in an inherently known fashion.

It is shown subsequently that the reduction in the dimensions of the heat- generating zone in the fuse 100 results in an increase in the thermal resistance of the substrate of the fuse.

If the outline dimensions of the heat-generating zone are substantially smaller than the dimensions of the substrate, the maximum temperature in the zone can be determined using the known expression for the maximum temperature in a rectangle having the dimensions 2a x 2b which generates steady-state heat at constant rated power W per unit area on the surface of a semi-infinite solid with the thermal resistivity K (see H. S. Carslaw and J. C. Jaeger, Conduction of heat in solids, Oxford at the Clarendon Press, 1959, page 265):

T_max = 2W I πK[a • sinh^"1 (b/a) + b - sinh^"1 (a I b)]

The thermal resistance of a semi-infinite solid which approximates the thermal resistance R_t ^(sub)of the substrate of the fuse is given by the ratio of maximum temperature to generated power:

Rf⁰ = T_max HaIbW = W 2πK[l I b ^■ sinh^"1 φ I a) + 1 / a • sinlT¹ (a I b)]

By differentiating the above equation it can be proven that the thermal resistance of the substrate is higher, the smaller are the dimensions a and/or b. c>i?_t ^sub / da = -1 / 2πKa ^{2 ■} sinh^"1 (a I b) < 0 ai?_t ^sub ldb = -H2πKb² - sinh^"1 (α /Z>) < 0

This provides the justification for reducing the dimensions of the heat- generating zone in the fuse 100.

The most efficient way for reducing the heat-generating zone in the longitudinal direction along the link 3 is impurity doping. This prevents formation of overlaps 10 with intermediate specific resistivity between structures having high resistivity and structures having low resistivity. Thus, the dimension of the structure having high resistivity in the longitudinal direction along the link 3 can be reduced to resolution limit of the structuring. In the case of a design according to the prior art, in which high-resistivity structures overlap those with low resistivity, the absolute alignment accuracy must be added to the to resolution limit of respective technology to define minimum dimension of heat-generating zone.

The heat-generating zone can be reduced in transverse direction by cutting into the link 3. This cutting operation may be combined with the process of pedestal formation described previously if to cut simultaneously both the link and the substrate.

Another way to increase the thermal resistance of the substrate of the fuse 100 involves cutting into the surface of the fuse substrate from both sides of the link 3 and thereby forming a pedestal 6 under the middle section 4 of the link 6 as shown in Figures 3a and 3b. The pedestal is a parallelepiped having the dimensions 2a x 2b x h. In the case when h/a » 1 , the heat transfer through the pedestal 6 in the longitudinal direction S along the link 3 can be neglected. It can be assumed that the total heat flux through the pedestal 6 runs perpendicular to the substrate surface. Thus the thermal resistance R_t ^(ped) of the pedestal 6 can be calculated as follows: i?_t ^(ped) = h I IaIbK = h I AabK

The pedestal 6 transfers heat in series to the rest of the substrate 1 and can substantially contribute to the total thermal resistance. The ratio (/?_t ^(sub) + /?t^(ped))/ f?_t ^(sub) is first considered. This is the ratio of two thermal resistances: firstly the thermal resistance R_t ^(sub) + ftt^(ped) of the substrate 1 with indentations and secondly the thermal resistance R_t ^(sub) of a substrate 1 without indentations (with smooth surface).

Tabulating the ratio (R_t ^(sub) + Rt^{ped))l Rt^{suh) yields the following result:

It follows from the above table that the pedestal 6 ensures a significant increase in the thermal resistance of the substrate 1 of the fuse 100 up to several fold. Naturally the pedestal design is not restricted to the case of a uniform substrate 1. If the substrate 1 is partly or completely coated with another material having a thermal conductivity lower than that of the base material, the pedestal 6 constructed under the middle section 4 of the link 3 increases the thermal resistance of this substrate too.

REFERENCE LIST

100 Fuse

1 Insulating substrate

2 Electrode

3 Link

4 Middle section/constriction

5 Indentation

6 Pedestal

7 Reinforcing material

8 Protective coating

10 Overlap

S Direction of current flow a,b,h Dimensions of the pedestal 6

Claims

1. A fuse (100) for an electronic circuit comprising an electrically insulating substrate (1 ), electrodes (2) and a link (3) between the electrodes (2), characterised in that indentations (5) are cut in the substrate (1) laterally and underneath the link (3) forming a pedestal (6) underneath the link (3) in order to increase thermal resistance between the link (3) and printed circuit board.

2. The fuse according to claim 1 , characterised in that said indentations (5) undercut the link (3) so that pedestal (6) becomes narrower than link (3).

3. The fuse according to claim 1 or 2, characterised in that said indentations (5) are filled with a reinforcing material (7), which optionally overlaps the link (3).

4. The fuse according to any one of claims 1 to 3, characterised in that a protective coating (8) is provided.

5. The fuse according to any one of claims 1 to 4, characterised in that a middle section (4) of the link (3) is made of a material which is different to the material of the rest of the link (3), especially that material of the middle section (4) is formed by impurity doping of primary material of the link (3).

6. The fuse according to any one of claims 1 to 4, characterised in that a material of middle section (4) of the link (3) has a higher resistivity than the material of the rest of the link (3), especially that the middle section (4) is impurity-doped.

7. A method for producing a fuse (100) wherein electrodes (2) with a link (3) connecting said electrodes are applied to an electrically insulating substrate (1 ), characterised in that indentations (5) are cut in the substrate (1) laterally and underneath the link (3) to form a pedestal (6) underneath the link (3).

8. The method according to claim 7, characterised in that the electrodes (2) and the link (3) are applied integrally or successively to the substrate (1), especially from different materials.

9. The method according to any one of claims 7 or 8, characterised in that the electrodes (2) and/or the link (3) are applied to the substrate (1) using one or combination of the following technologies: thin-film (deposition in vacuum), thick-film (ink deposition by screen printing or dispensing), metal-foil (etching of metal in metal foil clad substrate).

10. The method according to any one of claims 7 to 9, characterised in that after one or more of the process steps, at least one heat treatment is carried out.

11. The method according to any one of claims 7 to 10, characterised in that the indentations (5) in substrate (1 ) are constructed using laser.