WO2006071098A1 - Lead frame, semiconductor package employing the lead frame and method for manufacturing the semiconductor package - Google Patents

Lead frame, semiconductor package employing the lead frame and method for manufacturing the semiconductor package Download PDF

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Publication number
WO2006071098A1
WO2006071098A1 PCT/KR2005/004673 KR2005004673W WO2006071098A1 WO 2006071098 A1 WO2006071098 A1 WO 2006071098A1 KR 2005004673 W KR2005004673 W KR 2005004673W WO 2006071098 A1 WO2006071098 A1 WO 2006071098A1
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WO
WIPO (PCT)
Prior art keywords
pad
recess
bonding pad
chip bonding
lead frame
Prior art date
Application number
PCT/KR2005/004673
Other languages
French (fr)
Inventor
Chan-Ik Park
Original Assignee
Luxpia Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Luxpia Co., Ltd. filed Critical Luxpia Co., Ltd.
Publication of WO2006071098A1 publication Critical patent/WO2006071098A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49861—Lead-frames fixed on or encapsulated in insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H01L23/3677—Wire-like or pin-like cooling fins or heat sinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483—Containers
    • H01L33/486—Containers adapted for surface mounting
    • H—ELECTRICITY
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    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64—Heat extraction or cooling elements
    • H01L33/642—Heat extraction or cooling elements characterized by the shape
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/49105—Connecting at different heights
    • H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
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    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58—Optical field-shaping elements
    • H01L33/60—Reflective elements
    • H—ELECTRICITY
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    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Definitions

  • the present invention relates to a lead frame, a semiconductor package including the lead frame, and a method of manufacturing the semiconductor package, and more particularly, to a lead frame that can improve a heat dissipation efficiency by forming various heat dissipation paths, a semiconductor package, and a method of manufacturing the semiconductor package.
  • a semiconductor package includes a lead frame including a chip bonding pad and a lead wire, a semiconductor chip mounted on the chip bonding pad, and a package body packaging the lead frame and the semiconductor chip.
  • the package body is formed of a material such as a plastic, a ceramic, or a pseudo- dielectric material, and packages the semiconductor chip using a molding process.
  • [3] Semiconductor packages can be classified into sealing type packages surrounding entire semiconductor chip, and cavity type packages exposing at least one portion of the semiconductor chip.
  • the cavity type semiconductor packages include light emitting diodes (LEDs) as the semiconductor chips
  • the cavity type semiconductor packages are formed as light reflection cups so as to emit the light emitted by the LEDs to outside.
  • a general semiconductor chip dissipates heat during operating, and if the heat is excessive, the heat badly affects performances of the semiconductor chip and reduces a life span of the semiconductor chip.
  • the light emitting device such as the LED dissipates a large amount of heat so that about 70% of an impressed power consumption is consumed by the heat.
  • the semiconductor package has the package body formed of plastic, the heat generated during operating the semiconductor chip can be only partially dissipated through the metal chip bonding pad and the lead wire. Therefore, most of the heat cannot be dissipated from the plastic package body.
  • the semiconductor package including the semiconductor chip such as the light emitting device should include a heat dissipation structure for dissipating the heat efficiently.
  • the conventional semiconductor package includes a heat dissipation structure, for example, the metal chip bonding pad can be exposed on a bottom surface of the package body, the metal chip bonding pad can be exposed on sides of the package body, a thick chip bonding pad can be formed, or an additional metal plate can be attached on a bottom surface of the chip bonding pad.
  • FIGS. IA and IB are a plan view and a cross-sectional view of a plastic molding semiconductor package having the conventional heat dissipation structure.
  • FIGS. IA and IB a package including a high power device such as a transistor is illustrated.
  • the package includes the package body 11 and the lead frame 15 including the chip bonding pad 16 and a heat dissipation extension pad 17 that are distinguished by positions with respect to the body 11.
  • a bottom surface 16a of the chip bonding pad 16 is exposed on the bottom 1 Ia of the package body 11, and the heat dissipation extension pad 17 is exposed from a side surface 1 Ib of the package body 11.
  • the heat dissipation extension pad 17 can be exposed only from a part of the side surface 1 Ib of the package body 11 due to some problems, for example, moisture absorption, separation from the body, and limitations in packaging, and cannot occupy the entire side surface 1 Ib of the package body 11.
  • FIGS. 2A and 2B are a plan view and a cross-sectional view of a small outline package (SOP) having a heat dissipation structure that is exposed on both sides of the package according to the conventional art.
  • SOP small outline package
  • the SOP includes a package body 21, and a lead frame 25 including a chip bonding pad 26 and a plurality of leads 27 and 28.
  • the leads 27 are used to be electrically connected to a chip 23 mounted on the chip bonding pad 26, and some leads 28 are used as heat dissipation extension pads 28.
  • the heat dissipation extension pads 28 extend from the chip bonding pad 26, and some parts of the heat dissipation extension pads 28 are exposed out of the package body 21. Therefore, the heat generated when operating the chip 23 can be transmitted to outside of the package body 21.
  • the exposure areas of the heat dissipation extension pads 28 cannot be enlarged due to the arrangement of the lead frame 25 with respect to the package body 21 and limitations in assembling processes. Also, the heat dissipation extension pads 28 may form moisture absorption paths.
  • FIG. 3 is a cross-sectional view of a semiconductor package, in which a bottom surface of the chip bonding pad is exposed, according to the conventional art.
  • the semiconductor package does not include an additional heat dissipation extension pad shown in FIGS. IA, IB, 2A, and 2B, but a bottom surface 36a of the chip bonding pad 36 is exposed on a bottom surface 31a of the package body 31 to dissipate the heat in the package body 31 to outside.
  • FIG. 4 is a cross-sectional view of a semiconductor package including a heat sink attached onto the chip bonding pad and having an exposed bottom surface.
  • the heat is dissipated to the bottom surface 41a of the package body through a metal heat sink 47 attached on the chip bonding pad 46.
  • a moisture absorption path that is formed along a bonding interface between the heat sink 47 and the package body 41 becomes complex, and a resin forming the package body 41 may surround the heat sink 47. Therefore, reliability of the heat dissipation structure may be degraded due to a physical weakness such as separation of the heat dissipation structure. Disclosure of Invention
  • FIGS. 3 and 4 the heat only can be dissipated through the exposed portion on the bottom surface 41a of the package body, and thus, the heat dissipation efficiency is degraded.
  • FIG. 5 is a perspective view of a ceramic semiconductor package having the heat dissipation structure according to the conventional art.
  • the ceramic semiconductor package is formed by attaching a ceramic body 51 onto a lead frame 55 using a brazing process, and thus, the package is safe from the separation or the moisture absorption. Therefore, the heat dissipation extension pads can be formed in various directions.
  • an economical efficiency and a productivity of manufacturing the ceramic semiconductor package are much lower than those of manufacturing a plastic semiconductor package.
  • the present invention provides a lead frame for a semiconductor package, which can form heat dissipation paths in various directions in packaging a chip and can ensure safety from moisture absorption and separation of the package.
  • the present invention also provides a semiconductor package and a method for manufacturing the same that can form heat dissipation paths in various directions using the lead frame to improve a heat dissipation property and can improve productivity, economical efficiency, reliability, and robustness of the package.
  • a lead frame including: a chip bonding pad on which a semiconductor chip can be mounted; at least one lead disposed adjacent to the chip bonding pad, and electrically insulated from the chip bonding pad by an insulating recess; a heat dissipation extension pad formed around the chip bonding pad while not contacting the lead, and distinguished from the chip bonding pad by a distinguishing recess; and a plurality of pad connection portions formed in the distinguishing recess to connect the chip bonding pad to the heat dissipation extension pad.
  • a semiconductor package including: a lead frame having the above structure; at least one semiconductor chip mounted on a surface of the chip bonding pad; bonding wires electrically connecting the semiconductor chip to the chip bonding pad and/or to the lead; and a package body formed of plastic in the insulating recess and the distinguishing recess, and on the entire semiconductor chip or around the semiconductor chip at the height same to or greater than the semiconductor chip.
  • the heat dissipation extension pad, a surface of the chip bonding pad that is opposite to the surface on which the semiconductor chip is mounted, and the lead are exposed to the outside, and heat is dissipated in various directions through the exposed portions.
  • a method of manufacturing a semiconductor package including: preparing a main body of a lead frame; forming the lead frame having the above structure by etching the lead frame main body to form an insulating recess and a distinguishing recess; mounting a semiconductor chip on the chip bonding pad; connecting the semiconductor chip to the chip bonding pad and/or to the lead using the bonding wire; and injecting a plastic resin into the insulating recess and the distinguishing recess to form a package in the insulating recess and the distinguishing recess, and on the entire semiconductor chip or around the semiconductor chip to the height of the semiconductor chip or greater.
  • a method of manufacturing a semiconductor package including: preparing a main body of a lead frame; forming the lead frame having the above structure by etching the lead frame main body to form an insulating recess and a distinguishing recess; injecting a plastic resin into the insulating recess and the distinguishing recess to form a package in the insulating recess and the distinguishing recess, and on the entire semiconductor chip or around the semiconductor chip to the height of the semiconductor chip or greater; mounting a semiconductor chip on the chip bonding pad; and connecting the semiconductor chip to the chip bonding pad and/or the lead using the bonding wire.
  • the lead frame of the present invention can be robust to moisture absorption and separation from a semiconductor package even when various heat dissipation paths are formed.
  • the heat dissipation extension pads can be formed on any place including the sides and the bottom surface of the package body, and thus, the heat dissipation efficiency can be maximized.
  • an insulating recess and a distinguishing recess are formed to have stepped cross-sections, and pad connection portions of narrow widths are formed on many portions between the chip bonding pad and the heat dissipation extension pad, and thus, the moisture absorption and separation between the package body and the chip bonding pad can be prevented. Therefore, reliability and robustness of the semiconductor package can be improved.
  • the package body is formed of a plastic material and the cut portion can be minimized by the sawing process, productivity and economical efficiency of manufacturing the semiconductor package can be improved.
  • the leads are exposed on the bottom of the semiconductor package and lengths of the leads can be shortened by the sawing process, and thus, the semiconductor package can be formed to be thin and light.
  • FIGS. IA and IB are a plan view and a cross-sectional view of a plastic molding semiconductor package including a heat dissipation structure according to the conventional art
  • FIGS. 2A and 2B are a plan view and a cross-sectional view of a small outline package (SOP) having a heat dissipation structure exposed from both sides of the package according to the conventional art;
  • SOP small outline package
  • FIG. 3 is a cross-sectional view of a semiconductor package having a structure, in which a bottom surface of a chip bonding pad is exposed, according to the conventional art
  • FIG. 4 is a cross-sectional view of a semiconductor package including a heat sink attached on a chip bonding pad and having a bottom surface exposed out of the package according to the conventional art;
  • FIG. 5 is a perspective view of a ceramic semiconductor package having the conventional heat dissipation structure
  • FIG. 6 is a perspective view and a partially enlarged view of a lead frame according to an embodiment of the present invention.
  • FIG. 7 is a cross-sectional view of the lead frame taken along line A-A of FIG. 6;
  • FIG. 8 is a perspective view of a bottom surface of the lead frame of FIG. 6;
  • FIG. 9 is a perspective view of a semiconductor package according to an embodiment of the present invention.
  • FIG. 10 is a cross-sectional view of the semiconductor package taken along line B-
  • FIGS. 11 and 12 are views illustrating manufacturing processes of the semiconductor package according to an embodiment of the present invention.
  • FIG. 13 is a plan perspective view of a lead frame according to another embodiment of the present invention.
  • FIG. 14 is a bottom perspective view of the lead frame of FIG. 13;
  • FIG. 15 is a perspective view of a semiconductor package according to another embodiment of the present invention.
  • FIG. 16 is a cross-sectional view of the semiconductor package taken along line C-
  • FIGS. 17 and 18 are views illustrating manufacturing processes of the semiconductor package of FIG. 15;
  • FIG. 19 is a plan perspective view of a lead frame according to another embodiment of the present invention.
  • FIG. 20 is a perspective view of a bottom surface of the lead frame of FIG. 19;
  • FIG. 21 is a perspective view of a semiconductor package according to another embodiment of the present invention.
  • FIG. 22 is a cross-sectional view of the semiconductor package taken along line D-
  • FIG. 23 is a cross-sectional view of the semiconductor package taken along line E-
  • FIG. 6 is a perspective view of a lead frame according to an embodiment of the present invention
  • FIG. 7 is a cross-sectional view of the lead frame taken along line A-A of FIG. 6
  • FIG. 8 is a perspective view of a bottom surface of the lead frame of FIG. 6.
  • a lead frame 100 is formed of combination of unit lead frames 110, each of which includes elements that will be described later. That is, the lead frame 100 is a strip formed by connecting a plurality of unit lead frames 110 in a boundary 125, and can be divided into unit lead frames 110 by cutting the boundary 125 along a cut line L denoted by dotted line in FIG. 6.
  • Each of the unit lead frames 110 forming the lead frame 100 includes a chip bonding pad 111, on which a semiconductor chip is mounted, a lead 113 used as an electrode for applying power to the semiconductor chip, a heat dissipation extension pad 117, and a pad connection portion 121 connecting the chip bonding pad 111 and the heat dissipation extension pad 117.
  • the lead 113 is disposed adjacent to the chip bonding pad 111, and electrically insulated from the chip bonding pad 111 by an insulating recess 115.
  • the lead 113 is electrically connected to an electrode of the semiconductor chip that is mounted on the chip bonding pad 111 using a bonding wire to supply the power for driving the semiconductor chip.
  • the lead 113 is not limited to the single as shown in FIG. 6, but a plurality of leads can be formed on a side of the chip bonding pad 111.
  • the heat dissipation extension pad 117 is formed around the chip bonding pad 111 while not contacting the lead 113. Most portion of the heat dissipation extension pad 117 is exposed to outside when packaging the semiconductor chip and the chip bonding pad 111 using a package body that will be described later.
  • the heat dissipation extension pad 117 is distinguished from the chip bonding pad 111 by distinguishing recesses 119 formed between the heat dissipation extension pad 117 and the chip bonding pad 111.
  • the pad connection portions 121 are disposed in the insulating recess 115 and the distinguishing recesses 119 to connect the chip bonding pad 111 to the heat dissipation extension pad 117.
  • the pad connection portions 121 are formed at different positions around the chip bonding pad 111 in order to minimize moisture absorption and separation between the heat dissipation extension pad 117 and the chip bonding pad 111, and in order to dissipate the heat in various directions. That is, the pad connection portions 121 are formed on at least three portions (five portions in FIG. 6) in the insulating recess 115 and the distinguishing recesses 119, and thus, the heat dissipation extension pad 117 can be fixed stably.
  • the heat transmitted from the chip bonding pad 111 can be effectively transmitted to the heat dissipation extension pad 117.
  • the heat dissipation extension pad 117 can have the size holding one side or greater of the package body unlike in the conventional semiconductor package.
  • the heat dissipation extension pad 117 may occupy 1 / 4 or greater of the whole circumference of the package body.
  • the heat dissipation pad 117 has a wide area and the pad connection portions 121 are formed at many portions with narrow widths, and thus, the separation and moisture absorption can be reduced and a bottle neck phenomenon that may be generated during discharging the heat can be reduced.
  • the distinguishing recess 119 has a stepped cross-section so that a width of a portion 119a at a surface of the chip bonding pad 111, that is, the surface where the semiconductor chip is mounted, is smaller than a width of a portion 119b at the opposite surface of the chip bonding pad 111.
  • the insulating recess 115 also has a stepped cross-section so that a width of a portion 115a at a surface of the chip bonding pad 111 is smaller than a width of a portion 115bat the opposite surface of the chip bonding pad 111.
  • the portions 115b and 119b having larger widths of the insulating recess 115 and the distinguishing recess 119 are spatially connected to each other. Therefore, a plastic resin for forming the package body is injected into the insulating recess 115 and the distinguishing recess 119 through the connected space.
  • the package body (refer to 141 and 145 of FIG. 10) is formed by interposing the narrow portion 119a, and thus, the distinguishing recess 119 firmly contact the plastic resin forming the package body.
  • At least one dam member 127 may be formed on each of the wide portions 115b and 119b of the insulating recess 115 and the distinguishing recess 119. An end of the dam member 127 is connected to the heat dissipation extension pad 117, and the other end of the dam member 127 is separated from the chip bonding pad 111 by a predetermined gap. The dam member 127 stably fixes the heat dissipation extension pad 117, and prevents the plastic resin from inducing to the outer portion of the heat dissipation extension pad 117 when the plastic resin for molding is injected.
  • the lead frame 100 includes a gate portion 123 of circular or square shape on the boundary 125 for injecting the plastic molding resin into the insulating recess 115 and the distinguishing recess 119.
  • the gate portion 123 is separated along the boundary 125 when cutting the boundary along the cut line L .
  • the lead frame 100 may be thicker than a general thickness of the lead frame, that is, 0.2 ⁇ 0.25mm. That is, the lead frame 100 may be formed to a thickness about 0.4mm, 0.5mm, and 0.76mm or larger. Therefore, when the stepped cross-sections of the insulating recess 115 and the distinguishing recess 118 are formed using a half- etching process, a required height can be ensured and the moisture absorption path can be extended and the moisture blocking effect can be maximized.
  • FIG. 9 is a perspective view of a semiconductor package according to an embodiment of the present invention
  • FIG. 10 is a cross-sectional view of the semiconductor package taken along line B-B of FIG. 9.
  • the semiconductor package 160 includes a lead frame (110 of FIG. 6), a semiconductor chip 131 mounted on a chip bonding pad 111 of the lead frame 110, bonding wires 135, and a package body 141 and 145.
  • the lead frame 110 includes the chip bonding pad 111, on which the semiconductor chip 131 is mounted, a lead 113 used as an electrode for applying power to the semiconductor chip 131 and electrically insulated from the chip bonding pad 111 by the insulating recess 115, a heat dissipation extension pad 117 separated from the chip bonding pad 111 by the distinguishing recess 119, and a pad connection portion (121 of FIG. 6) connecting the chip bonding pad 111 to the heat dissipation extension pad 117.
  • the lead frame 110 is substantially identical to the unit lead frame illustrated in
  • FIGS. 6 through 8, and detailed descriptions for the lead frame 110 are omitted.
  • the semiconductor chip 131 is mounted on the chip bonding pad 111 using an adhesive (not shown), and may be a general semiconductor device such as a power transistor device and a high frequency device for radio communication, or a light emitting diode (LED).
  • the package body (not shown) is formed on the lead frame 110 so as to cover the entire semiconductor device.
  • the LED is used as the semiconductor chip, the package body 145 having a cavity 147 is formed so that the light from the LED can be radiated to outside.
  • the bonding wires 135 electrically connect an electrode of the semiconductor chip
  • the electric current applied from outside through the lead 113 can be transmitted to the semiconductor chip 131 through the bonding wires 135.
  • the bonding wire 135 can be used to electrically connect the other electrode of the semiconductor chip 131 to the chip bonding pad 111.
  • the bonding wires 135 are not essential elements. That is, if the electrodes of the semiconductor chip 131 are formed on a lower portion of the semiconductor chip 131, the electrodes can be electrically connected to the chip bonding pad 111 by attaching the semiconductor chip 131 on the chip bonding pad 111 using a conductive paste.
  • the package body 141 and 145 is formed by injecting the plastic resin through the insulating recess 115 and the distinguishing recess 119.
  • a part 145 of the package body is formed in the insulating recess 115 and the distinguishing recess 119, and the other part 141 of the package body is formed on the entire semiconductor chip 131 or around the semiconductor chip 131 to the height same to or greater than the semiconductor chip 131.
  • FIGS. 9 and 10 illustrate the LED as the semiconductor chip 131, and thus, the package body 141 is formed around the semiconductor chip 131.
  • the plastic resin can be injected into the entire insulating recess and the distinguishing recess 119 having the stepped cross-sections, and formed to a predetermined height around the semiconductor chip 131 as shown in FIG. 10. Therefore, the unit lead frame 110 and the elements installed on the lead frame 110 can be fixed firmly with each other.
  • the entire heat dissipation extension pad 117, a surface of the semiconductor chip 131 that is opposite to the surface where the semiconductor chip 131 is mounted, and a part of the lead 113 in the semiconductor package having the above structure are exposed. Therefore, the heat can be discharge through the exposed portions.
  • FIGS. 11 and 12 are views illustrating processes of manufacturing the semiconductor package according to the present embodiment.
  • the lead frame 100 illustrated in FIGS. 6 through 8 are formed by etching a lead frame main body to form the insulating recess and the distinguishing recess.
  • the insulating recess and the distinguishing recess respectively have different widths at the portion where the semiconductor chip is mounted and the opposite portion, and are formed through a complete etching process for penetrating the chip bonding pad 111 and a half-etching process for forming the stepped portion.
  • a process of forming at least one dam member on each of the portions having larger widths in the insulating recess and the distinguishing recess can be further performed.
  • the dam member 127 guides a flow of the plastic resin when forming the package body 141 and 145 so that the package body 141 and 145 can be formed as a predetermined shape, and fixes the package body 141 and 145 stably after forming the package body 141 and 145.
  • the lead frame 100 is located in a mold, the plastic resin is injected into the gate portion 123 to fill in the insulating recess (115 of FIG. 10) and the distinguishing recess (119 of FIG. 10), and the plastic resin is formed around the chip bonding pad 111 to a predetermined height. Then, the package body 141 and 145 having the cavity (147 of FIG. 10) can be formed as shown in FIGS. 11 and 12.
  • a transparent resin for example, an epoxy resin may be filled on the cavity 147 to protect the semiconductor chip 131 and the bonding wires 135.
  • the semiconductor package 150 is not separately fabricated. That is, the chip bonding pad 111, the lead 113, the heat dissipation extension pad 117, and the pad connection portion 121 form a unit lead frame 110, and a plurality of unit lead frames 110 form a strip by connecting to each other in the boundary 125. After manufacturing the semiconductor package 150, the unit lead frames 110 in the strip are separated using a sawing process along a cut line L , and then, a unit semiconductor package 160 can be fabricated.
  • the sawing process requires longer processing time than that of the cutting process using a stroking process, and should be performed carefully.
  • the cut portion in the semiconductor package according to the present invention is limited to the peripheral portion of the gate portion that is not covered by the plastic package body, and thus, the sawing process according to the present invention can be performed easily when it is compared to the sawing process of the conventional semiconductor package.
  • the method of manufacturing the semiconductor package is not limited to the above processing order, and order of some processes can be changed. That is, the semiconductor chip is mounted on the chip bonding pad of the lead frame, the semiconductor chip is electrically connected by the wire bonding, and then, the package body can be formed.
  • FIG. 13 is a perspective view of a lead frame according to another embodiment of the present invention
  • FIG. 14 is a perspective view of a bottom surface of the lead frame of FIG. 13.
  • a lead frame 200 is formed of a combination of unit lead frames 210. That is, the lead frame 200 is formed as a strip, in which a plurality of unit lead frames 210 are connected to each other within boundaries 235. In addition, the unit lead frames 210 can be separated by cutting the boundaries 235 along cut lines L and L that are denoted as dotted lines in FIGS. 13 and 14.
  • Each of the unit lead frames 210 includes a chip bonding pad 211, on which a semiconductor chip is mounted, leads 213 and 215 used as electrodes for applying power to the semiconductor chip, heat dissipation extension pads 221 and 223, and pad connection portions 229 connecting the chip bonding pad 211 to the heat dissipation extension pads 221 and 223.
  • the leads include a first lead 213 and a second lead 215 formed opposite to the first lead 213 about the chip bonding pad 211.
  • the first and second leads 213 and 213 are insulated from the chip bonding pad 211 by first and second insulating recesses 214 and 216, respectively.
  • the heat dissipation extension pads include a first heat dissipation extension pad
  • the pad connection portions 229 are formed at least two portions in the first and second distinguishing recesses 225 and 227 so that the heat from the chip bonding pad 211 can be transmitted to the first and second heat dissipation extension pads 221 and 223 through the pad connection portions 229.
  • the first and second leads 213 and 215 are formed, and the first and second heat dissipation extension pads 221 and 223 are disposed unlike the above embodiment, and the other elements are actually the same as those of the above embodiment. Therefore, detailed descriptions for the other elements are omitted.
  • the lead frame 210 may further include at least one dam member 237 at each of the portions having greater widths in the first and second insulating recesses 214 and 216 and the first and second distinguishing recesses 225 and 227.
  • Each of the dam members 237 has an end connected to the first or second heat dissipation extension pad 221 or 223 and the other end separated from the chip bonding pad 211 by a predetermined gap.
  • the lead frame 200 of the present embodiment includes a gate portion
  • the gate portion 231 is separated along the boundaries 235 when cutting the boundaries 235 along the cut lines L S2 and L
  • FIG. 15 is a perspective view of a semiconductor package according to another embodiment of the present invention
  • FIG. 16 is a cross-sectional view of the semiconductor package taken along line C-C of FIG. 15.
  • a semiconductor package 260 includes a lead frame (210 of FIG. 13), a semiconductor chip 261 mounted on the chip bonding pad 211 of the lead frame 210, bonding wires 265, and package body 271 and 275.
  • the lead frame 210 is substantially the same as that of FIGS. 13 and 14, and thus, detailed descriptions for the lead frame 210 are omitted.
  • the semiconductor chip 261 is mounted on the chip bonding pad 211 using an adhesive (not shown), and can be a general semiconductor device such as a transistor and a memory device, or an LED.
  • FIG. 15 illustrates the LED used as the semiconductor chip 261.
  • a cavity 277 is formed on the package body 275 so that the light of the LED can be radiated to outside.
  • the bonding wire 265 electrically connects at least one electrode of the semiconductor chip 261 to the first and second leads 213 and 215. Therefore, electric current supplied from outside through the first and/or the second lead 213 and 215 can be transmitted to the semiconductor chip 261 through the bonding wire 265.
  • the entire first and second heat dissipation extension pads 221 and 223, the surface of the chip bonding pad 211 that is opposite to the surface where the semiconductor chip 261 is mounted, and some parts of the first and second leads 213 and 215 are exposed as shown in FIG. 16. Therefore, the heat can be discharged in various directions through the exposed portions.
  • FIGS. 17 and 18 are views illustrating processes of manufacturing the semiconductor package of FIG. 15.
  • the lead frame 200 illustrated in FIGS. 13 and 14 is formed by etching a lead frame main body to form the first and second insulating recesses, and the first and second distinguishing recesses.
  • Each of the first and second insulating recesses and the first and second distinguishing recesses has different widths at the portion where the semiconductor chip is mounted and at the opposite portion.
  • the first and second insulating recesses and the first and second distinguishing recesses are formed through a complete etching process for penetrating the chip bonding pad 211 and a half-etching process for forming the stepped portion.
  • a process of forming at least one dam member 237 on the portions of the insulating recess and the distinguishing recess having large widths can be further performed.
  • Processes of patterning the lead frame using the etching process are well-known in the art, and detailed descriptions for the processes are omitted.
  • the lead frame 200 is located in a mold, a plastic resin is injected into the gate portion 231 to fill in the first and second insulating recesses (214 and 216 of FIG. 13) and in the first and second distinguishing recesses (225 and 227 of FIG. 10), and then, is formed around the chip bonding pad 211 to a predetermined height. Therefore, the package body 271 and 275 having the cavity 277 can be formed as shown in FIGS. 15 and 16.
  • the semiconductor chip 261 is mounted on the chip bonding pad 211, and after that, the semiconductor chip 271 and the first or second lead 213 or 215 are bonded to each other using the bonding wire 265, then, the semiconductor package 250 can be formed.
  • a process of filling a transparent resin, for example, an epoxy resin on the cavity 277 may be further performed in order to protect the semiconductor chip 261 and the bonding wires 265.
  • the semiconductor package 250 is not separately fabricated. That is, the chip bonding pad 211, the first and second leads 213 and 215, the first and second heat dissipation extension pads 221 and 223, and the pad connection portion 229 form a unit lead frame 260, and a plurality of unit lead frames 260 form a strip when connected to each other at the boundaries 235. After manufacturing the semiconductor package 250, the unit lead frames 260 in the strip are separated using a sawing process along the cut lines L and L , and then, a unit semiconductor package 260 can be fabricated.
  • the above method of manufacturing the semiconductor package is not limited to the above processing order, but order of some processes in the manufacturing method can be changed. That is, the semiconductor chip is mounted on the chip bonding pad of the lead frame, the semiconductor chip is electrically connected by the wire bonding, and then, the package body can be formed.
  • FIG. 19 is a perspective view of a lead frame according to another embodiment of the present invention
  • FIG. 20 is a perspective view of a bottom surface of the lead frame of FIG. 19.
  • a lead frame 300 is formed of a combination of unit lead frames 310. That is, the lead frame 300 is formed as a strip, in which a plurality of unit lead frames 310 are connected to each other within boundaries 335. In addition, the unit lead frames 310 can be separated by cutting the boundaries 335 along cut lines L and L that are denoted as dotted lines in FIGS. 19 and 20.
  • Each of the unit lead frames 310 includes a chip bonding pad 311 , on which a semiconductor chip is mounted, leads 313 and 315 used as electrodes for applying power to the semiconductor chip, heat dissipation extension pads 321 and 323, and pad connection portions 329 connecting the chip bonding pad 311 to the heat dissipation extension pads 321 and 323.
  • the leads include a first lead 313, and a second lead 315 formed opposite to the first lead 313 about the chip bonding pad 311.
  • Each of the first and second leads 313 and 315 includes a plurality of leads.
  • the first and second leads 313 and 315 are insulated by the chip bonding pad 211 by a first insulating recess 314 and a second insulating recess 316, respectively.
  • the heat dissipation extension pads include a first heat dissipation extension pad
  • the pad connection portions 329 are formed at least two portions in the first and second distinguishing recesses 325 and 327 so that the heat from the chip bonding pad 311 can be transmitted to the first and second heat dissipation extension pads 321 and 323 through the pad connection portions 329.
  • At least one dam member 337 can be further formed at each of the portions in the first and second insulating recesses 314 and 316 and each of the first and second dis- tinguishing recesses 325 and 327 having large widths.
  • An end of the dam member 337 is connected to the first or second heat dissipation extension pad 321 or 323, and the other end of the dam member 337 is separated from the chip bonding pad 311 by a predetermined gap.
  • the lead frame 300 includes a gate portion 331, in which a plastic resin is injected to form the package body, on the boundary 335 thereof.
  • the gate portion 331 is separated along the boundaries 335 when cutting the boundaries 335 along the cut lines L and L .
  • the first and second leads are identical to the lead frame of the present embodiment.
  • 313 and 315 include a plurality of leads respectively, and the chip bonding pad 311 is widely formed.
  • the other elements of the lead frame are substantially the same as those of the above embodiment.
  • FIG. 21 is a perspective view of a semiconductor package according to another embodiment of the present invention
  • FIG. 22 is a cross-sectional view of the semiconductor package taken along line D-D of FIG. 21
  • FIG. 23 is a cross-sectional view of the semiconductor package taken along line E-E of FIG. 21.
  • a semiconductor package 360 includes a unit lead frame (310 of FIG. 19), a plurality of semiconductor chips 361 mounted on a chip bonding pad 311 of the lead frame 310, bonding wires 365, and a package body 371 and 375.
  • the unit lead frame 310 is substantially the same as the lead frame illustrated in
  • FIGS. 19 and 20 detailed descriptions for the unit lead frame 310 are omitted.
  • the semiconductor chips 361 are mounted on the chip bonding pad 311, and each of the semiconductor chips 361 may be a general semiconductor device such as a transistor and a memory device, or an LED.
  • a general semiconductor device such as a transistor and a memory device, or an LED.
  • three LEDs radiating red, blue, and green lights are used as the semiconductor chips 361.
  • the package body 375 includes a cavity so that the lights of the three LEDs can be radiated to the outside.
  • the bonding wires 365 electrically connect the semiconductor chips 361 to the first and second leads 313 and 315. Therefore, external electric current supplied through the first lead 313 and/or the second lead 315 can be transmitted to the semiconductor chips 361 through the bonding wires 365.
  • the lead frame according to the present invention can be widely used in semiconductor packages including semiconductor chips requiring highly efficient heat dissipating property with a small number of leads, for example, power transistor devices, high frequency devices for radio communication, and LEDs.

Abstract

Provided are a lead frame that can increase a heat dissipation performance by forming heat dissipation path in various direction, and a semiconductor package including the lead frame. The lead frame includes: a chip bonding pad on which a semiconductor chip can be mounted; at least one lead disposed adjacent to the chip bonding pad, and electrically insulated from the chip bonding pad by an insulating recess; a heat dissipation extension pad formed around the chip bonding pad while not contacting the lead, and distinguished from the chip bonding pad by a distinguishing recess; and a plurality of pad connection portions formed in the distinguishing recess to connect the chip bonding pad to the heat dissipation extension pad.

Description

Description
LEAD FRAME, SEMICONDUCTOR PACKAGE EMPLOYING THE LEAD FRAME AND METHOD FOR MANUFACTURING
THE SEMICONDUCTOR PACKAGE
Technical Field
[1] The present invention relates to a lead frame, a semiconductor package including the lead frame, and a method of manufacturing the semiconductor package, and more particularly, to a lead frame that can improve a heat dissipation efficiency by forming various heat dissipation paths, a semiconductor package, and a method of manufacturing the semiconductor package.
Background Art
[2] In general, a semiconductor package includes a lead frame including a chip bonding pad and a lead wire, a semiconductor chip mounted on the chip bonding pad, and a package body packaging the lead frame and the semiconductor chip. The package body is formed of a material such as a plastic, a ceramic, or a pseudo- dielectric material, and packages the semiconductor chip using a molding process.
[3] Semiconductor packages can be classified into sealing type packages surrounding entire semiconductor chip, and cavity type packages exposing at least one portion of the semiconductor chip. When the cavity type semiconductor packages include light emitting diodes (LEDs) as the semiconductor chips, the cavity type semiconductor packages are formed as light reflection cups so as to emit the light emitted by the LEDs to outside.
[4] A general semiconductor chip dissipates heat during operating, and if the heat is excessive, the heat badly affects performances of the semiconductor chip and reduces a life span of the semiconductor chip. In particular, the light emitting device such as the LED dissipates a large amount of heat so that about 70% of an impressed power consumption is consumed by the heat. In addition, if the semiconductor package has the package body formed of plastic, the heat generated during operating the semiconductor chip can be only partially dissipated through the metal chip bonding pad and the lead wire. Therefore, most of the heat cannot be dissipated from the plastic package body.
[5] Therefore, the semiconductor package including the semiconductor chip such as the light emitting device should include a heat dissipation structure for dissipating the heat efficiently.
[6] Referring to FIGS. IA through 5, the conventional semiconductor package includes a heat dissipation structure, for example, the metal chip bonding pad can be exposed on a bottom surface of the package body, the metal chip bonding pad can be exposed on sides of the package body, a thick chip bonding pad can be formed, or an additional metal plate can be attached on a bottom surface of the chip bonding pad.
[7] FIGS. IA and IB are a plan view and a cross-sectional view of a plastic molding semiconductor package having the conventional heat dissipation structure.
[8] In FIGS. IA and IB, a package including a high power device such as a transistor is illustrated. The package includes the package body 11 and the lead frame 15 including the chip bonding pad 16 and a heat dissipation extension pad 17 that are distinguished by positions with respect to the body 11. A bottom surface 16a of the chip bonding pad 16 is exposed on the bottom 1 Ia of the package body 11, and the heat dissipation extension pad 17 is exposed from a side surface 1 Ib of the package body 11.
[9] According to the above package structure, the heat dissipation extension pad 17 can be exposed only from a part of the side surface 1 Ib of the package body 11 due to some problems, for example, moisture absorption, separation from the body, and limitations in packaging, and cannot occupy the entire side surface 1 Ib of the package body 11.
[10] FIGS. 2A and 2B are a plan view and a cross-sectional view of a small outline package (SOP) having a heat dissipation structure that is exposed on both sides of the package according to the conventional art.
[11] The SOP includes a package body 21, and a lead frame 25 including a chip bonding pad 26 and a plurality of leads 27 and 28. The leads 27 are used to be electrically connected to a chip 23 mounted on the chip bonding pad 26, and some leads 28 are used as heat dissipation extension pads 28. The heat dissipation extension pads 28 extend from the chip bonding pad 26, and some parts of the heat dissipation extension pads 28 are exposed out of the package body 21. Therefore, the heat generated when operating the chip 23 can be transmitted to outside of the package body 21.
[12] According to the semiconductor package having the above structure, the exposure areas of the heat dissipation extension pads 28 cannot be enlarged due to the arrangement of the lead frame 25 with respect to the package body 21 and limitations in assembling processes. Also, the heat dissipation extension pads 28 may form moisture absorption paths.
[13] FIG. 3 is a cross-sectional view of a semiconductor package, in which a bottom surface of the chip bonding pad is exposed, according to the conventional art. Referring to FIG. 3, the semiconductor package does not include an additional heat dissipation extension pad shown in FIGS. IA, IB, 2A, and 2B, but a bottom surface 36a of the chip bonding pad 36 is exposed on a bottom surface 31a of the package body 31 to dissipate the heat in the package body 31 to outside.
[14] FIG. 4 is a cross-sectional view of a semiconductor package including a heat sink attached onto the chip bonding pad and having an exposed bottom surface. The heat is dissipated to the bottom surface 41a of the package body through a metal heat sink 47 attached on the chip bonding pad 46. However, in the above structure, a moisture absorption path that is formed along a bonding interface between the heat sink 47 and the package body 41 becomes complex, and a resin forming the package body 41 may surround the heat sink 47. Therefore, reliability of the heat dissipation structure may be degraded due to a physical weakness such as separation of the heat dissipation structure. Disclosure of Invention
Technical Problem
[15] However, if the heat dissipation structure is formed as the examples shown in
FIGS. 3 and 4, the heat only can be dissipated through the exposed portion on the bottom surface 41a of the package body, and thus, the heat dissipation efficiency is degraded.
[16] FIG. 5 is a perspective view of a ceramic semiconductor package having the heat dissipation structure according to the conventional art. Referring to FIG. 5, the ceramic semiconductor package is formed by attaching a ceramic body 51 onto a lead frame 55 using a brazing process, and thus, the package is safe from the separation or the moisture absorption. Therefore, the heat dissipation extension pads can be formed in various directions. However, an economical efficiency and a productivity of manufacturing the ceramic semiconductor package are much lower than those of manufacturing a plastic semiconductor package.
Technical Solution
[17] The present invention provides a lead frame for a semiconductor package, which can form heat dissipation paths in various directions in packaging a chip and can ensure safety from moisture absorption and separation of the package.
[18] The present invention also provides a semiconductor package and a method for manufacturing the same that can form heat dissipation paths in various directions using the lead frame to improve a heat dissipation property and can improve productivity, economical efficiency, reliability, and robustness of the package.
[19] According to an aspect of the present invention, there is provided a lead frame including: a chip bonding pad on which a semiconductor chip can be mounted; at least one lead disposed adjacent to the chip bonding pad, and electrically insulated from the chip bonding pad by an insulating recess; a heat dissipation extension pad formed around the chip bonding pad while not contacting the lead, and distinguished from the chip bonding pad by a distinguishing recess; and a plurality of pad connection portions formed in the distinguishing recess to connect the chip bonding pad to the heat dissipation extension pad.
[20] According to another aspect of the present invention, there is provided a semiconductor package including: a lead frame having the above structure; at least one semiconductor chip mounted on a surface of the chip bonding pad; bonding wires electrically connecting the semiconductor chip to the chip bonding pad and/or to the lead; and a package body formed of plastic in the insulating recess and the distinguishing recess, and on the entire semiconductor chip or around the semiconductor chip at the height same to or greater than the semiconductor chip. In addition, the heat dissipation extension pad, a surface of the chip bonding pad that is opposite to the surface on which the semiconductor chip is mounted, and the lead are exposed to the outside, and heat is dissipated in various directions through the exposed portions.
[21] According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor package including: preparing a main body of a lead frame; forming the lead frame having the above structure by etching the lead frame main body to form an insulating recess and a distinguishing recess; mounting a semiconductor chip on the chip bonding pad; connecting the semiconductor chip to the chip bonding pad and/or to the lead using the bonding wire; and injecting a plastic resin into the insulating recess and the distinguishing recess to form a package in the insulating recess and the distinguishing recess, and on the entire semiconductor chip or around the semiconductor chip to the height of the semiconductor chip or greater.
[22] According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor package including: preparing a main body of a lead frame; forming the lead frame having the above structure by etching the lead frame main body to form an insulating recess and a distinguishing recess; injecting a plastic resin into the insulating recess and the distinguishing recess to form a package in the insulating recess and the distinguishing recess, and on the entire semiconductor chip or around the semiconductor chip to the height of the semiconductor chip or greater; mounting a semiconductor chip on the chip bonding pad; and connecting the semiconductor chip to the chip bonding pad and/or the lead using the bonding wire.
Advantageous Effects
[23] According to the lead frame of the present invention, the lead frame can be robust to moisture absorption and separation from a semiconductor package even when various heat dissipation paths are formed. In addition, according to the semiconductor package using the lead frame of the present invention, the heat dissipation extension pads can be formed on any place including the sides and the bottom surface of the package body, and thus, the heat dissipation efficiency can be maximized. [24] In addition, an insulating recess and a distinguishing recess are formed to have stepped cross-sections, and pad connection portions of narrow widths are formed on many portions between the chip bonding pad and the heat dissipation extension pad, and thus, the moisture absorption and separation between the package body and the chip bonding pad can be prevented. Therefore, reliability and robustness of the semiconductor package can be improved.
[25] In addition, since the package body is formed of a plastic material and the cut portion can be minimized by the sawing process, productivity and economical efficiency of manufacturing the semiconductor package can be improved. Moreover, the leads are exposed on the bottom of the semiconductor package and lengths of the leads can be shortened by the sawing process, and thus, the semiconductor package can be formed to be thin and light.
Description of Drawings
[26] FIGS. IA and IB are a plan view and a cross-sectional view of a plastic molding semiconductor package including a heat dissipation structure according to the conventional art;
[27] FIGS. 2A and 2B are a plan view and a cross-sectional view of a small outline package (SOP) having a heat dissipation structure exposed from both sides of the package according to the conventional art;
[28] FIG. 3 is a cross-sectional view of a semiconductor package having a structure, in which a bottom surface of a chip bonding pad is exposed, according to the conventional art;
[29] FIG. 4 is a cross-sectional view of a semiconductor package including a heat sink attached on a chip bonding pad and having a bottom surface exposed out of the package according to the conventional art;
[30] FIG. 5 is a perspective view of a ceramic semiconductor package having the conventional heat dissipation structure;
[31] FIG. 6 is a perspective view and a partially enlarged view of a lead frame according to an embodiment of the present invention;
[32] FIG. 7 is a cross-sectional view of the lead frame taken along line A-A of FIG. 6;
[33] FIG. 8 is a perspective view of a bottom surface of the lead frame of FIG. 6;
[34] FIG. 9 is a perspective view of a semiconductor package according to an embodiment of the present invention;
[35] FIG. 10 is a cross-sectional view of the semiconductor package taken along line B-
B of FIG. 9;
[36] FIGS. 11 and 12 are views illustrating manufacturing processes of the semiconductor package according to an embodiment of the present invention;
[37] FIG. 13 is a plan perspective view of a lead frame according to another embodiment of the present invention;
[38] FIG. 14 is a bottom perspective view of the lead frame of FIG. 13;
[39] FIG. 15 is a perspective view of a semiconductor package according to another embodiment of the present invention;
[40] FIG. 16 is a cross-sectional view of the semiconductor package taken along line C-
C of FIG. 15;
[41] FIGS. 17 and 18 are views illustrating manufacturing processes of the semiconductor package of FIG. 15;
[42] FIG. 19 is a plan perspective view of a lead frame according to another embodiment of the present invention;
[43] FIG. 20 is a perspective view of a bottom surface of the lead frame of FIG. 19;
[44] FIG. 21 is a perspective view of a semiconductor package according to another embodiment of the present invention;
[45] FIG. 22 is a cross-sectional view of the semiconductor package taken along line D-
D of FIG. 21; and
[46] FIG. 23 is a cross-sectional view of the semiconductor package taken along line E-
E of FIG. 21.
Mode for Invention
[47] Hereinafter, a lead frame, a semiconductor package including the lead frame, and a method of the semiconductor package will be described in detail with reference to accompanying drawings.
[48] FIG. 6 is a perspective view of a lead frame according to an embodiment of the present invention, FIG. 7 is a cross-sectional view of the lead frame taken along line A-A of FIG. 6, and FIG. 8 is a perspective view of a bottom surface of the lead frame of FIG. 6.
[49] Referring to FIGS. 6 through 8, a lead frame 100 according to the present embodiment is formed of combination of unit lead frames 110, each of which includes elements that will be described later. That is, the lead frame 100 is a strip formed by connecting a plurality of unit lead frames 110 in a boundary 125, and can be divided into unit lead frames 110 by cutting the boundary 125 along a cut line L denoted by dotted line in FIG. 6.
[50] Each of the unit lead frames 110 forming the lead frame 100 includes a chip bonding pad 111, on which a semiconductor chip is mounted, a lead 113 used as an electrode for applying power to the semiconductor chip, a heat dissipation extension pad 117, and a pad connection portion 121 connecting the chip bonding pad 111 and the heat dissipation extension pad 117.
[51] The lead 113 is disposed adjacent to the chip bonding pad 111, and electrically insulated from the chip bonding pad 111 by an insulating recess 115. The lead 113 is electrically connected to an electrode of the semiconductor chip that is mounted on the chip bonding pad 111 using a bonding wire to supply the power for driving the semiconductor chip. Here, the lead 113 is not limited to the single as shown in FIG. 6, but a plurality of leads can be formed on a side of the chip bonding pad 111.
[52] The heat dissipation extension pad 117 is formed around the chip bonding pad 111 while not contacting the lead 113. Most portion of the heat dissipation extension pad 117 is exposed to outside when packaging the semiconductor chip and the chip bonding pad 111 using a package body that will be described later. The heat dissipation extension pad 117 is distinguished from the chip bonding pad 111 by distinguishing recesses 119 formed between the heat dissipation extension pad 117 and the chip bonding pad 111.
[53] The pad connection portions 121 are disposed in the insulating recess 115 and the distinguishing recesses 119 to connect the chip bonding pad 111 to the heat dissipation extension pad 117. The pad connection portions 121 are formed at different positions around the chip bonding pad 111 in order to minimize moisture absorption and separation between the heat dissipation extension pad 117 and the chip bonding pad 111, and in order to dissipate the heat in various directions. That is, the pad connection portions 121 are formed on at least three portions (five portions in FIG. 6) in the insulating recess 115 and the distinguishing recesses 119, and thus, the heat dissipation extension pad 117 can be fixed stably. In addition, the heat transmitted from the chip bonding pad 111 can be effectively transmitted to the heat dissipation extension pad 117. If a package body that will be described later is formed as a square, the heat dissipation extension pad 117 can have the size holding one side or greater of the package body unlike in the conventional semiconductor package. In addition, if the package body is not formed as a square, the heat dissipation extension pad 117 may occupy 1 / 4 or greater of the whole circumference of the package body.
[54] As described above, the heat dissipation pad 117 has a wide area and the pad connection portions 121 are formed at many portions with narrow widths, and thus, the separation and moisture absorption can be reduced and a bottle neck phenomenon that may be generated during discharging the heat can be reduced.
[55] The distinguishing recess 119 has a stepped cross-section so that a width of a portion 119a at a surface of the chip bonding pad 111, that is, the surface where the semiconductor chip is mounted, is smaller than a width of a portion 119b at the opposite surface of the chip bonding pad 111. In addition, the insulating recess 115 also has a stepped cross-section so that a width of a portion 115a at a surface of the chip bonding pad 111 is smaller than a width of a portion 115bat the opposite surface of the chip bonding pad 111. The portions 115b and 119b having larger widths of the insulating recess 115 and the distinguishing recess 119 are spatially connected to each other. Therefore, a plastic resin for forming the package body is injected into the insulating recess 115 and the distinguishing recess 119 through the connected space.
[56] As described above, since the insulating recess 115 and the distinguishing recess
119 are formed to have stepped cross-sections, the moisture absorption path formed between the recesses 115 and 119 and the package body can be extended, and thus, moisture infiltration from outside can be prevented efficiently. In addition, the package body (refer to 141 and 145 of FIG. 10) is formed by interposing the narrow portion 119a, and thus, the distinguishing recess 119 firmly contact the plastic resin forming the package body.
[57] At least one dam member 127 may be formed on each of the wide portions 115b and 119b of the insulating recess 115 and the distinguishing recess 119. An end of the dam member 127 is connected to the heat dissipation extension pad 117, and the other end of the dam member 127 is separated from the chip bonding pad 111 by a predetermined gap. The dam member 127 stably fixes the heat dissipation extension pad 117, and prevents the plastic resin from inducing to the outer portion of the heat dissipation extension pad 117 when the plastic resin for molding is injected.
[58] The lead frame 100 according to the present invention includes a gate portion 123 of circular or square shape on the boundary 125 for injecting the plastic molding resin into the insulating recess 115 and the distinguishing recess 119. The gate portion 123 is separated along the boundary 125 when cutting the boundary along the cut line L .
[59] The lead frame 100 may be thicker than a general thickness of the lead frame, that is, 0.2 ~ 0.25mm. That is, the lead frame 100 may be formed to a thickness about 0.4mm, 0.5mm, and 0.76mm or larger. Therefore, when the stepped cross-sections of the insulating recess 115 and the distinguishing recess 118 are formed using a half- etching process, a required height can be ensured and the moisture absorption path can be extended and the moisture blocking effect can be maximized.
[60] FIG. 9 is a perspective view of a semiconductor package according to an embodiment of the present invention, and FIG. 10 is a cross-sectional view of the semiconductor package taken along line B-B of FIG. 9.
[61] Referring to FIGS. 9 and 10, the semiconductor package 160 according to the present embodiment includes a lead frame (110 of FIG. 6), a semiconductor chip 131 mounted on a chip bonding pad 111 of the lead frame 110, bonding wires 135, and a package body 141 and 145.
[62] The lead frame 110 includes the chip bonding pad 111, on which the semiconductor chip 131 is mounted, a lead 113 used as an electrode for applying power to the semiconductor chip 131 and electrically insulated from the chip bonding pad 111 by the insulating recess 115, a heat dissipation extension pad 117 separated from the chip bonding pad 111 by the distinguishing recess 119, and a pad connection portion (121 of FIG. 6) connecting the chip bonding pad 111 to the heat dissipation extension pad 117.
[63] The lead frame 110 is substantially identical to the unit lead frame illustrated in
FIGS. 6 through 8, and detailed descriptions for the lead frame 110 are omitted.
[64] The semiconductor chip 131 is mounted on the chip bonding pad 111 using an adhesive (not shown), and may be a general semiconductor device such as a power transistor device and a high frequency device for radio communication, or a light emitting diode (LED). In a case a general semiconductor device is used as the semiconductor chip 131, the package body (not shown) is formed on the lead frame 110 so as to cover the entire semiconductor device. On the contrary, if the LED is used as the semiconductor chip, the package body 145 having a cavity 147 is formed so that the light from the LED can be radiated to outside.
[65] The bonding wires 135 electrically connect an electrode of the semiconductor chip
131 to the lead 113, and the electric current applied from outside through the lead 113 can be transmitted to the semiconductor chip 131 through the bonding wires 135.
[66] In addition, the bonding wire 135 can be used to electrically connect the other electrode of the semiconductor chip 131 to the chip bonding pad 111. When the electrodes of the semiconductor chip 131 are electrically connected to the chip bonding pad 111, the bonding wires 135 are not essential elements. That is, if the electrodes of the semiconductor chip 131 are formed on a lower portion of the semiconductor chip 131, the electrodes can be electrically connected to the chip bonding pad 111 by attaching the semiconductor chip 131 on the chip bonding pad 111 using a conductive paste.
[67] The package body 141 and 145 is formed by injecting the plastic resin through the insulating recess 115 and the distinguishing recess 119. A part 145 of the package body is formed in the insulating recess 115 and the distinguishing recess 119, and the other part 141 of the package body is formed on the entire semiconductor chip 131 or around the semiconductor chip 131 to the height same to or greater than the semiconductor chip 131. FIGS. 9 and 10 illustrate the LED as the semiconductor chip 131, and thus, the package body 141 is formed around the semiconductor chip 131.
[68] As described above, when the package body 141 and 145 is formed by injecting the plastic resin, the plastic resin can be injected into the entire insulating recess and the distinguishing recess 119 having the stepped cross-sections, and formed to a predetermined height around the semiconductor chip 131 as shown in FIG. 10. Therefore, the unit lead frame 110 and the elements installed on the lead frame 110 can be fixed firmly with each other.
[69] Referring to FIG. 9, the entire heat dissipation extension pad 117, a surface of the semiconductor chip 131 that is opposite to the surface where the semiconductor chip 131 is mounted, and a part of the lead 113 in the semiconductor package having the above structure are exposed. Therefore, the heat can be discharge through the exposed portions.
[70] FIGS. 11 and 12 are views illustrating processes of manufacturing the semiconductor package according to the present embodiment.
[71] The lead frame 100 illustrated in FIGS. 6 through 8 are formed by etching a lead frame main body to form the insulating recess and the distinguishing recess. The insulating recess and the distinguishing recess respectively have different widths at the portion where the semiconductor chip is mounted and the opposite portion, and are formed through a complete etching process for penetrating the chip bonding pad 111 and a half-etching process for forming the stepped portion. In addition, a process of forming at least one dam member on each of the portions having larger widths in the insulating recess and the distinguishing recess can be further performed. The dam member 127 guides a flow of the plastic resin when forming the package body 141 and 145 so that the package body 141 and 145 can be formed as a predetermined shape, and fixes the package body 141 and 145 stably after forming the package body 141 and 145.
[72] Processes of patterning the lead frame using the above etching process are well- known processes, and thus, detailed descriptions are omitted.
[73] After that, the lead frame 100 is located in a mold, the plastic resin is injected into the gate portion 123 to fill in the insulating recess (115 of FIG. 10) and the distinguishing recess (119 of FIG. 10), and the plastic resin is formed around the chip bonding pad 111 to a predetermined height. Then, the package body 141 and 145 having the cavity (147 of FIG. 10) can be formed as shown in FIGS. 11 and 12.
[74] In addition, after mounting the semiconductor chip 131 on the chip bonding pad
111, the semiconductor chip 131 and the chip bonding pad 111 and/or the semiconductor chip 131 and the lead 113 are bonded to each other using the bonding wires 135, and then, the semiconductor package 150 is formed. A transparent resin, for example, an epoxy resin may be filled on the cavity 147 to protect the semiconductor chip 131 and the bonding wires 135.
[75] The semiconductor package 150 is not separately fabricated. That is, the chip bonding pad 111, the lead 113, the heat dissipation extension pad 117, and the pad connection portion 121 form a unit lead frame 110, and a plurality of unit lead frames 110 form a strip by connecting to each other in the boundary 125. After manufacturing the semiconductor package 150, the unit lead frames 110 in the strip are separated using a sawing process along a cut line L , and then, a unit semiconductor package 160 can be fabricated.
[76] When the semiconductor package 150 is divided using the sawing process, problems generated when the package is cut using a stroking process, for example, a separation between the lead frame and the plastic package body due to a physical shock during the stroking process and cracks on the package body generated due to a weak physical property of the cavity type package body, can be substantially solved.
[77] The sawing process requires longer processing time than that of the cutting process using a stroking process, and should be performed carefully. However, the cut portion in the semiconductor package according to the present invention is limited to the peripheral portion of the gate portion that is not covered by the plastic package body, and thus, the sawing process according to the present invention can be performed easily when it is compared to the sawing process of the conventional semiconductor package.
[78] The method of manufacturing the semiconductor package is not limited to the above processing order, and order of some processes can be changed. That is, the semiconductor chip is mounted on the chip bonding pad of the lead frame, the semiconductor chip is electrically connected by the wire bonding, and then, the package body can be formed.
[79] FIG. 13 is a perspective view of a lead frame according to another embodiment of the present invention, and FIG. 14 is a perspective view of a bottom surface of the lead frame of FIG. 13.
[80] Referring to FIGS. 13 and 14, a lead frame 200 according to the present embodiment is formed of a combination of unit lead frames 210. That is, the lead frame 200 is formed as a strip, in which a plurality of unit lead frames 210 are connected to each other within boundaries 235. In addition, the unit lead frames 210 can be separated by cutting the boundaries 235 along cut lines L and L that are denoted as dotted lines in FIGS. 13 and 14.
[81] Each of the unit lead frames 210 includes a chip bonding pad 211, on which a semiconductor chip is mounted, leads 213 and 215 used as electrodes for applying power to the semiconductor chip, heat dissipation extension pads 221 and 223, and pad connection portions 229 connecting the chip bonding pad 211 to the heat dissipation extension pads 221 and 223.
[82] The leads include a first lead 213 and a second lead 215 formed opposite to the first lead 213 about the chip bonding pad 211. The first and second leads 213 and 213 are insulated from the chip bonding pad 211 by first and second insulating recesses 214 and 216, respectively.
[83] The heat dissipation extension pads include a first heat dissipation extension pad
221 and a second heat dissipation extension pad 223 formed around the chip bonding pad 211 while not contacting the first and second leads 213 and 215, and distinguished from the chip bonding pad 211 by first and second distinguishing recesses 225 and 227, respectively. The pad connection portions 229 are formed at least two portions in the first and second distinguishing recesses 225 and 227 so that the heat from the chip bonding pad 211 can be transmitted to the first and second heat dissipation extension pads 221 and 223 through the pad connection portions 229.
[84] According to the present embodiment, the first and second leads 213 and 215 are formed, and the first and second heat dissipation extension pads 221 and 223 are disposed unlike the above embodiment, and the other elements are actually the same as those of the above embodiment. Therefore, detailed descriptions for the other elements are omitted.
[85] In addition, the lead frame 210 may further include at least one dam member 237 at each of the portions having greater widths in the first and second insulating recesses 214 and 216 and the first and second distinguishing recesses 225 and 227. Each of the dam members 237 has an end connected to the first or second heat dissipation extension pad 221 or 223 and the other end separated from the chip bonding pad 211 by a predetermined gap.
[86] In addition, the lead frame 200 of the present embodiment includes a gate portion
231 of circular or square shape on the boundary 235. The gate portion 231 is separated along the boundaries 235 when cutting the boundaries 235 along the cut lines L S2 and L
S3
[87] FIG. 15 is a perspective view of a semiconductor package according to another embodiment of the present invention, and FIG. 16 is a cross-sectional view of the semiconductor package taken along line C-C of FIG. 15.
[88] Referring to FIGS. 15 and 16, a semiconductor package 260 according to the current embodiment of the present invention includes a lead frame (210 of FIG. 13), a semiconductor chip 261 mounted on the chip bonding pad 211 of the lead frame 210, bonding wires 265, and package body 271 and 275.
[89] The lead frame 210 is substantially the same as that of FIGS. 13 and 14, and thus, detailed descriptions for the lead frame 210 are omitted.
[90] The semiconductor chip 261 is mounted on the chip bonding pad 211 using an adhesive (not shown), and can be a general semiconductor device such as a transistor and a memory device, or an LED. FIG. 15 illustrates the LED used as the semiconductor chip 261. In addition, a cavity 277 is formed on the package body 275 so that the light of the LED can be radiated to outside.
[91] The bonding wire 265 electrically connects at least one electrode of the semiconductor chip 261 to the first and second leads 213 and 215. Therefore, electric current supplied from outside through the first and/or the second lead 213 and 215 can be transmitted to the semiconductor chip 261 through the bonding wire 265.
[92] Process of forming the package body 271 and 275 on the lead frame 210 is sub- stantially the same as that of the above embodiment, and detailed descriptions for the process are omitted.
[93] In the semiconductor package 260 having the above structure, the entire first and second heat dissipation extension pads 221 and 223, the surface of the chip bonding pad 211 that is opposite to the surface where the semiconductor chip 261 is mounted, and some parts of the first and second leads 213 and 215 are exposed as shown in FIG. 16. Therefore, the heat can be discharged in various directions through the exposed portions.
[94] FIGS. 17 and 18 are views illustrating processes of manufacturing the semiconductor package of FIG. 15.
[95] The lead frame 200 illustrated in FIGS. 13 and 14 is formed by etching a lead frame main body to form the first and second insulating recesses, and the first and second distinguishing recesses. Each of the first and second insulating recesses and the first and second distinguishing recesses has different widths at the portion where the semiconductor chip is mounted and at the opposite portion. The first and second insulating recesses and the first and second distinguishing recesses are formed through a complete etching process for penetrating the chip bonding pad 211 and a half-etching process for forming the stepped portion. In addition, a process of forming at least one dam member 237 on the portions of the insulating recess and the distinguishing recess having large widths can be further performed. Processes of patterning the lead frame using the etching process are well-known in the art, and detailed descriptions for the processes are omitted.
[96] In addition, the lead frame 200 is located in a mold, a plastic resin is injected into the gate portion 231 to fill in the first and second insulating recesses (214 and 216 of FIG. 13) and in the first and second distinguishing recesses (225 and 227 of FIG. 10), and then, is formed around the chip bonding pad 211 to a predetermined height. Therefore, the package body 271 and 275 having the cavity 277 can be formed as shown in FIGS. 15 and 16.
[97] In addition, the semiconductor chip 261 is mounted on the chip bonding pad 211, and after that, the semiconductor chip 271 and the first or second lead 213 or 215 are bonded to each other using the bonding wire 265, then, the semiconductor package 250 can be formed. A process of filling a transparent resin, for example, an epoxy resin on the cavity 277 may be further performed in order to protect the semiconductor chip 261 and the bonding wires 265.
[98] The semiconductor package 250 is not separately fabricated. That is, the chip bonding pad 211, the first and second leads 213 and 215, the first and second heat dissipation extension pads 221 and 223, and the pad connection portion 229 form a unit lead frame 260, and a plurality of unit lead frames 260 form a strip when connected to each other at the boundaries 235. After manufacturing the semiconductor package 250, the unit lead frames 260 in the strip are separated using a sawing process along the cut lines L and L , and then, a unit semiconductor package 260 can be fabricated.
[99] The above method of manufacturing the semiconductor package is not limited to the above processing order, but order of some processes in the manufacturing method can be changed. That is, the semiconductor chip is mounted on the chip bonding pad of the lead frame, the semiconductor chip is electrically connected by the wire bonding, and then, the package body can be formed.
[100] FIG. 19 is a perspective view of a lead frame according to another embodiment of the present invention, and FIG. 20 is a perspective view of a bottom surface of the lead frame of FIG. 19.
[101] Referring to FIGS. 19 and 20, a lead frame 300 according to the present embodiment is formed of a combination of unit lead frames 310. That is, the lead frame 300 is formed as a strip, in which a plurality of unit lead frames 310 are connected to each other within boundaries 335. In addition, the unit lead frames 310 can be separated by cutting the boundaries 335 along cut lines L and L that are denoted as dotted lines in FIGS. 19 and 20.
[102] Each of the unit lead frames 310 includes a chip bonding pad 311 , on which a semiconductor chip is mounted, leads 313 and 315 used as electrodes for applying power to the semiconductor chip, heat dissipation extension pads 321 and 323, and pad connection portions 329 connecting the chip bonding pad 311 to the heat dissipation extension pads 321 and 323.
[103] The leads include a first lead 313, and a second lead 315 formed opposite to the first lead 313 about the chip bonding pad 311. Each of the first and second leads 313 and 315 includes a plurality of leads. In addition, the first and second leads 313 and 315 are insulated by the chip bonding pad 211 by a first insulating recess 314 and a second insulating recess 316, respectively.
[104] The heat dissipation extension pads include a first heat dissipation extension pad
321 and a second heat dissipation extension pad 323 formed around the chip bonding pad 311 while not contacting the first and second leads 313 and 315, and distinguished from the chip bonding pad 311 by first and second distinguishing recesses 325 and 327, respectively. The pad connection portions 329 are formed at least two portions in the first and second distinguishing recesses 325 and 327 so that the heat from the chip bonding pad 311 can be transmitted to the first and second heat dissipation extension pads 321 and 323 through the pad connection portions 329.
[105] At least one dam member 337 can be further formed at each of the portions in the first and second insulating recesses 314 and 316 and each of the first and second dis- tinguishing recesses 325 and 327 having large widths. An end of the dam member 337 is connected to the first or second heat dissipation extension pad 321 or 323, and the other end of the dam member 337 is separated from the chip bonding pad 311 by a predetermined gap.
[106] In addition, the lead frame 300 according to the present embodiment includes a gate portion 331, in which a plastic resin is injected to form the package body, on the boundary 335 thereof. The gate portion 331 is separated along the boundaries 335 when cutting the boundaries 335 along the cut lines L and L .
& & S4 S5
[107] According to the lead frame of the present embodiment, the first and second leads
313 and 315 include a plurality of leads respectively, and the chip bonding pad 311 is widely formed. The other elements of the lead frame are substantially the same as those of the above embodiment.
[108] FIG. 21 is a perspective view of a semiconductor package according to another embodiment of the present invention, FIG. 22 is a cross-sectional view of the semiconductor package taken along line D-D of FIG. 21, and FIG. 23 is a cross-sectional view of the semiconductor package taken along line E-E of FIG. 21.
[109] Referring to FIGS. 21 through 23, a semiconductor package 360 according to the present embodiment includes a unit lead frame (310 of FIG. 19), a plurality of semiconductor chips 361 mounted on a chip bonding pad 311 of the lead frame 310, bonding wires 365, and a package body 371 and 375.
[110] The unit lead frame 310 is substantially the same as the lead frame illustrated in
FIGS. 19 and 20, and thus, detailed descriptions for the unit lead frame 310 are omitted.
[I l l] The semiconductor chips 361 are mounted on the chip bonding pad 311, and each of the semiconductor chips 361 may be a general semiconductor device such as a transistor and a memory device, or an LED. In the drawings, three LEDs radiating red, blue, and green lights are used as the semiconductor chips 361. The package body 375 includes a cavity so that the lights of the three LEDs can be radiated to the outside.
[112] The bonding wires 365 electrically connect the semiconductor chips 361 to the first and second leads 313 and 315. Therefore, external electric current supplied through the first lead 313 and/or the second lead 315 can be transmitted to the semiconductor chips 361 through the bonding wires 365.
[113] Processes of forming the package body 371 and 375 on the lead frame 310 are the same as those in the semiconductor packages according to the above embodiments, and thus, detailed descriptions for those are omitted.
[114] In the semiconductor package 360 having the above structure, the entire first and second heat dissipation extension pads 321 and 323, the surface of the chip bonding pad 311 that is opposite to the surface where the semiconductor chips 361 are mounted, and some parts of the first and second leads 313 and 315 are exposed as shown in FIG. 21. Therefore, the heat can be discharged in various directions through the exposed portions.
[115] While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention as defined by the following claims.
Industrial Applicability
[116] The lead frame according to the present invention can be widely used in semiconductor packages including semiconductor chips requiring highly efficient heat dissipating property with a small number of leads, for example, power transistor devices, high frequency devices for radio communication, and LEDs.

Claims

Claims
[1] A lead frame comprising: a chip bonding pad on which a semiconductor chip can be mounted; at least one lead disposed adjacent to the chip bonding pad, and electrically insulated from the chip bonding pad by an insulating recess; a heat dissipation extension pad formed around the chip bonding pad while not contacting the lead, and distinguished from the chip bonding pad by a distinguishing recess; and a plurality of pad connection portions formed in the distinguishing recess to connect the chip bonding pad to the heat dissipation extension pad.
[2] The lead frame of claim 1, wherein the pad connection portions comprise at least three portions and heat from the chip bonding pad can be transmitted to the heat dissipation extension pad through the pad connection portions.
[3] The lead frame of claim 1, wherein the at least one lead comprises: a first lead formed on a side of the chip bonding pad, and insulated from the chip bonding pad by a first insulating recess; and a second lead formed on an opposite side of the chip bonding pad, and insulated from the chip bonding pad by a second insulating recess.
[4] The lead frame of claim 3, wherein the heat dissipation extension pad includes a first heat dissipation extension pad and a second heat dissipation extension pad that are formed around the chip bonding pad while not contacting the first and second leads, and are respectively distinguished from the chip bonding pad by a first distinguishing recess and a second distinguishing recess, and the pad connection portions comprise at least two portions respectively in the first distinguishing recess and the second distinguishing recess so that heat from the chip bonding pad can be transmitted to the first heat dissipation extension pad and the second heat dissipation extension pad through the pad connection portions.
[5] The lead frame of claim 1, wherein the at least one lead comprises: a plurality of first leads that are formed on a side of the chip bonding pad, are insulated from the chip bonding pad by a first insulating recess, and electrically insulated from each other; and a plurality of second leads that are formed on an opposite side of the first leads about the chip bonding pad, are insulated from the chip bonding pad by a second insulating recess, and are electrically insulated from each other.
[6] The lead frame of claim 5, wherein the heat dissipation extension pad includes a first heat dissipation extension pad and a second heat dissipation extension pad that are formed around the chip bonding pad while not contacting the first and second leads, and are respectively distinguished from the chip bonding pad by a first distinguishing recess and a second distinguishing recess, and the pad connection portions comprise at least two portions respectively in the first distinguishing recess and the second distinguishing recess so that heat from the chip bonding pad can be transmitted to the first heat dissipation extension pad and the second heat dissipation extension pad through the pad connection portions.
[7] The lead frame according to any one of claims 1 through 6, wherein the chip bonding pad, the leads, the heat dissipation extension pad, and the pad connection portions form a unit lead frame, a plurality of the unit lead frames form a strip when connected to each other at boundaries, and the unit lead frames can be separated into the individual unit lead frames by cutting along the boundaries.
[8] A semiconductor package comprising: a lead frame according to any one of claims 1 through 6; at least one semiconductor chip mounted on a surface of the chip bonding pad; bonding wires electrically connecting the semiconductor chip to the chip bonding pad and/or to the lead; and a package body formed of plastic in the insulating recess and the distinguishing recess, and on the entire semiconductor chip or around the semiconductor chip at the height same to or greater than the semiconductor chip, wherein the heat dissipation extension pad, a surface of the chip bonding pad that is opposite to the surface on which the semiconductor chip is mounted, and the lead are exposed to the outside, and heat is dissipated in various directions through the exposed portions.
[9] The semiconductor package of claim 8, wherein each of the insulating recess and the distinguishing recess has a stepped cross-section so that the width of portions of the insulating recess and the distinguishing recess at the surface of the chip bonding pad on which the semiconductor chip is mounted are smaller than the widths of portions of the insulating recess and the distinguishing recess at the opposite surface of the bonding pad, and the portions of the insulating recess and the distinguishing recess having greater widths are spatially connected to each other so that the plastic forming the package body can be inserted into the recesses.
[10] The semiconductor package of claim 9, further comprising: at least one dam member formed at each of the portions of the insulating recess and the distinguishing recess having large widths to guide the flow of the plastic when injecting the plastic to form the package body to a predetermined shape, and stably fix the package body after forming the package body.
[11] The semiconductor package of claim 8, wherein the package body is formed around the semiconductor chip to have at least a predetermined height, and includes a cavity, and the semiconductor chip is a light emitting diode (LED) that is mounted in the cavity and radiates light using an applied voltage.
[12] The semiconductor package of claim 8, wherein the chip bonding pad, the leads, the heat dissipation extension pad, and the pad connection portions form a unit lead frame, a plurality of the unit lead frames form a strip when connected to each other at boundaries, and the unit lead frames can be separated into the individual unit lead frames by cutting along the boundaries in a state where the semiconductor chip, the bonding wires, and the package body are formed on each of the unit lead frames.
[13] A method of manufacturing a semiconductor package comprising: preparing a main body of a lead frame; forming the lead frame according to any one of claims 1 through 6 by etching the lead frame main body to form an insulating recess and a distinguishing recess; mounting a semiconductor chip on the chip bonding pad; connecting the semiconductor chip to the chip bonding pad and/or to the lead using the bonding wire; and injecting a plastic resin into the insulating recess and the distinguishing recess to form a package in the insulating recess and the distinguishing recess, and on the entire semiconductor chip or around the semiconductor chip to the height of the semiconductor chip or greater.
[14] The method of claim 13, wherein the chip bonding pad, the leads, the heat dissipation extension pad, and the pad connection portions form a unit lead frame, a plurality of the unit lead frames form a strip when connected to each other at boundaries, and the mounting of the semiconductor chip, the wire bonding, and the forming of the package body are performed for each of the unit lead frames, and the method further comprises: cutting the boundaries between the unit lead frames using a sawing process to divide the strip into unit semiconductor packages.
[15] A method of manufacturing a semiconductor package comprising: preparing a main body of a lead frame; forming the lead frame according to any one of claims 1 through 6 by etching the lead frame main body to form an insulating recess and a distinguishing recess; injecting a plastic resin into the insulating recess and the distinguishing recess to form a package in the insulating recess and the distinguishing recess, and on the entire semiconductor chip or around the semiconductor chip to the height of the semiconductor chip or greater; mounting a semiconductor chip on the chip bonding pad; and connecting the semiconductor chip to the chip bonding pad and/or the lead using the bonding wire.
[16] The method of claim 15, wherein the semiconductor chip is an LED emitting light using an applied voltage, and the forming of the package body is performed to form a cavity in a portion where the LED is mounted.
[17] The method of claim 15, wherein the forming of the lead frame comprises: forming each of the insulating recess and the distinguishing recess to have a stepped cross-section so that the width of portions of the insulating recess and the distinguishing recess at the surface of the chip bonding pad on which the semiconductor chip is mounted are smaller than the widths of portions of the insulating recess and the distinguishing recess at the opposite surface of the chip bonding pad.
[18] The method of claim 17, further comprising: forming at least one dam member formed at each of the portions of the insulating recess and the distinguishing recess having large widths to guide the flow of the plastic when injecting the plastic to form the package body to a predetermined shape, and stably fix the package body after forming the package body.
[19] The method of claim 15, wherein the chip bonding pad, the leads, the heat dissipation extension pad, and the pad connection portions form a unit lead frame, a plurality of the unit lead frames form a strip when connected to each other at boundaries, the mounting of the semiconductor chip, the wire bonding, and the forming of the package body are performed for each of the unit lead frames, and the method further comprises: cutting the boundaries of the lead frame using a sawing process to divide the strip into unit semiconductor packages.
PCT/KR2005/004673 2004-12-30 2005-12-30 Lead frame, semiconductor package employing the lead frame and method for manufacturing the semiconductor package WO2006071098A1 (en)

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