WO2006043901A1 - Separation et retrait de ruban de groupements de boitiers a semiconducteur - Google Patents

Separation et retrait de ruban de groupements de boitiers a semiconducteur Download PDF

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Publication number
WO2006043901A1
WO2006043901A1 PCT/SG2004/000346 SG2004000346W WO2006043901A1 WO 2006043901 A1 WO2006043901 A1 WO 2006043901A1 SG 2004000346 W SG2004000346 W SG 2004000346W WO 2006043901 A1 WO2006043901 A1 WO 2006043901A1
Authority
WO
WIPO (PCT)
Prior art keywords
tape
semiconductor package
securing
station
thermal energy
Prior art date
Application number
PCT/SG2004/000346
Other languages
English (en)
Inventor
Tay Hock Lau
Fulin Liu
Hwee Seng Jimmy Chew
Original Assignee
Advanced Systems Automation Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Systems Automation Limited filed Critical Advanced Systems Automation Limited
Priority to CNA2004800445419A priority Critical patent/CN101084572A/zh
Priority to PCT/SG2004/000346 priority patent/WO2006043901A1/fr
Publication of WO2006043901A1 publication Critical patent/WO2006043901A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H01L2221/68331—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding of passive members, e.g. die mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides

Definitions

  • the invention relates generally to semiconductor package singulation systems.
  • the invention relates to systems for singulating and de-tapping arrays of semiconductor packages formed on a supporting substrate.
  • Integrated circuits (ICs) fabricated from semiconductor wafers are commonly packaged by a packaging process so that the ICs can be easily handled and are electrically connectable with an external circuitry, such as a printed circuit board (PCB).
  • An example of a packaging process is substrate based packaging, wherein an array of individual ICs is typically arranged and encapsulated in multiple rows and columns on a supporting substrate or leadframe.
  • Another example of a packaging process is chip scale packaging (CSP), wherein the packaging process is performed at wafer level.
  • CSP chip scale packaging
  • the packaging process is subsequently followed by a singulation or cutting process for obtaining individual semiconductor packages, such as ball grid array (BGA) packages and quad flat no-lead (QFN) packages.
  • a cutting blade is typically used for singulating or cutting the semiconductor packages.
  • the semiconductor packages are usually secured to a cutting table by a number of different ways for stabilizing the semiconductor packages and achieving accurate cuts thereon during the singulation process.
  • One conventional method of securing in position the semiconductor packages formed on a supporting substrate is to use a saw jig having a rubber vacuum pad on which the supporting substrate is mounted. Vacuum is applied through vacuum holes of the rubber vacuum pad for holding the supporting substrate or individual semiconductor packages during and after the singulation process, respectively.
  • this conventional method faces difficulties in securing semiconductor packages with miniaturised dimensions. This is because with a smaller semiconductor package, the shearing force between the cutting blade and each semiconductor package is now sufficiently large to cause the semiconductor packages to be displaced and shift out of position. This potentially affects the quality and yield of the singulation process.
  • the forgoing conventional method for singulating semiconductor packages has limitations for securing semiconductor packages with miniaturised dimensions during the singulation process.
  • Another conventional method for securing semiconductor packages formed on a supporting substrate or at wafer level utilises an ultraviolet (UV) adhesive tape that adheres to the packages prior to singulation.
  • a metal frame or wafer ring then engages the UV adhesive tape for mounting the supporting substrate or wafer during the singulation process to the cutting table.
  • UV ultraviolet
  • removal of the singulated semiconductor packages is difficult because the packages are still held by the UV adhesive tape even after the tape has been cured by exposure to UV light to reduce the adhesiveness thereof.
  • the semiconductor packages are susceptible to damages during the removal process as ejection pins are used for dislodging the packages from the UV adhesive tape. This potentially causes a lowering of product yield, although a reduction in the speed of ejecting the packages from the tape may alleviate the damages to the package.
  • UV adhesive tape is conventionally adhered automatically to the metal frame or wafer ring
  • the tape is removed from the metal frame or wafer ring manually after the semiconductor packages have been singulated.
  • all this is done at the expense of production throughput.
  • Embodiments of the invention disclosed herein provide improved performance relating to high production throughput. Additionally, the embodiments are suitable for singulating and de-tapping semiconductor packages with miniaturised dimensions.
  • an apparatus for singulating a semiconductor package formed on a substrate and separating the same and a tape removably adhered to the same comprises a transferring unit for securing and displacing the semiconductor package, and a station, whereon the semiconductor package and the tape are removably disposable, for securing the tape and providing thermal energy thereto for separating the semiconductor package and the tape removably adhered thereto, wherein the semiconductor package and the tape removably adhered thereto are separable by initially the station securing the tape and providing thermal energy to the tape for reducing adhesion whereby the tape is removably adhered to the semiconductor package and subsequently the station securing the tape and the transferring unit securing and displacing the semiconductor package from the tape.
  • a method for singulating a semiconductor package formed on a substrate and separating the same and a tape removably adhered to the same comprising the steps of securing the semiconductor package; providing thermal energy for reducing adhesion whereby the tape is removably adhered to the semiconductor package; securing the tape; and engaging the semiconductor package for displacing the semiconductor package from the tape, wherein the step of reducing adhesion whereby the tape is removably adhered to the semiconductor package is prior to the step of engaging the semiconductor package for displacing the semiconductor package from the tape.
  • Fig. 1 is a top view of a molded side of arrays of semiconductor packages formed on a supporting substrate;
  • Fig. 2 is a top view of an active side of arrays of semiconductor packages formed on a supporting substrate
  • Fig. 3 is a perspective view of the semiconductor packages and the supporting substrate, a tape and a saw jig;
  • Fig. 4 is a cross-sectional view of the semiconductor packages and the supporting substrate of Fig. 1 prior to singulating the semiconductor packages;
  • Fig. 5 is a cross-sectional view of the semiconductor packages and the supporting substrate of Fig. 1 after singulating the semiconductor packages;
  • Fig. 6 is a cross-sectional view of the semiconductor packages and the supporting substrate of Fig.1 during drying of the semiconductor packages;
  • Fig. 7 is a cross-sectional view of the semiconductor packages and the supporting substrate of Fig.1 during provision of thermal energy to the tape;
  • Fig. 8 is a cross-sectional view of the semiconductor packages and the supporting substrate after the semiconductor packages and tape are separated.
  • an apparatus and a method according to embodiments of the invention for singulating semiconductor packages formed on a substrate are disclosed for improving performance relating to production throughput.
  • the description of the invention is limited hereinafter to applications related to singulating and de-tapping semiconductor packages formed on a supporting substrate. This however does not preclude embodiments of the invention from other applications, such as wafer level packaging, that require similar operating performance as the applications for singulating and de-tapping the substrate formed semiconductor packages.
  • the functional and operational principles on which the embodiments of the invention are based remain the same throughout the various embodiments.
  • Arrays of semiconductor packages 102 are typically formed on a supporting substrate 104, such as a metal leadframe or ceramic substrate.
  • Each array of semiconductor packages 102 comprises multiple rows and columns of individual ICs that are encapsulated in a mold 106 on a molded side 108 of the semiconductor packaging panel 100.
  • the supporting substrate 104 typically supports more than three arrays of semiconductor packages 102.
  • the other side of the semiconductor packaging panel 100 is an active side 202 having scribe lines or streets 204 that define the boundary of each individual semiconductor package 102, as shown in Fig. 2. Examples of the individual packages are ball grid array (BGA) packages, micro leadframe packages (MLP) and quad flat no-lead (QFN) packages.
  • BGA ball grid array
  • MLP micro leadframe packages
  • QFN quad flat no-lead
  • Fig. 3 shows a perspective view of the semiconductor packaging panel 100 having an array of semiconductor packages 102 formed on the supporting substrate 104, a tape 302 and a saw jig 304.
  • the saw jig 304 comprises a substantially rectangular metal frame 306 having a panel of vacuum pads 308 centrally located on the metal frame 306.
  • Each vacuum pad 308 is substantially planar and has a plurality of openings therein that are closely spaced apart.
  • the vacuum pads 308 are preferably made of rubber.
  • the tape 302 preferably a thermal adhesive tape or the like thermal de-activatable tape, is adhered to the molded side 108 of the semiconductor packaging panel 100 and in particular the molds 106 that encapsulate the individual ICs.
  • the tape 302 is structurally made of thermo-expandable microcapsules that allow the tape 302 to be firmly adhered to the molds 106 during singulation of the array of semiconductor packages 102.
  • the level of adhesion between the tape 302 and the molded side 108 of the supporting substrate 104 is reducible by applying a predetermined amount of thermal energy to the tape 302.
  • the application of the predetermined amount of thermal energy increases the temperature of the tape 302 and causes the thermo-expandable microcapsules to foam, resulting in the formation of minute undulations on the surface of the tape 302.
  • the tape 302 advantageously avoids the need for any tensioning during adhesion thereof to the semiconductor packaging panel 100. This is because the tape 302 does not expand during the singulation of the array of semiconductor packages 102, thus ensuring that the semiconductor packages 102 are not displaced during the singulation process.
  • Fig. 4 shows a cross-sectional view of the semiconductor packaging panel 100 prior to singulation of the semiconductor packages 102 on a cutting station 400.
  • the tape 302 and the semiconductor packaging panel 100 are disposed on the saw jig 304 such that the tape 302 is in contact with the panel of vacuum pads 308.
  • the vacuum pads 308 are disposed on an upper side 402 of the metal frame 306 of the saw jig 304.
  • the saw jig 304 has a plurality of through-holes 404 located adjacent to the openings 405 of each of the vacuum pad 308 for creating a passageway 406.
  • the passageway 406 is connected to a saw jig recess 408 on a lower side 410 of the saw jig 304.
  • the saw jig 304 is mounted on a vacuum plate 412 having a vacuum plate recess 414 thereon that matches and reciprocates the saw jig recess 408 on the lower side 410 of the saw jig 304 such that a sealed cavity 416 is formed by the reciprocating recesses 408 and 414.
  • An inlet portion 418 of the vacuum plate recess 414 is connected to a vacuum system (not shown) for applying, suction on the tape 302 such that the vacuum system is in fluid communication with the passageway 406.
  • the suction provided by the vacuum system secures the tape 302 and the supporting substrate 104 to the saw jig 304 during the singulation of the array of semiconductor packages 102.
  • FIG. 5 a cross-sectional view of the semiconductor packaging panel 100 after a process singulating the array of semiconductor packages 102 is shown.
  • the vacuum system provides the necessary suction on the tape 302 for preventing unnecessary movements of the array of semiconductor packages 102 during the singulation thereof.
  • a blade 502 is used for cutting the array of semiconductor packages
  • the cutting is repeated on all the streets 204 on the active side 202 of the supporting substrate 104 until the arrays of semiconductor packages 102 are singulated into individual semiconductor packages 504.
  • the adhesion between the tape 302 and the molded side 108 of the semiconductor packaging panel 100 in conjunction with the suction provided by the vacuum system overcomes the shearing force attributed by the cutting of the array of semiconductor packages 102 by the blade 502.
  • the singulated semiconductor packages 504 and the tape 302 are displaced by a transferring unit (not shown) and disposed on a drying station 600, as shown in Fig 6.
  • the drying station 600 has a vacuum plate 602 and vacuum system substantially similar to the cutting station 400 for securing the tape 302 and the singulated semiconductor packages 504 thereon.
  • a drying unit 604 having a plurality of air nozzles 606 is then used for providing drying air 608 for drying the singulated semiconductor packages 504.
  • the drying air 608 is blown through the air nozzles 606 directed at each of the singulated semiconductor package 504.
  • the transferring unit 702 engages the singulated semiconductor packages 504 and transfers the packages 504 and the tape 302 onto a de-taping station 700 for de-tapping the packages
  • the transferring unit 702 has a vacuum head 704 that preferably uses vacuum for engaging the singulated semiconductor packages 504.
  • the de-taping station 700 has a vacuum plate 706 and vacuum system substantially similar to the cutting and drying stations 400 and 600 for securing the tape 302 thereon during the de-tapping of the singulated semiconductor packages 504.
  • a heating plate 708 is disposed on the vacuum plate 706 of the de-taping station 700 and is in fluid communication (not shown) with the vacuum system.
  • the heating plate 708 is also connected to a control unit 710 for providing thermal energy to the tape 302.
  • the transferring unit 702 then places the singulated semiconductor packages 504 and tape 302 onto the heating plate 708 and remains in that position throughout the provision of thermal energy to the tape 302 for securing the singulated semiconductor packages 504 as the tape 302 expands.
  • the control unit 710 is subsequently activated for providing the required predetermined thermal energy necessary for the complete removal of the adhesion between the tape 302 and the singulated semiconductor packages 504.
  • the transferring unit 702 then lifts the singulated semiconductor packages 504 from the tape 302 and transfers the packages 504 away from the de-taping station 700 for subsequent processing, as shown in Fig. 8.
  • the transferring unit 702 then removes the tape 302 from the de-taping station 700. Vacuum is applied to the tape 302 by the vacuum system for securing the tape 302 to the heating plate 708 prior to lifting the singulated semiconductor packages 504 from the tape 302 and transferring the packages 504 away from the de-taping station 700.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

L’invention concerne un appareil et un procédé de séparation d’au moins un boîtier à semiconducteur (504) formé sur un substrat et d’un ruban (302) collé de façon amovible sur le boîtier à semiconducteur (504). L’appareil comprend un module de transfert (702) pour accrocher et déplacer le boîtier à semiconducteur (504) et un poste (700) pour y disposer le boîtier à semiconducteur (504) et le ruban (302) et pour fixer le ruban (302). Pour séparer le boîtier à semiconducteur (504) et le ruban (302), le poste (700) fixe tout d’abord le ruban (302) par apport d’énergie thermique au ruban (302) dans le but d’en réduire l’adhérence et de le coller de façon amovible sur le boîtier à semiconducteur (504), puis le poste (700) fixe le ruban (302) et le module de transfert (702) accroche et déplace le boîtier semiconducteur (504) par rapport au ruban (302).
PCT/SG2004/000346 2004-10-21 2004-10-21 Separation et retrait de ruban de groupements de boitiers a semiconducteur WO2006043901A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CNA2004800445419A CN101084572A (zh) 2004-10-21 2004-10-21 切割和除粘一阵列芯片封装组件
PCT/SG2004/000346 WO2006043901A1 (fr) 2004-10-21 2004-10-21 Separation et retrait de ruban de groupements de boitiers a semiconducteur

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/SG2004/000346 WO2006043901A1 (fr) 2004-10-21 2004-10-21 Separation et retrait de ruban de groupements de boitiers a semiconducteur

Publications (1)

Publication Number Publication Date
WO2006043901A1 true WO2006043901A1 (fr) 2006-04-27

Family

ID=36203230

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/SG2004/000346 WO2006043901A1 (fr) 2004-10-21 2004-10-21 Separation et retrait de ruban de groupements de boitiers a semiconducteur

Country Status (2)

Country Link
CN (1) CN101084572A (fr)
WO (1) WO2006043901A1 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8644206B2 (en) 2007-08-17 2014-02-04 Qualcomm Incorporated Ad hoc service provider configuration for broadcasting service information
US9179367B2 (en) 2009-05-26 2015-11-03 Qualcomm Incorporated Maximizing service provider utility in a heterogeneous wireless ad-hoc network
US9392445B2 (en) 2007-08-17 2016-07-12 Qualcomm Incorporated Handoff at an ad-hoc mobile service provider

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112309916B (zh) * 2020-10-28 2024-01-26 北京半导体专用设备研究所（中国电子科技集团公司第四十五研究所） 芯片拼接基版调平方法
CN112850150B (zh) * 2021-02-26 2022-09-09 河南农业职业学院 一种多工位电子零件加工用拾取装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2219135A (en) * 1988-05-23 1989-11-29 Semiconductor Equipment Corp Method and apparatus for removing circuit chips from wafer handling tape
JPH08316177A (ja) * 1995-05-17 1996-11-29 Nitto Denko Corp 半導体チップの製造方法
JPH1167699A (ja) * 1997-08-13 1999-03-09 Texas Instr Japan Ltd 半導体装置の製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2219135A (en) * 1988-05-23 1989-11-29 Semiconductor Equipment Corp Method and apparatus for removing circuit chips from wafer handling tape
JPH08316177A (ja) * 1995-05-17 1996-11-29 Nitto Denko Corp 半導体チップの製造方法
JPH1167699A (ja) * 1997-08-13 1999-03-09 Texas Instr Japan Ltd 半導体装置の製造方法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8644206B2 (en) 2007-08-17 2014-02-04 Qualcomm Incorporated Ad hoc service provider configuration for broadcasting service information
US9167426B2 (en) 2007-08-17 2015-10-20 Qualcomm Incorporated Ad hoc service provider's ability to provide service for a wireless network
US9392445B2 (en) 2007-08-17 2016-07-12 Qualcomm Incorporated Handoff at an ad-hoc mobile service provider
US9398453B2 (en) 2007-08-17 2016-07-19 Qualcomm Incorporated Ad hoc service provider's ability to provide service for a wireless network
US9179367B2 (en) 2009-05-26 2015-11-03 Qualcomm Incorporated Maximizing service provider utility in a heterogeneous wireless ad-hoc network

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