WO2006033506A1 - Ccd solid-state image pickup device - Google Patents

Ccd solid-state image pickup device Download PDF

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Publication number
WO2006033506A1
WO2006033506A1 PCT/KR2005/000226 KR2005000226W WO2006033506A1 WO 2006033506 A1 WO2006033506 A1 WO 2006033506A1 KR 2005000226 W KR2005000226 W KR 2005000226W WO 2006033506 A1 WO2006033506 A1 WO 2006033506A1
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WO
WIPO (PCT)
Prior art keywords
region
well
vccd
hccd
image pickup
Prior art date
Application number
PCT/KR2005/000226
Other languages
French (fr)
Inventor
Kyoung-Kuk Kwon
Original Assignee
International Display Solutions Co., Ltd.
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Publication of WO2006033506A1 publication Critical patent/WO2006033506A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/148—Charge coupled imagers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/148—Charge coupled imagers
    • H01L27/14806—Structural or functional details thereof
    • H01L27/14812—Special geometry or disposition of pixel-elements, address lines or gate-electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/148—Charge coupled imagers
    • H01L27/14831—Area CCD imagers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors

Definitions

  • the present invention relates to a Charge-Coupled Device (CCD) solid-state image pickup device consisting of a Photo Diode (PD) region, a Vertical Charge-Coupled Device (VCCD) region, and a Horizontal Charge-Coupled Device (HCCD) region, and, more particularly, to a CCD solid-state image pickup device, designed to improve a saturation voltage of the VCCD region and enhance a Charge Transfer Efficiency (CTE) characteristic of the HCCD region by an ion implantation with optimal amounts of energy and doses in a high-pixel honeycomb structure.
  • CCD Charge-Coupled Device
  • PD Photo Diode
  • VCCD Vertical Charge-Coupled Device
  • HCCD Horizontal Charge-Coupled Device
  • Fig. 1 is a plan view illustrating a CCD solid-state image pickup device having a conventional honeycomb structure.
  • the CCD solid-state image pickup device comprises a photo ⁇ sensitive part 10 established on a surface of a semiconductor substrate 1, an interface part 60 formed on the outside of the photosensitive part 10, an output transmission path 70 formed on the outside of the interface part 60, and an output part 80 jointed to one end of the output transmission path 70.
  • the photosensitive part 10 formed on the semiconductor substrate 1 consists of eight rows of photoelectric transducers 20, eight columns of photoelectric transducers 21, four vertical transmission CCDs 30, and thirty-two read-out gate regions 40.
  • Each of the rows of photoelectric transducers 20 consists of four photoelectric transducers 22 formed in an N-type region within a P-type well, and each of the columns of photoelectric transducers 20 also consists of the four photoelectric transducers 22.
  • Each of the vertical transmission CCDs 30 comprises one charge transmission channel (not shown) formed in the N-type region within the P-type well formed on the surface of the semiconductor substrate 1, five primary transmission electrodes 32 traversing the charge-transmission channel on the plan view, and formed on an electric insulation film on the semiconductor substrate 1, and four secondary transmission electrodes 33 traversing the charge-transmission channel on the plan view, and formed on another electric insulation film on the semiconductor substrate 1.
  • the primary transmission electrodes 32 are formed on a first poly-silicon layer
  • the secondary transmission electrodes 33 are formed on a second poly-silicon layer.
  • the primary transmission electrodes 32 and the secondary transmission electrodes 33 are alternately formed along the charge-transmission channel.
  • the read-out gate regions 40 are shown as shadow regions of Fig. 1, and are formed in a serpentine shape.
  • the interface part 60 has twelve charge-transmission stages, each of which is connected to an associated one end of the charge-transmission channels constituting the vertical transmission CCDs 30.
  • Each of the charge-transmission stages comprises a charge transmission channel (not shown) for the interface part, which is connected to one associated end of the charge-transmission channels, and one of three transmission electrodes 61, 62 and 63 traversing the charge transmission channel for the interface part on the plan view and formed on the semiconductor substrate 1.
  • a size of unit pixel is reduced. Reduction in size of the unit pixel necessarily causes reduction in areas of the photodiode and the vertical transmission path. As such, as the areas of the photodiode and the vertical transmission path are reduced, a narrow width effects are increased, thereby lowering a sensitivity characteristic and a saturation voltage of the VCCD region.
  • the present invention has been made in view of the above problems, and it is an object of the present invention to provide a CCD solid-state image pickup device, designed to improve a saturation voltage of a VCCD and enhance a CTE characteristic of an HCCD by an ion implantation with optimal energy and doses.
  • a CCD solid-state image pickup device consisting of a photodiode region, a VCCD region, and an HCCD region
  • the photodiode region is formed with a first p-well on an N-type semiconductor substrate, an N-type impurity layer on the first p-well to accumulate electrons in the photodiode region, and a P-type impurity layer on the N-type impurity layer to prevent the electrons generated on the surface of the photodiode region from being induced into the photodiode region
  • the VCCD region is formed with the first p-well on the N-type semiconductor substrate, a second P-well on the first P-well, and a BCCD on the second P-well to accumulate the electrons therein depending on a voltage of a gate electrode
  • the HCCD region is formed with a well comprising the first p- well and
  • the first P- well in the photodiode region may be formed by one or more ion im ⁇ plantations, and the ion implantations may be performed with a maximum energy of 1.5 ⁇ 3 MeV, and a dose of IEl 1 ⁇ 1E12.
  • the BCCDs in the VCCD region and the HCCD region may be formed by a primary ion implantation of P, As or a combination of P and As onto the VCCD region and the HCCD region at the same time, a secondary ion implantation of As only onto the VCCD region, and a final ion implantation of P only onto the HCCD region, se ⁇ quentially performed in this order.
  • the primary ion implantation may be performed with an energy of 50 ⁇ 150 KeV and a dose of 5El 1 ⁇ 5El 2 onto the VCCD region and the HCCD region at the same time.
  • the secondary and final ion implantations may be performed with an energy of 50 - 150 KeV and a dose of IE 12 ⁇ IEl 3 onto the VCCD region and onto the HCCD region, respectively.
  • FIG. 1 is a plain view of a CCD solid-state image pickup device having a con ⁇ ventional honeycomb structure
  • FIG. 2 is a cross sectional view of a CCD solid-state image pickup device according to the present invention.
  • FIGs. 3a and 3b are cross sectional views of a VCCD region and an HCCD region of the CCD solid-state image pickup device according to the present invention, re ⁇ spectively.
  • the CCD solid-sate image pickup device comprises a P-type well formed on an N-type substrate, an N-type photodiode and an N-type VCCD formed and spaced apart by a predetermined distance from each other on the P-type well, and a transfer poly-gate at an upper portion between the N-type photodiode and the N-type VCCD to connect the N-type photodiode and the N-type VCCD with each other.
  • FIG. 2 is a cross sectional view of a CCD solid-state image pickup device according to the present invention.
  • the CCD solid-state image pickup device 200 has a photodiode (PD) region, which comprises a first P- well 220 formed on an N-type substrate 210, an N-type impurity layer (PDN) 230 formed above the first P- well 220, and a P-type impurity layer 240 on a surface of the N-type impurity layer 230.
  • PD photodiode
  • the P-type impurity layer 240 is formed of intensive P+ ions in order to prevent electrons generated on the surface of the photodiode region from being induced into the photodiode region. Further, the N-type impurity layer 230 formed under the P-type impurity layer 240 is subjected to an ion implantation as an N-type layer in order to accumulate the electrons.
  • the P-well 220 is formed under the N-type impurity layer 230 to control a blooming condition and a shutter, and, since the increase of the depth of the first P- well 220 allows for an increase of an area to accumulate light, the sensitivity can be enhanced.
  • Electrons may be accumulated in the photodiode region by means of a potential barrier formed in the first P-well 220, and excessive electrons may be suppressed by controlling a dose such that the excessive electrons can be emitted to the N-type semi ⁇ conductor substrate 210.
  • the depth of the first P-well 220 As the depth of the first P-well 220 is increased, the area of the photodiode region is increased in a depth direction, thereby providing an effect of accumulating a relatively large amount of electrons, and enhancing the sensitivity. However, if the depth of the first P-well 220 is excessively increased, electrons can be generated by means of red light as well as infrared light, thereby making a negative influence on color re ⁇ production. Accordingly, the first P-well must be subjected to the ion implantation with optimal amounts of energy and doses.
  • the first P-well may be formed by only one ion implantation, it may also be formed by several ion implantations as long as the implementation of the first P- well is satisfied.
  • the ion implantation may be performed with a maximum energy of 1.5 ⁇ 3 MeV, and a dose of IEl 1 ⁇ 1E12.
  • Figs. 3a and 3b are cross sectional views of the CCD solid-state image pickup device according to the present invention, and show the VCCD region and the HCCD region, respectively.
  • Fig. 3a shows the VCCD region 300, which has a first P- well 320 formed on an N- type semiconductor substrate 310, and a second P- well 330 formed on the first P- well 320. Additionally, a BCCD 340 is formed as an N-type impurity layer on the second P- well 330. The BCCD 340 accumulates electrons depending on a voltage applied to the transfer poly-gates 280 shown in Fig. 2.
  • Fig. 3b shows the HCCD region 400, which has a well 420 comprising the first P-well and a third P-well formed on an N-type semiconductor substrate 410, and an BCCD 430 formed as an N-type impurity layer on the well 420. Additionally, P-type impurity layer barriers are formed on some part of the BCCD 430 (under a poly2 280 gate electrode). The reason of forming the P-type impurity layer barriers on some part of the BCCD 430 is attributed to the fact that the HCCD is operated at high frequencies.
  • the HCCD region constructed as described above generally has a width of 40
  • the HCCD region does not suffer from the saturation voltage, which occurs in the VCCD region. Accordingly, a Horizontal Charge Transfer Efficiency (HCTE) characteristic, which allows for operations with high operating frequencies, is important rather than the saturation voltage in the HCCD region.
  • HCTE Horizontal Charge Transfer Efficiency
  • the ion implantation must be performed with optimal amount of energy and doses when forming the BCCD.
  • the ion implantation is performed onto the VCCD region and the HCCD region at the same time.
  • As, P or a combination of As and P may be used for the ion implantation.
  • an energy of 50 ⁇ 150 KeV and a dose of 5El 1 ⁇ 5El 2 are preferred.
  • the ion implantation is performed only onto the VCCD region.
  • the VCCD region is thinly implanted with As ions.
  • the ion implantation is preferably performed with an energy of 50 ⁇ 150 KeV and a dose of 1E12 ⁇ 1E13.
  • the HCCD region is deeply implanted with P ions.
  • the ion implantation is preferably performed with an energy of 50 ⁇ 150 KeV and a dose of 1E12 ⁇ 1E13.
  • the first P- well formed in the photodiode region is subjected to the ion implantation with appropriate energy and dose, and thus allows a large quantity of electrons to be accumulated therein, thereby enhancing the sensitivity.
  • the ion implantation is performed on the VCCD region and the HCCD region with the optimal energy and dose, thereby solving the problem of reduction in saturation voltage in the VCCD region, enhancing the CTE characteristic in the HCCD region.

Abstract

A CCD solid-state image pickup device consisting of a Photodiode region, a VCCD region, and an HCCD region is disclosed. The photodiode region is formed with a first p-well on an N-type semiconductor substrate, an N-type impurity layer on the first p-well to accumulate electrons in the the photodiode region, and a P-type impurity layer on the N-type impurity layer to prevent the electrons generated on the surface of the photodiode region from being induced into the photodiode region. The VCCD region is formed with the first p-well on the N-type semiconductor substrate, a second P-well on the first P-well, and a BCCD on the second P-well to accumulate the electrons therein depending on a voltage of a gate electrode. The HCCD region is formed with a well comprising the first p-well and a third P-well on the N-type semiconductor substrate, a BCCD region on the second P-well, and at least one P-type impurity layer barrier on a part of the surface of the BCCD. The CCD solid-state image pickup device solves a problem of a saturation voltage in the VCCD region, and enhances a CTE characteristic of the HCCD region by an ion implantation with optimal amounts of energy and doses in a high-pixel honeycomb structure.

Description

Description
CCD SOLID-STATE IMAGE PICKUP DEVICE
Technical Field
[1] The present invention relates to a Charge-Coupled Device (CCD) solid-state image pickup device consisting of a Photo Diode (PD) region, a Vertical Charge-Coupled Device (VCCD) region, and a Horizontal Charge-Coupled Device (HCCD) region, and, more particularly, to a CCD solid-state image pickup device, designed to improve a saturation voltage of the VCCD region and enhance a Charge Transfer Efficiency (CTE) characteristic of the HCCD region by an ion implantation with optimal amounts of energy and doses in a high-pixel honeycomb structure.
[2]
Background Art
[3] Fig. 1 is a plan view illustrating a CCD solid-state image pickup device having a conventional honeycomb structure.
[4] Referring to Fig. 1, the CCD solid-state image pickup device comprises a photo¬ sensitive part 10 established on a surface of a semiconductor substrate 1, an interface part 60 formed on the outside of the photosensitive part 10, an output transmission path 70 formed on the outside of the interface part 60, and an output part 80 jointed to one end of the output transmission path 70.
[5] The photosensitive part 10 formed on the semiconductor substrate 1 consists of eight rows of photoelectric transducers 20, eight columns of photoelectric transducers 21, four vertical transmission CCDs 30, and thirty-two read-out gate regions 40.
[6] Each of the rows of photoelectric transducers 20 consists of four photoelectric transducers 22 formed in an N-type region within a P-type well, and each of the columns of photoelectric transducers 20 also consists of the four photoelectric transducers 22.
[7] Each of the vertical transmission CCDs 30 comprises one charge transmission channel (not shown) formed in the N-type region within the P-type well formed on the surface of the semiconductor substrate 1, five primary transmission electrodes 32 traversing the charge-transmission channel on the plan view, and formed on an electric insulation film on the semiconductor substrate 1, and four secondary transmission electrodes 33 traversing the charge-transmission channel on the plan view, and formed on another electric insulation film on the semiconductor substrate 1. For instance, the primary transmission electrodes 32 are formed on a first poly-silicon layer, and the secondary transmission electrodes 33 are formed on a second poly-silicon layer. The primary transmission electrodes 32 and the secondary transmission electrodes 33 are alternately formed along the charge-transmission channel.
[8] The read-out gate regions 40 are shown as shadow regions of Fig. 1, and are formed in a serpentine shape.
[9] The interface part 60 has twelve charge-transmission stages, each of which is connected to an associated one end of the charge-transmission channels constituting the vertical transmission CCDs 30. Each of the charge-transmission stages comprises a charge transmission channel (not shown) for the interface part, which is connected to one associated end of the charge-transmission channels, and one of three transmission electrodes 61, 62 and 63 traversing the charge transmission channel for the interface part on the plan view and formed on the semiconductor substrate 1.
[10] If the number of pixels is increased in the CCD solid-state pickup device constructed as described above, a size of unit pixel is reduced. Reduction in size of the unit pixel necessarily causes reduction in areas of the photodiode and the vertical transmission path. As such, as the areas of the photodiode and the vertical transmission path are reduced, a narrow width effects are increased, thereby lowering a sensitivity characteristic and a saturation voltage of the VCCD region.
[H]
Disclosure of Invention Technical Problem
[12] The present invention has been made in view of the above problems, and it is an object of the present invention to provide a CCD solid-state image pickup device, designed to improve a saturation voltage of a VCCD and enhance a CTE characteristic of an HCCD by an ion implantation with optimal energy and doses.
Technical Solution
[13] In accordance with an aspect of the present invention, the above and other objects can be accomplished by the provision of a CCD solid-state image pickup device consisting of a photodiode region, a VCCD region, and an HCCD region, wherein the photodiode region is formed with a first p-well on an N-type semiconductor substrate, an N-type impurity layer on the first p-well to accumulate electrons in the photodiode region, and a P-type impurity layer on the N-type impurity layer to prevent the electrons generated on the surface of the photodiode region from being induced into the photodiode region, wherein the VCCD region is formed with the first p-well on the N-type semiconductor substrate, a second P-well on the first P-well, and a BCCD on the second P-well to accumulate the electrons therein depending on a voltage of a gate electrode, and wherein the HCCD region is formed with a well comprising the first p- well and a third P-well on the N-type semiconductor substrate, the BCCD on the second P-well, and a P-type impurity layer barrier on a part of the surface of the BCCD (under a poly2 gate electrode).
[14] The first P- well in the photodiode region may be formed by one or more ion im¬ plantations, and the ion implantations may be performed with a maximum energy of 1.5 ~ 3 MeV, and a dose of IEl 1 ~ 1E12.
[15] The BCCDs in the VCCD region and the HCCD region may be formed by a primary ion implantation of P, As or a combination of P and As onto the VCCD region and the HCCD region at the same time, a secondary ion implantation of As only onto the VCCD region, and a final ion implantation of P only onto the HCCD region, se¬ quentially performed in this order.
[16] The primary ion implantation may be performed with an energy of 50 ~ 150 KeV and a dose of 5El 1 ~ 5El 2 onto the VCCD region and the HCCD region at the same time. The secondary and final ion implantations may be performed with an energy of 50 - 150 KeV and a dose of IE 12 ~ IEl 3 onto the VCCD region and onto the HCCD region, respectively.
[17]
Brief Description of the Drawings
[18] The foregoing and other objects and features of the present invention will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:
[19] Fig. 1 is a plain view of a CCD solid-state image pickup device having a con¬ ventional honeycomb structure;
[20] Fig. 2 is a cross sectional view of a CCD solid-state image pickup device according to the present invention; and
[21] Figs. 3a and 3b are cross sectional views of a VCCD region and an HCCD region of the CCD solid-state image pickup device according to the present invention, re¬ spectively.
[22]
Mode for the Invention
[23] Preferred embodiments and operations of a CCD solid-sate image pickup device according to the present invention will now be described in detail with reference to the drawings.
[24] Generally, the CCD solid-sate image pickup device comprises a P-type well formed on an N-type substrate, an N-type photodiode and an N-type VCCD formed and spaced apart by a predetermined distance from each other on the P-type well, and a transfer poly-gate at an upper portion between the N-type photodiode and the N-type VCCD to connect the N-type photodiode and the N-type VCCD with each other.
[25] In such construction, when signal charges are generated under the N-type photodiode with light entering the CCD solid-sate image pickup device, these are transferred into an N-type Buried CCD (BCCD) by means of a high-level signal applied to the transfer poly-gate, and are then accumulated under the transfer poly- gate. Thereafter, these signal charges are transferred into an HCCD through clocking, and at a final output stage, the charges transferred into the HCCD are read out to signals.
[26] Fig. 2 is a cross sectional view of a CCD solid-state image pickup device according to the present invention.
[27] Referring to Fig. 2, the CCD solid-state image pickup device 200 according to the present invention has a photodiode (PD) region, which comprises a first P- well 220 formed on an N-type substrate 210, an N-type impurity layer (PDN) 230 formed above the first P- well 220, and a P-type impurity layer 240 on a surface of the N-type impurity layer 230.
[28] The P-type impurity layer 240 is formed of intensive P+ ions in order to prevent electrons generated on the surface of the photodiode region from being induced into the photodiode region. Further, the N-type impurity layer 230 formed under the P-type impurity layer 240 is subjected to an ion implantation as an N-type layer in order to accumulate the electrons.
[29] Meanwhile, the P-well 220 is formed under the N-type impurity layer 230 to control a blooming condition and a shutter, and, since the increase of the depth of the first P- well 220 allows for an increase of an area to accumulate light, the sensitivity can be enhanced.
[30] Electrons may be accumulated in the photodiode region by means of a potential barrier formed in the first P-well 220, and excessive electrons may be suppressed by controlling a dose such that the excessive electrons can be emitted to the N-type semi¬ conductor substrate 210.
[31] As the depth of the first P-well 220 is increased, the area of the photodiode region is increased in a depth direction, thereby providing an effect of accumulating a relatively large amount of electrons, and enhancing the sensitivity. However, if the depth of the first P-well 220 is excessively increased, electrons can be generated by means of red light as well as infrared light, thereby making a negative influence on color re¬ production. Accordingly, the first P-well must be subjected to the ion implantation with optimal amounts of energy and doses.
[32] Although the first P-well may be formed by only one ion implantation, it may also be formed by several ion implantations as long as the implementation of the first P- well is satisfied. In the case where the first P-well 220 is formed by only one ion im¬ plantation, the ion implantation may be performed with a maximum energy of 1.5 ~ 3 MeV, and a dose of IEl 1 ~ 1E12. [33] Figs. 3a and 3b are cross sectional views of the CCD solid-state image pickup device according to the present invention, and show the VCCD region and the HCCD region, respectively.
[34] Fig. 3a shows the VCCD region 300, which has a first P- well 320 formed on an N- type semiconductor substrate 310, and a second P- well 330 formed on the first P- well 320. Additionally, a BCCD 340 is formed as an N-type impurity layer on the second P- well 330. The BCCD 340 accumulates electrons depending on a voltage applied to the transfer poly-gates 280 shown in Fig. 2.
[35] In the VCCD region constructed as described above, as the number of pixels is increased, a size of the pixel is decreased, thereby reducing the width of the VCCD region (to 0.5 D or less). That is to say, due to a narrow width effect in the VCCD region caused by a reduction in the width of the VCCD region, there is a problem of reducing the saturation voltage of the VCCD region.
[36] Meanwhile, Fig. 3b shows the HCCD region 400, which has a well 420 comprising the first P-well and a third P-well formed on an N-type semiconductor substrate 410, and an BCCD 430 formed as an N-type impurity layer on the well 420. Additionally, P-type impurity layer barriers are formed on some part of the BCCD 430 (under a poly2 280 gate electrode). The reason of forming the P-type impurity layer barriers on some part of the BCCD 430 is attributed to the fact that the HCCD is operated at high frequencies.
[37] Since the HCCD region constructed as described above generally has a width of 40
D or more, the HCCD region does not suffer from the saturation voltage, which occurs in the VCCD region. Accordingly, a Horizontal Charge Transfer Efficiency (HCTE) characteristic, which allows for operations with high operating frequencies, is important rather than the saturation voltage in the HCCD region.
[38] In order to solve the saturation voltage in the VCCD region and to enhance the
HCTE characteristic corresponding to the high operating frequency in the HCCD region, the ion implantation must be performed with optimal amount of energy and doses when forming the BCCD.
[39] First, the ion implantation is performed onto the VCCD region and the HCCD region at the same time. At this time, As, P or a combination of As and P may be used for the ion implantation. Upon the ion implantation onto the VCCD region and the HCCD region at the same time, an energy of 50 ~ 150 KeV and a dose of 5El 1 ~ 5El 2 are preferred.
[40] After the ion implantation onto the VCCD region and the HCCD region at the same time, the ion implantation is performed only onto the VCCD region. At this time, in order to solve the problem of the saturation voltage, the VCCD region is thinly implanted with As ions. In this case, the ion implantation is preferably performed with an energy of 50 ~ 150 KeV and a dose of 1E12 ~ 1E13.
[41] Finally, after the ion implantation only onto the VCCD region as described above, only the HCCD region is subjected to the ion implantation. At this time, in order to enhance the CTE characteristic of the HCCD region, the HCCD region is deeply implanted with P ions. In this case, the ion implantation is preferably performed with an energy of 50 ~ 150 KeV and a dose of 1E12 ~ 1E13.
[42] As apparent from the above description, according to the CCD solid-state image pickup device, the first P- well formed in the photodiode region is subjected to the ion implantation with appropriate energy and dose, and thus allows a large quantity of electrons to be accumulated therein, thereby enhancing the sensitivity.
[43] Furthermore, in the case where the BCCD regions are formed on the VCCD region and the HCCD region, the ion implantation is performed on the VCCD region and the HCCD region with the optimal energy and dose, thereby solving the problem of reduction in saturation voltage in the VCCD region, enhancing the CTE characteristic in the HCCD region.
[44] It should be understood that the embodiments and the accompanying drawings as described above have been described for illustrative purposes and the present invention is limited only by the following claims. Further, those skilled in the art will appreciate that various modifications, additions and substitutions are allowed without departing from the scope and spirit of the invention as set forth in the accompanying claims.
[45]

Claims

Claims
[1] A Charge Coupled Device (CCD) solid-state image pickup device, consisting of a photodiode region, a Vertical Charge Coupled Device (VCCD) region, and a Horizontal Charge Coupled Device (HCCD) region; wherein the photodiode region is formed with a first p-well on an N-type semi¬ conductor substrate, an N-type impurity layer on the first p-well to accumulate electrons in the the photodiode region, and a P-type impurity layer on the N-type impurity layer to prevent the electrons generated on the surface of the photodiode region from being induced into the photodiode region; wherein the VCCD region is formed with the first p-well on the N-type semi¬ conductor substrate, a second P-well on the first P-well, and a BCCD on the second P-well to accumulate the electrons therein depending on a voltage of a gate electrode; and wherein the HCCD region is formed with a well comprising the first p-well and a third P-well and formed on the N-type semiconductor substrate, the BCCD on the well, and at least one P-type impurity layer barrier on a part of a surface of the BCCD.
[2] The CCD solid-state image pickup device as set forth in claim 1, wherein the first P-well in the photodiode region is formed by one or more ion implantations, and the ion implantations are performed with a maximum energy of 1.5 ~ 3 MeV, and a dose of IEl 1 ~ 1E12.
[3] The CCD solid-state image pickup device as set forth in claim 1, wherein the
BCCD in the VCCD region and the HCCD region is formed by a primary ion im¬ plantation of P, As or a combination of P and As onto the VCCD region and the HCCD region at the same time, a secondary ion implantation of AS only onto the VCCD region, and a final ion implantation of P only onto the HCCD region.
[4] The CCD solid-state image pickup device as set forth in claim 3, wherein the primary ion implantation is performed with an energy of 50 ~ 150 KeV and a dose of 5El 1 ~ 5El 2 onto the VCCD region and the HCCD region at the same time, and the secondary and final ion implantations are performed with an energy of 50 - 150 KeV and a dose of IE 12 ~ IEl 3 onto the VCCD region and onto the HCCD region, respectively.
PCT/KR2005/000226 2004-09-22 2005-01-27 Ccd solid-state image pickup device WO2006033506A1 (en)

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KR10-2004-0076036 2004-09-22
KR1020040076036A KR100624341B1 (en) 2004-09-22 2004-09-22 solid state image pickup device

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