WO2005119907A2 - General-purpose wideband amplifier - Google Patents
General-purpose wideband amplifier Download PDFInfo
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- WO2005119907A2 WO2005119907A2 PCT/US2005/019682 US2005019682W WO2005119907A2 WO 2005119907 A2 WO2005119907 A2 WO 2005119907A2 US 2005019682 W US2005019682 W US 2005019682W WO 2005119907 A2 WO2005119907 A2 WO 2005119907A2
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/211—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/42—Modifications of amplifiers to extend the bandwidth
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G1/00—Details of arrangements for controlling amplification
- H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
- H03G1/0017—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid state elements of the amplifier
- H03G1/0023—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid state elements of the amplifier in emitter-coupled or cascode amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/294—Indexing scheme relating to amplifiers the amplifier being a low noise amplifier [LNA]
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/36—Indexing scheme relating to amplifiers the amplifier comprising means for increasing the bandwidth
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/372—Noise reduction and elimination in amplifier
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/39—Different band amplifiers are coupled in parallel to broadband the whole amplifying circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45481—Indexing scheme relating to differential amplifiers the CSC comprising only a direct connection to the supply voltage, no other components being present
Definitions
- the present invention relates generally to circuits, and more specifically to a general-purpose wideband amplifier.
- Amplifiers are commonly used to amplify signals to obtain the desired signal level. Amplifiers are also widely used for various applications such as communication, computing, networking, consumer electronics, and so on. As an example, for wireless communication, amplifiers may be used on a transmit path to amplify a signal prior to transmission via a wireless channel and on a receive path to amplify a signal received via the wireless channel.
- An amplifier may be designed to provide a fixed gain or a variable gain.
- Variable gain amplifiers are commonly used in communication circuits (e.g., receivers and transmitters) to provide variable gains, and thus adjustable signal levels, depending on operating conditions, system requirements, and/or other factors.
- VGAs are commonly used for power control in wireless communication systems.
- CDMA Code Division Multiple Access
- the signal from each wireless device e.g., cellular phone or mobile handset
- CDMA Code Division Multiple Access
- a wireless device may be located anywhere relative to a receiving base station and may need different amounts of transmit power at different locations to achieve the target received signal quality at the base station. More transmit power is typically required when the wireless device is located far away from the base station, and less transmit power is typically required when the wireless device is close to the base station.
- the wireless device may be required to adjust its transmit power over a wide range (e.g., by 90 decibels (dB) or more) in order to combat the so-called "near-far" effect.
- a wide power control range is typically achieved by distributing variable gains across an entire transmit chain, possibly from analog baseband to radio frequency (RF) front end.
- the power control may thus be performed by VGAs located throughout the transmit chain.
- Amplifiers with simple architecture and good performance are challenging to design, but are highly desirable for cost, power, and other considerations. VGAs with these same characteristics are even more difficult to design. There is therefore a need in the art for an amplifier with simple architecture and good performance.
- An embodiment of a single-stage amplifier includes first and second "gain" transistors, first and second resistors, first and second current sources, and a load impedance.
- the first and second transistors are coupled in a common source configuration, receive and amplify a differential input signal, and provide a differential output signal.
- the first and second resistors couple between the drain (or collector) and the gate (or base) of the first and second transistors, respectively, and provide self- biasing for these transistors.
- the first and second current sources couple to the drains of the first and second transistors, respectively, and provide bias current for these transistors.
- the load impedance couples between the drains of the first and second transistors.
- the amplifier may further include third and fourth "compensation" transistors and third and fourth resistors.
- the third and fourth transistors couple in parallel with the first and second transistors, respectively, and compensate for the gate- drain parasitic capacitance of the first and second transistors, respectively.
- the third and fourth resistors provide self-biasing for the third and fourth transistors, respectively.
- the transistors may be field effect transistors (FETs), bipolar junction transistors (BJTs), and so on.
- the load impedance may be a resistor, an inductor, a capacitor, or a combination thereof.
- the first and second current sources may provide fixed or variable amounts of bias current for the first and second transistors, respectively. Variable gain for the amplifier may be achieved by varying the bias current.
- An embodiment of a two-stage amplifier includes two stages coupled in cascade. Each stage includes first and second gain transistors, first and second resistors, first and second current sources, and first and second load impedances. The circuit elements of each stage are coupled in the same manner as for the single-stage amplifier, albeit with the first and second load impedances coupled in series and between the drains of the first and second transistors.
- the first and second transistors for each stage receive and amplify a differential input signal for that stage and provide a different output signal for that stage.
- a common node is formed between the first and second load impedances for each stage.
- the common nodes for both stages may be coupled together to provide (1) biasing for the second stage and (2) negative feedback for common-mode rejection. Compensation transistors may also be used for each stage.
- FIG. 1 shows a single-stage amplifier
- FIG. 2 shows a single-stage amplifier with compensation transistors
- FIG. 3 shows a two-stage amplifier
- FIG. 4 shows a two-stage amplifier with compensation transistors
- FIG. 5 shows a multi-stage amplifier
- FIG. 6 shows a cascade current mirror used to supply bias currents
- FIG. 7 shows a plot of variable gain for a two-stage amplifier
- FIG. 8 shows a block diagram of a wireless device.
- FIG. 1 shows a schematic diagram of a single-stage amplifier 100 in accordance with one embodiment.
- Amplifier 100 includes gain transistors 120a and 120b coupled in a common-source configuration.
- Transistor 120a has its source (or emitter) coupled to circuit ground, its gate (or base) receiving a non-inverting input signal (In+) via an AC coupling capacitor 124a, and its drain (or collector) providing an inverting output signal (Out-).
- Transistor 120b has its source coupled to circuit ground, its gate receiving an inverting input signal (In-) via an AC coupling capacitor 124b, and its drain providing a non-inverting output signal (Out+).
- Amplifier 100 thus receives a differential input signal (In+ and In-) and provides a differential output signal (Out+ and Out-).
- a resistor 122a couples between the drain and gate of transistor 120a and provides self-biasing for transistor 120a.
- a resistor 122b couples between the drain and gate of transistor 120b and provides self-biasing for transistor 120b.
- the drain of transistor 120a further couples to a current source 150a
- the drain of transistor 120b further couples to a current source 150b.
- a load impedance 140 couples to the drains of transistors 120a and 120b.
- transistors 120a and 120b are N-channel FETs (N-FETs).
- transistors 120a and 120b may be any type of transistor such as, for example, P-channel FETs (P-FETs), BJTs, gallium arsenide (GaAs) FETs, hetero-j unction bipolar transistors (HBTs), high electron mobility transistors (HEMTs), and so on.
- P-FETs P-channel FETs
- BJTs gallium arsenide
- GaAs gallium arsenide
- HBTs hetero-j unction bipolar transistors
- HEMTs high electron mobility transistors
- Load impedance 140 may be a resistive load, as shown in FIG. 1, which may be suitable for a wideband amplifier. Load impedance 140 may also be a reactive load (e.g., an inductor), which may be suitable for a narrowband amplifier. Load impedance 140 may also be a complex load with both resistive and reactive elements.
- Current sources 150a and 150b provide bias current for transistors 120a and 120b, respectively. Current sources 150a and 150b may provide a fixed/constant amount of bias current. Alternatively, current sources 150a and 150b may provide variable amounts of bias current based on a control signal. The gain of amplifier 100 may be adjusted by controlling the bias currents for transistors 120a and 120b, as described below.
- Amplifier 100 may be used for wideband and/or high frequency applications because the nodes in amplifier 100 are low impedance.
- the impedance at the output nodes Out+ and Out- is determined by load impedance 140.
- Each transistor 120 has a transconductance (which is denoted as g m ) that is dependent on the transistor type, the region of operation, and the bias current for the transistor (which is denoted as I D ).
- the bias current for each transistor 120 which is also called the drain or collector current, is provided by an associated current source 150.
- the transconductance g m as a function of the drain current I D for a metal- oxide semiconductor FET (MOSFET) operating in a saturation region for a long channel model may be expressed as: g n • I 2 ⁇ -C 0 - w I D Eq (l)
- ⁇ is the charge carrier mobility
- C ox is the gate oxide capacitance per unit area
- Wis the channel width for the transistor
- L is the channel length for the transistor.
- the transconductance g m as a function of the drain current I D for a MOSFET operating in a sub-threshold region may be expressed as:
- the transconductance g m as a function of the drain current I D for a bipolar junction transistor in normal operation may be expressed as:
- transistor types and different operating regions are associated with different functions for transconductance g m versus drain current I D .
- Other transistor types and operating regions may have other functions for transconductance versus drain current.
- the gain Av of each transistor 120 in single-stage amplifier 100 may be expressed as:
- Equation (4) indicates that the gain Av of each transistor 120 is directly related to its transconductance g m .
- the gain of amplifier 100 is twice the gain Av of each transistor 120 for a differential design.
- a variable gain may be achieved for amplifier 100 by adjusting the drain current I of transistors 120a and 120b, which in turn varies the transconductance g m of each transistor, which then changes the gain Av of the transistor.
- Amplifier 100 may be used as a VGA, as described below.
- Resistors 122a and 122b provide self-biasing for transistors 120a and 120b, respectively.
- the self-biasing of each transistor 120 via resistor 122 provides various benefits.
- Second, accurate control of the transconductance g m of each transistor 120 is possible since the transistor is diode connected by resistor 122 and the voltages at all four nodes of the transistor (the gate, source, drain, and bulk) are well defined.
- the drain current I D may be easily changed to vary the biasing of transistor 120.
- FIG. 2 shows a schematic diagram of a single-stage amplifier 102 in accordance with another embodiment.
- Amplifier 102 includes all of the circuit elements of amplifier 100 in FIG. 1.
- amplifier 102 further includes compensation transistors 130a and 130b, resistors 132a and 132b, and capacitors 134a and 134b.
- Transistor 130a couples in parallel with transistor 120a and has its source coupled to circuit ground and its drain coupled to the drain of transistor 120a.
- Resistor 132a has one end coupled to the gate of transistor 130a and the other end coupled to circuit ground.
- Capacitor 134a has one end coupled to the gate of transistor 130a and the other end receiving the inverting input signal (In-).
- transistor 130b couples in parallel with transistor 120b and has its source coupled to circuit ground and its drain coupled to the drain of transistor 120b.
- Resistor 132b has one end coupled to the gate of transistor 130b and the other end coupled to circuit ground.
- Capacitor 134b has one end coupled to the gate of transistor 130b and the other end receiving the non- inverting input signal (In+).
- Transistors 130a and 130b thus receive the In- and In+ input signals at their gates via AC coupling capacitors 134a and 134b, respectively, and are self-biased to circuit ground by resistors 132a and 132b, respectively.
- Transistors 120a and 120b each have parasitic capacitance C gd between the drain and gate of the transistor. This parasitic capacitance C gd causes several deleterious effects. First, the parasitic capacitance C gd reduces the bandwidth of the amplifier. Second, the parasitic capacitance C gd limits the dynamic range of the amplifier. Dynamic range is the ratio of the largest signal level to the smallest signal level achievable by the amplifier.
- the parasitic capacitance C gd When the transconductance g m is small, the leakage current through the parasitic capacitance C gd is relatively large, which then results in reduced dynamic range.
- the parasitic capacitance C gd is typically small and normally does not degrade performance unless the leakage current is comparable to the signal current.
- Transistors 130a and 130b are compensation transistors used to mitigate the deleterious effects of the parasitic capacitance C gd of transistors 120a and 120b, respectively.
- Transistors 130a and 130b are dimensioned such that each of these transistors has the same parasitic capacitance C gd between the gate and drain of the transistor.
- Transistors 130a and 130b are driven by the In- and In+ input signals, respectively, having opposite polarity as the In+ and In- input signals for transistors 120a and 120b, respectively.
- the leakage current through transistor 130a is opposite in polarity to the leakage current through transistor 120a.
- Transistor 130a has a transconductance g m of zero because its gate is biased to circuit ground via resistor 132a and thus minimally affects the gain of amplifier 102.
- Transistor 130b compensates for the parasitic capacitance C g of transistor 120b in the same manner that transistor 130a compensates for the parasitic capacitance C gd of transistor 120a.
- Transistors 130a and 130b also allow for high attenuation of the differential input signal (In+ and In-).
- FIG. 3 shows a schematic diagram of a two-stage amplifier 104 in accordance with yet another embodiment.
- Amplifier 104 includes two stages 110 and 112 that are coupled in cascade.
- First stage 110 is a self-biased pseudo-differential amplifier composed of transistors 120a and 120b, resistors 122a and 122b, capacitors 124a and 124b, load impedances 140a and 140b, and current sources 150a and 150b.
- Transistors 120a and 120b, resistors 122a and 122b, capacitors 124a and 124b, and current sources 150a and 150b are coupled in the manner described above for FIG. 1.
- the gate bias of transistors 120a and 120b is set by current sources 150a and 150b, respectively, via resistors 122a and 122b, respectively.
- Load impedances 140a and 140b couple in series and to the drains of transistors 120a and 120b.
- Load impedances 140a and 140b serve as the load of first stage 110 and may be resistors, inductors, capacitors, or a combination thereof.
- the drains of transistors 120a and 120b provide the differential output signal (Outl- and Outl+) for first stage 110.
- First stage 110 is similar to single-stage amplifier 100 shown in FIG. 1, except that load impedance 140 in FIG. 1 is replaced with load impedances 140a and 140b in FIG. 3.
- Second stage 112 is composed of transistors 160a and 160b, load impedances 180a and 180b, and current sources 190a and 190b, which are coupled in similar manner as transistors 120a and 120b, load impedances 140a and 140b, and current sources 150a and 150b in first stage 110.
- the gates of transistors 160a and 160b, which are the differential input for second stage 112, are coupled to the drains of transistors 120a and 120b, respectively, which are the differential output for first stage 110.
- Load impedances 180a and 180b couple in series and to the drains of transistors 160a and 160b.
- Load impedances 180a and 180b serve as the load of second stage 112 and may also be resistors, inductors, capacitors, or a combination thereof.
- Load impedances 140a and 140b for first stage 110 and load impedances 180a and 180b for second stage 112 may be selected independently based on the application in which amplifier 104 will be used.
- load impedances 140a and 140b may be resistive
- load impedances 180a and 180b may be a parallel resonator tank.
- Current sources 190a and 190b couple to the drains of transistors 160a and 160b, respectively, and provide the bias current for these transistors.
- the drains of transistors 160a and 160b provide the differential output signal (Out+ and Out-) for second stage 112, which is also the different output signal for amplifier 104.
- the common node CI of load impedances 140a and 140b for first stage 110 is coupled to the common node C2 of load impedances 180a and 180b for second stage 112.
- This connection of node CI to node C2 serves several beneficial purposes.
- the connection properly sets the drain voltage of transistors 160a and 160b in second stage 112. In an ideal case, this drain voltage is equal to the gate bias voltage of transistors 160a and 160b, and transistors 160a and 160b are biased at the same operating point as transistors 120a and 120b.
- transistors 120a and 120b in first stage 110 and transistors 160a and 160b in second stage 112 will create different drain voltages for transistors 120a and 120b in first stage 110 and transistors 160a and 160b in second stage 112, which in turn results in gain control error.
- this mismatch produces second order effects.
- Transistors 160a and 160b in second stage 112 thus obtain biasing from first stage 110, and self-biasing resistors are not needed for transistors 160a and 160b.
- this connection provides a negative feedback loop between the two amplifier stages. The feedback loop provides rejection of common- mode voltages applied at the differential input (In+ and In-) of first stage 110 and helps suppress common-mode noise including power supply noise that is presented common- mode to amplifier 104.
- FIG. 4 shows a schematic diagram of a two-stage amplifier 106 in accordance with yet another embodiment.
- Amplifier 106 includes first stage 114 and second stage 116 that are coupled in cascade. Stages 114 and 116 include all of the circuit elements in stages 110 and 112, respectively, of amplifier 104 in FIG. 3.
- first stage 114 of amplifier 106 further includes compensation transistors 130a and 130b, biasing resistors 132a and 132b, and AC coupling capacitors 134a and 134b.
- Second stage 116 of amplifier 106 further includes compensation transistors 170a and 170b, biasing resistors 172a and 172b, and AC coupling capacitors 174a and 174b.
- compensation transistors 130a and 130b couple in parallel with transistors 120a and 120b, respectively.
- Resistors 132a and 132b provide biasing for transistors 130a and 130b, respectively.
- Capacitors 134a and 134b provide AC coupling of the In- and In+ input signals to the gates of transistors 130a and 130b, respectively.
- Compensation transistors 130a and 130b are cross-excited and receive the complementary input signals as their counterpart gain transistors 120a and 120b, respectively.
- compensation transistors 170a and 170b couple in parallel with transistors 160a and 160b, respectively.
- Resistors 172a and 172b provide biasing for transistors 170a and 170b, respectively.
- Capacitors 174a and 174b provide AC coupling of the Outl+ Outl- signals from first stage 114 to the gates of transistors 170a and 170b, respectively.
- Compensation transistors 170a and 170b receive the complementary signals as their counterpart gain transistors 160a and 160b, respectively.
- Compensation transistors 130a and 130b can mitigate the leakage current through the gate-drain parasitic capacitance C gd of transistors 120a and 120b, respectively.
- compensation transistors 170a and 170b can mitigate the leakage current through the parasitic capacitance C gd of transistors 160a and 160b, respectively.
- compensation transistors 130a, 130b, 170a and 170b are biased to circuit ground via resistors 132a, 132b, 172a and 172b, respectively.
- these compensation transistors have transconductance g m of zero and thus minimally affect the gain of amplifier 106.
- FIG. 5 shows a block diagram of a multi-stage amplifier 108 in accordance with yet another embodiment.
- Amplifier 108 includes N stages 510a through 51 On, where N may be any integer greater than one.
- First stage 510a may be implemented with first stage 110 in FIG. 3 or first stage 114 in FIG. 4.
- Each of the subsequent stages 510b through 51 On may be implemented with second stage 112 in FIG. 3 or second stage 116 in FIG. 4.
- First stage 510a receives the differential input signal (In+ and In-) for amplifier 500.
- the differential output of each stage 510, except for last stage 51 On, is coupled to the differential input of the next stage.
- Last stage 51 On provides the differential output signal (Out+ and Out-) for amplifier 500.
- the common nodes of the load impedances for all N stages 510a through 51 On may be coupled together, as shown in FIG. 5, to provide biasing and common-mode feedback, as described above for FIG. 3.
- the common nodes for the N stages 510 may be coupled via bias circuits, which are not shown in FIG. 5.
- the gain of each amplifier stage is the product of the transistor transconductance g m and the load impedance Z for that stage, as shown in equation (4).
- the overall gain of the amplifier is the product of the linear gains (or the sum of the logarithmic gains) of the individual stages.
- Each of the amplifiers in FIGS. 1 through 5 may be operated as a fixed gain amplifier or as a variable gain amplifier (VGA).
- Gain control for a VGA may be achieved by varying the drain current I , which affects the transconductance g m as described above, which in turn affects the transistor gain Av.
- Variable drain current may be provided using various circuit designs.
- FIG. 6 shows an embodiment of a wide-swing cascade current mirror 600, which may be used to supply variable bias currents for all gain fransistors in an amplifier.
- Current mirror 600 may be used for current sources 150a and 150b in FIGS. 1 and 2 and may provide drain currents for gain fransistors 120a and 120b in amplifiers 100 and 102.
- Current mirror 600 may also be used for current sources 150a, 150b, 190a and 190b in FIGS. 3 and 4 and may provide drain currents for gain fransistors 120a, 120b, 160a and 160b in amplifiers 104 and 106.
- Current mirror 600 includes fransistors 610 and 612, a current source 614, and K pairs of fransistors 620a and 622a through 620k and 622k.
- all transistors are implemented with P-channel FETs. Transistors 610 and 612 and current source 614 are coupled in series.
- Transistor 610 has its source coupled to a power supply V DD , its gate coupled to a node D, and its drain coupled to the source of transistor 612.
- Transistor 612 has its gate receiving a bias voltage V b i as and its drain coupled to one end of current source 614.
- the other end of current source 614 couples to circuit ground.
- Current source 614 provides a reference current l r which may be a fixed current or an adjustable current.
- the K pairs of fransistors 620a and 622a through 620k and 622k are used to provide the drain current I D for K gain fransistors in an amplifier.
- the gates of fransistors 620a through 620k couple together and to the gate of fransistor 610, and the sources of fransistors 620a through 620k couple to the power supply V DD .
- the gates of fransistors 622a through 622k also couple together and to the gate of fransistor 612.
- the drains of fransistors 620a through 620k couple to the sources of fransistors 622a through
- the drain of fransistor 622a provides the drain current I D for a first gain fransistor
- the drain of fransistor 622b provides the drain current I D for a second gain transistor, and so on
- the drain of fransistor 622k provides the drain current I D for the K-th gain fransistor.
- Transistors 620a through 620k may be dimensioned with the same size and may further be scaled according to the sizes of the K gain transistors receiving the drain currents via fransistors 620a through 620k. Transistors 622a through 622k may also be dimensioned with the same size and may further be scaled according to the sizes of the
- K gain fransistors The sizes of fransistors 620i and 622i for each pair may be scaled relative to the sizes of fransistors 610 and 612 to achieve the desired amount of drain current for the i-th gain fransistor.
- the amount of current flowing through each fransistor pair 620i and 622i (which is the drain current I for the i-th gain fransistor) is dependent on (1) the reference current I re f provided by current source 614 and (2) the ratio of the sizes of fransistors 620i and 622i to the sizes of transistors 610 and 612.
- the drain current I D may be adjusted by changing the reference current I re f.
- V b i as provides proper gate bias for fransistor 612 and fransistors 622a through 622k to keep these fransistors away from a triode region.
- the bias voltage V b i a may be generated by a bias circuit that is not shown in FIG. 6.
- the gain fransistors for all stages of an amplifier may be identically biased with the same drain current I D - This may be achieved by dimensioning all K fransistors
- the gain fransistors for each stage of an amplifier may be biased with a different drain current selected for that stage.
- the drain current for the gain fransistors in each stage may be determined based on the load for that stage, e.g., more drain current for larger load. Different drain currents for different stages may be obtained by dimensioning fransistors 620 and 622 used for each stage with the appropriate sizes.
- FIG. 6 shows a specific design for the current sources for the amplifiers in
- FIGS. 1 through 5 Fixed or variable drain currents for the gain fransistors may also be provided with other current source designs known in the art.
- FIG. 7 shows a plot of the variable gain achievable by two-stage amplifier
- FIG. 7 is for an exemplary CMOS VGA design at 850MHz.
- the vertical axis shows the overall gain (in decibels or dB) for the two-stage amplifier
- the horizontal axis shows a confrol voltage V ct ri (in volts) used to adjust the reference current I re f of current source 614 in current mirror 600.
- V ct ri in volts
- the amplifier embodiments described herein have the following advantages: 1. Very simple structure and straightforward fransistor biasing scheme. The fransistor size and bias current are such that all of the gain fransistors are biased at approximately the same gate voltage, and V gd is zero. This enables accurate gain confrol of the gain fransistors. 2. DC coupling between stages eliminates coupling loss and saves die area for AC coupling capacitors. 3. All nodes in the amplifier are low impedance. The amplifier is thus inherently wideband and suitable for RF applications. 4. Compensation transistors can mitigate the current leakage through the gate-drain parasitic capacitance C gd of the gain fransistors. The amplifier may thus be used as a high attenuation amplifier. 5. Large range of gain confrol is readily achievable, e.g., over 60dB for an exemplary design of two-stage amplifier 106 in FIG. 4. The gain range is determined by the dynamic range of the drain current.
- the amplifier described herein may be used for various wideband and/or high frequency applications such as communication, networking, computing, consumer electronics, and so on.
- the amplifier may be used in wireless communication systems such as a CDMA system, a Time Division Multiple Access (TDMA) system, a Global System for Mobile Communications (GSM) system, an Advanced Mobile Phone System (AMPS) system, Global Positioning System (GPS), a multiple-input multiple- output (MLMO) system, an orthogonal frequency division multiplexing (OFDM) system, an orthogonal frequency division multiple access (OFDMA) system, a wireless local area network (WLAN), and so on.
- TDMA Time Division Multiple Access
- GSM Global System for Mobile Communications
- AMPS Advanced Mobile Phone System
- GPS Global Positioning System
- MLMO multiple-input multiple- output
- OFDM orthogonal frequency division multiplexing
- OFDMA orthogonal frequency division multiple access
- WLAN wireless local area network
- FIG. 8 shows a block diagram of a wireless device 800 that may be used for wireless communication.
- Wireless device 800 may be a cellular phone, a user terminal, a handset, a personal digital assistant (PDA), or some other device or design.
- Wireless device 800 is capable of providing bi-directional communication via a fransmit path and a receive path.
- a digital signal processor (DSP) 810 processes traffic data and provides a sfream of chips to a fransceiver unit 820.
- DSP digital signal processor
- DACs 822 convert the sfream of chips to one or more analog signals.
- the analog signal(s) are amplified by an amplifier (Amp)
- a filter 826 filtered by a filter 826, amplified with a variable gain by a VGA 828, and frequency upconverted from baseband to RF by a mixer 830 to generate an RF signal.
- the frequency upconversion is performed with a local oscillator (LO) signal from a voltage controlled oscillator (VCO)/phase locked loop (PLL) 832.
- LO local oscillator
- VCO voltage controlled oscillator
- PLL phase locked loop
- the RF signal is buffered by a buffer 834, filtered by a filter 836, amplified by a power amplifier (PA)
- duplexer (D) 840 routed through a duplexer (D) 840, and transmitted from an antenna 842.
- a signal is received by antenna 842, routed through duplexer 840, amplified by a low noise amplifier (LNA) 844, filtered by a filter 846, amplified with a variable gain by a VGA 848, and frequency downconverted from RF to baseband by a mixer 850 with an LO signal from a VCO/PLL 852.
- LNA low noise amplifier
- the downconverted signal is buffered by a buffer 854, filtered by a filter 856, amplified by an amplifier 858, and digitized by one or more analog-to-digital converters (ADCs) 860 to generate one or more streams of samples.
- ADCs analog-to-digital converters
- FIG. 8 shows a specific fransceiver design using a direct-conversion architecture.
- the signal conditioning for each signal path may be performed by one or more stages of amplifier, filter, mixer, and so on, as is known in the art.
- FIG. 8 shows some of the circuit blocks that may be used for signal conditioning.
- the amplifier described herein may be used for the various amplifiers and buffers in the fransmit and receive paths.
- the amplifier described herein may be used for various frequency ranges including baseband, intermediate frequency (IF), RF, and so on.
- the amplifier may be used for various frequency bands commonly used for wireless communication, such as: • Cellular band from 824 to 894 MHz, • Personal Communication System (PCS) band from 1850 to 1990 MHz, • Digital Cellular System (DCS) band from 1710 to 1880 MHz, • GSM900 band from 890 to 960 MHz, • International Mobile Telecommunications-2000 (IMT-2000) band from 1920 to 2170 MHz, and • Global Positioning System (GPS) band from 1574.4 to 1576.4 MHz.
- PCS Personal Communication System
- DCS Digital Cellular System
- GSM900 Global System
- IMT-2000 International Mobile Telecommunications-2000
- GPS Global Positioning System
- the amplifier described herein may be fabricated in various integrated circuit (IC) processes such as complementary metal oxide semiconductor (CMOS), bipolar, bipolar-CMOS (Bi-CMOS), gallium arsenide (GaAs), and so on.
- CMOS complementary metal oxide semiconductor
- Bi-CMOS bipolar-CMOS
- GaAs gallium arsenide
- RFICs radio frequency ICs
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
BRPI0511779-8A BRPI0511779A (en) | 2004-06-02 | 2005-06-02 | general purpose broadband amplifier |
IL179799A IL179799A0 (en) | 2004-06-02 | 2006-12-03 | General-purpose wideband amplifier |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US57675904P | 2004-06-02 | 2004-06-02 | |
US60/576,759 | 2004-06-02 | ||
US10/932,545 | 2004-09-01 | ||
US10/932,545 US7602246B2 (en) | 2004-06-02 | 2004-09-01 | General-purpose wideband amplifier |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2005119907A2 true WO2005119907A2 (en) | 2005-12-15 |
WO2005119907A3 WO2005119907A3 (en) | 2006-03-30 |
Family
ID=35447019
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2005/019682 WO2005119907A2 (en) | 2004-06-02 | 2005-06-02 | General-purpose wideband amplifier |
Country Status (4)
Country | Link |
---|---|
US (1) | US7602246B2 (en) |
BR (1) | BRPI0511779A (en) |
IL (1) | IL179799A0 (en) |
WO (1) | WO2005119907A2 (en) |
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Also Published As
Publication number | Publication date |
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BRPI0511779A (en) | 2008-01-15 |
WO2005119907A3 (en) | 2006-03-30 |
US20050270098A1 (en) | 2005-12-08 |
IL179799A0 (en) | 2007-05-15 |
US7602246B2 (en) | 2009-10-13 |
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