WO2005117413A1 - Procede, systeme et programme permettant d'eliminer l'introduction d'erreurs par des commutateurs-melangeurs de production a effets video numeriques internes - Google Patents

Procede, systeme et programme permettant d'eliminer l'introduction d'erreurs par des commutateurs-melangeurs de production a effets video numeriques internes Download PDF

Info

Publication number
WO2005117413A1
WO2005117413A1 PCT/US2004/015302 US2004015302W WO2005117413A1 WO 2005117413 A1 WO2005117413 A1 WO 2005117413A1 US 2004015302 W US2004015302 W US 2004015302W WO 2005117413 A1 WO2005117413 A1 WO 2005117413A1
Authority
WO
WIPO (PCT)
Prior art keywords
audio
delay
video
tally
signal
Prior art date
Application number
PCT/US2004/015302
Other languages
English (en)
Inventor
J. Carl Cooper
Original Assignee
Cooper J Carl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cooper J Carl filed Critical Cooper J Carl
Priority to PCT/US2004/015302 priority Critical patent/WO2005117413A1/fr
Priority to AU2004326306A priority patent/AU2004326306A1/en
Priority to EP04752335A priority patent/EP1805983A4/fr
Priority to CA002562091A priority patent/CA2562091A1/fr
Publication of WO2005117413A1 publication Critical patent/WO2005117413A1/fr

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/222Studio circuitry; Studio devices; Studio equipment
    • H04N5/262Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
    • H04N5/268Signal distribution or switching
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N17/00Diagnosis, testing or measuring for television systems or their details
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/04Synchronising

Definitions

  • the invention relates to the creation, manipulation, transmission, storage, and especially synchronization of multi-media entertainment, educational and other programming having at least video and associated information.
  • the invention will find particular use with respect to the creation and distribution of television programs.
  • programs The creation, manipulation, transmission, storage, etc. of multi-media content, be it entertainment, educational, scientific, business, and other programming having at least video and associated information requires synchronization.
  • Typical examples of such programming are television and movie programs, motion medical images, and various engineering and scientific content. These are collectively referred to as "programs.”
  • these programs include a visual or video portion, an audible or audio portion, and may also include one or more various data type portions.
  • Typical data type portions include closed captioning, narrative descriptions for the blind, additional program information data such as web sites and further information directives and various metadata included in compressed (such as for example MPEG and JPEG) systems.
  • the video and associated signal programs are produced, operated on, stored or conveyed in a manner such that the synchronization of various ones of the aforementioned audio, video and/or data is affected.
  • the synchronization of audio and video commonly known as lip sync
  • One aspect of multi-media programming is maintaining audio and video synchronization in audio-visual presentations, such as television programs, for example to prevent annoyances to the viewers, to facilitate further operations with the program or to facilitate analysis of the program.
  • the video and audio signals in a television system are increasingly being subjected to more and more steps of digital processing. Each step has the potential to add a different amount of delay to the video and audio, thereby introducing a lip sync error.
  • Incorrect lip sync is a major concern to newscasters, advertisers, politicians and others who are trying to convey a sense of trust, accuracy and sincerity to their audience. Studies have demonstrated that when lip sync errors are present, viewers perceive a message as less interesting, more unpleasant, less influential and less successful than the same message with proper lip sync.
  • the cumulative delay of the video with respect to the audio can be 6 or more frames. With the inclusion of video and audio compression in any part(s) of the system the video delays with respect to audio can be much more. Worse yet, the amount of video delay frequently jumps by a frame or more as the operating mode changes, or as frames of video are dropped or repeated to achieve synchronization of the video to studio and other references. Using a fixed audio delay to "mop up" the audio to video timing errors is rarely a satisfactory solution because of the constantly changing video delay.
  • newer master control switchers have an internal DVE for squeezeback operation rather than an external DVE. This allows the use of a constant insertion delay of 1 frame for both the video and the audio paths in all modes of operation.
  • the present invention provides for method of producing time synchronized multi-media signals.
  • the preferred embodiment of the present invention is a method, apparatus (system), and program product where audio and video portions of multi-media content, e.g., a television or other program, may be synchronized by inserting and controlling appropriate audio delays. This increases the apparent synchrony of the desired signals.
  • the method, system, and program product described herein provide for entering a delay value in the relative timing of a video signal conveying a plurality of images and an associated signal, as an audio signal.
  • This is accomplished by a method, system and program product for producing time synchronized multi-media signals. This is done by inputting a start pulse, for example, a GPI Start pulse, a stop pulse, for example, a GPI Stop pulse, and a tally line for each video input.
  • the next step is generating a Timer On/Off signal and a Time Value signal for each set of start pulses, stop pulse and tallies, and providing the Timer On/Off signal and a Time Value signals to a router.
  • These outputs are properly associated with each other, processed and coupled to an audio synchronizer as one or more control signals, which in the preferred embodiment are a single signal of delay steering pulses for control of the delay of the audio signal.
  • One feature of the present invention is that the number of Interfaces and Tally contact closures can be stored in the timelines to control external devices.
  • various combinations of input signals can be associated with the delay setting to create delay output signals.
  • an external interface can be used to interpret the GPI and tally outputs and generate the necessary steering commands to control audio synchronizers. This permits automatic correction of the lip sync errors.
  • the DG-1200 interface from Pixel Instruments can be preset to provide up to twelve different delays and can steer up to five audio synchronizers.
  • the insertion of the audio delay can be triggered by tally signals, GPIs, or a combination of both. Gating the tally signal with GPIs improves the immunity to false delay insertion.
  • DVE 1 has a variable delay of 0-1.5 frames and the second DVE has a fixed delay of 2.25 frames.
  • DVE 1 has a corresponding pair of GPI signals and a tally signal.
  • DVE 2 has only an associated tally signal.
  • the GPI signals will indicate the current delay, that is the GPI start is triggered when a particular video frame enters DVE 1 and the GPI stop is triggered when that same particular video frame exits DVE1.
  • the associated tally is asserted when the output of DVE1 is being utilized by the switcher.
  • the DG-1200 When the output of DVE 2 is being utilized by the switcher its associated tally is asserted.
  • the DG-1200 will (as set up by an operator) receive the two tallys and two GPI signals as well as a 2.25 frame delay value. These signals and the delay value are utilized to create a delay output signal (DDO pulse) to control an audio synchronizer to cause the audio synchronizer delay to match the video delay of the production switcher as the two DVEs are inserted into (and taken out of) the video path.
  • the two GPIs corresponding to DVE 1 are utilized to determine the current DVE 1 delay.
  • the two tallies are used to determine if one or both DVEs are inserted into the video path.
  • DVE 1 is inserted (as determined by its corresponding tally), its delay (as determined by the GPIs) is added to the DDO signal.
  • DVE 2 is inserted (as determined by its corresponding tally) the 2.25 frame delay value is inserted into the DDO signal. Consequently the DDO may indicate 0 delay (neither DVE is used), the DVE 1 delay (DVE 1 is in use), a 2.25 freme delay (DVE 2 is in use) or a delay of 2.25 frames plus the DVE 1 delay (both DVEs are in use).
  • the preferred embodiment of the invention has the ability to utilize and configure its various inputs to match differing video systems.
  • the GPIs may be utilized as an indicator of when a DVE is being used (as compared to indicating a varying delay as in the above example), or as an additional indicator along with the tally.
  • Figure 1 illustrates a typical train of prior art processes and units to go from a multimedia pickup, through pre-transmission level processing, transmission, receiving, and receiver level processing (including tuning and demodulation) to final presentation to an end user or viewer.
  • Figure 2 shows a system for using General Program Interfaces and Tallies, through a control router, to timers, to generate delay steering pulses to an audio synchronizer.
  • Figure 3 illustrates a system for receiving video inputs through a video switcher with internal DVE's to generate GPI's and Tally signals, to an interface with a plurality of audio delays which system includes an embodiment of the present invention operable to generate delay steering pulses to an audio mixer, where the audio mixer provides a corrected audio output. Note that while Figure 3 illustrates a typical system by way of example, one of ordinary skill will recognize that the teachings herein are applicable to general systems, methods and products wherein video signal processing causes changing video delays.
  • Figure 4 illustrates video inputs and audio inputs with a video switcher with internal DVE's to generate GPI's and Tally signals, which system includes an embodiment of the present invention operable to generate a delay steering pulse to control a single audio delay operating on audio out of an audio mixer to provide a corrected audio output. Note that while Figure 4 illustrates another typical system by way of example, one of ordinary skill will recognize that the teachings herein are applicable to general systems, methods and products wherein video signal processing causes changing video delays.
  • Figure 5 illustrates a schematic diagram of the preferred embodiment of the present invention having an interface to interpret the GPI and tally outputs and generate the necessary steering commands (preferred to be DDO signals) to control one or more audio synchronizers to permit automatic correction of timing and synchronization errors, such as lip sync errors.
  • the preferred embodiment of the invention produces time synchronized multi-media signals. This is done as one example by inputting a start pulse, for example, a GPI Start pulse, a stop pulse, for example, a GPI Stop pulse, and a tally line for each video input. The next step is for example generating a Timer On/Off signal and/or a Time Value signal for each set of start pulses, stop pulse and/or tallies, and providing the Timer On/Off signal and a Time Value signals to a router. The information conveyed by these signals are routed to an audio synchronizer as delay steering pulses for the audio signal.
  • a start pulse for example, a GPI Start pulse
  • a stop pulse for example, a GPI Stop pulse
  • a tally line for each video input.
  • the next step is for example generating a Timer On/Off signal and/or a Time Value signal for each set of start pulses, stop pulse and/or tallies, and providing the Timer On/Off signal and a Time Value signals
  • the number of GPI and Tally assertions can be stored in these timelines to indicate system configuration and/or control external devices. Since the video delay through the switcher (or other system) is usually predictable (based on the combination of effects), an external interface of the present invention can be used to interpret these GPI and tally outputs and generate the necessary steering commands to control audio synchronizers. This permits automatic correction of the lip sync errors.
  • An interface such as the DG-1200 interface from Pixel Instruments can be preset to provide up to twelve different delays control signals (DDOs) and can steer up to five audio synchronizers. Depending on the application, the control of the audio delay can be triggered by tally signals, GPIs, or a combination of both.
  • Delay Time Values for example 513 and 523
  • desired timer(s) for example 541 and 551
  • one or more Delay Steering Signal may be generated to respond to the video system and reflect the current video delay of that system.
  • Gating the tally signal with GPIs can be utilized to improve the immunity to false delay insertion.
  • Multiple signals may be utilized in sequence or in tandem to improve reliability or to allow operation with simple or complex video systems.
  • FIG. 2 illustrates by way of example one preferred embodiment system where GPI start signals, Tally signals, and GPI stop signals are input to tally latches 211 - 221.
  • the outputs of the Tally Latches, a timer on/off signals and time values, are input to a control router 231. Additionally, Delay Time values 213 - 223 are input to the control router.
  • the control router 231 outputs desired ones of the On/Off and Time signals to individual timers 241 - 251, which in turn generate delay steering pulses which are suitably coupled to one or more audio synchronizers.
  • the Tally Latch may be configured to respond to the input GPI Start, GPI Stop and Tally signals in various ways.
  • the outputs of the Tally Latch may be configured (by operator or manufacture) to represent all of the possible Boolean and/or digital logic operations of the three input signals, however lesser numbers of the possible Boolean and/or digital logic operations may be utilized as desired. Of particular interest are two combinations of digital logic and Boolean operation which will be described below.
  • the first combination of particular interest provides selectable inversion of each input, a selection of edge trigger or level trigger for the GPI inputs to control a set/reset flip flop function.
  • the output of the set/reset function is anded by the tally signal and the output selectably inverted. This capability allows any input and output polarity.
  • a delay time is established by setting the set/reset function with the GPI start (by edge or level trigger) and resetting with the GPI stop (by edge or level trigger). The resulting time duration (pulse) is counted to provide the established delay time which is coupled to the Control Router.
  • the set/reset pulse from the set/reset function itself is anded with the tally and the output coupled (in either polarity) to the Control Router.
  • the Tally is coupled to the Control Router.
  • the inputs to the Control Router are 1) the Tally, 2) a pulse corresponding to the delay between GPI start and stop, 3) that pulse anded by the Tally.
  • a seperate Delay Time Value established by manufacture or the operator is input to the Control Router.
  • the Control Router may then couple various desired ones of its inputs to the desired timer to generate Delay Steering Signals (DDO Pulses).
  • DDO Pulses Delay Steering Signals
  • This combination is useful to measure a changing delay as provided by the timing of the GPI start and stop and the Tally is used to indicate when that changing delay is inserted in the video signal path.
  • the changing delay can also be associated with the Delay Time Value from 213 - 223, for example added to it. This is useful for systems which have a fixed minimum delay to which a variable delay is added.
  • a second combination of interest provides a selection of edge trigger or level trigger for the GPI inputs to control a set/reset flip flop function.
  • the output of the set/reset function is anded by the tally signal and the output selectably inverted. This capability allows any input and output polarity.
  • the set/reset level from the set/reset function is anded with the tally and the output coupled (in either polarity) to the Control Router.
  • a seperate Delay Time Value established by manufacture or the operator is input to the Control Router.
  • the Control Router may then couple various desired ones of its inputs to the desired timer to generate Delay Steering Signals (DDO Pulses).
  • DDO Pulses Delay Steering Signals
  • Tally Latch As well as the Control Router and Timers at taught herein is easily provided by configurable or programmable logic ICs, such as those manufactured by Altera and Xilinx, and operating under control of a suitable microprocessor, as is well known to those of ordinary skill in the art.
  • the aforementioned preferred embodiment of the second combination is available commercially in the previously mentioned DG-1200 which was introduced at the 2004 National Association of Broadcasters convention held April 17-22, 2004 in Las Vegas, Nevada.
  • the DG-1200 is available from Pixel Instruments Corporation of Los Gatos, CA.
  • each of the twelve input channels consists of a GPI Start pulse, a GPI Stop pulse, 211 and 221, and a Tally line, 213 and 223.
  • Each input channel also has a linked delay time register with a user selectable value from 20 ⁇ sec (nominally zero delay) up to 6.5 seconds, in increments of 100 ⁇ sec. Delay times can be entered and displayed in milliseconds or in TV fields (NTSC or PAL). Other configurations and values may be utilized as desired.
  • Any input channel and its time value can be routed through a control router 231 to any of the output timers 241 and 251 and each timer can steer a separate audio synchronizer, as an AD-3100 Audio Synchronizer.
  • the output timers, 241 and 251 can have different time values and can be turned on and off independently in response to the respective input signals.
  • any timer can be controlled by more than one input channel. Assume that one switcher effect needs a one frame audio delay and another effect needs a two frame audio delay.
  • Input #1 (or any other input) can enable a 1 frame delay in Timer #3 (or any other timer) and the associated audio synchronizer, as an AD-3100. Any other input can be used to enable a 2 frame delay in the same timer.
  • an audio synchronizer as an AD-3100 Audio Synchronizers
  • this solution is scaleable with additional DG-1200s and AD-3100s.
  • FIG. 4 A simpler, but less comprehensive solution is shown in Figure 4, where a single audio synchronizer, as an AD-3100 Audio Synchronizer is added at the output of the Audio Mixer.
  • the amount of delay added to the audio path is chosen as a compromise for the various sources contributing to the program output in any given effect.
  • video inputs are input to a video switcher with internal DVE's 411.
  • This provides GPI and Tally signals output as input to an interface 421, which produces the audio delay steering pulses.
  • the video switcher 411 also produces program video out with video through DVE paths delayed when a DVE is on the air.
  • the output of the interface 421 is input to an audio delay 431, where, along with audio inputs 441 through an audio mixer 443 the delay steering pulse correction is applied to yield a corrected audio output 453.
  • the studio anchor has zero video delay and the remote reporter (in the box) has one frame of video delay.
  • the audio synchronizer for example, an AD-3100 Audio Synchronizer
  • delay to between 0 and 0.5 frame is the best compromise for both sources.
  • the studio anchor's audio will be slightly late and the remote reporter's audio slightly early. The residual lip sync errors are reduced compared to doing nothing at all.
  • the audio delay of the DVE may be switched in and out of the program path several times in a relatively short period, it is essential that the audio delay "catch up" quickly.
  • Conventional audio synchronizers typically change their delay at a rate of 0.5% or less. This means that for each 1 frame increase or decrease in the video delay, the audio does not "catch up” for 10 seconds or more. In systems where the video delay changes at the start of a 15 second commercial, this would cause most or all of the commercial to suffer lip sync errors.
  • the audio synchronizer as an AD-3100, incorporates automatic pitch correction to allow rapid delay change (up to 25%) without introducing undesirable artifacts such as pitch shifts, clicks and pops in the output. So, in our example of a one frame change in the video delay, the audio synchronizer will "catch up” in just a few frames. This is well before the viewer will notice.
  • a programmable tally/GPI interface and a fast tracking audio synchronizer provides a flexible cost effective solution to the lip sync errors introduced by production switchers and digital effects processors. It is also applicable to systems that use a master control switcher with external effects for squeezeback operation.
  • Figure 5 illustrates a schematic diagram of an interface to interpret the GPI and tally outputs and generate the necessary steering commands to control audio synchronizers to permit automatic correction of timing and synchronization errors, such as lip sync errors.
  • GPI start signals, Tally signals, and GPI stop signals are input to tally latches 511 and 521.
  • the outputs of the tally latches 511 and 521, and delay time inputs 513 and 523, are timer on/off signals and time values. These are inputs to a control router 531.
  • the control router 531 outputs On/Off and Time signals to individual timers 541 and 551, which in turn generate delay steering pulses to audio synchronizers, not shown.
  • each of the twelve input channels consists of a GPI Start pulse, a GPI Stop pulse, 511 and 521, and a Tally line, 513 and 523.
  • the tally latches 511 and 521 are typically octal transparent, 3 state output latches, such as a 74573 series latches with a common latch enable control, a common 3 state output enable control, 3 state outputs.
  • the latch inputs can be set to operate with Tally only, GPI Start and Stop Triggers only, Tally gated by GPI Start and GPI Stop, as well as delay measure which may be provided by a 7474 flip flop, and/or a 74163 counter which are responsive to the GPI signals. It is preferred however that these functions be implemented with programmable logic configured in response to and operating in conjunction with a microprocessor.
  • Each input channel also has a linked delay time register 513 and 523 with a user selectable value from 20 ⁇ sec (nominally zero delay) up to 6.5 seconds, in increments of 100 ⁇ sec. Delay times can be entered and displayed in milliseconds or in TV fields (NTSC or PAL). It is preferred that this function be implemented with programmable logic configured in response to and operating in conjunction with a microprocessor.
  • any input channel and its time value can be routed through the control router 531 to any of the output timers 541 and 551 and each timer can steer a separate audio synchronizer, as an AD-3100 Audio Synchronizer.
  • the control router is under microcontroller control. It is preferred that this function be implemented with programmable logic configured in response to and operating in conjunction with a microprocessor.
  • the microprocessor is at least an eight bit microcontroller with 32 I/O lines, timers, counters, interrupts, priority levels, and an on-chip RAM.
  • One microcontroller useful in the router 531 described herein is an Intel 80C32 microcontroller.
  • the Intel 80C32 microcontroller is an 8 bit microcontroller with 32 I/O lines, 3 timers/counters, 6 interrupts/4 priority less, and 256 bytes of on-chip RAM.
  • the microprocessor controls a multistate transceiver characterized by a bus interface, three state buffers with three state compatible send and receive directions.
  • the output timers, 541 and 551 provide TTL level steering pulses to the audio synchronizer to control the delay of the synchronizer, can have different time values and can be turned on and off independently. Also, any timer can be controlled by more than one input channel. Assume that one switcher effect needs a one frame audio delay and another effect needs a two frame audio delay. Input #1 (or any other input) can enable a .1 frame delay in Timer #3 (or any other timer) and the associated audio synchronizer, as an AD-3100. Any other input can be used to enable a 2 frame delay in the same timer. It is preferred that this function be implemented with programmable logic configured in response to and operating in conjunction with a microprocessor.
  • the invention may be implemented, for example, by having the mutual event detection and synchronization as a software application (as an operating system element), a dedicated processor, or a dedicated processor with dedicated code.
  • the software executes a sequence of machine-readable instructions, which can also be referred to as code. These instructions may reside in various types of signal-bearing media.
  • one aspect of the present invention concerns a program product, comprising a signal-bearing medium or signal-bearing media tangibly embodying a program of machine-readable instructions executable by a digital processing apparatus to perform a method for detecting video and audio mutual events, determining the delay, and applying a synchronization delay to the audio and video.
  • This signal-bearing medium may comprise, for example, memory in server.
  • the memory in the server may be non-volatile storage, a data disc, or even memory on a vendor server for downloading to a processor for installation.
  • the instructions may be embodied in a signal-bearing medium such as the optical data storage disc.
  • the instructions may be stored on any of a variety of machine-readable data storage mediums or media, which may include, for example, a "hard drive", a RAID array, a RAMAC, a magnetic data storage diskette (such as a floppy disk), magnetic tape, digital optical tape, RAM, ROM, EPROM, EEPROM, flash memory, magneto-optical storage, paper punch cards, or any other suitable signal-bearing media including transmission media such as digital and/or analog communications links, which may be electrical, optical, and/or wireless.
  • the machine-readable instructions may comprise software object code, compiled from a language such as "C++".
  • program code may, for example, be compressed, encrypted, or both, and may include executable files, script files and wizards for installation, as in Zip files and cab files.
  • machine-readable instructions or code residing in or on signal-bearing media include all of the above means of delivery.

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Health & Medical Sciences (AREA)
  • Biomedical Technology (AREA)
  • General Health & Medical Sciences (AREA)
  • Studio Circuits (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)

Abstract

Selon cette invention, on peut mesurer (531) la temporisation relative entre des images et les informations associées (511, 513), telles que des données audio et vidéo. Des caractéristiques d'événements mutuels d'images sont reconnues dans les images et des caractéristiques d'événements mutuels associées (521, 523) sont reconnues dans les informations associées. Les événements mutuels d'images et les événements mutuels associés sont comparés (531) afin qu'on détermine leurs occurrences, l'un par rapport à l'autre, comme mesure de temporisation relative (541, 551). Cette invention concerne en particulier le fonctionnement avec des signaux audio et vidéo.
PCT/US2004/015302 2004-05-14 2004-05-14 Procede, systeme et programme permettant d'eliminer l'introduction d'erreurs par des commutateurs-melangeurs de production a effets video numeriques internes WO2005117413A1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
PCT/US2004/015302 WO2005117413A1 (fr) 2004-05-14 2004-05-14 Procede, systeme et programme permettant d'eliminer l'introduction d'erreurs par des commutateurs-melangeurs de production a effets video numeriques internes
AU2004326306A AU2004326306A1 (en) 2004-05-14 2004-05-14 Method, system, and program product for eliminating error contribution from production switchers with internal DVEs
EP04752335A EP1805983A4 (fr) 2004-05-14 2004-05-14 Procede, systeme et programme permettant d'eliminer l'introduction d'erreurs par des commutateurs-melangeurs de production a effets video numeriques internes
CA002562091A CA2562091A1 (fr) 2004-05-14 2004-05-14 Procede, systeme et programme permettant d'eliminer l'introduction d'erreurs par des commutateurs-melangeurs de production a effets video numeriques internes

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2004/015302 WO2005117413A1 (fr) 2004-05-14 2004-05-14 Procede, systeme et programme permettant d'eliminer l'introduction d'erreurs par des commutateurs-melangeurs de production a effets video numeriques internes

Publications (1)

Publication Number Publication Date
WO2005117413A1 true WO2005117413A1 (fr) 2005-12-08

Family

ID=35451262

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/015302 WO2005117413A1 (fr) 2004-05-14 2004-05-14 Procede, systeme et programme permettant d'eliminer l'introduction d'erreurs par des commutateurs-melangeurs de production a effets video numeriques internes

Country Status (4)

Country Link
EP (1) EP1805983A4 (fr)
AU (1) AU2004326306A1 (fr)
CA (1) CA2562091A1 (fr)
WO (1) WO2005117413A1 (fr)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6016166A (en) * 1998-08-31 2000-01-18 Lucent Technologies Inc. Method and apparatus for adaptive synchronization of digital video and audio playback in a multimedia playback system
US6262777B1 (en) * 1996-11-15 2001-07-17 Futuretel, Inc. Method and apparatus for synchronizing edited audiovisual files
US6480902B1 (en) * 1999-05-25 2002-11-12 Institute For Information Industry Intermedia synchronization system for communicating multimedia data in a computer network

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB9224622D0 (en) * 1992-11-24 1993-01-13 British Broadcasting Corp Synchronisation of audio and video signals
US5568205A (en) * 1993-07-26 1996-10-22 Telex Communications, Inc. Camera mounted wireless audio/video transmitter system
JPH114360A (ja) * 1997-06-12 1999-01-06 Nec Eng Ltd 放送番組制作システム

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6262777B1 (en) * 1996-11-15 2001-07-17 Futuretel, Inc. Method and apparatus for synchronizing edited audiovisual files
US6016166A (en) * 1998-08-31 2000-01-18 Lucent Technologies Inc. Method and apparatus for adaptive synchronization of digital video and audio playback in a multimedia playback system
US6480902B1 (en) * 1999-05-25 2002-11-12 Institute For Information Industry Intermedia synchronization system for communicating multimedia data in a computer network

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP1805983A4 *

Also Published As

Publication number Publication date
EP1805983A1 (fr) 2007-07-11
CA2562091A1 (fr) 2005-12-08
AU2004326306A8 (en) 2008-08-21
AU2004326306A1 (en) 2006-11-02
EP1805983A4 (fr) 2007-11-28

Similar Documents

Publication Publication Date Title
US7773152B2 (en) Method, system, and program product for eliminating error contribution from production switchers with internal DVEs
US8810659B2 (en) Delay and lip sync tracker
US6429902B1 (en) Method and apparatus for audio and video end-to-end synchronization
EP0624982B1 (fr) Dispositif et procédé pour comprimer des signaux vidéo, et dispositif de synchronisation
US6330033B1 (en) Pulse detector for ascertaining the processing delay of a signal
US20070085575A1 (en) Audio Synchronizer Control and Communications Method and Apparatus
KR100359782B1 (ko) 엠펙 디코더의 시스템 타임 클럭 조정 장치 및 방법
EP3160148A1 (fr) Procede de changement rapide de canal et dispositif correspondant
CA2356161A1 (fr) Methode et appareil de commande d'un egaliseur utilisant un signal de synchronisation dans un systeme a bande laterale residuelle numerique
US7039114B2 (en) Data separation and decoding device
US8330859B2 (en) Method, system, and program product for eliminating error contribution from production switchers with internal DVEs
JP4173998B2 (ja) ジッタ・キャンセルの方法および装置
WO2005117413A1 (fr) Procede, systeme et programme permettant d'eliminer l'introduction d'erreurs par des commutateurs-melangeurs de production a effets video numeriques internes
KR101086920B1 (ko) 트릭 모드 동작에 대한 불연속 지시자 이용
US10694240B2 (en) Method for decoding an audio/video stream and corresponding device
EP1889488B1 (fr) Systeme de traitement audio-video
EP2571281A1 (fr) Appareil de traitement d'image et procédé de commande
US9219933B1 (en) Systems and methods for enabling functionality of a trigger mechanism based on log entries in a traffic log
KR102128463B1 (ko) 다채널 고해상도 영상 시스템
EP3306948A1 (fr) Procédé et système d'affichage du contenu d'une vidéo ou d'un signal de radiodiffusion pour un utilisateur et procédé et système de mémorisation d'estampilles temporelles dans une base de données
EP4142294A1 (fr) Procédé de substitution d'au moins une partie d'un flux vidéo et récepteur vidéo mettant en uvre le procédé
JP2638948B2 (ja) 動き検出回路
JP3458957B2 (ja) ビデオ信号処理装置
KR100189866B1 (ko) 방송방식에 따른 선택적 영상신호 처리회로
RU2324300C1 (ru) Устройство для управления синхронизацией телевизионного изображения

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 2004326306

Country of ref document: AU

WWE Wipo information: entry into national phase

Ref document number: 2562091

Country of ref document: CA

NENP Non-entry into the national phase

Ref country code: DE

WWW Wipo information: withdrawn in national office

Country of ref document: DE

WWE Wipo information: entry into national phase

Ref document number: 2004752335

Country of ref document: EP

WWP Wipo information: published in national office

Ref document number: 2004752335

Country of ref document: EP