WO2005104560A1 - Procede de traitement d'images decodees - Google Patents

Procede de traitement d'images decodees Download PDF

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Publication number
WO2005104560A1
WO2005104560A1 PCT/IB2005/051326 IB2005051326W WO2005104560A1 WO 2005104560 A1 WO2005104560 A1 WO 2005104560A1 IB 2005051326 W IB2005051326 W IB 2005051326W WO 2005104560 A1 WO2005104560 A1 WO 2005104560A1
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WO
WIPO (PCT)
Prior art keywords
data values
deliver
sampling
values
sampled
Prior art date
Application number
PCT/IB2005/051326
Other languages
English (en)
Inventor
Arnaud Bourge
Joël JUNG
Luis Escobar
Original Assignee
Koninklijke Philips Electronics N.V.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics N.V. filed Critical Koninklijke Philips Electronics N.V.
Publication of WO2005104560A1 publication Critical patent/WO2005104560A1/fr

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/50Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
    • H04N19/59Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving spatial sub-sampling or interpolation, e.g. alteration of picture size or resolution
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/423Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation characterised by memory arrangements
    • H04N19/426Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation characterised by memory arrangements using memory downsizing methods
    • H04N19/428Recompression, e.g. by spatial or temporal decimation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/44Decoders specially adapted therefor, e.g. video decoders which are asymmetric with respect to the encoder
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/60Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
    • H04N19/61Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/80Details of filtering operations specially adapted for video compression, e.g. for pixel interpolation

Definitions

  • the present invention relates to a method of and a device for processing decoded pictures having a predetermined resolution.
  • This invention may be used in, for example, video decoders, video encoders or portable apparatuses, such as personal digital assistants or mobile phones, said apparatuses being adapted to decode or to encode pictures.
  • Said embedded compression has originally been developed to decrease the memory size at the expense of a quality decrease, due to lossy compression of the reference frame(s).
  • An example of embedded compression is described in "Low-power H.264 video decoder with graceful degradation", by A.Bourge and J.Jung, Proc. Of VCIP, Electronic
  • Said decoding device comprises: a variable length decoding block VLD suitable for decoding an encoded input data stream BS and for delivering decoded data, on the one hand, and decoded motion vectors MV to an image memory, on the other hand, an inverse quantizing block IQ suitable for producing quantized data from the decoded data, an inverse frequency transform block IT, for example in inverse discrete cosine transform block IDCT, for producing inversely transformed data representing a residual error e from the quantized data.
  • the decoding device further includes an adder for adding motion-compensated data to the residual error, data-block-by-data block.
  • the motion-compensated data are produced by a modified motion compensation unit MMC comprising in series an embedded compression unit eENC, an image memory MEM, an embedded decompression unit eDEC and a motion compensation unit MC.
  • the output of the adder is a data block of the decoded output image OF which is then delivered to a display (not represented) and which is also delivered to the embedded decompression unit eDEC.
  • the decoding device optionally comprises a deblocking filter FIL, said filter being for example the one proposed in the H.264 standard.
  • the embedded compression unit eENC comprises, for example, a transform block, a quantization block, a variable-length coding block and a buffer in series.
  • the embedded decompression unit comprises, for example, a variable-length decoding block, an inverse quantization block and an inverse transform block blocks in series.
  • the method in accordance with the invention is characterized in that it comprises the steps of: down-sampling data values of the decoded pictures for delivering down-sampled data values; encoding the down-sampled data values for delivering compressed data values; - storing the compressed data values; decoding the stored compressed data values for delivering uncompressed data values; and up-sampling the uncompressed data values for delivering up-sampled data values at the predetermined resolution.
  • the visual quality resulting from a combination of an encoding step at a first compression factor with a down-sampling step at a given down-scaling factor is better than the visual quality resulting from an encoding step at a second compression factor equal to the multiplication of the first compression factor by the down-scaling factor.
  • the step of down-sampling is adapted to down-sample the data values of the decoded pictures in a horizontal direction.
  • the present invention also relates to a processing device implementing such a processing method.
  • a video decoder comprising a decoding unit for providing a residual error, said processing device in series with a motion compensation unit adapted to deliver motion compensated data values, and an adder for adding the residual error to the motion compensated data values, the output of said adder being provided to the input of the processing device.
  • a video encoder for encoding input data values, said encoder comprising an encoding unit for providing encoded data values, a partial decoding unit for providing partially decoded data values, the processing device in series with a motion compensation unit adapted to deliver motion compensated data values, an adder for adding the motion compensated data values to the partially decoded data values, the output of said adder being provided to the input of the processing device, and a subtracter for subtracting the motion compensated data values from the input data values.
  • the invention also relates to a portable apparatus comprising the processing device.
  • Said invention finally relates to a computer program product comprising program instructions for implementing said processing method.
  • Figure 1 shows a decoding device in accordance with the prior art
  • Figure 2 shows a block diagram of an embodiment of a decoding device in accordance with the invention
  • Figures 3 A and 3B show the results of a combination of an embedded compression and an embedded resizing, and of an embedded compression alone, respectively, for a same compression factor
  • Figure 4 shows a block diagram of an embodiment of an encoding device in accordance with the invention.
  • the present invention relates to a method of processing decoded data values included in a sequence of pictures. These data values are, for example, the luminance or the chrominance of pixels. Said processing method can be applied to a video decoder or to a video encoder.
  • the present invention can be applied to any video encoding or decoding device where sequences have to be stored in a memory. It is particularly interesting for reducing the size of the reference image memory while keeping a sufficient overall image quality of the decoded output image.
  • a conventional video decoder for example MPEG-2, MPEG-4, H.264, or the like.
  • a decoded frame generally needs to be stored in the memory so that it can be later retrieved to predict the next frame(s) through motion compensation.
  • Figure 2 shows a block diagram of an example of a decoding device according to the invention.
  • Said decoding device comprises: a variable length decoding block VLD suitable for decoding an encoded input data stream BS and for delivering decoded data, on the one hand, and decoded motion vectors MV to an image memory, on the other hand, - an inverse quantizing block IQ suitable for producing quantized data from the decoded data, an inverse frequency transform block IT, for example in inverse discrete cosine transform IDCT, for producing inversely transformed data representing a residual error e from the quantized data.
  • the decoding device further includes an adder for adding motion-compensated data to the residual error, data-block-by-data block, in order to deliver the output frame OF.
  • the motion-compensated data are produced by a modified motion compensation unit MMC comprising in series a down-sampling unit DSF, an embedded compression unit eENC as described in the prior art, an image memory MEM, an embedded decompression unit eDEC, an up-sampling unit USF and a motion compensation unit MC so as to reconstruct the reference frames data-block-by-data block.
  • the embedded compression unit eENC comprises a transform block, a quantization block, a variable-length coding block and a buffer in series. It further comprises a regulation unit connected between the buffer and the quantization block so as to achieve a given compression ratio.
  • the embedded decompression unit comprises a variable- length decoding block, an inverse quantization block and an inverse transform block in series. It will be apparent to a person skilled in the art that the embedded compression and decompression can be realized using other means than quantizing and variable length coding means. It can be, for example, based on bit plane coding, as described by R.J. van der
  • the best trade-off between visual quality and computational complexity is, for down-sampling, the use of a 7-tap FIR (for Finite Impulse Response) filter with the following weights: (-1/32, 0, 9/32, 16/32, 9/32, 0, - 1/32); and for up-sampling, the use of a 6-tap FIR filter with the following weights: (1/32, - 5/32, 5/8, 5/8, -5/32, 1/32), said filters being the ones used for sub-pixel motion compensation in H.264 standard, as described in ITU-T Rec. H.264 / ISO/IEC 11496-10, "Advanced Video Coding", Final Committee Draft, Document JVTF 100, December 2002.
  • a 7-tap FIR for Finite Impulse Response
  • the output of the adder is a decoded data block of the decoded output image OF which is then delivered to a display (not represented) and which is also delivered to the down-sampling unit DSF.
  • the decoding device optionally comprises a deblocking filter FIL, said filter being for example the one proposed in the H.264 standard.
  • the size of the reference frame memory is then reduced by using a combination of the so-called embedded compression, and the so-called embedded resizing, said embedded resizing comprising the down-sampling and up-sampling, as described before.
  • the complexity is reduced, thanks to the down-scaling.
  • the reference frames are only down-sampled and up-sampled horizontally by a factor of 2.
  • the image size is reduced by half. Therefore, the complexity of the embedded compression technique used is also reduced by half.
  • the horizontal direction is preferred to the vertical direction, as the extraction from the memory is facilitated.
  • the down-sampling method can be applied in the horizontal direction and in the vertical direction.
  • the down-sampling factor can also be different from 2.
  • the visual quality resulting from a combination of the embedded compression at a compression factor of 3 with an horizontal down-sampling is better than the visual quality resulting from the embedded compression at a compression factor of 6.
  • Figure 3 A shows the result of a combination of an embedded compression with a compression factor of 3 with an embedded resizing in the horizontal direction (down-scaling factor of 2)
  • Figure 3B shows the result of an embedded compression with a compression factor of 6.
  • Figure 4 shows an example of a video encoding device.
  • Such an encoding device comprises a direct frequency transform block T, for example a direct discrete cosine transform DCT, suitable for transforming input video data IN into transformed data; a quantizing block Q suitable for producing quantized data from the transformed data; and a variable length coding block VLC suitable for producing coded data ES from the quantized data.
  • It also comprises a prediction circuit comprising in series an inverse quantizing block IQ; an inverse frequency transform block IT, for example an inverse discrete cosine transform block IDCT; an adder for adding the data block coming from the inverse transform block IDCT and from a motion compensation unit MC; the down-sampling unit DSF in accordance with the invention; an image memory MEM suitable for storing the images used by the motion compensation unit MC and the motion vectors resulting from a motion estimation unit ME; an up-sampling unit USF; and a subtracter suitable for subtracting the data coming from the motion compensation unit MC from the input video data IN, the result of this subtracter being delivered to the transform block DCT.
  • a prediction circuit comprising in series an inverse quantizing block IQ; an inverse frequency transform block IT, for example an inverse discrete cosine transform block IDCT; an adder for adding the data block coming from the inverse transform block IDCT and from a motion compensation unit MC; the down-sampling unit DSF in accordance with the
  • the proposed invention can be applied to any video encoding or decoding device where accesses to an external memory represent a bottleneck, either because of limited bandwidth or because of high power consumption. The latter reason is especially crucial in mobile devices, where extended battery lifetime is a key feature.
  • the proposed encoder or decoder is suitable in situations requiring a large amount of memory resources, and/or power savings while video quality can be degraded.
  • the mobile device may comprise a switch that starts using embedded compression techniques with a compression factor of 3 when battery is full, and then switch to the proposed invention when battery gets flat, which would be a practical case of power scalability.

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)

Abstract

Cette invention se rapporte à un procédé et à un dispositif servant à traiter des images décodées ayant une résolution prédéterminée. Ce dispositif comprend un filtre (DSF) destiné à sous-échantillonner des valeurs de données des images décodées, afin de produire des valeurs de données sous échantillonnées ; une unité de compression incorporée (eENC) destinée à coder les valeurs sous-échantillonnées, afin de produire des valeurs de données comprimées ; une mémoire (MEM) destinée à stocker les valeurs de données comprimées ; une unité de décompression incorporée (eDEC) destinée à décoder les valeurs comprimées stockées, afin de produire des valeurs de données non comprimées ; et un filtre (USF) destiné à sur-échantillonner les valeurs de données non comprimées, afin de produire des valeurs de données sur-échantillonnées à la résolution prédéterminée.
PCT/IB2005/051326 2004-04-27 2005-04-22 Procede de traitement d'images decodees WO2005104560A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP04300233 2004-04-27
EP04300233.6 2004-04-27

Publications (1)

Publication Number Publication Date
WO2005104560A1 true WO2005104560A1 (fr) 2005-11-03

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2100449A4 (fr) * 2006-11-30 2015-02-25 Lsi Corp Codec h264/mpeg-4 avc à mémoire réduite

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0814615A2 (fr) * 1996-06-19 1997-12-29 Thomson Consumer Electronics, Inc. Décodeur MPEG multimode
EP0817498A1 (fr) * 1996-06-28 1998-01-07 STMicroelectronics S.r.l. Décodage MPEG-2 avec besoin réduit en RAM pour recompression MICDA avant mémorisation de données MPEG-2 décomprimées optionnellement après un algorithme de sous-échantillonnage
WO1998027737A1 (fr) * 1996-12-18 1998-06-25 Thomson Consumer Electronics, Inc. Formatage de donnees recomprimees dans un decodeur mpeg
WO1999027715A1 (fr) * 1997-11-21 1999-06-03 Sharp Laboratories Of America, Inc. Procede et appareil pour comprimer des trames de reference dans un codec video inter-trames

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0814615A2 (fr) * 1996-06-19 1997-12-29 Thomson Consumer Electronics, Inc. Décodeur MPEG multimode
EP0817498A1 (fr) * 1996-06-28 1998-01-07 STMicroelectronics S.r.l. Décodage MPEG-2 avec besoin réduit en RAM pour recompression MICDA avant mémorisation de données MPEG-2 décomprimées optionnellement après un algorithme de sous-échantillonnage
WO1998027737A1 (fr) * 1996-12-18 1998-06-25 Thomson Consumer Electronics, Inc. Formatage de donnees recomprimees dans un decodeur mpeg
WO1999027715A1 (fr) * 1997-11-21 1999-06-03 Sharp Laboratories Of America, Inc. Procede et appareil pour comprimer des trames de reference dans un codec video inter-trames

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
BOURGE A ET AL: "Low-power H.264 video decoder with graceful degradation", PROCEEDINGS OF THE VISUAL COMMUNICATIONS AND IMAGE PROCESSING CONFERENCE 2004 (VCIP 2004) , SAN JOSE, CA, USA, 20-22 JANUARY 2004, vol. 5308, no. 1, January 2004 (2004-01-01), SPIE, THE INTERNATIONAL SOCIETY FOR OPTICAL ENGINEERING USA, pages 372 - 383, XP002334017, ISSN: 0277-786X *
CROCHIERE R E ET AL: "INTERPOLATION AND DECIMATION OF DIGITAL SIGNALS - A TUTORIAL REVIEW", PROCEEDINGS OF THE IEEE, IEEE. NEW YORK, US, vol. 69, no. 3, 1 March 1981 (1981-03-01), pages 300 - 331, XP000615159, ISSN: 0018-9219 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2100449A4 (fr) * 2006-11-30 2015-02-25 Lsi Corp Codec h264/mpeg-4 avc à mémoire réduite

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