WO2005069631A1 - Procede et appareil de traitement de signaux presentant une transmission a debit de symboles variable - Google Patents

Procede et appareil de traitement de signaux presentant une transmission a debit de symboles variable Download PDF

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Publication number
WO2005069631A1
WO2005069631A1 PCT/US2004/000101 US2004000101W WO2005069631A1 WO 2005069631 A1 WO2005069631 A1 WO 2005069631A1 US 2004000101 W US2004000101 W US 2004000101W WO 2005069631 A1 WO2005069631 A1 WO 2005069631A1
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WO
WIPO (PCT)
Prior art keywords
mpg
symbol rate
rate information
ptcs
ptc
Prior art date
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PCT/US2004/000101
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English (en)
Inventor
Joshua Koslov
Kumar Ramaswamy
Original Assignee
Thomson Licensing S.A.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Thomson Licensing S.A. filed Critical Thomson Licensing S.A.
Priority to PCT/US2004/000101 priority Critical patent/WO2005069631A1/fr
Publication of WO2005069631A1 publication Critical patent/WO2005069631A1/fr

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/434Disassembling of a multiplex stream, e.g. demultiplexing audio and video streams, extraction of additional data from a video stream; Remultiplexing of multiplex streams; Extraction or processing of SI; Disassembling of packetised elementary stream
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H60/00Arrangements for broadcast applications with a direct linking to broadcast information or broadcast space-time; Broadcast-related systems
    • H04H60/68Systems specially adapted for using specific information, e.g. geographical or meteorological information
    • H04H60/72Systems specially adapted for using specific information, e.g. geographical or meteorological information using electronic programme guides [EPG]
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/434Disassembling of a multiplex stream, e.g. demultiplexing audio and video streams, extraction of additional data from a video stream; Remultiplexing of multiplex streams; Extraction or processing of SI; Disassembling of packetised elementary stream
    • H04N21/4345Extraction or processing of SI, e.g. extracting service information from an MPEG stream
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/438Interfacing the downstream path of the transmission network originating from a server, e.g. retrieving encoded video stream packets from an IP network

Definitions

  • the present invention generally relates to communications systems and, more particularly, to multi-media communications systems.
  • a transmitting ground station transmits at least one data-bearing signal to a satellite, which re-transmits, or broadcasts the data-bearing signal to one or more receiving ground stations.
  • the data-bearing signal conveys video, audio and/or data (e.g., programs and/or files).
  • the data- bearing signal is in the form of a packetized data stream and conforms to a known standard such as the Moving Picture Expert Group (MPEG)-2 Systems Standard (ISO/IEC 13818-1) ("MPEG standard").
  • the packetized data streams are distributed via a number of "physical transmission channels" (PTC), each PTC having a center frequency (carrier frequency) and bandwidth and each PTC conveying content (video, audio and/or data) for a number of the program channels, the content in packet form.
  • PTC physical transmission channels
  • the packetized data streams may be distributed over thirty-three PTCs (PTC(0) through PTC(32)) over a satellite link, each PTC having a center frequency in the range of 11.2-11.7 Gigahertz(GHz) and a bandwidth of 24 MHz, and each PTC including content from as many as six program channels.
  • each PTC includes a copy of a "Master Program Guide" (MPG) that includes a channel map associating particular programs (audio, video and/or data) with their respective PTCs, program channels and packet identifiers (PIDs), which are used to identify the particular packets associated with content corresponding to a particular program.
  • MPG Master Program Guide
  • PIDs packet identifiers
  • variable broadcast encoding formats are also used in wireless terrestrial video broadcast systems to selectively provide enhanced levels of broadcast signal noise immunity for the data-bearing signal.
  • U.S. Patent Nos. 5,946,045, 5,946,052 and 6,366,326 describe an MPG that includes information relating to modulation format and coding format for the data-bearing signal.
  • a Master Program Guide includes symbol rate information.
  • a receiver receives a multi-media signal conveying therein a number of physical transmission channels (PTCs) and a master program guide (MPG) that includes symbol rate information associated with each one of the number of PTCs. The receiver recovers the MPG and uses the symbol rate information conveyed therein to appropriately set timing recovery circuitry of the receiver for a selected PTC.
  • a transmitter forms a master program guide (MPG) that includes symbol rate information associated with each one of a number of physical transmission channels (PTCs).
  • a computer-readable medium has stored therein data representing a master program guide, the data comprising at least one data segment associated with a physical transmission channel and at least one data segment associated with symbol rate information for the physical transmission channel.
  • multi-media content is embodied in a data-bearing signal comprising at least one carrier wave, the multi-media content comprising a plurality of packets for conveying content for at least one of a plurality of programs, the content representing at least one of video and audio; and at least one packet for conveying a master program guide that includes symbol rate information with respect to at least one of the plurality of programs.
  • FIG. 1 shows an illustrative satellite communications system embodying the principles of the invention
  • FIG. 2 shows an illustrative block diagram of a transmitter embodying the principles of the invention
  • FIG. 3 shows an illustrative flow chart in accordance with the principles of the invention for " use in the transmitter of FIG. 2;
  • FIG. 4 shows a portion of an illustrative multi-media signal format
  • FIG. 5 shows an illustrative block diagram of a receiver embodying the principles of the invention
  • FIGs. 6, 7 and 8 show illustrative flow charts in accordance with the principles of the invention for use in the receiver of FIG. 5;
  • FIG. 9 shows an illustrative block diagram of a demodulator embodying the principles of the invention.
  • FIG. 10 shows an illustrative block diagram of timing recovery element 240 of
  • FIG. 5 is a diagrammatic representation of FIG. 5.
  • satellite transponders such as the above-mentioned Moving Picture Expert Group (MPEG)-2 Systems Standard (ISO/IEC 13818-1)
  • MPEG Moving Picture Expert Group
  • ISO/IEC 13818-1 Moving Picture Expert Group
  • decoding methods such as log-likelihood ratios, soft-input-soft-output (SISO) decoders, Viterbi decoders are well-known and not described herein.
  • FIG. 1 An illustrative communications system 50 in accordance with the principles of the invention is shown in FIG. 1.
  • Communications system 50 includes transmitter 5, transmitting antenna 10, satellite 15, receiving antenna 20, receiver 30 and television (TV) 35.
  • Transmitter 5 receives a number of data streams as represented by signals 4-1 through 4- K and, in accordance with the principles of the invention, provides a modulated signal 6 to transmitting antenna 10.
  • each of these data streams represent control signaling, content (e.g., video), etc., for a physical transmission channel (PTC) of a satellite TV system.
  • PTC physical transmission channel
  • each PTC has an associated bandwidth and carrier frequency.
  • the modulated signal 6 represents a number of data-bearing carrier signals, each associated with a respective PTC. It should be noted that the term "multi-media signal” is used herein to refer not only to modulated signal 6 but also to each of the component parts of modulated signal 6.
  • Transmitting antenna 10 (representative of a ground transmitting station) provides modulated signal 6 as uplink signal 11 to satellite 15. It is also possible that PTCs may be uplinked from multiple ground stations to a single satellite. The latter typically includes a number of transponders (one for each PTC) and provides for retransmission of the received uplink signal via downlink signal 16 to a broadcast area. This broadcast area typically covers a predefined geographical region, e.g., a portion of the continental United States as represented by receiving antenna 20 (representative of a receiving ground station).
  • Downlink signal 16 is received by receiving antenna 20, which provides a received signal 29 to receiver 30, which demodulates and decodes received signal 29 in accordance with the principles of the invention to provide, e.g., content to TV 35, via signal 31, for viewing thereon. It should be noted that TV 35 is also representative of a multi-media endpoint.
  • Transmitter 5 comprises a number of transmitters: 55-1 through 55-K, a memory 60 and a processor 65.
  • the latter is representative of one or more microprocessors and/or digital signal processors (DSPs) and may include additional memory (not shown) for executing programs and storing data.
  • DSPs digital signal processors
  • memory 60 is representative of memory in transmitter 5 and includes, e.g., any memory of processor 65 and or transmitters 55-1 through 55-K.
  • FIG. 3 shows an illustrative flowchart in accordance with the principles of the invention for use in transmitter 5.
  • processor 65 receives data related to each of the PTCs, PTC(0) through PTC(K-l), where K > 0, via signal 64, and forms a "Master Program Guide” (MPG or G) 3 for storage in memory 60.
  • MPG Master Program Guide
  • processor 65 forms the MPG as known in the art (and, as such, is not described herein).
  • the MPG includes data, or information, for each of the PTCs as illustrated by the MPG data associated with PTC (K-l).
  • the data associated with each PTC includes modulation format, coding format and data related to each of the N programs channels that are a part of a particular PTC (e.g., program data and PID data). It should be noted that the value of N may be different for each PTC.
  • processor 65 adds symbol rate information for each PTC to the MPG as indicated in FIG. 2 by dashed arrow 1.
  • the symbol rate information associated with each PTC is assumed to be predefined and available for use by processor 65.
  • the symbol rate associated with a particular PTC may be the same as the symbol rate for one or more of the other PTCs.
  • the MPG can be formed in other ways, e.g., data representing an MPG can be received by processor 65, which then adds the symbol rate data to the received MPG to yield a new MPG — one with the PTC symbol rate information in accordance with the inventive concept.
  • processor 65 provides MPG 3 to each of the transmitters 55-1 through 55-K, via signal 2.
  • Each transmitter also receives a data stream associated with one of the PTCs and provides therefrom a multi -media signal for transmission that includes MPG 3.
  • transmitter 55-1 receives MPG 3 and a data stream 4-1 associated with PTC(0). Transmitter 55-1 then forms a multi-media signal 6-1 representative of PTC(0) at the appropriate carrier frequency, where, and in accordance with the principles of the invention, multi-media signal 6-1 includes MPG 3 with the symbol rate information.
  • a multi-media signal includes a stream of packets 70.
  • the stream of packets includes at least one content (C) packet 80 and at least one MPG (G) packet 90.
  • Each content packet 80 comprises a packet identifier (PID) and content (video, audio and/or data).
  • G packet 90 includes MPG 3 with symbol rate information associated with at least one PTC as indicated by dashed arrow 1.
  • FIG. 5 Receiver 30 includes front-end filter 205, analog-to-digital (A/D) converter 210, demodulator 290, forward error correction (FEC) decoder 295, transport processor 250, controller 255 and memory 260.
  • A/D analog-to-digital
  • FEC forward error correction
  • Both transport processor 250 and controller 255 are each representative of one or more microprocessors and/or digital signal processors (DSPs) and may include memory for executing programs and storing data.
  • memory 260 is representative of memory in receiver 30 and includes, e.g., any memory of transport processor 250 and/or controller 255.
  • An illustrative bidirectional data and control bus 201 couples various ones of the elements of FIG. 5 together as shown.
  • Bus 201 is merely representative, e.g., individual signals (in a parallel and/or serial form) may be used, etc., for conveying data and control signaling between the elements of FIG. 5.
  • Front end filter 205 down-converts and filters received signal 29 to provide a near base-band signal to A/D converter 210, which samples the down converted signal to convert the signal to the digital domain and provide a sequence of samples 211 to demodulator 290.
  • the latter performs demodulation of signal 211 and provides a demodulated signal 291, e.g., a sequence of signal points, to FEC decoder 295.
  • the latter examines the inphase (I) and quadrature (Q) components of each of the signal points of demodulated signal 291 at the symbol rate, 1/T, and decodes the signal into a probable set of transmitted bits as represented by decoded signal 296.
  • Decoded signal 296 is provided to transport processor 250, which distributes video, audio and data bits as represented by content signal 251 to appropriate subsequent circuitry (not shown).
  • receiver 30 may additionally process the content before application to TV set 35 and/or directly provide the content to TV set 35, via signal 31. It should be noted that receiver 30 may receive commands, e.g., program selection, via a remote control (not shown).
  • FIG. 6 shows an illustrative flow chart for a synchronization (sync) procedure for use in receiver 30.
  • This procedure is performed any time receiver 30 must attempt to lock to a particular, or selected, PTC without the benefit of the MPG PTC-specific information in accordance with the principles of the invention.
  • this sync procedures may be performed when receiver 30 is first turned on, i.e., during "power-up.”
  • steps 405, 410 and 435 are performed by controller 255 to acquire timing.
  • controller 255 searches for a symbol rate in the selected PTC.
  • controller 255 uses a variable, ⁇ aud, to denote one of a number of possible symbol rates for received signal 29. The number of possible symbol rates is known a priori to controller 255.
  • the variable, fbaud is set by controller 255 to an initial value, e.g., the first possible symbol rate, in step 405, and applied to demodulator 290 via bus 201.
  • controller 255 checks demodulator 290, via bus 201, to see whether timing is locked. If timing is locked, controller 255 stores the value of ⁇ aud in memory 260 as the current symbol rate in step 415, and execution proceeds as described below. However, if timing is not locked, execution proceeds to step 435, where controller 255 checks ⁇ aud to determine if all possible symbol rate values have been checked. If all possible symbol rate values of ⁇ aud have been exhausted without locking, a system error is declared in step 450. However, if all possible symbol rate values of ⁇ aud have not been checked, ⁇ aud is set to the next possible symbol rate value in step 405 and controller 255 again attempts to acquire timing at the new ⁇ aud value.
  • controller 255 attempts to find a valid FEC mode in steps 420, 425 and 440. Controller 255 uses a variable, mode, to denote one of a number of possible FEC modes for received signal 29. The number of possible FEC modes is known a priori to receiver 30. These FEC modes include combinations of different modulation formats and coding formats. Illustrative modulation formats are, e.g., 16-QAM (Quadrature Amplitude Modulation), QPSK (Quadrature Phase
  • Hierarchical modulation indicates a power division multiplexing where a signal constellation — and, therefore, single symbol rate and carrier frequency — is used that can be viewed as a lower power modulation added to a higher power modulation; while layered modulation indicates a power division multiplexing where the lower power layer is not locked in carrier or symbol rate to the upper layer.
  • Illustrative coding formats are e.g., LDPC (Low Density Parity Check) codes with rate Vi or rate 2/3, etc.
  • the variable, mode is set by controller 255 to an initial value, e.g., the first possible FEC mode, in step 420 and applied to FEC decoder 295 via bus 201.
  • controller 255 checks FEC decoder 295, via bus 201, to see whether valid data is being recovered. If valid data is being recovered, i.e., the FEC mode is locked, controller 255 stores the value of mode in memory 260 along with a value for a carrier offset value (car offset) (described below) as the current FEC mode and the current carrier offset, respectively, in step 430, and execution ends.
  • carrier offset value With respect to the carrier offset value, this value is provided to controller 255 from demodulator 290 via bus 201 once the FEC mode is locked.
  • the carrier recovery loop (described below) of demodulator 290 derives a carrier offset value representing the symbol point rotation induced by the frequency error between the transmitted and derived carrier frequency of the selected PTC.
  • the derived carrier offset value is used by the carrier recovery loop of demodulator 290 to compensate for the symbol rotation induced by this frequency error. It is illustratively assumed herein that the carrier offset value does not significantly change between different PTCs. Consequently, once the carrier offset value is derived for one PTC, this value of car offset is stored by controller 255 and applied to the carrier recovery loop of demodulator 290 via bus 201 to expedite the re-tuning of receiver 30 to other PTCs.
  • controller 255 may periodically cause the value for car offset to be derived anew and updated.
  • receiver 30 may be configured to derive a carrier offset value specific to each PTC for use in carrier recovery loop compensation.
  • step 440 controller 255 checks mode to see whether all possible FEC mode values have been checked. If all possible FEC mode values of mode have been exhausted without locking, a system error is declared in step 450. However, if all possible FEC mode values of mode have not been checked, mode is set to the next possible FEC mode value in step 420 and receiver 30 again attempts to acquire the FEC mode at the new mode value.
  • timing acquisition is one of the most time consuming processes in a digital demodulator, due to the extremely low loop bandwidths used. Typically, many milliseconds may be taken up by this process.
  • the receiver will have to test many symbol rates by, e.g., looking for energy in a band-edge timing recovery circuit. Since each test may occupy many milliseconds, the entire timing acquisition process in the receiver may take on the order of seconds.
  • transport processor 250 recovers from decoded signal 296 an MPG including symbol rate information as illustrated in the flow chart of FIG. 7.
  • transport processor 250 initializes a PTC counter (not shown) to a value of 0.
  • transport processor 250 acquires the PTC (identified by the value of the PTC counter) from decoded signal 296.
  • transport processor 250 tunes front end filter 205 (control signaling not shown) to the respective frequency channel and causes controller 255 to execute steps 405, etc., of the sync procedure of FIG. 6.
  • transport processor 250 searches the acquired PTC for the presence of an MPG. If an MPG is found, transport processor 250 decodes the acquired MPG in step 315. In step 320, transport processor checks if the MPG is valid (e.g., error free). If the MPG is valid, transport processor stores (e.g., in memory 260) the acquired MPG in step 325 and exits.
  • PTC-specific data includes modulation formation, coding format and, in accordance with the principles of the invention, the symbol rate for the acquired PTC.
  • transport processor 250 increments the PTC counter in step 330.
  • transport processor 250 checks if all of the PTCs have been searched for an MPG (e.g., is the value of the PTC counter greater than (K-l)). If all of the PTCs are exhausted without finding a valid MPG, a system error is declared in step 350. However, if all of the PTCs have not yet been checked, transport processor 250 moves to the next PTC identified by the value of the
  • step 305 e.g., the above-described sync procedure is performed to lock up the next PTC (e.g., front end filter 205 is tuned to the respective frequency channel and controller 255 executes step 405 of FIG. 6, etc.).
  • step 305 e.g., the above-described sync procedure is performed to lock up the next PTC (e.g., front end filter 205 is tuned to the respective frequency channel and controller 255 executes step 405 of FIG. 6, etc.).
  • step 460 transport processor 250 selects a particular PTC.
  • transport processor 250 retrieves the MPG PTC-specific data from memory 260 for the selected PTC.
  • transport processor 250 sets controller 255 to the PTC-specific symbol rate ( ⁇ aud); and in step 475, transport processor 250 sets controller 255 to the PTC specific FEC mode (mode).
  • controller 255 applies, in accordance with the principles of the invention, the PTC-specific symbol rate ( ⁇ aud) to demodulator 290 via bus 201 as represented by dashed arrow 256.
  • controller 255 also applies, via bus 201, the PTC- specific FEC mode (mode) to FEC decoder 295 and the current value of car offset to demodulator 290.
  • mode PTC-specific FEC mode
  • Demodulator 290 comprises antialiasing filter 215, digital resampler 220, equalizer 225, derotator 230, timing recovery element 235 and carrier recovery element 240.
  • antialiasing filter 215. The sequence of samples 211 of received signal 29 is applied to antialiasing filter 215.
  • the latter is a low pass filter for filtering the sequence of samples 211 so at to avoid any aliasing caused by digital resampler 220 and provides a filtered signal 216.
  • digital resampler 220 typically performs a down sampling.
  • the bandwidth represented is 22.5 MHz (the Nyquist criterion). If the sampled signal from the A/D converter is then subsampled to 32 MSPS by digital resampler 220, only 16 MHz can be represented. Hence, any frequency content between 16 and 22.5 MHz will be aliased, unless the signal is first low-pass filtered to eliminate any content above 16 MHz. As such, antialiasing filter 215 low pass filters the signal before application to the digital resampler.
  • the amount of low-pass filtering performed by antialiasing filter 215 is further controlled by the application of the symbol rate data ( ⁇ aud) to antialiasing filter 215 as represented by dashed arrow 256.
  • the purpose of digital resampler 220 is to resample (typically, downsample) the samples of filtered signal 216 to an integer multiple of the received symbol rate and provide a resampled signal 221.
  • the resampled signal 221 is applied to equalizer 225 and to timing recovery element 235 (described below).
  • the latter examines resampled signal 221 and provides a control signal 236 to digital resampler 220 to adjust the downsampling ratio of digital resampler 220.
  • Equalizer 225 compensates for linear channel distortions and provides equalized signal 226 to derotator 230.
  • Derotator 230 is used to bring the signal to baseband, so that the inphase (I) and quadrature (Q) components may be examined and applied to FEC decoder 295 for decoding. As such, derotator 230 derotates, i.e., removes the carrier from equalized signal 226 to provide demodulated signal 291.
  • Carrier recovery element 240 uses the signal point stream of demodulated signal 291 and the carrier offset value to recover therefrom carrier signal 241, which is applied to derotator 230.
  • Timing recovery element 235 includes timing error circuit 505 and digital phase lock loop (DPLL) 590. Resampled signal 221 is applied to timing error circuit 505, which provides a timing error signal 506 indicative of a timing offset.
  • timing error circuit 505 implements the well-known Gardner algorithm using two samples per symbol, or by applying a nonlinearity to the signal (band edge timing recovery) at four samples per symbol and phase locking the result to a fixed pattern of (0 1 0 -1 ).
  • Timing error signal 506 is applied to DPLL 590.
  • the latter is a second order digital phase lock loop and includes multipliers 510 and 515, integrator 530, combiner 520 and time accumulator 525.
  • the constants, Kl and K2 of multipliers 510 and 515 set the bandwidth and damping factor dynamics of the DPLL.
  • Timing accumulator 525 is fed by a proportional path (via multiplier 510) and an integrated path (via multiplier 515 and integrator 530).
  • Integrator 530 represents the "free-running" frequency of the timing recovery circuit. In other words, for no input signal, the timing error circuit will produce zero output, and the second-order accumulator will retain its contents.
  • timing recovery element 235 In order to have low sample-time jitter, the bandwidth of timing recovery element 235 is very low. Typically, the goal is to pull in very small timing offsets caused by tolerance of the A/D reference crystal (not shown). This is typically less than 100 parts per million.
  • DPLL 590 provides control signal 236 to digital resampler 220 for adjustment of the downsampling ratio.
  • integrator 530 is initialized to a symbol rate value as represented by dashed arrow 256. If the symbol rate is not known, integrator 530 has to be stepped many times until it is pulled in. However, and in accordance with the principles of the invention, the symbol rate information conveyed within the MPG can be used to advantageously initialize integrator 530 to accelerate the acquisition process considerably. It must also be observed that the initial symbol rate value can be set at the output of the summer
  • a computer-readable medium has stored therein data representing a master program guide, the data comprising at least one data segment associated with a physical transmission channel and at least one data segment associated with symbol rate information for the physical transmission channel.
  • a computer readable medium illustratively represents volatile memory, non-volatile memory, a hard disk, a floppy disk, compact disk (CD), etc.
  • transmitter 5 may transmit a multi-level signaling scheme such as hierarchical modulation or layered modulation where the corresponding receiver uses soft metrics for recovering data from one or more of the layers.
  • the timing recovery circuit illustrated in FIG. 10 is applicable to both a digital resampling as described herein, or to an analog approach wherein the output of the adder would be applied to the control input of a voltage-controlled crystal oscillator (VCXO).
  • VXO voltage-controlled crystal oscillator
  • transmitter 5 may be located further upstream in a distribution system away from transmitting antenna 10, etc.
  • receiver 30 may be located, e.g., at a head-end, which then retransmits the content to other nodes and/or receivers of a network.
  • transmitter 5 may be located further upstream in a distribution system away from transmitting antenna 10, etc.
  • receiver 30 may be located, e.g., at a head-end, which then retransmits the content to other nodes and/or receivers of a network.
  • an MPG in accordance with the principles of the invention may be formed by a processor located elsewhere and provided to transmitter 5 for transmission.
  • receiver 30 may be a part of TV 35. It is therefore to be understood that numerous modifications may be made to the illustrative embodiments and that other arrangements may be devised without departing from the spirit and scope of the present invention as defined by the appended claims.

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  • Signal Processing (AREA)
  • Multimedia (AREA)
  • Television Systems (AREA)

Abstract

L'invention concerne un guide de programme principal (MPG) comprenant des données de débit de symboles. En particulier, un émetteur forme un MPG comprenant des données de débit de symboles associées à chacune d'une pluralité de voies de transmission physique (PTC). L'émetteur forme en outre un signal multimédia de transmission comprenant la pluralité de PTC et le MPG. Un récepteur reçoit le signal multimédia transmis et récupère du MPG accompagnant le signal les données de débit de symboles appropriées pour régler des circuits de récupération de synchronisation du récepteur pour la PTC choisie.
PCT/US2004/000101 2004-01-02 2004-01-02 Procede et appareil de traitement de signaux presentant une transmission a debit de symboles variable WO2005069631A1 (fr)

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