WO2005050733A1

WO2005050733A1 - Wiring structure for high-frequency wave, method for forming wiring structure for high-frequency wave, and method for shaping high-frequency signal waveform

Info

Publication number: WO2005050733A1
Application number: PCT/JP2004/017001
Authority: WO
Inventors: Moritoshi Yasunaga; Ikuo Yoshihara
Original assignee: Japan Science And Technology Agency
Priority date: 2003-11-19
Filing date: 2004-11-16
Publication date: 2005-06-02
Also published as: JP4972270B2; JP2005150644A

Abstract

There is provided a new wiring structure for a substrate for a high-frequency wave on which a VLSI or the like is mounted. The wiring pattern constituting the transmission line via which a high-frequency signal is transmitted is composed of a plurality of segments S0 to S11 having different characteristic impedance depending on the shape difference. The respective characteristic impedance Z0 to Z11 of the segments are set so that a reflection wave reducing the waveform distortion of the signal transmitted via the transmission line is generated at the boundary between two adjacent segments.

Description

Specification

High-frequency wiring structure, method for forming high-frequency wiring structure, and method for shaping high-frequency signal waveform

Technical field

The present invention relates to a high-frequency wiring structure, a high-frequency mounting substrate using the high-frequency wiring structure, an integrated circuit and a high-frequency mounting substrate, a method of forming a high-frequency wiring structure, and a method of shaping a high-frequency signal waveform. is there.

Background art

[0002] Along with high-speed transmission of internal signals of a VLSI (ultra large scale integrated circuit), it is necessary to increase the speed (frequency) of a signal on a printed circuit board or a ceramic substrate (high-frequency mounting substrate) on which the VLSI is mounted. . Recently, the frequency of a signal propagating on a transmission line of a high-frequency mounting circuit board is going to increase from MHz to GHz. Due to such a high-speed driving, the electrical length (wavelength) of the high-frequency signal (frequency of 200 MHz or more) on the substrate is shorter than the average length of the wiring on the substrate. Must be designed as a transmission line. This point is described in Non-Patent Documents 1 and 2. When actually viewed as a transmission line, reflection noise is generated on the transmission line because there are various mismatched points of characteristic impedance on the wiring that becomes the transmission line. This causes waveform distortion in a signal propagating through the wiring. Waveform distortion significantly degrades signal quality, and especially when these distortions occur in the clock signal, which is the most important signal, often leads to malfunction of VLSI (very large scale integrated circuit). Therefore, it is necessary to keep the signal quality of the clock signal close to the ideal especially with little distortion. As the frequency increases, waveform distortion causes malfunctions not only in clock signals but also in signals transmitted on data buses and address buses.

[0003] FIG. 21 shows a problem of waveform distortion caused by impedance mismatch. The signal (digital signal) sent from the VLSI is transmitted through the wiring with the characteristic impedance Z,

0

Terminated by Here, when components such as VLSI and modules are connected to the wiring, these components can be equivalently regarded as a capacitive load C. These loads are uniform An impedance mismatching point on the wiring with characteristic impedance z

0

Radiation noise occurs. The reflected noise propagates while reflecting on the wiring, which is superimposed on the digital signal and causes large waveform distortion.

[0004] Conventionally, impedance matching of on-board wiring has been performed by a “load tracing method” (Non-Patent Document 3) or a “Stub Series Terminated Logic method” (Non-Patent Document 4) in which impedance is adjusted near an impedance mismatching point. ) Has been used.

[0005] As a conventional technique, a technique has been proposed in which an integrated circuit that generates a signal for canceling a reflected wave is added to a transmission line (Non-Patent Document 5).

Non-Patent Document 1: "High Speed Transmission Line Design in the Gigahertz Age" by Yuzo Usui, IEICE Technical Report F

TS2001-34, Vol. 101, No. 475, pp. 21-28, 2001

Non-Patent Document 2: Hirokazu Toya, "Wiring Design Method Considering Signals as Electromagnetic Waves, Suitable for High-Speed Z-Micro Process," IEICE Trans. (C), Vol. J85-C No. 3, PP. 117-124, Issued in 2002

Non-Patent Document 3: "High-speed Digital System Design Method" by Norihiko Ueno and Yoshie Nakamura, Nikkei Business Publications, 2001

Non-Patent Document 4: Masao TAGUCHI, "High-Speed, Small-Amplitude I / O Interlace Circuits for Memory Bus Applicatio IEICE Trans. Electronics, Vol.E77-C, No. 12, pp. 1944-1950, 1994 Non-Patent Document 5: "Equalization technology for high-speed inter-chip signal transmission", written by Yasushi Tamura, Kotaro Goto, Misato Saito, Makoto Hariko, Shigetoshi Wakayama, Junni Ogawa, Yoshiharu Kato, Masao Taro and Ken Imamura, Shinnobu, Academic Theory (C-II), Vol. J82-C-II No. 5, PP. 239-246, 1999 and Information Processing Vol. 40, No. 8, pp. 795-800, 1999

Disclosure of the invention

Problems to be solved by the invention

[0006] However, in the methods described in Non-Patent Documents 3 and 4 described above, the impedance is locally matched, and when there are many mismatching points where it is difficult to completely eliminate the reflection, the reflected wave In some cases, the signals are superimposed on each other to cause large signal degradation. In the technology described in Non-Patent Document 5, it is necessary to prepare a special integrated circuit. [0007] Speeding up of signals is indispensable in the future, and the higher the speed, the more high frequency components with a short electrical length will increase. Therefore, waveform distortion due to impedance mismatching is further increased. Therefore, a new signal wiring structure that can achieve high signal quality and its design method (wiring structure forming method; waveform shaping method) are needed!

An object of the present invention is to provide a high-frequency wiring structure capable of reducing waveform distortion of a high-frequency signal, a high-frequency mounting substrate using the high-frequency wiring structure, an integrated circuit, a high-frequency mounting substrate, and a high-frequency wiring structure. And a method for shaping a high-frequency signal.

Another object of the present invention is to provide a new wiring structure for a high-frequency mounting board on which a VLSI or the like is mounted, and a design method thereof.

Means for solving the problem

[0010] The present invention proposes a transmission line structure, that is, a high-frequency wiring structure in which a wiring pattern is divided into a plurality of segments to adjust a global impedance and cancel a reflected wave, instead of a conventional local adjustment. I do. In this specification, this transmission line is divided into segments.

^ Hzs 达 Spins (STL: Segmental Transmission Line).

First, the present invention aims to improve a high-frequency wiring structure provided with a wiring pattern constituting a transmission line through which a high-frequency signal (a signal having a frequency of 200 MHz or more) is transmitted. In the present invention, the wiring pattern is constituted by a plurality of segments having different characteristic impedances due to different shapes. Then, the characteristic impedance of each of the plurality of segments is determined so that a reflected wave that reduces the waveform distortion of the signal propagating through the transmission line is generated at the boundary between two adjacent segments. The basic idea of the present invention is to reverse the idea of the conventional wiring design that prevents the generation of reflected waves, and to actively generate reflection at the boundary between two adjacent segments of the transmission line, Is to reduce the waveform distortion of the signal by superimposing them. In other words, the technical idea of the present invention is that the waveform of the signal propagating through the transmission line is shaped by superimposing the characteristic impedance of each of the plurality of segments with the reflection noise generated at the boundary between the segments. It must be determined as follows. In this way, the waveform distortion can be reduced more reliably than in the conventional technique only by the shape of the wiring pattern without preparing a special integrated circuit or the like. The high-frequency wiring structure of the present invention can of course be applied to a high-frequency mounting board provided on an insulating substrate, but the high-frequency wiring structure of the present invention can be applied to a wiring pattern inside an integrated circuit such as a microprocessor. Of course, it may be adopted. If the frequency of the signal is further increased, the problem of reflection naturally occurs even in a wiring pattern in an integrated circuit, but the present invention is also effective in an integrated circuit.

[0013] The present invention relates to a high-frequency device having a wiring pattern constituting a transmission line for transmitting a high-frequency signal of 200 MHz or more on a surface of an insulating substrate and mounting an integrated circuit electrically connected to the wiring pattern. When applied to a mounting board, the wiring pattern should consist of multiple segments with different characteristic impedances due to differences in shape, and the characteristic impedance of each of the multiple segments should be superimposed by the reflected noise generated by each segment. May be determined so that the waveform of the signal propagating through the transmission line is shaped.

Here, the characteristic impedance of the segment can be set to a predetermined value by changing at least one of the width, length, and thickness of the segment. In particular, when the characteristic impedance of a segment is set by changing the width of the segment while keeping the length of the segment constant, it is relatively easy to set the characteristic impedance.

The method of the present invention is a method for forming a high-frequency wiring structure having a wiring pattern constituting a transmission line through which a high-frequency signal is transmitted, by a plurality of segments having different characteristic impedances due to different shapes. In the method of the present invention, a reflected wave that reduces the waveform distortion of a signal propagating through a transmission line is generated at a boundary between two adjacent segments by using an optimization algorithm such as a genetic algorithm (a plurality of segments). The characteristic impedance of each segment is designed so that the waveform of the signal propagating through the transmission line is shaped by superimposing the reflected noise generated in each segment. As the optimization algorithm applicable in the present invention, other known appropriate optimization algorithms can be used in addition to the genetic algorithm.

[0016] Here, one of the optimization algorithms, a genetic algorithm or a genetic programming

Evolutionary calculations such as (Genetic Programming) are described in the following documents (1) and (2). Then, the techniques described in the following documents (1) and (2) are used for designing a single door. In recent years, many attempts have been reported in the framework of “evolved hardware” [see References (3), (4), and (5) below]. Among them, there have been several reports of applying GA and GP to circuit design [see References (6), (7), and (8) below]. However, these are attempts to determine the values of circuit components such as transistor and capacitance so as to optimize the gain of the circuit, and are not related to transmission line design. Also, Cheldavi et al. Use a genetic algorithm to determine the S-parameter of a transmission line. This is a study on estimating the S-parameter of a transmission line whose structure is already strong. ) See]. Therefore, the method using a conventionally known genetic algorithm has a different target structure from the transmission line divided into segments proposed in the present invention, and also has a different purpose and method.

Reference (1): D. E. Goldberg's "Genetic Algorithms in Search Optimization" Machine Learning, Addison—Wesley, 1989

Reference (2): John R. Koza ^ © "Genetic Programming" On the Programming of Computers by means of Natural Selection, MIT Press, 1 992

Reference (3): "Evolutionary Hardware" Information Processing by Tetsuya Higuchi, Vol. 40, No. 8, pp. 7 95-800, 1999

Reference (4): "Evolving Hardware", written by Hitoshi Henmi and Takashi Gomi, IEICE Transactions on Electronics, Vol. J84-C, No. 7, pp. 543-551, 2001

Reference (5): "Special Issue on from Biology to Hardware and Bac" by Moshe Sipper and Daniel Mange, Eds, IEEE Trans. Evolutionary Computation, Vol. 3, No. 3, pp. 165-250.

Reference (6): "Automatic Synthesis, Placement, and Routing of an Amplifier Circuit by Means of Genetic Programming" by Forrest H. Bennett III, and John R. Koza, Jessen Yu and Will iam Mydlo wee, "Proc. Int '1 Conf. . Evolvable Systems 2000 (ICES2000), pp. 1-10, Edinburgh, 2000

Reference (7): '' A Note on Designing Logical 'by Giovani Gomez Estrada Circuits Using SAT "Proc. Int'l Conf. Evolvable Systems 2003 (1 CES2003), pp. 410-421, Trondheim, 2003

Reference (8): Thomas Beielstein, Jan Dienstuhl, Christian Feist and Marc Pomp 1, "Circuit Design Using Evolutionary Algorithms" Proc. Congress on Evolutionary Computation 2003 (CEC2003), CD-ROM, Honolulu, 2003

Reference (9): Ahmad CHELDAVI and Gholamali REZAI— "Modeling of Nonuniform Coppled Transmission Lines Interconnect Using Genetic Algorithm" by RAD IEICE Trans. Fundamentals,

Vol. E83-A, No. 10, pp. 2023-2034, 2000

The present invention can also be specified as a method of shaping the waveform of a high-frequency signal by changing a high-frequency wiring structure including a wiring pattern forming a transmission line through which a high-frequency signal is transmitted. Even in this case, the wiring pattern is composed of a plurality of segments having different characteristic impedances due to the difference in shape, and the characteristic impedance of each of the plurality of segments is propagated through the transmission line by superimposing the reflection noise generated in each segment. The waveform of the high-frequency signal is determined to be shaped. Then, the shape of the plurality of segments may be designed using the aforementioned genetic algorithm.

Brief Description of Drawings

FIG. 1 is a circuit diagram showing the concept of a segmented transmission line.

FIG. 2 is a diagram showing mapping of characteristic impedance and resistance of the segmented transmission line of FIG. 1 onto a chromosome.

FIG. 3 is a diagram showing an example of a segmented transmission line.

FIG. 4 is a diagram showing a configuration of a segmented transmission line design support system.

FIG. 5 is a diagram showing fitness values based on a difference between a waveform to be shaped and an ideal waveform.

FIG. 6 is a diagram showing a configuration of a memory module connected to clock wiring on a printed circuit board.

FIG. 7 is a diagram showing the circuit of FIG. 6.

FIG. 8 is a view showing an observed waveform in a basic matching wiring system at an observation point P1. FIG. 9 is a view showing an observed waveform in a basic matching wiring system at an observation point P2.

FIG. 10 is a diagram showing an observation waveform at an observation point P1 in the segment division transmission system.

FIG. 11 is a diagram showing an observed waveform at an observation point P2 in the segment split transmission system.

FIG. 12 is a diagram showing an observed waveform at observation point 1 in a load trace system (conventional method).

FIG. 13 is a diagram showing an observed waveform at observation point 2 in a load trace system (conventional method).

FIG. 14 is a diagram used to explain a conventional impedance matching method (load trace method).

FIG. 15 is a diagram for explaining the design of a load trace for a memory module system.

FIG. 16 is a chart showing the results of Experiment 1.

FIG. 17 is a chart showing the results of Experiment 2.

FIG. 18 is a diagram showing a waveform at an observation point P1 of the basic matching wiring system.

FIG. 19 is a diagram showing a waveform at an observation point P1 in the segment split transmission system.

FIG. 20 is a chart showing the results of Experiment 3.

FIG. 21 is a diagram showing the relationship between wiring on a super-large-scale integrated circuit mounting board and reflected noise. BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. As shown in FIG. 1, in the embodiment of the present invention, for example, a wiring pattern constituting a transmission line for transmitting a high-frequency signal of 200 MHz or more is provided on the surface of an insulating substrate and electrically connected to the wiring pattern. The wiring pattern on the high-frequency mounting substrate on which the integrated circuit to be mounted is mounted is divided into a plurality of segments SS. And each segment S—Independent characteristics for each S

0 11 0 11

Gives the impedance z (z-z). From this, the boundary between two adjacent segments

i 0 11

In the field (the boundary between s and s, the boundary between s and s, etc.)

0 1 1 2

A wave is generated. In the present embodiment, these reflected waves generated at each boundary, including the reflected waves generated by the capacitive load C, are superimposed on each other and are individually canceled so as to cancel each other.

Adjust the characteristic impedance Z (Z-Z) of the segment S—S of That is, the real

0 11 i 0 11

In the embodiment, the reflected wave does not occur! By superimposing reflections on the boundaries of each segment, the waveform distortion is reduced by the superposition.

Here, assuming that the number of segments is m and the value of characteristic impedance that each segment can take is n, there are n ^m possible combinations as a whole. For example, if m = 10 and η = 100 (in 1Ω increments in the range of 100Ω), then 100 ^{1 (>} results will not be possible, and the full search will not be possible. A genetic algorithm is applied to determine the characteristic impedance. As shown in Fig. 2, each characteristic impedance Ζ— の of the segmented transmission line is

0 11 It is possible to directly map the gene on the chromosome (chromosome) of the individual, and it is basically possible to apply the genetic operation of the genetic algorithm as it is. As described later, specifically, the characteristic impedance Z (Z

0 11 i 0 one

Z), the transmission line terminating resistance R and damping resistance R are also design parameters.

11 T O

Are mapped to genes, including

[0021] After determining the characteristic impedance Z (Z-Z) of each segment S-S, Z is realized.

0 11 i 0 11 i

The shape of each segment is designed so that Specifically, the characteristic impedance Z is a function of the width W of the wiring, the thickness T, the thickness D of the insulator, and the relative permittivity ε of the insulator of the board (Ζ = f (W, T, D, ε;)). In practice, the thickness Τ and the insulator thickness D are generally constant (ie, Τ and D) for all wiring patterns on the substrate. So segment S

The characteristic impedance Ζ is realized by changing the width W for each 0. Fig. 3 for high frequency mounting

11 i i

An example of a segmented transmission line for a microstrip line on a printed circuit board as a circuit board is shown. In FIG. 3, the upper part shows a plan view of the wiring pattern, and the lower part shows a cross-sectional view of each part individually. In the example of Fig. 3, the length of each segment is equal. However, when the present invention is applied, the length L of the segment may be variable, and the length may be different for each segment. In this case, since the propagation length of the reflected wave differs depending on the length L of each segment, the length L of the segment also needs to be determined by a genetic algorithm as a parameter similar to the characteristic impedance Z.

Next, a segmented transmission line design support system will be described. To realize the method of the present invention, a design support system for a segmented transmission line was created. Figure 4 shows the configuration of this system. In this specification, the created program for design supervision This program is called STL Designer, and this system is composed of this program and the existing electronic circuit simulator (SPICE). Here, the STL designer uses the flow control of the entire segmented transmission line (STL) design, optimization calculation by genetic algorithm, activation of the electronic circuit simulator (SPICE), and the OS [currently using Unix (registered trademark). Execute the interface with the shell. The electronic circuit simulator (SPICE) has been widely used around the world since its development began in the late 1960s, and is described in "http: Z / bwrc.eecs.berkeley.edu / Classes / 丄 cBook, SPI CEZ ”and“ Resve Saleh, Takahide Inoue and Yukihiko Ido, “Current Status and Prospects of Circuit Simulators—Implementation Issues Based on Expectations for Simulators and Overseas Research Trends” ), Vol. J74-A No. 8, PP. 1188-1196, 1991 ”[Detailed explanation! Also, many experimental results on transmission lines using an electronic circuit simulator (SPICE) have been reported so far, and their high reliability has been widely recognized. For example, "Bus Delay Reduction Method Considering Crosstalk" by Hirose Hirose and Hiroto Yasuura, IEICE (A), Vol. J83 A No. 8, PP. 989-998, 2000, "Tetsuro Endo" , "New Substrate Contact Type Pass Transistor", by IEICE (C), Vol. J84-C No. 3, PP. 192-198, 2001, by Seiki, Toshihiko Funaki, Hiroki Nakamura, Hiroshi Sakuraba and Fujio Masuzoka. Toshikazu, Kobayashi Kuniyoshi and Yokokawa Izumi, "Time Domain Analysis of Lossy Nonuniform Transmission Lines Using FDTD Method", IEICE Trans. (A), Vol. J84-A No. 8, PP. 1018-1026, 2001 issue "has reporting power S.

[0023] The STL designer is a script written in the script language "perl", and the electronic circuit simulator SPICE and the STL designer perform the following linked operations.

[0024] 1. The STL designer performs GA calculation (genetic operation) on the parameters of the circuit model (characteristic impedance and terminating resistance of each segment of the segmented transmission line, etc.). An electronic circuit simulator (SPICE) is used for fitness evaluation in this GA calculation (genetic operation). Specifically, the circuit description of the segmented transmission line including the input and output circuits is output as a file (circuit description file) in the fitness evaluation of the GA calculation.

[0025] 2. After outputting the circuit description file, the STL designer starts the electronic circuit simulator (SPICE). [0026] 3. The electronic circuit simulator (SPICE) reads the circuit description file, analyzes it, and outputs the analysis result as a signal waveform result file.

[0027] 4. The STL designer reads the signal waveform result file, calculates fitness (fitness) from this, and continues to perform GA calculation (genetic operation).

Next, the genetic operation will be described. As shown in Fig. 3, the characteristic impedance (Z-Z) of the transmission line divided into segments can be directly mapped to individual genes.

0 11

It is possible. With this mapping, crossover, mutation, and selection operations can be applied as they are without generating lethal genes.

A fitness function for fitness evaluation can be defined by “how close to an ideal transmission waveform”. In other words, I (t) is an ideal propagation waveform (Ideal Wave Form) with perfect impedance matching, R (t) is a propagation waveform to be shaped by the method of the present invention (Wave Form Under Adjusting), and T Is the cycle,

[Number 1]

| J) One) | ¾,… (1)

[Number 2] fitness = ... (2)

[0030] can be defined as

FIG. 5 shows the relationship between an ideal transmission waveform (Ideal Wave Form) and a transmission waveform to be shaped (Wave Form Under Adjusting). Here, Diff is equal to the absolute value of the difference between I (t) and R (t) indicated by the hatched portion in FIG.

Next, segmented transmission lines were evaluated for actual printed circuit board wiring. A specific wiring system targeted is a clock supply wiring of a DIMM (Dual In-line Memory Module) used in a personal computer or the like. Figure 6 Design The target wiring system is shown. In FIG. 6, the DIMM is a memory module that is mounted on a printed circuit board and constitutes a main memory. The ability to supply a wide memory bandwidth to the SCPU greatly affects system performance. Since the memory bandwidth is determined by the product of the transfer speed and the data width, it is necessary to supply a high-speed and high-quality clock signal to operate the DIMM at high speed. In order to transmit high-speed and high-quality signals on a substrate, it is necessary to realize an ideal transmission structure with less reflection. In the DIMM clock supply wiring system, the DIMM itself becomes an impedance mismatch point with respect to the transmission structure, causing waveform distortion. It is difficult for today's personal computers to supply such an ideal clock signal.The clock frequency of the CPU reaches several GHz, but the performance has been improved.On the other hand, the clock signal speed on the board is several hundred MHz. It is staying at.

As shown in FIG. 6, in a normal clock signal supply system, a clock signal whose clock driver (Clock Driver) power is also output passes through a damping resistor R and then is transmitted through a transmission line (see FIG.

D

It propagates through the clock line (Clock line) inside and is terminated by the terminating resistor R. Transmission line

T

The characteristic impedance Z is usually about 70 Ω. In this evaluation experiment, the actual

0

Z was set to 76 Ω from the measured value of the wiring system.

0

[0034] A clock signal pin (Clock In in the figure) of the DIMM is connected to this transmission line, and the clock signal is supplied to the DIMM from here. In a normal DIMM, there are two clock signal pins on one side of the DIMM, as shown in Figure 6. In this evaluation, the length of the transmission line was 10 cm. This length is in the range of a typical clock signal wiring length (about several cm to about 20 cm).

FIG. 7 shows a circuit diagram corresponding to FIG. The transmission line is divided into several segments, each having a different characteristic impedance Z (in this figure, the Z force is also divided into 10 segments of Z).

i 1 10

An example of division is shown). The DIMM is equal to the load capacitance C at the position of its clock signal pin.

In this evaluation, the measured force was also C = 10 pF. Also, the clock driver

1

, Signal source V and internal resistance R.

on

The design goal is to find the characteristic impedance Z of each segment that realizes an ideal clock signal at the clock signal input points (observation points) P1 and P2. Using a transmission line design support system.

Hereinafter, evaluation results will be described.

[0038] [Experiment 1]

The experimental results when the switching time of the transmitted clock signal (rising Z fall) is 20 ps, the signal amplitude is 3.3 V, and the period is 10 ns are shown in Figs. FIG. 8 shows an observation waveform in the basic matching wiring system at the observation point P1, and FIG. 9 shows an observation waveform in the basic matching wiring system at the observation point P2. FIG. 10 shows an observation waveform at the observation point P1 in the segment division transmission system, and FIG. 11 shows an observation waveform at the observation point P2 in the segment division transmission system. Fig. 12 shows the observed waveform at observation point 1 in the load trace system (conventional method), and Fig. 13 shows the observed waveform at observation point 2 in the load trace system (conventional method). Since the switching portion of the signal includes a high frequency component, a large reflection noise is generated due to the switching. In this experiment, a very short rise time (20 ps) was set to evaluate the effect of the segmented transmission line on this signal switching, and the clock frequency was set as slow as 100 MHz. The switching time of 20 ps is shorter than the current clock signal switching time. In the future, 10 GHz class clock signals will be required in VLIS (ultra large scale integrated circuits). Also, GHz-class clock transmission is desired, which is a sufficiently realistic value to fulfill this requirement. The amplitude of the signal was 3.3 [V].

FIG. 8 and FIG. 9 show waveforms observed at observation points P1 and P2 when a DIMM is connected to the basic matching wiring system, respectively. Here, the basic matching wiring system is an ideal transmission system with perfect impedance matching when there is no load (when a load such as a DIMM is not connected). FIGS. 8 and 9 also show the waveforms (Ideal Wave Form in the figures) observed at the observation points PI and P2 when only the basic matching wiring system (no load) is used. When only the basic matching wiring system is used, the clock signal propagates with an ideal waveform without any distortion. On the other hand, when a DIMM is connected to this basic matching wiring system, the DIMM becomes an impedance mismatching point, causing reflection noise (reflection noise in the figure: Reflection Noise), and large distortion in the ideal waveform. . In addition, this waveform distortion Transmission delay (Delay in the figure).

FIG. 10 and FIG. 11 show observation waveforms at observation points PI and P2 by the segmented transmission line shown in FIG. For comparison, the ideal waveform (Ideal Wave Form) shown in Fig. 8 is also shown. The power delay time when a slight transmission delay (Delay in the figure) and level oscillation are observed is about 200 ps (observation point P2), which is about 1Z5 of the delay time in Fig. 8. In addition, almost ideal signal transmission, in which the level of vibration is large enough to cause malfunction, is realized. The number of GA individuals used for designing this segmented transmission line was 10, and the result of evolving about 300 generations was used.

Here, the DIMM is used for the basic matching wiring system (Z = 76 Ω) using the fitness values according to the equations (1) and (2).

0

The fitness value when connected is f, and the fitness value obtained by the segmented transmission line is f

original

Defining the improvement rate r as the ratio of the two

STL imp

[ ^Equation 3] r _imp = ^fsTL = 2.59… (3)

j or gtnal

[0042] From this improvement rate, it can be seen that the signal quality of the transmission signal is greatly improved by the segmented transmission line.

FIGS. 12 and 13 show the observed waveforms at the observation points PI and P2 when the load tracing method of the related art is used (ideal waveform (Ideal Wave Form) shown in FIG. 8 for comparison). Are also shown). The load tracing method, as shown in Fig. 14, uses a load C connected to a transmission line (characteristic impedance Z) to locally change the characteristic impedance of the nearby wiring.

0

(The characteristic impedance is changed to Z '), and the combined impedance of C and Z' is close to Z.

It is a technique to add zero. Specifically, in this experiment, the transmission system shown in Fig. 15 was used. The length of the load trace is lcm on both sides of C, and its characteristic impedance Z 'is

1

Z '= 526 Ω based on the calculation of impedance matching (details are described in the Appendix). Here, it is difficult to realize a high-impedance wiring such as Z '= 526 Ω due to a manufacturing process. In practice, a wiring of about 100 to 150 Ω (highest possible value in a practicable range) is used. This time, we used this theoretical matching calculation 計算, = 526 [Ω] for comparison. It was. As described above, other parameters Z, R, and (R + R) were set to 76 Ω. Fig. 12

0 T on D

In Fig. 13 and Fig. 13, the force delay time (Delay), in which the large reflection noise shown in Fig. 8 is eliminated, has increased, and a large signal level oscillation (Bounce Noise) is observed. This is because the effect of the load C was tried to be eliminated by the local impedance Z ', and as a result, the value of Z'

1

It is considered that the force S became very large, and thus the inductance became very high locally. Such local impedance matching is effective when the switching time of the digital signal is long, that is, when the frequency component at the time of the signal switching is low. However, at high-speed switching, the load trace section becomes a distributed constant instead of a lumped constant, and as a result, the effect is reduced.

Table 1 shows the results of the segmented transmission line obtained by this design. In the table, wire width (tran smission— line— width) W is the relational expression between characteristic impedance Z and wire shape

Picture

[0045] Here, 0 (= 140111) and Ding (= 35111) are the thickness of the substrate insulator and the thickness of the wiring, respectively (see Fig. 3). Ε (= 4.2) is the dielectric constant of the insulator.

[Experiment 2]

Table 2 summarizes the results when the rise time in Experiment 1 was changed to t = 200 ps to evaluate the dependence of the signal switching time. In this experiment as well, the improvement rate with the segmented transmission line was r = 2.66, indicating a high effect.

imp

As is apparent from a comparison between Table 1 in FIG. 16 and Table 2 in FIG. 17, the characteristic impedances Z of the corresponding segments are different. In particular, when the rise time is 20 ps, Z is 64 Ω and all segments are i 6

It has the highest characteristic impedance value among the elements (Fig. 16). On the other hand, when the rise time is 2 OOps, Z is 22 Ω, which is the lowest characteristic impedance value among all segments.

6

(Figure 16). This is because different reflection noises are generated due to different frequency components at the time of switching between the two signals. The segmented transmission line has these different reflection The ideal transmission signal is realized by adjusting the characteristic impedance of each segment in each case!

[Experiment 3]

In Experiments 1 and 2, experiments were conducted with a focus on signal switching that caused particularly large waveform distortion. For this reason, a slow clock frequency of 100 MHz was used. In this experiment, the experiment was performed with a signal period (clock frequency) of 500 MHz. The signal wavelength of 500 MHz is almost equal to the transmission line length of 10 cm (Fig. 7), so it is thought that more multiple reflections occur than in Experiments 1 and 2. Therefore, in this experiment, this problem was dealt with by further increasing the degree of freedom by setting the number of segments to 20 (all other settings are the same as in Experiment 2). The results are summarized in Table 3 in FIG. 18 and 19 show the waveforms observed at P1. Fig. 18 shows the observed waveform (Wave Form Under Capacitance) when a DIMM is connected to the basic matching wiring system and the ideal waveform (Ideal Wave Form) when there is no DIMM. It can be seen that due to the effect of connecting the DIMM, large reflection noise is generated, and the switching part (rising and falling parts) of the rectangular wave is largely cut off and distorted like a sine waveform. FIG. 19 shows a waveform (Wave Form under Capacitance) and an ideal waveform (Ideal Wave Form) of the segmented transmission line. In FIG. 18, it can be seen that the signal switching portion largely removed is improved, and the waveform is approximated to the ideal waveform and shaped into a waveform. Also in this experiment, r = 2.13, indicating a good improvement effect.

imp

From the above experiment, the transmission waveform on the designed transmission line and the transmission waveform on the conventional transmission line were compared and evaluated, and it was found that the quality of the transmission waveform was improved by a factor of two or more, and an ideal transmission waveform was obtained.

[0050] The characteristic impedance Z 'of the wiring is decomposed into a capacitance C' and an inductance L 'as follows.

[Number 5]

Here, t is a transmission delay time determined by the dielectric constant of the insulator of the wiring board. load The characteristic impedance of the connected load trace with capacitance C can be calculated as pd L by measuring C, L, t and C, and since this value equals Z

0

[Number 6]

[0052]. By substituting Z = 76Ω, C '= 10 [pF] and t = 112 [ps], Z'

0 pd

= 526 [Ω].

Industrial applicability

According to the present invention, there is obtained an advantage that the waveform distortion can be more reliably reduced as compared with the related art only by the shape of the wiring pattern without preparing a special integrated circuit or the like.

Claims

The scope of the claims

[1] A high-frequency wiring structure provided with a wiring pattern constituting a transmission line through which a high-frequency signal is transmitted,

The wiring pattern is composed of a plurality of segments having different characteristic impedances due to different shapes,

The characteristic impedance of each of the plurality of segments is determined so that a reflected wave that reduces waveform distortion of the signal propagating through the transmission line is generated at a boundary between two adjacent segments. High frequency wiring structure.

[2] A high-frequency mounting substrate comprising the high-frequency wiring structure according to claim 1 on an insulating substrate.

[3] An integrated circuit comprising the high-frequency wiring structure according to claim 1 in an internal wiring pattern.

[4] A high-frequency mounting having a wiring pattern constituting a transmission line for transmitting a high-frequency signal of 200 MHz or more on a surface of an insulating substrate and mounting an integrated circuit electrically connected to the wiring pattern. A substrate,

The characteristic impedance of each of the plurality of segments is determined so that the waveform of the signal propagating through the transmission line is shaped by superimposition of reflected noise generated at the boundary of each segment. High frequency mounting board.

5. The high-frequency mounting board according to claim 4, wherein the characteristic impedance of the segment is set to a predetermined value by changing at least one of a width dimension, a length dimension, and a thickness dimension of the segment.

6. The high-frequency mounting board according to claim 2, wherein the characteristic impedance of the segment is set by changing a width of the segment while keeping a length of the segment constant.

[7] A method for forming a high-frequency wiring structure including a wiring pattern constituting a transmission line through which a high-frequency signal is transmitted by a plurality of segments having different characteristic impedances due to different shapes,

Using an optimization algorithm to reduce waveform distortion of the signal propagating through the transmission line. A method for forming a high-frequency wiring structure, wherein the characteristic impedance of each of the plurality of segments is designed so that a reflected wave to be generated is generated at a boundary between two adjacent segments.

8. The method for forming a high-frequency wiring structure according to claim 7, wherein the characteristic impedance is designed by designing the width of the segment while keeping the length of the segment constant.

9. The method for forming a high-frequency wiring structure according to claim 7, wherein the optimization algorithm is a genetic algorithm.

[10] A method of waveform shaping the high-frequency signal by changing a high-frequency wiring structure including a wiring pattern forming a transmission line through which a high-frequency signal is transmitted,

The waveform shaping of a high-frequency signal is characterized in that the characteristic impedance of each of the plurality of segments is determined so as to shape the waveform of the high-frequency signal propagating through the transmission line by superimposing reflection noise generated in each segment. Method.

11. The high-frequency signal waveform shaping method according to claim 10, wherein the shapes of the plurality of segments are designed using an optimization algorithm.