WO2005046046A1 - Crystal oscillator - Google Patents

Crystal oscillator Download PDF

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Publication number
WO2005046046A1
WO2005046046A1 PCT/JP2004/014964 JP2004014964W WO2005046046A1 WO 2005046046 A1 WO2005046046 A1 WO 2005046046A1 JP 2004014964 W JP2004014964 W JP 2004014964W WO 2005046046 A1 WO2005046046 A1 WO 2005046046A1
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Prior art keywords
voltage
variable capacitance
mos
control
crystal oscillator
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PCT/JP2004/014964
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French (fr)
Japanese (ja)
Inventor
Takehiro Yamamoto
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Toyo Communication Equipment Co., Ltd.
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Publication of WO2005046046A1 publication Critical patent/WO2005046046A1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/02Details
    • H03B5/04Modifications of generator to compensate for variations in physical values, e.g. power supply, load, temperature
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/30Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator
    • H03B5/32Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator being a piezoelectric resonator
    • H03B5/36Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator being a piezoelectric resonator active element in amplifier being semiconductor device
    • H03B5/366Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator being a piezoelectric resonator active element in amplifier being semiconductor device and comprising means for varying the frequency by a variable voltage or current

Definitions

  • the present invention relates to a crystal oscillator, and more particularly to a voltage-controlled crystal oscillator whose oscillation frequency changes based on a control DC voltage value supplied by an external force, and a voltage-controlled temperature-compensated crystal oscillator.
  • a PLL Phase Lock Loop
  • a crystal oscillator As the voltage controlled oscillator.
  • Patent Document 1 discloses a voltage-controlled crystal oscillator configured using an inverter element.
  • the voltage controlled crystal oscillator utilizes a phenomenon in which the resonance frequency of the oscillator changes by changing the load capacitance of the resonance loop.
  • a voltage variable capacitance element is inserted into a resonance loop of a crystal oscillator using an inverter element, and the frequency output from the oscillator is controlled by a control DC voltage applied to the voltage variable capacitance element.
  • variable capacitance diode is known as a general voltage variable capacitance element.
  • the variable capacitance diode is difficult to be integrated, it cannot be integrated with other components constituting the oscillation circuit, thereby hindering miniaturization and cost reduction.
  • Patent Document 2 there is a MOS voltage variable capacitance element as a voltage variable capacitance element, which is being applied to a crystal oscillator because of easy integration.
  • FIG. 6 shows a voltage-controlled temperature-compensated crystal oscillator obtained by adding a temperature compensation circuit using a MOS-type voltage variable capacitance element and a frequency adjustment circuit using a MOS-type voltage variable capacitance element to a crystal oscillator using an inverter element.
  • FIG. 3 is a circuit diagram illustrating an example of the embodiment.
  • 1 is a crystal oscillator
  • R1 is a feedback resistor
  • 2 is an inverter element
  • 3 in a broken line
  • 4 in a dashed line
  • the frequency adjustment circuit 4 is composed of two MOS type voltage variable capacitance elements Dl and D2 and two Capacitor CI, C2 and resistors R2, R3.
  • MOS voltage variable capacitance element D1 The gate terminal of MOS voltage variable capacitance element D1 is connected to the input terminal of inverter element 2 via capacitor C1, and the gate terminal of MOS voltage variable capacitance element D2 is connected to the output terminal of inverter element 2 via capacitor C2. A knock gate terminal of each MOS-type voltage variable capacitance element is grounded. Then, an external control voltage is supplied to the connection point between the gate terminal of each MOS type voltage variable capacitor and the capacitor via the resistors R2 and R3.
  • Fig. 7 shows the relationship between the gate voltage and the capacitance (CV characteristic) of a MOS type voltage variable capacitance element, in which the capacitance value of the MOS type voltage variable capacitance element changes by changing the gate voltage. become. Since this MOS type voltage variable capacitance element forms a part of the load capacitance in the resonance loop of the oscillator, it is possible to obtain a frequency change according to the external control voltage based on the principle described above. .
  • Patent document 1 Japanese Patent Application Laid-Open No. 2002-026660
  • Patent Document 2 JP-A-11-088052
  • the area where the CV characteristic changes linearly is very small, and on both sides of this area, the change in capacitance with respect to the change in gate voltage gradually decreases, and the curve changes.
  • the capacitance value does not change, but when it reaches the (saturated) region, it has a characteristic.
  • the present invention provides a frequency adjustment circuit including at least an inverter element, a crystal oscillator, and first and second MOS voltage variable capacitance elements, and the first and second MOS transistors.
  • a first and a second level shift circuit for respectively shifting the level of the control DC voltage supplied to the back gate terminal of the type voltage variable capacitance element, wherein the gate of the first MOS type voltage variable capacitance element A terminal is connected to an input terminal side of the inverter element, and a gate terminal of the second MOS type voltage variable capacitance element is connected to an output terminal side of the inverter element, respectively.
  • a DC bias voltage is applied to one of the gate terminals, and each back gate terminal of the first and second MOS voltage variable capacitance elements is grounded via a capacitor.
  • a control DC voltage is supplied via a second level shift circuit, and one of the first and second level shift circuits responds in an area lower than the center voltage of the control DC voltage.
  • the first and second M The voltage shift amount is set so that the CV characteristic of the OS type voltage variable capacitance element operates in a linear region, and the other of the first and second level shift circuits is used to control the DC voltage of the control.
  • the voltage shift amount is set so that the CV characteristics of the first and second MOS voltage variable capacitors corresponding to the region higher than the center voltage operate in a region where the CV characteristic is linear. Things.
  • the invention according to claim 2 is characterized by further comprising a temperature compensating circuit constituted by using a MOS type voltage variable capacitance element.
  • the invention according to claim 3 is characterized in that the DC bias voltage is used as a reference voltage for both the temperature compensation circuit and the frequency adjustment circuit.
  • the minimum value of the control DC voltage is V, and the maximum value is V.
  • the center voltage is V, and the capacitances of the first and second MOS type voltage variable capacitors are linear center.
  • the lower limit value of the gate voltage that changes periodically and V is the upper limit value.
  • V Z2 the DC bias voltage is V, the DC bias is applied.
  • the control DC voltage is V Outputs the voltage that changes from V / 2-V to V / 2-V when changing to V center max DD GB2 DD GB 1
  • Min center ref GB2 ref Bl so that the other level shift circuit outputs a voltage that changes from V -V to V -V when the control DC voltage changes from V to V. It is characterized by being set to.
  • the control voltage supplied from the outside is separately supplied to each MOS type voltage variable capacitance element via the level shift circuit.
  • FIG. 1 is a circuit diagram showing an embodiment of a crystal oscillator according to the present invention, and portions common to those in the circuit diagram shown in FIG.
  • a feature of the present invention which is different from the conventional circuit shown in FIG. That is, the gate terminal of the MOS-type voltage variable capacitance element D1, which is the first MOS-type voltage variable capacitance element, is connected to the input terminal of the inverter element, and the MOS-type voltage variable capacitance element, which is the second MOS-type voltage variable capacitance element.
  • the gate terminal of element D2 is arranged on the output end side of the inverter element via DC cut capacitor Cc, and the back gate terminals of MOS voltage variable capacitance elements D1 and D2 are grounded via capacitors Ca and Cb, respectively.
  • the control voltage is supplied to the back gate terminals of the MOS voltage variable capacitance elements Dl and D2 via the level shift circuits 6 and 7, which are the first and second level shift circuits, respectively. It is.
  • a DC bias V is applied to the gate terminal of the MOS type voltage variable capacitance element D2.
  • This DC bias V also functions as a reference voltage source for the temperature compensation circuit 3.
  • a gain adjuster 8 for adjusting the voltage value (oscillation width) of the control DC voltage may be inserted before the level shift circuits 6 and 7.
  • Fig. 2 is a diagram showing the CV characteristics of a MOS type voltage variable capacitance element. As shown in the figure, the lower limit of the gate voltage exhibiting a region with excellent linearity is defined as V, and the upper limit is defined as V.
  • V and min max center are defined as V and min max center, respectively.
  • the threshold value of the inverter element 2 is defined as V Z2.
  • FIG. 3 is a diagram showing a relationship between a control DC voltage supplied from an external force and voltages VC1 and VC2 supplied from the level shift circuits 6 and 7 to the MOS type voltage variable capacitance elements Dl and D2.
  • FIG. 4 is a diagram showing a relationship between a control DC voltage supplied from the outside and a gate voltage of a MOS voltage variable capacitance element.
  • V-V is controlled by the MOS voltage variable capacitance element D2 to output a voltage that changes to ref GB1
  • the level shift circuit that supplies the control voltage is set to output a voltage that changes from (V / 2-V) to (V / 2-V) when the control DC voltage changes to the V force V at the center max.
  • the present invention provides that one of the level shift circuits operates one MOS type voltage variable capacitance element in an area where the CV characteristic is linear in an area lower than the center voltage of the control DC voltage, and the other operates such that
  • the level shift circuit is characterized in that the voltage shift amount is set such that the other MOS type voltage variable capacitance element operates in a region where the CV characteristic is linear in a region higher than the center voltage of the control DC voltage. Is what you do.
  • the present invention may be applied to a voltage-controlled crystal oscillator in which the temperature compensation circuit is omitted.
  • FIG. 1 is a circuit diagram showing an embodiment of a crystal oscillator according to the present invention.
  • FIG. 2 is a view showing CV characteristics of a MOS type voltage variable capacitance element.
  • FIG. 3 is a diagram showing a relationship between a control DC voltage and a voltage supplied to a level shift circuit.
  • FIG. 4 is a diagram showing a relationship between a control DC voltage and a gate voltage of a MOS type voltage variable capacitor.
  • FIG. 5 is a diagram showing a relationship between a control voltage and a frequency variable amount.
  • FIG. 6 is a circuit diagram showing an embodiment of a conventional crystal oscillator.
  • FIG. 7 is a view showing CV characteristics of a MOS voltage variable capacitance element.

Abstract

A crystal oscillator that exhibits an increased oscillator frequency variation amount in accordance with an externally supplied control voltage and that provides a frequency variation exhibiting an improved linearity. The crystal oscillator includes a frequency adjusting circuit configured by use of two MOS voltage variable capacitance elements. The back gate terminal of each MOS voltage variable capacitance element receives a control DC voltage via a respective one of level shift circuits. The voltage shift amount of one of the level shift circuits is established such that the corresponding MOS voltage variable capacitance element operates in a range where the C-V characteristic is linear in a range lower than the center voltage of the control DC voltage. The voltage shift amount of the other of the level shift circuits is established such that the corresponding MOS voltage variable capacitance element operates in a range where the C-V characteristic is linear in a range higher than the center voltage of the control DC voltage.

Description

明 細 書  Specification
水晶発振器  Crystal oscillator
技術分野  Technical field
[0001] 本発明は、水晶発振器、特に外部力 供給する制御用の直流電圧値に基づいて 発振周波数が変化する電圧制御型水晶発振器及び電圧制御型温度補償水晶発振 器に関するものである。  The present invention relates to a crystal oscillator, and more particularly to a voltage-controlled crystal oscillator whose oscillation frequency changes based on a control DC voltage value supplied by an external force, and a voltage-controlled temperature-compensated crystal oscillator.
背景技術  Background art
[0002] 近年、無線通信機器の局部発振器等の信号発生源として PLL (Phase Lock Loop ; 位相同期ループ)が広く用いられている。高精度の PLLを実現するため、電圧制御 発振器として水晶振動子を用いたものが一般的である。  In recent years, a PLL (Phase Lock Loop) has been widely used as a signal source such as a local oscillator of a wireless communication device. In order to realize a high-precision PLL, it is common to use a crystal oscillator as the voltage controlled oscillator.
例えば、特許文献 1にはインバータ素子を用いて構成した電圧制御型水晶発振器 が開示されている。周知のように電圧制御型水晶発振器は共振ループの負荷容量 を変化させることにより発振器の共振周波数が変化する現象を利用したものである。 前出の公報ではインバータ素子を用い水晶発振器の共振ループ中に電圧可変容量 素子を挿入し、電圧可変容量素子に印加する制御用直流電圧によって発振器が出 力する周波数を制御して 、る。  For example, Patent Document 1 discloses a voltage-controlled crystal oscillator configured using an inverter element. As is well known, the voltage controlled crystal oscillator utilizes a phenomenon in which the resonance frequency of the oscillator changes by changing the load capacitance of the resonance loop. In the above-mentioned publication, a voltage variable capacitance element is inserted into a resonance loop of a crystal oscillator using an inverter element, and the frequency output from the oscillator is controlled by a control DC voltage applied to the voltage variable capacitance element.
一般的な電圧可変容量素子としては可変容量ダイオードが知られて 、る。しかし、 可変容量ダイオードは集積ィ匕が困難であることから発振回路を構成する他の部品と 共に IC化することができず、小型化や低コスト化の妨げとなって 、た。  A variable capacitance diode is known as a general voltage variable capacitance element. However, since the variable capacitance diode is difficult to be integrated, it cannot be integrated with other components constituting the oscillation circuit, thereby hindering miniaturization and cost reduction.
一方電圧可変容量素子として MOS型電圧可変容量素子があり、集積化が容易な ことから水晶発振器にも適用されつつある。(特許文献 2)  On the other hand, there is a MOS voltage variable capacitance element as a voltage variable capacitance element, which is being applied to a crystal oscillator because of easy integration. (Patent Document 2)
[0003] 図 6はインバータ素子を用いた水晶発振器に、 MOS型電圧可変容量素子用いた 温度補償回路と、 MOS型電圧可変容量素子用いた周波数調整回路とを付加した 電圧制御型温度補償水晶発振器の一例を示す回路図である。  [0003] Fig. 6 shows a voltage-controlled temperature-compensated crystal oscillator obtained by adding a temperature compensation circuit using a MOS-type voltage variable capacitance element and a frequency adjustment circuit using a MOS-type voltage variable capacitance element to a crystal oscillator using an inverter element. FIG. 3 is a circuit diagram illustrating an example of the embodiment.
図中 1は水晶振動子、 R1は帰還抵抗、 2はインバータ素子、 3 (破線内)は温度補 償回路、 4 (一点鎖線内)は周波数調整回路をそれぞれ示している。  In the figure, 1 is a crystal oscillator, R1 is a feedback resistor, 2 is an inverter element, 3 (in a broken line) is a temperature compensation circuit, and 4 (in a dashed line) is a frequency adjustment circuit.
ここで、周波数調整回路 4は 2つの MOS型電圧可変容量素子 Dl、 D2と、 2つのコ ンデンサ CI、 C2と、抵抗 R2、 R3とを備えたものである。 Here, the frequency adjustment circuit 4 is composed of two MOS type voltage variable capacitance elements Dl and D2 and two Capacitor CI, C2 and resistors R2, R3.
MOS型電圧可変容量素子 D1のゲート端子はコンデンサ C1を介してインバータ素 子 2の入力端側に、 MOS型電圧可変容量素子 D2のゲート端子はコンデンサ C2を 介してインバータ素子 2の出力端側に夫々配置され、各 MOS型電圧可変容量素子 のノ ックゲート端子は接地されて 、る。そして外部制御電圧が各 MOS型電圧可変 容量素子のゲート端子とコンデンサとの接続点に抵抗 R2、 R3を介してそれぞれ供 給される。  The gate terminal of MOS voltage variable capacitance element D1 is connected to the input terminal of inverter element 2 via capacitor C1, and the gate terminal of MOS voltage variable capacitance element D2 is connected to the output terminal of inverter element 2 via capacitor C2. A knock gate terminal of each MOS-type voltage variable capacitance element is grounded. Then, an external control voltage is supplied to the connection point between the gate terminal of each MOS type voltage variable capacitor and the capacitor via the resistors R2 and R3.
[0004] 図 7は MOS型電圧可変容量素子のゲート電圧と容量との関係(C V特性)を示す ものであり、ゲート電圧を変化させることにより MOS型電圧可変容量素子の容量値 が変化することになる。この MOS型電圧可変容量素子は、の発振器の共振ループ 中の負荷容量の一部を構成するものであるから、上述した原理に基づき外部制御電 圧に応じた周波数変化を得ることができるのである。  [0004] Fig. 7 shows the relationship between the gate voltage and the capacitance (CV characteristic) of a MOS type voltage variable capacitance element, in which the capacitance value of the MOS type voltage variable capacitance element changes by changing the gate voltage. become. Since this MOS type voltage variable capacitance element forms a part of the load capacitance in the resonance loop of the oscillator, it is possible to obtain a frequency change according to the external control voltage based on the principle described above. .
特許文献 1:特開 2002-026660公報  Patent document 1: Japanese Patent Application Laid-Open No. 2002-026660
特許文献 2:特開平 11-088052号公報  Patent Document 2: JP-A-11-088052
発明の開示  Disclosure of the invention
発明が解決しょうとする課題  Problems to be solved by the invention
[0005] し力しながら、図 7から明らかなように C-V特性が直線的に変化する領域はごく僅 かであり、この領域の両側ではゲート電圧の変化に対する容量の変化が徐々に鈍く なり曲線的な動作が現れてしま ヽ、やがてゲート電圧を変化させても容量値は変化し な 、 (飽和)領域に達すると ヽぅ特徴を持って ヽる。 However, as is clear from FIG. 7, the area where the CV characteristic changes linearly is very small, and on both sides of this area, the change in capacitance with respect to the change in gate voltage gradually decreases, and the curve changes. When the gate voltage changes over time, the capacitance value does not change, but when it reaches the (saturated) region, it has a characteristic.
つまり、発振器の周波数可変量を大きくすることが困難であり、直線性の良い領域 が少な!/、ため使!、勝手が悪!ヽと 、う欠点があった。  In other words, it is difficult to increase the variable frequency of the oscillator, and there are few areas with good linearity! There were drawbacks.
本発明は、外部から供給される制御電圧に応じた発振器の周波数可変量を大きく すると共に直線性の良い周波数変化を得ることを可能とした水晶発振器を提供する ことを目的とする。  SUMMARY OF THE INVENTION It is an object of the present invention to provide a crystal oscillator capable of increasing a frequency variable amount of an oscillator according to a control voltage supplied from the outside and obtaining a frequency change with good linearity.
課題を解決するための手段  Means for solving the problem
[0006] 本発明は、少なくともインバータ素子と、水晶振動子と、第 1及び第 2の MOS型電 圧可変容量素子を有して構成される周波数調整回路と、前記第 1及び第 2の MOS 型電圧可変容量素子のバックゲート端子に供給する制御用直流電圧のレベルを夫 々シフトする第 1及び第 2のレベルシフト回路と、を備え、前記第 1の MOS型電圧可 変容量素子のゲート端子は前記インバータ素子の入力端側に、前記第 2の MOS型 電圧可変容量素子のゲート端子は前記インバータ素子の出力端側に夫々接続され 、前記第 1、第 2の MOS型電圧可変容量素子のいずれか一方のゲート端子には直 流バイアス電圧が印加されて 、ると共に、前記第 1及び第 2の MOS型電圧可変容量 素子の各バックゲート端子はコンデンサを介して接地され、前記第 1及び第 2のレべ ルシフト回路を介して夫々制御用直流電圧が供給されており、前記第 1、第 2のレべ ルシフト回路の一方は、前記制御用直流電圧の中心電圧より低い領域で対応する第 1、第 2の MOS型電圧可変容量素子の C V特性が直線となる領域で動作するように 電圧のシフト量が設定されていると共に、第 1、第 2のレベルシフト回路の他方は、前 記制御用直流電圧の中心電圧より高い領域で対応する第 1、第 2の MOS型電圧可 変容量素子の C V特性が直線となる領域で動作するように電圧のシフト量が設定さ れて 、ることを特徴とするものである。 [0006] The present invention provides a frequency adjustment circuit including at least an inverter element, a crystal oscillator, and first and second MOS voltage variable capacitance elements, and the first and second MOS transistors. A first and a second level shift circuit for respectively shifting the level of the control DC voltage supplied to the back gate terminal of the type voltage variable capacitance element, wherein the gate of the first MOS type voltage variable capacitance element A terminal is connected to an input terminal side of the inverter element, and a gate terminal of the second MOS type voltage variable capacitance element is connected to an output terminal side of the inverter element, respectively. A DC bias voltage is applied to one of the gate terminals, and each back gate terminal of the first and second MOS voltage variable capacitance elements is grounded via a capacitor. And a control DC voltage is supplied via a second level shift circuit, and one of the first and second level shift circuits responds in an area lower than the center voltage of the control DC voltage. The first and second M The voltage shift amount is set so that the CV characteristic of the OS type voltage variable capacitance element operates in a linear region, and the other of the first and second level shift circuits is used to control the DC voltage of the control. The voltage shift amount is set so that the CV characteristics of the first and second MOS voltage variable capacitors corresponding to the region higher than the center voltage operate in a region where the CV characteristic is linear. Things.
また、請求項 2に係る発明は、 MOS型電圧可変容量素子を用いて構成した温度 補償回路をさらに備えていることを特徴とするものである。  The invention according to claim 2 is characterized by further comprising a temperature compensating circuit constituted by using a MOS type voltage variable capacitance element.
また、請求項 3に係る発明は、前記直流バイアス電圧は前記温度補償回路と前記 周波数調整回路との双方の基準電圧として用いられていることを特徴とするものであ る。  Further, the invention according to claim 3 is characterized in that the DC bias voltage is used as a reference voltage for both the temperature compensation circuit and the frequency adjustment circuit.
また、請求項 4に係る発明は、前記制御用直流電圧の最小値を V 、最大値を V  In the invention according to claim 4, the minimum value of the control DC voltage is V, and the maximum value is V.
min max min max
、中心電圧を V 、前記第 1及び第 2の MOS型電圧可変容量素子の容量が直線 center , The center voltage is V, and the capacitances of the first and second MOS type voltage variable capacitors are linear center.
的に変化するゲート電圧の下限値を V 、上限値を V 、前記インバータ素子のしき The lower limit value of the gate voltage that changes periodically and V is the upper limit value.
GB1 GB2  GB1 GB2
い値を V Z2、前記直流バイアス電圧を V とするとき、前記直流バイアスを印加しValue is V Z2 and the DC bias voltage is V, the DC bias is applied.
DD ref DD ref
た前記第 1、第 2の MOS型電圧可変容量素子に制御用直流電圧を供給する前記第 1、第 2のレベルシフト回路のうち、一方のレベルシフト回路では制御用直流電圧が V カゝら V に変化するときに V /2-V から V /2-V に変化する電圧を出力 center max DD GB2 DD GB 1 In one of the first and second level shift circuits for supplying a control DC voltage to the first and second MOS type voltage variable capacitance elements, the control DC voltage is V Outputs the voltage that changes from V / 2-V to V / 2-V when changing to V center max DD GB2 DD GB 1
するように設定されていると共に、他方のレベルシフト回路では制御用直流電圧が V から V に変化するときに V -V から V -V に変化する電圧を出力するよう min center ref GB2 ref Bl に設定されて ヽることを特徴とするものである。 Min center ref GB2 ref Bl so that the other level shift circuit outputs a voltage that changes from V -V to V -V when the control DC voltage changes from V to V. It is characterized by being set to.
発明の効果  The invention's effect
[0008] 本発明に係る水晶発振器は、外部から供給される制御電圧を、レベルシフト回路を 介して各 MOS型電圧可変容量素子に別個に供給するようにしたので、外部から供 給される制御電圧に応じた発振器の周波数可変量を大きくすると共に直線性の良い 周波数変化が得られるという利点がある。  In the crystal oscillator according to the present invention, the control voltage supplied from the outside is separately supplied to each MOS type voltage variable capacitance element via the level shift circuit. The advantage is that the frequency variation of the oscillator according to the voltage is increased and a frequency change with good linearity is obtained.
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0009] 以下本発明を実施例に基づき詳細に説明する。  Hereinafter, the present invention will be described in detail with reference to examples.
図 1は本発明に係る水晶発振器の実施形態例を示す回路図であって、図 6にて示 した回路図と共通する部分には同じ符号を付してその説明を省略する。  FIG. 1 is a circuit diagram showing an embodiment of a crystal oscillator according to the present invention, and portions common to those in the circuit diagram shown in FIG.
図 6の従来の回路と異なる本発明の特徴点は周波数調整回路 5の構成にある。 即ち、第 1の MOS型電圧可変容量素子である MOS型電圧可変容量素子 D1のゲ ート端子をインバータ素子の入力端側に、第 2の MOS型電圧可変容量素子である MOS型電圧可変容量素子 D2のゲート端子を、直流カット用コンデンサ Ccを介して インバータ素子の出力端側に夫々配置すると共に、 MOS型電圧可変容量素子 D1 、 D2のバックゲート端子をコンデンサ Ca、 Cbを介してそれぞれ接地し、 MOS型電 圧可変容量素子 Dl、 D2のバックゲート端子には夫々第 1、第 2レベルシフト回路で あるレベルシフト回路 6、 7を介して制御用直流電圧を供給するよう構成されているの である。  A feature of the present invention, which is different from the conventional circuit shown in FIG. That is, the gate terminal of the MOS-type voltage variable capacitance element D1, which is the first MOS-type voltage variable capacitance element, is connected to the input terminal of the inverter element, and the MOS-type voltage variable capacitance element, which is the second MOS-type voltage variable capacitance element. The gate terminal of element D2 is arranged on the output end side of the inverter element via DC cut capacitor Cc, and the back gate terminals of MOS voltage variable capacitance elements D1 and D2 are grounded via capacitors Ca and Cb, respectively. The control voltage is supplied to the back gate terminals of the MOS voltage variable capacitance elements Dl and D2 via the level shift circuits 6 and 7, which are the first and second level shift circuits, respectively. It is.
尚、このとき MOS型電圧可変容量素子 D2のゲート端子には直流バイアス V を印 ref 加する。ちなみにこの直流バイアス V は温度補償回路 3の基準電圧源としても機能 ref  At this time, a DC bias V is applied to the gate terminal of the MOS type voltage variable capacitance element D2. This DC bias V also functions as a reference voltage source for the temperature compensation circuit 3.
している。  are doing.
また、必要に応じて前記レベルシフト回路 6、 7の前段に制御用直流電圧の電圧値 (振れ幅)を調整するためのゲイン調整部 8を挿入しても良い。  If necessary, a gain adjuster 8 for adjusting the voltage value (oscillation width) of the control DC voltage may be inserted before the level shift circuits 6 and 7.
[0010] ここで、周波数調整回路 5の動作について説明する。  [0010] Here, the operation of the frequency adjustment circuit 5 will be described.
図 2は MOS型電圧可変容量素子の C V特性を示す図であり、同図に示すように 直線性の優れた領域を呈するゲート電圧の下限値を V 、上限値を V と定義する  Fig. 2 is a diagram showing the CV characteristics of a MOS type voltage variable capacitance element. As shown in the figure, the lower limit of the gate voltage exhibiting a region with excellent linearity is defined as V, and the upper limit is defined as V.
GB1 GB2 また、前記制御用直流電圧の最小値を V 、最大値を V 、中心電圧を V とそ min max center れぞれ定義する。 GB1 GB2 Further, the minimum value and the maximum value of the control DC voltage are defined as V and the center voltage is defined as V and min max center, respectively.
更にインバータ素子 2のしきい値を V Z2と定義する。  Further, the threshold value of the inverter element 2 is defined as V Z2.
DD  DD
[0011] 図 3は外部力 供給される制御用直流電圧と、レベルシフト回路 6、 7から MOS型 電圧可変容量素子 Dl、 D2に供給される電圧 VC1、 VC2との関係を示す図であり、 図 4は外部から供給される制御用直流電圧と、 MOS型電圧可変容量素子のゲート 電圧との関係を示す図である。  FIG. 3 is a diagram showing a relationship between a control DC voltage supplied from an external force and voltages VC1 and VC2 supplied from the level shift circuits 6 and 7 to the MOS type voltage variable capacitance elements Dl and D2. FIG. 4 is a diagram showing a relationship between a control DC voltage supplied from the outside and a gate voltage of a MOS voltage variable capacitance element.
図 3に示すように、 MOS型電圧可変容量素子 D1に制御電圧を供給するレベルシ フト回路では制御用直流電圧が V から V に変化するのに応じて (V -V )から min center ref GB2 As shown in Fig. 3, in the level shift circuit that supplies the control voltage to the MOS type voltage variable capacitance element D1, as the control DC voltage changes from V to V, the center shift from (V-V) to the min center ref GB2
(V -V )に変化する電圧を出力するように、 MOS型電圧可変容量素子 D2に制 ref GB1 (V-V) is controlled by the MOS voltage variable capacitance element D2 to output a voltage that changes to ref GB1
御電圧を供給するレベルシフト回路では制御用直流電圧が V 力 V に変化す center max るときに (V /2-V )から (V /2-V )に変化する電圧を出力するように設定  The level shift circuit that supplies the control voltage is set to output a voltage that changes from (V / 2-V) to (V / 2-V) when the control DC voltage changes to the V force V at the center max.
DD GB2 DD GB1  DD GB2 DD GB1
する。  I do.
このようにレベルシフト回路を設定ことにより図 4に示すように制御用直流電圧が V 力 V のときは MOS型電圧可変容量素子 D1に V 力 V のゲート電圧が min center GB2 GB1  By setting the level shift circuit in this way, as shown in Fig. 4, when the control DC voltage is V power V, the gate voltage of V power V is applied to the MOS type voltage variable capacitance element D1 by min center GB2 GB1
印加され、制御用直流電圧が V 力 V のときは MOS型電圧可変容量素子 D2 center max  When the applied DC voltage is V force V, the MOS voltage variable capacitance element D2 center max
に V から V のゲート電圧が印加される。  Is applied a gate voltage from V to V.
GB2 GB1  GB2 GB1
よって図 5に示すように、従来よりも広い範囲で直線的な制御電圧 vs周波数可変量 の関係を得ることができる。  Therefore, as shown in FIG. 5, a linear relationship between the control voltage and the frequency variable amount can be obtained in a wider range than in the related art.
[0012] 要するに、本発明は前記レベルシフト回路の一方は前記制御用直流電圧の中心 電圧より低い領域で一方の MOS型電圧可変容量素子を C V特性が直線となる領 域で動作するよう、他方のレベルシフト回路は前記制御用直流電圧の中心電圧より 高い領域で他方の MOS型電圧可変容量素子を C V特性が直線となる領域で動作 するよう電圧のシフト量が設定されていることを特徴とするものである。  [0012] In short, the present invention provides that one of the level shift circuits operates one MOS type voltage variable capacitance element in an area where the CV characteristic is linear in an area lower than the center voltage of the control DC voltage, and the other operates such that The level shift circuit is characterized in that the voltage shift amount is set such that the other MOS type voltage variable capacitance element operates in a region where the CV characteristic is linear in a region higher than the center voltage of the control DC voltage. Is what you do.
尚、上記の実施形態例では温度補償回路 3を含んだものを示したが、この温度補 償回路を省略した電圧制御型水晶発振器に本発明を適用してもよい。  Although the above-described embodiment includes the one including the temperature compensation circuit 3, the present invention may be applied to a voltage-controlled crystal oscillator in which the temperature compensation circuit is omitted.
図面の簡単な説明  Brief Description of Drawings
[0013] [図 1]本発明に係る水晶発振器の実施形態例を示す回路図。 [図 2]MOS型電圧可変容量素子の C V特性を示す図。 FIG. 1 is a circuit diagram showing an embodiment of a crystal oscillator according to the present invention. FIG. 2 is a view showing CV characteristics of a MOS type voltage variable capacitance element.
[図 3]制御用直流電圧とレベルシフト回路供給される電圧との関係を示す図  FIG. 3 is a diagram showing a relationship between a control DC voltage and a voltage supplied to a level shift circuit.
[図 4]制御用直流電圧と MOS型電圧可変容量素子のゲート電圧との関係を示す図  FIG. 4 is a diagram showing a relationship between a control DC voltage and a gate voltage of a MOS type voltage variable capacitor.
[図 5]制御電圧 vs周波数可変量の関係を示す図。 FIG. 5 is a diagram showing a relationship between a control voltage and a frequency variable amount.
[図 6]従来の水晶発振器の実施形態例を示す回路図。 FIG. 6 is a circuit diagram showing an embodiment of a conventional crystal oscillator.
[図 7]MOS型電圧可変容量素子の C V特性を示す図。 FIG. 7 is a view showing CV characteristics of a MOS voltage variable capacitance element.
符号の説明 Explanation of symbols
1 水晶振動子、 2 インバータ素子、 3 温度補償回路、 5 周波数調整回路、 6、 7 レベルシフト回路、 Dl、 D2 MOS型電圧可変容量素子、 Ca、 Cb コンデンサ 1 Crystal oscillator, 2 Inverter element, 3 Temperature compensation circuit, 5 Frequency adjustment circuit, 6, 7 Level shift circuit, Dl, D2 MOS type voltage variable capacitance element, Ca, Cb capacitor

Claims

請求の範囲 The scope of the claims
[1] 少なくともインバータ素子と、水晶振動子と、第 1及び第 2の MOS型電圧可変容量 素子を有して構成される周波数調整回路と、前記第 1及び第 2の MOS型電圧可変 容量素子のバックゲート端子に供給する制御用直流電圧のレベルを夫々シフトする 第 1及び第 2のレベルシフト回路と、を備え、  [1] A frequency adjustment circuit including at least an inverter element, a crystal oscillator, and first and second MOS-type voltage variable capacitance elements, and the first and second MOS-type voltage variable capacitance elements A first and a second level shift circuit for respectively shifting the level of the control DC voltage supplied to the back gate terminal of
前記第 1の MOS型電圧可変容量素子のゲート端子は前記インバータ素子の入力 端側に、前記第 2の MOS型電圧可変容量素子のゲート端子は前記インバータ素子 の出力端側に夫々接続され、前記第 1、第 2の MOS型電圧可変容量素子のいずれ か一方のゲート端子には直流バイアス電圧が印加されると共に、  A gate terminal of the first MOS type voltage variable capacitance element is connected to an input terminal side of the inverter element, and a gate terminal of the second MOS type voltage variable capacitance element is connected to an output terminal side of the inverter element. A DC bias voltage is applied to one of the gate terminals of the first and second MOS voltage variable capacitance elements,
前記第 1及び第 2の MOS型電圧可変容量素子の各バックゲート端子はコンデンサ を介して接地され、前記第 1及び第 2のレベルシフト回路を介して夫々制御用直流電 圧が供給されており、  Each back gate terminal of the first and second MOS type voltage variable capacitance elements is grounded via a capacitor, and a control DC voltage is supplied via the first and second level shift circuits, respectively.
前記第 1、第 2のレベルシフト回路の一方は、前記制御用直流電圧の中心電圧より 低い領域で対応する第 1、第 2の MOS型電圧可変容量素子の C V特性が直線とな る領域で動作するように電圧のシフト量が設定されていると共に、第 1、第 2のレベル シフト回路の他方は、前記制御用直流電圧の中心電圧より高い領域で対応する第 1 、第 2の MOS型電圧可変容量素子の C V特性が直線となる領域で動作するように 電圧のシフト量が設定されていることを特徴とする水晶発振器。  One of the first and second level shift circuits is in a region where the CV characteristics of the first and second MOS type voltage variable capacitors corresponding to a region lower than the center voltage of the control DC voltage are linear. The amount of voltage shift is set to operate, and the other of the first and second level shift circuits corresponds to the first and second MOS types corresponding to a region higher than the center voltage of the control DC voltage. A crystal oscillator characterized in that a voltage shift amount is set so that the voltage variable capacitance element operates in a region where a CV characteristic is linear.
[2] MOS型電圧可変容量素子を用いて構成した温度補償回路をさらに備えていること を特徴とする請求項 1に記載の水晶発振器。  [2] The crystal oscillator according to claim 1, further comprising a temperature compensation circuit configured using a MOS type voltage variable capacitance element.
[3] 前記直流バイアス電圧は前記温度補償回路と前記周波数調整回路との双方の基 準電圧として用いられていることを特徴とする請求項 2に記載の水晶発振器。  3. The crystal oscillator according to claim 2, wherein the DC bias voltage is used as a reference voltage for both the temperature compensation circuit and the frequency adjustment circuit.
[4] 前記制御用直流電圧の最小値を V 、最大値を V 、中心電圧を V 、前記第 min max center  [4] The minimum value of the control DC voltage is V, the maximum value is V, the center voltage is V, the min max center
1及び第 2の MOS型電圧可変容量素子の容量が直線的に変化するゲート電圧の下 限値を V 、上限値を V 、前記インバータ素子のしきい値を V Z2、前記直流バ The lower limit value of the gate voltage at which the capacitance of the first and second MOS type voltage variable capacitors changes linearly is V, the upper limit value is V, the threshold value of the inverter element is VZ2, and the DC voltage
GB1 GB2 DD ィァス電圧を V とするとき、 GB1 GB2 DD When the bias voltage is V,
ref  ref
前記直流バイアス電圧を印加した前記第 1、第 2の MOS型電圧可変容量素子に 制御用直流電圧を供給する前記第 1、第 2のレベルシフト回路のうち、一方のレベル シフト回路では制御用直流電圧が V から V に変化するときに V /2-V 力 One of the first and second level shift circuits for supplying a control DC voltage to the first and second MOS voltage variable capacitance elements to which the DC bias voltage has been applied In the shift circuit, when the control DC voltage changes from V to V,
center max DD GB2 ら V /2-V に変化する電圧を出力するように設定されていると共に、他方のレ center max DD GB2 is set to output a voltage that changes to V / 2-V, while the other level is set.
DD GB1 DD GB1
ベルシフト回路では制御用直流電圧が V から V に変化するときに V -V 力 In the bell shift circuit, when the control DC voltage changes from V to V,
mm center ref GB2 ら V -v に変化する電圧を出力するように設定されていることを特徴とする請求項 ref GB1  Claim ref GB1 characterized in that it is set to output a voltage that changes from mm center ref GB2 to V-v.
1乃至 3の何れか一項に記載の水晶発振器。  4. The crystal oscillator according to any one of 1 to 3.
PCT/JP2004/014964 2003-11-10 2004-10-08 Crystal oscillator WO2005046046A1 (en)

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