TWI426701B - Inductor and capacitor-based clock generator and timing/frequency reference - Google Patents

Inductor and capacitor-based clock generator and timing/frequency reference Download PDF

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TWI426701B
TWI426701B TW95109654A TW95109654A TWI426701B TW I426701 B TWI426701 B TW I426701B TW 95109654 A TW95109654 A TW 95109654A TW 95109654 A TW95109654 A TW 95109654A TW I426701 B TWI426701 B TW I426701B
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frequency
coupled
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TW200703878A (en
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Michael Shannon Mccorquodale
Scott Michael Pernia
Sundus Kubba
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Integrated Device Tech
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電感與電容為基礎的時脈產生器及時序/頻率參考器Inductor and capacitor based clock generators and timing/frequency reference 相關申請案之相互參考Cross-references to related applications

本申請案是McCorquodale,Michael S.等人於2005年9月20日申請的美國專利申請案序號11/232,407,名稱為“用於單片式時脈產生器及時序/頻率參考器的頻率控制器”的部分接續案並且主張該美國專利申請案的優先權,該美國專利申請案是McCorquodale,Michael S.等人於2005年3月21日申請的美國專利申請案序號11/084,962,名稱為“單片式時脈產生器及時序/頻率參考器”的部分接續案並且主張該美國專利申請案(11/084,962)的優先權,該美國專利申請案(11/084,962)更主張McCorquodale,Michael S.等人於2004年3月22日申請的美國臨時專利申請案序號60/555,193,名稱為“具有微機械射頻參考之單片式及自上而下的時脈合成法”的優先權,其係與本案共同被讓與,其所有的內容係被納入在此作為參考,並且對於所有共同被揭露的標的主張優先權。U.S. Patent Application Serial No. 11/232,407, filed on Sep. 20, 2005, to the name of "Single-Way Clock Generator and Timing/Frequency Referencer Frequency Control" by McCorquodale, Michael S., et al. The U.S. Patent Application Serial No. 11/084,962, filed on Mar. 21, 2005, to the name of Part of the "single-chip clock generator and timing/frequency reference" is a continuation of the priority of the U.S. Patent Application Serial No. (11/084,962), which is incorporated by reference to McCorquodale, Michael. U.S. Provisional Patent Application Serial No. 60/555,193, filed on March 22, 2004, entitled "Single-chip and micro-mechanical RF reference monolithic and top-down clock synthesis" priority, It is hereby incorporated by reference in its entirety, the entire content of which is hereby incorporated by reference in its entirety in the entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire disclosure

本申請案亦為McCorquodale,Michael S.等人於2005年3月21日申請的美國專利申請案序號11/084,962,名稱為“單片式時脈產生器及時序/頻率參考器”的部分接續案並且主張該美國專利申請案的優先權,該美國專利申請案更主張McCorquodale,Michael S.等人於2004年3月22日申請的美國臨時專利申請案序號60/555,193,名稱為“具有微機械射頻參考之單片式及自上而下的時脈合成法”(“第二相關的申請案”)的優先權,其係與本案共同被讓與,其所有的內容係被納入在此作為參考,並且對於所有共同被揭露的標的主張優先權。This application is also a continuation of the U.S. Patent Application Serial No. 11/084,962, filed on March 21, 2005, to the name of the "single-chip clock generator and timing/frequency reference device" by McCorquodale, Michael S. et al. And claiming the priority of the U.S. Patent Application, the U.S. Patent Application Serial No. 60/555,193, filed on Mar. 22, 2004, to The priority of the mechanical RF reference monolithic and top-down clock synthesis method ("Second Related Application") is given in conjunction with this case, all of which are included here. For reference, and for all commonly disclosed subject matter claims priority.

此申請案亦相關於McCorquodale,Michael S.等人於2005年3月21日申請的美國專利申請案序號11/085,372,名稱為“用於諧振頻率控制及選擇之互導及電流調變”,並且主張該美國專利申請案的優先權,該美國專利申請案更主張美國臨時專利申請案序號60/555,193的優先權,該美國臨時專利申請案係與本案共同被讓與,其所有的內容係被納入在此作為參考,並且對於所有共同被揭露的標的主張優先權。This application is also related to U.S. Patent Application Serial No. 11/085,372, filed on March 21, 2005, to the name of <RTI ID=0.0>> And claiming the priority of the U.S. Patent Application, which claims the priority of U.S. Provisional Patent Application Serial No. 60/555,193, which is assigned to the present application, all of which is incorporated herein by reference. It is incorporated herein by reference and claims the priority of all commonly disclosed subject matter.

本發明係大致有關於振盪或是時脈信號的產生,並且特別是有關於一種時脈信號產生器及時序/頻率參考器,其係自由運作、自我參考、在有關製程、電壓及溫度方面是準確的、具有低抖動、且可被單片地與其它電路整合以形成單一的積體電路。The present invention relates generally to the generation of an oscillating or clock signal, and more particularly to a clock signal generator and a timing/frequency reference, which are free-running, self-referencing, in terms of process, voltage and temperature. Accurate, low jitter, and monolithically integrated with other circuits to form a single integrated circuit.

準確的時脈產生器或時序參考器係通常為仰賴於晶體振盪器,諸如:石英振盪器,其係提供於一特定頻率下之一種機械式、諧振的振動。關於此種晶體振盪器之困難度係在於:其無法被製造成為藉由其時脈信號所驅動之同一個積體電路(“IC”)之一部分。舉例而言,諸如英特爾奔騰(Pentium)處理器之微處理器係需要一個單獨的時脈IC。結果,幾乎所有需要準確時脈信號的電路都需要一個晶片外(off-chip)的時脈產生器。An accurate clock generator or timing reference system typically relies on a crystal oscillator, such as a quartz oscillator, which provides a mechanical, resonant vibration at a particular frequency. The difficulty with such a crystal oscillator is that it cannot be fabricated as part of the same integrated circuit ("IC") driven by its clock signal. For example, a microprocessor such as the Intel Pentium processor requires a separate clock IC. As a result, almost all circuits that require accurate clock signals require an off-chip clock generator.

針對於該種非整合的解決方式係存在有幾個後果。舉例而言,因為該種處理器必須透過外部的電路(例如是在印刷電路板(PCB)之上)而連接,因此耗電係相對地提高了。在仰賴於有限的電源(諸如:於行動通訊之電池電力)的應用中,此種額外的耗電是不利的。There are several consequences for this non-integrated solution. For example, because such processors must be connected through external circuitry, such as over a printed circuit board (PCB), the power consumption is relatively increased. In applications that rely on limited power sources, such as battery power for mobile communications, such additional power consumption is disadvantageous.

此外,該種需要額外的IC之非整合的解決方式無論是於PCB上或於成品內都增加了空間與面積的需求,此亦不利於行動環境。甚者,此種額外的構件係增加了製造與生產成本,因為額外的IC必須被製造且組裝於主要電路(諸如:微處理器)中。In addition, this non-integrated solution that requires additional ICs increases the space and area requirements on the PCB or in the finished product, which is also detrimental to the mobile environment. Moreover, such additional components add manufacturing and manufacturing costs because additional ICs must be fabricated and assembled in a primary circuit such as a microprocessor.

與其它電路一起形成為積體電路的其它時脈產生器通常並不夠準確,尤其是經過製程、電壓與溫度(PVT)變化更是如此。舉例而言,環式(ring)、弛張(relaxation)與相位移振盪器係可提供適用於某些低靈敏度的應用之時脈信號,但已無法提供於某些較為複雜的電子電路(例如,於需要相當大的處理能力或資料通訊的應用中)所需之較高的準確度。此外,此等時脈產生器或振盪器係經常呈現出可觀的頻率漂移、抖動,具有相當低的Q值,且為受到來自雜訊或其它干擾之其它的失真。Other clock generators that are formed as integrated circuits with other circuits are often not accurate enough, especially through process, voltage and temperature (PVT) variations. For example, ring, relaxation, and phase shift oscillators provide clock signals for certain low sensitivity applications, but are not available in some of the more complex electronic circuits (eg, High accuracy required for applications that require considerable processing power or data communication. Moreover, such clock generators or oscillators often exhibit considerable frequency drift, jitter, have a relatively low Q value, and are subject to other distortions from noise or other interference.

因此,對於可被單片式與其它電路整合(作為單一個IC)且為高度準確於PVT變化之一種時脈產生器或時序參考器的需求係仍然存在。此種時脈產生器或時序參考器係應為自由運作及自我參考的,且應不需要鎖定或參考至另一個參考信號。此種時脈產生器或時序參考器係應呈現出最小的頻率漂移且具有相當低的抖動,且應為適用於需要高度準確的系統時脈之應用。此種時脈產生器或時序參考器也應提供多種操作模式,其包括:一時脈模式、一參考模式、一省電模式與一脈衝模式。最後,此種時脈產生器或時序參考器應該響應於在環境或接面溫度上的變化、或是在其它例如是電壓、製程、頻率及老化的參數上的變化來對輸出頻率提供控制,以提供一個穩定且為所要的頻率。Therefore, there is still a need for a clock generator or timing reference that can be monolithically integrated with other circuits (as a single IC) and that is highly accurate to PVT variations. Such a clock generator or timing reference system should be free-running and self-referential and should not require locking or reference to another reference signal. Such a clock generator or timing reference system should exhibit minimal frequency drift and have relatively low jitter and should be suitable for applications requiring a highly accurate system clock. Such a clock generator or timing reference should also provide a plurality of modes of operation including: a clock mode, a reference mode, a power save mode, and a pulse mode. Finally, such a clock generator or timing reference should provide control over the output frequency in response to changes in ambient or junction temperature, or changes in other parameters such as voltage, process, frequency, and aging, To provide a stable and desired frequency.

在各種的範例實施例中,本發明係提出一種產生一頻率參考信號的裝置。該裝置係包括一個可利用一或多個電感器及電容器(作為“LC-諧振電路(tank)”)而被實施的諧振器、一個互導放大器、一個頻率控制器、以及一個溫度補償器,用於提供開迴路的頻率控制及選擇一種低抖動、自由運作及自我參考之時脈產生器及/或時序與頻率參考器,其在PVT與老化(時間)的變化下係為高度準確的,且其可被單片式與其它電路整合以形成單一個積體電路。其並不需要單獨的參考振盪器,並且該些範例的實施例並不是相位鎖定、延遲鎖定或者是鎖定到任何其它的頻率參考。而是,該些範例的實施例可被利用作為此種產生一頻率參考信號的參考振盪器,其接著可以鎖定至一或多個相位鎖定或是延遲鎖定迴路。本發明之各種範例的實施例係包括用於在製程、電壓與溫度(PVT)的變化下產生高度準確的頻率之特點。此等特點係包括頻率調諧與選擇、及對於歸因於溫度及/或電壓變動與製程變化、以及由於積體電路的老化所造成的變化所引起之頻率變化的補償。In various exemplary embodiments, the present invention provides an apparatus for generating a frequency reference signal. The device includes a resonator that can be implemented using one or more inductors and capacitors (as an "LC-resonator"), a transconductance amplifier, a frequency controller, and a temperature compensator. Used to provide open loop frequency control and to select a low jitter, free running and self-referencing clock generator and/or timing and frequency reference, which is highly accurate in terms of PVT and aging (time) changes, And it can be monolithically integrated with other circuits to form a single integrated circuit. It does not require a separate reference oscillator, and embodiments of these examples are not phase locked, delayed locked, or locked to any other frequency reference. Rather, embodiments of these examples can be utilized as such a reference oscillator that generates a frequency reference signal that can then be locked to one or more phase locked or delayed locked loops. Embodiments of various examples of the invention include features for producing highly accurate frequencies under variations in process, voltage, and temperature (PVT). These characteristics include frequency tuning and selection, and compensation for frequency variations due to temperature and/or voltage variations and process variations, as well as variations due to aging of the integrated circuit.

對於可能需要高Q值、低抖動以及低相位雜訊的應用而言,諧振器典型是包括一或多個電感器及電容器,其係構成一或多個LC-諧振電路或是LC諧振器。在第一實施例中,雙重平衡的差動LC振盪器拓撲結構係被利用。在其它範例實施例中,差動或單端LC振盪器拓撲結構可被利用,例如,差動n-MOS交叉耦接拓撲結構;差動p-MOS交叉耦接拓撲結構;單端Colpitts LC振盪器、單端Hartley LC振盪器,差動Colpitts LC振盪器(共基極與共集極的兩種形式)、差動Hartley LC振盪器(同樣也是共基極與共集極的兩種形式)、單端Pierce LC振盪器、正交振盪器(例如,由至少兩個雙重平衡的差動LC振盪器所構成)。在任何的這些實施例中,主動式電感器可被利用在LC振盪器中或是在其它電抗元件中。任何這些LC拓撲結構都可被實施為平衡、交叉耦接、差動、或是單端的,並且可利用任何類型的電晶體,例如,n-MOS、p-MOS、或是BJT。現在已知或是將變為已知的其它LC振盪器拓撲結構都被視為等同的,且都在本發明的範疇之內。For applications that may require high Q, low jitter, and low phase noise, the resonator typically includes one or more inductors and capacitors that form one or more LC-resonant circuits or LC resonators. In the first embodiment, a double balanced differential LC oscillator topology is utilized. In other example embodiments, a differential or single-ended LC oscillator topology may be utilized, such as a differential n-MOS cross-coupling topology; a differential p-MOS cross-coupling topology; single-ended Colpitts LC oscillations , single-ended Hartley LC oscillator, differential Colpitts LC oscillator (both base and common collector), differential Hartley LC oscillator (also in two forms of common base and common collector) A single-ended Pierce LC oscillator, a quadrature oscillator (eg, consisting of at least two double balanced differential LC oscillators). In any of these embodiments, the active inductor can be utilized in an LC oscillator or in other reactive components. Any of these LC topologies can be implemented as balanced, cross-coupled, differential, or single-ended, and any type of transistor can be utilized, such as n-MOS, p-MOS, or BJT. Other LC oscillator topologies now known or to become known are considered equivalent and are within the scope of the present invention.

本發明的範例實施例亦提供數種不同程度與類型的控制。例如,即時地提供不連續與連續的兩種控制,以用於按照此類的變化來控制該自由運作的振盪器之輸出頻率。此外,該種控制一般是以開迴路來提供之,而不需要(或必需要有)回授連接,而且也不需要將該振盪器持續的鎖定到另一個參考信號。Exemplary embodiments of the present invention also provide for varying degrees and types of control. For example, both discontinuous and continuous control are provided on-the-fly to control the output frequency of the free-running oscillator in accordance with such variations. Moreover, such control is typically provided in an open loop without the need for (or necessarily) a feedback connection, and there is no need to continuously lock the oscillator to another reference signal.

此外,本發明之範例實施例係提出一種時脈產生器及/或時序與頻率參考器,其具有包括諸如一省電模式、一時脈模式、一參考模式與一脈衝模式之模式的多種操作模式。此外,各種的實施例係提供於不同頻率下的多個輸出信號,且提供在此等各種信號之間的低延遲與無突波(glitch-free)之切換。Furthermore, exemplary embodiments of the present invention provide a clock generator and/or timing and frequency reference having a plurality of modes of operation including modes such as a power save mode, a clock mode, a reference mode, and a pulse mode. . Moreover, various embodiments provide multiple output signals at different frequencies and provide low latency and glitch-free switching between such various signals.

重要的是,本發明之各種範例的實施例係產生顯著且相當高的頻率,諸如於數百MHz與GHz之範圍內,其接著被除頻為複數個較低的頻率。各個該種除以“N”(一個為整數之比率的有理數)的除頻係造成顯著的雜訊降低,其中相位雜訊降低N倍而且相位雜訊功率降低N2 倍。因此,本發明之範例實施例係造成相較於其它直接或透過倍頻來產生其輸出的振盪器為顯著較低的相對週期抖動。Importantly, embodiments of the various exemplary embodiments of the present invention produce significant and relatively high frequencies, such as in the range of hundreds of MHz and GHz, which are then divided into a plurality of lower frequencies. Each of these divisions divided by "N" (a rational number of integers) causes significant noise reduction, where phase noise is reduced by a factor of N and phase noise power is reduced by a factor of two . Thus, exemplary embodiments of the present invention result in significantly lower relative period jitter than oscillators that produce their output directly or through frequency multiplication.

各種的裝置實施例係包括一諧振器、一放大器以及一頻率控制器,其可包含各種的構件或模組,諸如:一溫度補償器、一製程變化補償器、一電壓隔離器及/或電壓補償器、一老化(時間)變化補償器、一除頻器以及一頻率選擇器。該諧振器係提供具有一諧振頻率之一第一信號。一溫度補償器係響應於溫度而調整該諧振頻率,且該製程變化補償器係響應於製程變化而調整該諧振頻率。此外,各種的實施例亦可包含:一除頻器,以將具有諧振頻率之第一信號除頻成為具有對應的複數個頻率之複數個第二信號,該複數個頻率係實質為等於或低於該諧振頻率;以及一頻率選擇器,以提供來自該複數個第二信號之一輸出信號。該頻率選擇器可更包含一突波抑制器。該輸出信號係可以各種形式之任一者來加以提供,諸如:差動或單端、以及實質方波或正弦、或是展頻(spread-spectrum)的形式。Various device embodiments include a resonator, an amplifier, and a frequency controller, which can include various components or modules, such as: a temperature compensator, a process variation compensator, a voltage isolator, and/or voltage. A compensator, an aging (time) change compensator, a frequency divider, and a frequency selector. The resonator is provided with a first signal having a resonant frequency. A temperature compensator adjusts the resonant frequency in response to temperature, and the process variation compensator adjusts the resonant frequency in response to a process change. In addition, various embodiments may further include: a frequency divider to divide the first signal having the resonant frequency into a plurality of second signals having a corresponding plurality of frequencies, the plurality of frequencies being substantially equal to or lower And the frequency selector; and a frequency selector for providing an output signal from one of the plurality of second signals. The frequency selector can further include a surge suppressor. The output signal can be provided in any of a variety of forms, such as differential or single-ended, and substantially square or sinusoidal, or in the form of a spread-spectrum.

本發明之範例實施例係提出一種用於整合式自由運作的簡諧(harmonic)振盪器的頻率控制之裝置,其係包括一個諧振器,該諧振器係適配於提供一個具有一諧振頻率之第一信號;一個感測器,其係適配於響應複數個參數中之至少一個參數來提供一個例如是控制電壓的第二信號;以及一個頻率控制器,其係耦接至該感測器並且可耦接至該諧振器,其中該頻率控制器係適配於響應該第二信號來修改一個耦接至諧振器的電抗元件以修改該諧振頻率。該複數個參數是可變的,並且包括下列的參數中之至少一個參數:溫度、製程、電壓、頻率以及老化(亦即,經過的時間)。Exemplary embodiments of the present invention provide a frequency control device for an integrated free-running harmonic oscillator that includes a resonator adapted to provide a resonant frequency a first signal; a sensor adapted to provide a second signal, such as a control voltage, in response to at least one of a plurality of parameters; and a frequency controller coupled to the sensor And coupled to the resonator, wherein the frequency controller is adapted to modify a reactance element coupled to the resonator to modify the resonant frequency in response to the second signal. The plurality of parameters are variable and include at least one of the following parameters: temperature, process, voltage, frequency, and aging (ie, elapsed time).

在範例的實施例中,該頻率控制器更適配於響應該第二信號來修改一個耦接至諧振器之有效電抗或阻抗元件,例如,響應於該第二信號來修改該諧振器的總電容、將一固定的或是可變的電容耦合到該諧振器或是從該諧振器去耦合之、藉由改變或切換一個變容器(varactor)至一所選的控制電壓來修改該諧振器的有效電抗、或是響應於該第二信號來等效地修改該諧振器的電感或電阻,例如,藉由將一固定或是可變的電感或電阻耦合到該諧振器或是從該諧振器去耦合之。在其它實施例中,有差別加權的(differentially weighted)電抗或是有差別大小的電抗(例如,可變電容器(變容器))可被切換至該諧振器或是從該諧振器移去、可被切換至複數個不同之可選的控制電壓或是從複數個不同之可選的控制電壓移去、或二者皆是。例如,在選定的實施例中,耦接至該諧振器的一或多個可變電容器的電抗可藉由切換該一或多個可變電容器至複數個控制電壓中之一所選的控制電壓來加以改變,此係導致不同或是有差別加權的有效電抗耦合至該諧振器。In an exemplary embodiment, the frequency controller is further adapted to modify an effective reactance or impedance element coupled to the resonator in response to the second signal, for example, modifying the total of the resonator in response to the second signal Capacitor, coupling a fixed or variable capacitance to or decoupled from the resonator, modifying or modifying a resonator by changing or switching a varactor to a selected control voltage Effective reactance, or equivalently modifying the inductance or resistance of the resonator in response to the second signal, for example, by coupling a fixed or variable inductance or resistance to the resonator or from the resonance The device is decoupled. In other embodiments, a differentially weighted reactance or a differentially sized reactance (eg, a variable capacitor (varactor)) can be switched to or removed from the resonator. Switched to a plurality of different selectable control voltages or removed from a plurality of different selectable control voltages, or both. For example, in selected embodiments, the reactance of one or more variable capacitors coupled to the resonator can be controlled by switching the one or more variable capacitors to one of a plurality of control voltages. To change, this results in a different or differentially weighted effective reactance coupled to the resonator.

例如,複數個固定的電容(具有不同的二進制(binary)加權的電容或是有差別加權的電容)可被耦合至該諧振器以提供離散(discrete)位準的頻率控制,並且一個耦接至該諧振器的變容器可被提供複數個控制電壓中之一所選的控制電壓,該所選的控制電壓係響應於溫度而改變,其可被利用以在此種溫度變動下維持一個固定的頻率,並且其係提供連續位準的頻率控制。此外,任何的此種控制電壓都可以響應於一個所選的參數(例如溫度)而變化、或者可以相對於此一參數是固定的。所利用的各種電抗之不同的權重可以用複數個形式來體現,例如,二進制加權的、線性加權的或是利用任何其它所期望的方式加權的,其全部都被視為均等的且在本發明的範疇之內。For example, a plurality of fixed capacitors (having different binary weighted or differentially weighted capacitors) can be coupled to the resonator to provide discrete level frequency control, and one coupled to The varactor of the resonator can be provided with a control voltage selected by one of a plurality of control voltages that are responsive to temperature, which can be utilized to maintain a fixed temperature variation Frequency, and it provides continuous level frequency control. Moreover, any such control voltage may vary in response to a selected parameter (e.g., temperature) or may be fixed relative to the one parameter. The different weights of the various reactances utilized may be embodied in a plurality of forms, for example, binary weighted, linearly weighted, or weighted in any other desired manner, all of which are considered equal and in the present invention. Within the scope of the category.

應注意到的是,該用語“固定的”以及“可變的”係以在該項技術中已知的意義來運用之,其中“固定的”係被理解成表示一般被配置為相對於一個所選的參數是不會變化的,而“可變的”係表示一般被配置為相對於該所選的參數是有變化的。例如,一個固定的電容器一般是表示其電容並不會以一個所施加的電壓之函數來變化,而一個可變電容器(變容器)將具有確實以一個所施加的電壓之函數來變化的電容。然而,兩種電容器可能會有而且是一般都會有隨著一個製程變化的函數來變化的電容。此外,一個固定的電容器例如是可被形成為一個耦合至一固定的電壓之變容器。類似地,構件可以直接或間接地彼此耦合,換言之,在操作上耦合的或是經由信號的發送而耦合的。例如,一個構件可經由一第三構件而被耦合至一第二構件,例如是透過一個切換配置、一個除頻器、一個乘法器、等等。熟習此項技術者將會理解以下所描繪且論述的這些各種情況與背景、以及當此種用語被運用時所代表的意義為何。It should be noted that the terms "fixed" and "variable" are used in the senses known in the art, wherein "fixed" is understood to mean that it is generally configured to be relative to one The selected parameters are not changed, while the "variable" representation is generally configured to vary with respect to the selected parameters. For example, a fixed capacitor generally means that its capacitance does not change as a function of the applied voltage, and a variable capacitor (varactor) will have a capacitance that does vary as a function of the applied voltage. However, both capacitors may have and generally have capacitances that vary as a function of process variation. Furthermore, a fixed capacitor can be formed, for example, as a varactor coupled to a fixed voltage. Similarly, components may be coupled to one another, directly or indirectly, in other words, operatively coupled or coupled via signal transmission. For example, a component can be coupled to a second component via a third component, such as through a switching configuration, a frequency divider, a multiplier, and the like. Those skilled in the art will appreciate the various scenarios and contexts depicted and discussed below, as well as the meanings that are used when such terms are used.

在範例的實施例中,該頻率控制器可進一步包括:一個適配於儲存第一複數個係數的係數暫存器;以及一個第一陣列,其係具有複數個耦接至該係數暫存器並且可耦接至該諧振器的可切換的電容性模組,每個可切換的電容性模組都具有一個固定的電容以及一個可變的電容,每個可切換的電容性模組均響應於該第一複數個係數中之一個對應的係數以在該固定的電容與可變的電容之間切換,並且切換每個可變的電容至一個控制電壓。該複數個可切換的電容性模組可以是二進制加權的。該頻率控制器可進一步包括一個第二陣列,其係具有複數個耦接至該係數暫存器的可切換的電阻性模組,並且更具有一個電容性模組,該電容性模組以及該複數個可切換的電阻性模組進一步耦接至一個節點以提供該控制電壓,其中每個可切換的電阻性模組均響應於儲存在該係數暫存器中的第二複數個係數中之一個對應的係數,以切換該可切換的電阻性模組至該控制電壓節點。在選定的實施例中,該感測器更包括一個響應於溫度的電流源,其中該電流源係透過一個電流鏡而被耦接至該第二陣列以在橫跨該複數個可切換的電阻性模組中之至少一個可切換的電阻性模組上產生該控制電壓。同樣在選定的實施例中,該電流源具有至少一個與絕對溫度成互補的(“CTAT”)配置、與絕對溫度成比例的(“PTAT”)配置、與絕對溫度平方成比例的(“PTAT2 ”)之配置、或是這些配置的組合。此外,該複數個可切換的電阻性模組之每個可切換的電阻性模組對於一個所選的電流都具有一個不同的溫度響應。In an exemplary embodiment, the frequency controller may further include: a coefficient register adapted to store the first plurality of coefficients; and a first array having a plurality of couplings to the coefficient register And a switchable capacitive module coupled to the resonator, each switchable capacitive module has a fixed capacitance and a variable capacitance, and each switchable capacitive module is responsive A coefficient corresponding to one of the first plurality of coefficients is switched between the fixed capacitance and the variable capacitance, and each variable capacitance is switched to a control voltage. The plurality of switchable capacitive modules can be binary weighted. The frequency controller may further include a second array having a plurality of switchable resistive modules coupled to the coefficient register, and further having a capacitive module, the capacitive module and the A plurality of switchable resistive modules are further coupled to a node to provide the control voltage, wherein each switchable resistive module is responsive to a second plurality of coefficients stored in the coefficient register A corresponding coefficient to switch the switchable resistive module to the control voltage node. In selected embodiments, the sensor further includes a current source responsive to temperature, wherein the current source is coupled to the second array through a current mirror to span the plurality of switchable resistors The control voltage is generated on at least one switchable resistive module of the module. Also in selected embodiments, the current source has at least one complementary to absolute temperature ("CTAT") configuration, proportional to absolute temperature ("PTAT") configuration, proportional to absolute temperature squared ("PTAT 2 ") configuration, or a combination of these configurations. In addition, each of the switchable resistive modules of the plurality of switchable resistive modules has a different temperature response for a selected current.

在其它範例的實施例中,該感測器是一個參數(溫度、製程、電壓、老化、等等)感測器並且響應於該所選的參數之變化來改變該第二信號;例如,該感測器可以是一個溫度或電壓感測器並且響應於溫度或電壓變化來改變該第二信號。該所選的實施例亦可包含一個耦接至該感測器的類比至數位轉換器以響應於該第二信號來提供一個數位輸出信號,並且包含一個控制邏輯區塊以轉換該數位輸出信號成為該第一複數個係數。In other exemplary embodiments, the sensor is a parameter (temperature, process, voltage, aging, etc.) sensor and changes the second signal in response to changes in the selected parameter; for example, The sensor can be a temperature or voltage sensor and change the second signal in response to a change in temperature or voltage. The selected embodiment can also include an analog to digital converter coupled to the sensor to provide a digital output signal in response to the second signal and including a control logic block to convert the digital output signal Become the first plurality of coefficients.

在其它範例的實施例中,該頻率控制器係更包括一個製程變化補償器,其可耦接至該諧振器且適配於響應該複數個參數中之一個製程參數來修改該諧振頻率。該製程變化補償器可進一步包括一個適配於儲存複數個係數的係數暫存器;以及一個陣列,其係具有複數個耦接至該係數暫存器以及該諧振器的二進制加權的可切換的電容性模組,每個可切換的電容性模組都具有一個第一固定的電容以及一個第二固定的電容,其中每個可切換的電容性模組均響應於該複數個係數中之一個對應的係數以在該第一固定的電容以及該第二固定的電容之間切換。在其它範例的實施例中,該製程變化補償器可進一步包括一個適配於儲存複數個係數的係數暫存器;以及一個陣列,其係具有複數個耦接至該係數暫存器以及該諧振器之可切換的可變的電容性模組,每個可切換的可變的電容性模組均響應於該複數個係數中之一個對應的係數以在一個第一電壓以及一個第二電壓之間切換,例如,切換至一個所選的控制電壓。In other exemplary embodiments, the frequency controller further includes a process variation compensator coupled to the resonator and adapted to modify the resonant frequency in response to one of the plurality of parameters. The process variation compensator can further include a coefficient register adapted to store a plurality of coefficients; and an array having a plurality of binary weighted switchable coupled to the coefficient register and the resonator a capacitive module, each switchable capacitive module having a first fixed capacitance and a second fixed capacitance, wherein each switchable capacitive module is responsive to one of the plurality of coefficients Corresponding coefficients are switched between the first fixed capacitance and the second fixed capacitance. In other exemplary embodiments, the process variation compensator can further include a coefficient register adapted to store a plurality of coefficients; and an array having a plurality of couplings to the coefficient register and the resonance The switchable variable capacitive module, each switchable variable capacitive module is responsive to a corresponding one of the plurality of coefficients to be at a first voltage and a second voltage Switch between, for example, switching to a selected control voltage.

在其它範例的實施例中,頻率控制器係更包括一個適配於儲存第一複數個係數的係數暫存器;以及一個第一陣列,其係具有複數個耦接至該係數暫存器並且可耦接至該諧振器的可切換的電容性模組,每個可切換的電容性模組都具有一個可變的電容,每個可切換的電容性模組均響應於該第一複數個係數中之一個對應的係數,以切換該可變的電容至複數個控制電壓中之一個所選的控制電壓。在其它範例的實施例中,該製程變化補償器可進一步包括一個適配於儲存至少一個係數的係數暫存器;以及至少一個耦接至該係數暫存器以及該諧振器之可切換的可變的電容性模組,其係響應於該至少一個係數以切換至一個所選的控制電壓。該感測器可包括一個響應於溫度的電流源,並且該頻率控制器亦可包含一個第二陣列,其係具有複數個透過一個電流鏡耦接至該電流源的電阻性模組,該複數個電阻性模組係適配於提供該複數個控制電壓,並且其中該複數個電阻性模組的每個電阻性模組對於溫度都具有一個不同的響應,並且適配於響應一個來自該電流源的電流來提供該複數個控制電壓中之一個對應的控制電壓。In other exemplary embodiments, the frequency controller further includes a coefficient register adapted to store the first plurality of coefficients; and a first array having a plurality of coupled to the coefficient register and a switchable capacitive module coupled to the resonator, each switchable capacitive module having a variable capacitance, each switchable capacitive module responsive to the first plurality of A coefficient corresponding to one of the coefficients to switch the variable capacitance to a selected one of the plurality of control voltages. In other exemplary embodiments, the process variation compensator can further include a coefficient register adapted to store at least one coefficient; and at least one switchable to the coefficient register and the resonator The variable capacitive module is responsive to the at least one coefficient to switch to a selected control voltage. The sensor may include a current source responsive to temperature, and the frequency controller may further include a second array having a plurality of resistive modules coupled to the current source through a current mirror, the plurality Each of the resistive modules is adapted to provide the plurality of control voltages, and wherein each of the plurality of resistive modules has a different response to temperature and is adapted to respond to a current from the current The source current provides a corresponding control voltage for the one of the plurality of control voltages.

在其它範例的實施例中,一種用於一個諧振器的頻率控制之裝置係包括一個適配於儲存第一複數個係數的係數暫存器;以及一個第一陣列,其係具有複數個耦接至該係數暫在器以及該諧振器的可切換的電抗或阻抗模組,每個可切換的電抗模組均響應於該第一複數個係數中之一個對應的係數以切換一個對應的電抗來修改該諧振頻率。該對應的電抗或阻抗可以是一個固定的或是可變的電感、一個固定的或是可變的電容、一個固定的或是可變的電阻、或是其等的任意組合。該對應的電抗可被切換至該諧振器、或者是當耦合至該諧振器時,可被切換至一個控制電壓、一個電源電壓或是一個接地電位,並且該控制電壓可藉由一個響應於溫度的電流源來加以決定。例如,該對應的電抗是可變的,並且耦合至該諧振器且被切換至複數個控制電壓中之一個所選的控制電壓。在選定的實施例中,該第一複數個係數係藉由一個響應於複數個可變的參數中的至少一個參數(例如,溫度、製程、電壓、頻率以及老化)的感測器來加以校準或決定之。In other exemplary embodiments, an apparatus for frequency control of a resonator includes a coefficient register adapted to store a first plurality of coefficients; and a first array having a plurality of couplings Up to the coefficient temporary device and the switchable reactance or impedance module of the resonator, each switchable reactance module is responsive to a corresponding one of the first plurality of coefficients to switch a corresponding reactance Modify the resonant frequency. The corresponding reactance or impedance can be a fixed or variable inductance, a fixed or variable capacitance, a fixed or variable resistance, or any combination thereof. The corresponding reactance can be switched to the resonator or, when coupled to the resonator, can be switched to a control voltage, a supply voltage or a ground potential, and the control voltage can be responsive to temperature The current source is used to decide. For example, the corresponding reactance is variable and coupled to the resonator and switched to a selected one of a plurality of control voltages. In selected embodiments, the first plurality of coefficients are calibrated by a sensor responsive to at least one of a plurality of variable parameters (eg, temperature, process, voltage, frequency, and aging) Or decide.

在其它範例的實施例中,一種用於一個整合式自由運作的簡諧振盪器的頻率控制之裝置係包括:複數個適配於產生複數個控制電壓的電阻性模組;複數個耦接至該簡諧振盪器的受控電抗模組;以及複數個耦接至該複數個電阻性模組以及該複數個受控電抗模組的開關,其中該複數個開關係響應於一個控制信號以耦接該複數個控制電壓中之一個第一控制電壓至該複數個受控電抗模組中之一個第一受控電抗模組,以修改該簡諧振盪器的一個諧振頻率。In other exemplary embodiments, a frequency control device for an integrated free-running harmonic oscillator includes: a plurality of resistive modules adapted to generate a plurality of control voltages; a plurality of coupled to a controlled reactance module of the harmonic oscillator; and a plurality of switches coupled to the plurality of resistive modules and the plurality of controlled reactance modules, wherein the plurality of open relationships are coupled in response to a control signal And connecting a first control voltage of the plurality of control voltages to one of the plurality of controlled reactance modules to modify a resonant frequency of the harmonic oscillator.

如上所述,該裝置亦可包含一個耦接至該複數個電阻性模組的電流源,其中該電流源係適配於提供一個參數相依的電流至該複數個電阻性模組中的至少一個電阻性模組以產生該複數個控制電壓中之至少一個控制電壓,該控制電壓是參數相依的。在其它實施例中,該電流源係適配於提供一個實質上與參數無關的電流至該複數個電阻性模組中的至少一個電阻性模組,以產生該複數個控制電壓中之至少一個控制電壓,該控制電壓係實質上與參數無關的。根據該範例的實施例,該複數個可切換的電阻性模組之每個可切換的電阻性模組對於一個所選的電流都可以具有一個不同的溫度響應。因此,當該參數是溫度時,該複數個控制電壓中的至少一個控制電壓是溫度相依的,而該複數個控制電壓中的至少一個控制電壓係實質上與溫度無關的。As described above, the device can also include a current source coupled to the plurality of resistive modules, wherein the current source is adapted to provide a parameter dependent current to at least one of the plurality of resistive modules The resistive module generates at least one of the plurality of control voltages, the control voltage being parameter dependent. In other embodiments, the current source is adapted to provide a substantially parameter-independent current to at least one of the plurality of resistive modules to generate at least one of the plurality of control voltages The control voltage is substantially independent of the parameters. According to this exemplary embodiment, each of the switchable resistive modules of the plurality of switchable resistive modules can have a different temperature response for a selected current. Thus, when the parameter is temperature, at least one of the plurality of control voltages is temperature dependent, and at least one of the plurality of control voltages is substantially temperature independent.

該範例的裝置亦可以包括一個耦接至該複數個開關並且適配於儲存第一複數個係數的係數暫存器,其中該控制信號係藉由該第一複數個係數中之至少一個係數來加以提供。該複數個受控電抗模組可進一步包括複數個有差別(例如,二進制)加權之固定的電容以及可變的電容,並且其中該複數個開關係響應於該第一複數個係數以耦合一固定的電容至該簡諧振盪器,並且耦接該複數個控制電壓中之一個第一控制電壓至一個被耦合至該簡諧振盪器之可變的電容。該複數個電阻性模組可進一步包括複數個耦接至該係數暫存器之可切換的電阻性模組以及一個電容性模組,該電容性模組以及該複數個可切換的電阻性模組進一步耦接至一個節點以提供該第一控制電壓,其中每個可切換的電阻性模組均響應於儲存在該係數暫在器中的第一複數個係數中之一個對應的係數,以切換該可切換的電阻性模組至該控制電壓節點。The apparatus of the example may also include a coefficient register coupled to the plurality of switches and adapted to store the first plurality of coefficients, wherein the control signal is by at least one of the first plurality of coefficients Provide it. The plurality of controlled reactance modules may further include a plurality of differential (eg, binary) weighted fixed capacitances and variable capacitances, and wherein the plurality of open relationships are coupled to the first plurality of coefficients in response to the fixed one Capacitance to the harmonic oscillator and coupling one of the plurality of control voltages to a variable capacitance coupled to the harmonic oscillator. The plurality of resistive modules may further include a plurality of switchable resistive modules coupled to the coefficient register and a capacitive module, the capacitive module and the plurality of switchable resistive modes The group is further coupled to a node to provide the first control voltage, wherein each switchable resistive module is responsive to a corresponding one of a first plurality of coefficients stored in the coefficient temporary Switching the switchable resistive module to the control voltage node.

在範例的實施例中,一個類比至數位轉換器可被耦接至該複數個可切換的電阻性模組以響應於該第一控制電壓來提供一個數位輸出信號,以例如是轉換一溫度相依的電流(作為一個感測器)成為一個數位形式;以及一個控制邏輯區塊以轉換該數位輸出信號成為該第一複數個係數或是該控制信號。In an exemplary embodiment, an analog to digital converter can be coupled to the plurality of switchable resistive modules to provide a digital output signal in response to the first control voltage, for example, to convert a temperature dependent The current (as a sensor) becomes a digital form; and a control logic block converts the digital output signal into the first plurality of coefficients or the control signal.

此外,在範例的實施例中,該複數個受控電抗模組更包括:複數個耦接至該係數暫存器之可切換的電容性模組,並且該複數個可切換的電容性模組可耦接至該簡諧振盪器,其中每個可切換的電容性模組都具有一個可變的電容,並且其中每個可切換的電容性模組均響應於該第一複數個係數中之一個對應的係數以切換該可變的電容至該複數個控制電壓中之一個所選的控制電壓。根據該實施例,一個響應於複數個可變的參數中之一個參數的電流源係透過一個電流鏡而被耦接至該複數個電阻性模組;其中該複數個電阻性模組的每個電阻性模組對於該參數都具有一個不同的響應,並且其係適配於響應一個來自該電流源的電流來提供該複數個控制電壓中之一個對應的控制電壓。根據該實施例,該複數個控制電壓中的至少一個控制電壓實質上是參數相依的,並且該複數個控制電壓中的至少一個控制電壓實質上是與參數無關的。In addition, in the exemplary embodiment, the plurality of controlled reactance modules further includes: a plurality of switchable capacitive modules coupled to the coefficient register, and the plurality of switchable capacitive modules Relatably coupled to the harmonic oscillator, wherein each switchable capacitive module has a variable capacitance, and wherein each switchable capacitive module is responsive to the first plurality of coefficients A corresponding coefficient to switch the variable capacitance to a selected one of the plurality of control voltages. According to this embodiment, a current source responsive to one of the plurality of variable parameters is coupled to the plurality of resistive modules through a current mirror; wherein each of the plurality of resistive modules The resistive module has a different response to the parameter and is adapted to provide a corresponding one of the plurality of control voltages in response to a current from the current source. According to this embodiment, at least one of the plurality of control voltages is substantially parameter dependent, and at least one of the plurality of control voltages is substantially parameter independent.

此外,在範例的實施例中,該複數個受控電抗模組更包括:複數個耦接至該係數暫存器以及該簡諧振盪器的有差別加權之可切換的電容性模組,每個可切換的電容性模組都具有一個第一固定的電容以及一個第二固定的電容,每個可切換的電容性模組均響應於該複數個係數中之一個對應的係數,以在該第一固定的電容以及該第二固定的電容之間切換。在其它實施例中,該複數個受控電抗模組更包括:複數個耦接至該係數暫存器以及該簡諧振盪器之可切換的可變的電容性模組,每個可切換的可變的電容性模組均響應於該複數個係數中之一個對應的係數,以在複數個控制電壓中之一個第一電壓以及一個第二電壓之間切換。並且在其它實施例中,該複數個受控電抗模組更包括:複數個耦接至該係數暫存器以及該簡諧振盪器之可切換的可變的電容性模組,每個可切換的可變的電容性模組均響應於該複數個係數中之一個對應的係數,以切換至複數個控制電壓中之一個所選的控制電壓,該複數個控制電壓係包括複數個不同大小的電壓,並且其中該所選的控制電壓在溫度變化下實質上是固定的。In addition, in an exemplary embodiment, the plurality of controlled reactance modules further includes: a plurality of differentially weighted switchable capacitive modules coupled to the coefficient register and the harmonic oscillator, each Each of the switchable capacitive modules has a first fixed capacitance and a second fixed capacitance, and each switchable capacitive module is responsive to a corresponding one of the plurality of coefficients to Switching between the first fixed capacitor and the second fixed capacitor. In other embodiments, the plurality of controlled reactance modules further includes: a plurality of switchable variable capacitive modules coupled to the coefficient register and the harmonic oscillator, each switchable The variable capacitive modules are each responsive to a corresponding one of the plurality of coefficients to switch between a first voltage and a second voltage of the plurality of control voltages. In other embodiments, the plurality of controlled reactance modules further includes: a plurality of switchable variable capacitive modules coupled to the coefficient register and the harmonic oscillator, each switchable The variable capacitive modules are each responsive to a corresponding one of the plurality of coefficients to switch to a selected one of a plurality of control voltages, the plurality of control voltages comprising a plurality of different sizes The voltage, and wherein the selected control voltage is substantially fixed under temperature changes.

此外,在範例的實施例中,該裝置可進一步包括:複數個可切換的電阻器,其係響應於一個控制信號以切換一個對應的電阻至該簡諧振盪器來修改該諧振頻率。該裝置可包含一個分壓器,其係耦接至該複數個受控電抗模組並且適配於響應電壓變化來提供一個所選的控制電壓。此外,一個老化變化補償器可被耦接至該諧振器並且適配於比較該複數個參數中之一個所選的參數之目前的值與該所選的參數之初始的值,並且響應於該所選的參數之目前的值與該初始的值之間的差值來修改該諧振頻率。Moreover, in an exemplary embodiment, the apparatus can further include: a plurality of switchable resistors responsive to a control signal to switch a corresponding resistance to the harmonic oscillator to modify the resonant frequency. The apparatus can include a voltage divider coupled to the plurality of controlled reactance modules and adapted to provide a selected control voltage in response to a voltage change. Additionally, an aging change compensator can be coupled to the resonator and adapted to compare a current value of a selected one of the plurality of parameters with an initial value of the selected parameter, and responsive to the The difference between the current value of the selected parameter and the initial value modifies the resonant frequency.

許多其它範例的實施例係在以下詳細地描繪及說明,並且針對電壓變化以及老化(IC壽命)變化來包含額外的調變器及補償器。Many other example embodiments are depicted and described in detail below, and include additional modulators and compensators for voltage variations and aging (IC life) changes.

本發明亦可包括一個耦接至該頻率選擇器的模式選擇器,其中該模式選擇器係適配於提供複數個操作模式,其可選自一個包含一時脈模式、一時序與頻率參考模式、一省電模式、與一脈衝模式之群組。The present invention can also include a mode selector coupled to the frequency selector, wherein the mode selector is adapted to provide a plurality of modes of operation, which can be selected from the group consisting of a clock mode, a timing and frequency reference mode, A group of power saving modes and a pulse mode.

針對於一個參考模式,本發明亦可包括:一耦接至模式選擇器的同步化電路;以及一耦接至該同步化電路且適配於提供一第三信號的受控振盪器;其中,在時序與參考模式中,該模式選擇器係進一步適配於耦接輸出信號至該同步化電路,以控制第三信號之時序與頻率。該種同步化電路係可為一延遲鎖定迴路、一相位鎖定迴路、或是一注入鎖定電路。For a reference mode, the present invention may further include: a synchronization circuit coupled to the mode selector; and a controlled oscillator coupled to the synchronization circuit and adapted to provide a third signal; wherein In the timing and reference modes, the mode selector is further adapted to couple the output signal to the synchronization circuit to control the timing and frequency of the third signal. The synchronization circuit can be a delay locked loop, a phase locked loop, or an injection locking circuit.

此等與另外的實施例係進一步詳細論述於後。藉由本發明與其實施例之以下的詳細說明,且藉由申請專利範圍及圖式,將會清楚地明瞭本發明之諸多其它的優點與特徵。These and other embodiments are discussed in further detail below. Numerous additional advantages and features of the present invention will become apparent from the Detailed Description of the Drawings.

儘管本發明係容許諸多不同形式之實施例,並且於圖式中顯示且將在此詳細說明其特定例子與實施例,但需瞭解的是,本揭示內容係被視為本發明的原理之例證,而不欲限制本發明於所示的特定例子與實施例。While the present invention is susceptible to various embodiments of the various embodiments of the embodiments of the present invention The specific examples and embodiments of the invention are not intended to be limited.

如上所指出地,本發明之各種的實施例係提供諸多優點,包括有能力整合一種高度準確(於PVT及老化下)、低抖動、自由運作及自我參考之時脈產生器及/或時序與頻率參考器與其它的電路,諸如於圖1所示者。圖1係描繪根據本發明的教示之一個範例的系統實施例150的方塊圖。如圖1所示,系統150係單一個積體電路,其具有與另一(或第二)電路180以及介面(I/F)(或輸入/輸出(I/O)電路)120單片式整合之本發明的一種時脈產生器及/或時序/頻率參考器100。介面120通常將會提供電力(諸如:來自一電源供應器(未顯示))、接地、以及其它線路或匯流排至時脈產生器100,例如是用於校準與頻率選擇。如圖所示,一或多個輸出時脈信號係提供於匯流排125之上,作為複數個頻率,諸如:一第一頻率(f 0 )、一第二頻率(f 1 )、等等、直到一第(n+1)頻率(f n )。此外,一省電模式(或低電力模式(LP))亦被提供(同樣於匯流排125之上)。第二電路180(或I/F 120)亦可提供輸入至時脈產生器100,例如是透過選擇信號(S0 、S1 到Sn )以及一或多個校準信號(C0 、C1 到Cn )。或者是,選擇信號(S0 、S1 到Sn )及一或多個校準信號(C0 、C1 到Cn )係可透過介面120(諸如於匯流排135之上)且連同電源(於線路140之上)與接地(於線路145之上)而直接被提供至時脈產生器100。As indicated above, various embodiments of the present invention provide a number of advantages, including the ability to integrate a highly accurate (under PVT and aging), low jitter, free running, and self-referencing clock generators and/or timing and The frequency reference is connected to other circuits, such as those shown in FIG. 1 is a block diagram depicting a system embodiment 150 in accordance with one example of the teachings of the present invention. As shown in FIG. 1, system 150 is a single integrated circuit having a single chip with another (or second) circuit 180 and an interface (I/F) (or input/output (I/O) circuit) 120. A clock generator and/or timing/frequency reference 100 of the present invention is integrated. The interface 120 will typically provide power (such as from a power supply (not shown), ground, and other lines or busses to the clock generator 100, such as for calibration and frequency selection. As shown, one or more output clock signals are provided on the bus bar 125 as a plurality of frequencies, such as: a first frequency ( f 0 ), a second frequency ( f 1 ), etc. Up to an (n+1) th frequency ( f n ). In addition, a power saving mode (or low power mode (LP)) is also provided (again, above bus bar 125). The second circuit 180 (or I / F 120) can also provide input to clock generator 100 when, for example, through the selection signal (S 0, S 1 to S n) and one or more calibration signal (C 0, C 1 To C n ). Alternatively, the selection signals (S 0 , S 1 to S n ) and the one or more calibration signals (C 0 , C 1 to C n ) are permeable to the interface 120 (such as above the bus bar 135) and together with the power supply ( Directly above line 140) and ground (above line 145) are provided directly to clock generator 100.

除了低電力模式之外,時脈產生器及/或時序/頻率參考器100係具有進一步詳述於後之另外的模式。舉例而言,於一時脈模式中,裝置100將會提供一或多個時脈信號(作為輸出信號)至第二電路180。第二電路180係可為任何型式或種類的電路,例如,微處理器、數位信號處理器(DSP)、射頻電路、或例如是可利用一或多個輸出時脈信號之任何其它的電路。此外,舉例而言,於一時序或頻率參考模式中,來自裝置100之輸出信號係可為一參考信號,例如,用於一第二振盪器之同步化的參考信號。因此,該術語“時脈產生器及/或時序/頻率參考器”將可互換地使用於本文中,且所瞭解的是,該時脈產生器亦將通常為提供一方波的信號,其可被提供一時序/頻率參考器或否、其可改為利用一實質正弦的信號。此外,如進一步詳述於後,本發明之各種的實施例亦提供一脈衝模式,其中,來自時脈產生器及/或時序/頻率參考器100之輸出信號係以叢發(burst)或區間(interval)來加以提供,例如,用於提高指令的處理效率與較低的功率消耗。In addition to the low power mode, the clock generator and/or timing/frequency reference 100 has additional modes as further detailed below. For example, in a clock mode, device 100 will provide one or more clock signals (as output signals) to second circuit 180. The second circuit 180 can be any type or type of circuit, such as a microprocessor, digital signal processor (DSP), radio frequency circuit, or any other circuit that can utilize, for example, one or more output clock signals. Moreover, for example, in a timing or frequency reference mode, the output signal from device 100 can be a reference signal, such as a reference signal for synchronization of a second oscillator. Thus, the term "clock generator and/or timing/frequency reference" will be used interchangeably herein, and it is understood that the clock generator will also typically provide a square wave signal, which may A timing/frequency reference is provided or not, which can instead utilize a substantially sinusoidal signal. Moreover, as further detailed below, various embodiments of the present invention also provide a pulse mode in which the output signals from the clock generator and/or the timing/frequency reference device 100 are bursts or intervals. (interval) is provided, for example, to improve the processing efficiency of instructions and lower power consumption.

應注意到的是,舉例來說,各種的信號、電壓、與參數無關的電流源、等等,都被稱為“實質上”正弦或方波信號、實質上固定的控制電壓、或是實質上與參數無關的電壓或電流。此係考量各種引入的變動、雜訊源以及其它失真,其可能使得此等信號、電壓或電流實際上不同於教科書中所見之較理想的描繪。舉例而言,如進一步詳細論述於後,範例的“實質上”方波信號係描繪於圖15A與15B中,且呈現各種的失真,諸如下衝(undershoot)、過衝(overshoot)、與其它的變化,但仍視為實際上極高品質的方波。It should be noted that, for example, various signals, voltages, parameter-independent current sources, and the like, are referred to as "substantially" sinusoidal or square wave signals, substantially fixed control voltages, or substantial Voltage or current independent of parameters. This is a consideration of various introduced variations, sources of noise, and other distortions that may cause such signals, voltages, or currents to be substantially different from the preferred depictions seen in textbooks. For example, as discussed in further detail below, exemplary "substantial" square wave signals are depicted in Figures 15A and 15B and exhibit various distortions such as undershoot, overshoot, and others. The change, but still regarded as a very high quality square wave.

本發明之數個重要特徵係於系統150中。第一,一種高度準確、低抖動、自由運行及自我參考的時脈產生器100係與其它(第二)電路180單片式整合,以形成單一個積體電路(系統150)。此係明顯對比於習知技術,因為在習知技術中的參考振盪器係被用以提供一時脈信號,例如,一晶體參考振盪器,其無法和其它電路整合,且為晶片外的(off-chip),其係為必須透過一電路板而連接至任何另外的電路之一個第二且單獨的元件。舉例而言,根據本發明,系統150(包括時脈產生器100)係可隨同其它的第二電路一起製造,其係運用習知的CMOS(互補金屬氧化物半導體)、BJT(雙載子接面電晶體)、BiCMOS(雙載子與CMOS)、或是其它利用於現代IC製造中的製造技術。Several important features of the present invention are in system 150. First, a highly accurate, low jitter, free running and self-referencing clock generator 100 is monolithically integrated with other (second) circuits 180 to form a single integrated circuit (system 150). This is a significant contrast to conventional techniques because the reference oscillator in the prior art is used to provide a clock signal, such as a crystal reference oscillator, which cannot be integrated with other circuits and is off-chip (off) -chip), which is a second and separate component that must be connected to any other circuit through a circuit board. For example, in accordance with the present invention, system 150 (including clock generator 100) can be fabricated with other second circuits using conventional CMOS (Complementary Metal Oxide Semiconductor), BJT (dual-carrier connection) Surface transistors), BiCMOS (dual-carrier and CMOS), or other manufacturing technologies used in modern IC manufacturing.

第二,本發明並不需要單獨的參考振盪器。而是根據本發明,時脈產生器100係自我參考及自由運作的,使得其並未參考或鎖定至另一信號,例如,習知技術典型是同步化於一相位鎖定迴路(PLL)、延遲鎖定迴路(DLL)、或是經由注入鎖定至一參考信號。然而,該等範例的實施例可被利用作為此種產生一頻率參考信號的參考振盪器,例如,其接著可以藉由一或多個相位鎖定迴路或是延遲鎖定迴路而被鎖定。Second, the present invention does not require a separate reference oscillator. Rather, in accordance with the present invention, the clock generator 100 is self-referential and free-running such that it is not referenced or locked to another signal. For example, conventional techniques are typically synchronized to a phase locked loop (PLL), delay. Lock the loop (DLL) or lock to a reference signal via injection. However, embodiments of such examples can be utilized as such a reference oscillator that generates a frequency reference signal, for example, which can then be locked by one or more phase locked loops or delay locked loops.

第三,時脈產生器100係提供複數個輸出頻率與一省電摸式,使得頻率係可在低延遲之下且用一種無突波的方式來切換。舉例而言,第二電路180係可轉換至一省電模式,諸如:一電池或較低頻率模式,且請求(透過選擇信號)一較低的時脈頻率以使得功率消耗為最小、或是請求一低功率的時脈信號以進入一睡眠模式。如更為詳細論述於後,此種頻率切換係在實質上可忽略的延遲下被提供的,其具有被引入用於防止突波的低延遲(成比例於所利用之突波防止級的數目),其僅用到少數的時脈週期,而非用到改變來自PLL/DLL之輸出頻率所需的數千個時脈週期。Third, the clock generator 100 provides a plurality of output frequencies and a power saving mode so that the frequency system can be switched at a low delay and in a non-surge manner. For example, the second circuit 180 can be switched to a power saving mode, such as: a battery or a lower frequency mode, and request (via the selection signal) a lower clock frequency to minimize power consumption, or A low power clock signal is requested to enter a sleep mode. As discussed in more detail, such frequency switching is provided at a substantially negligible delay with low delay introduced to prevent glitch (proportional to the number of glitch prevention stages utilized) ), which uses only a few clock cycles, rather than the thousands of clock cycles required to change the output frequency from the PLL/DLL.

額外的實施例亦提供用來產生複數個頻率參考信號(不管是正弦或是方波的),例如是用作為一或多個時脈信號或是參考頻率源。在範例的實施例中,本發明的時脈/頻率參考器係耦接至一或多個相位鎖定迴路(“PLL”)或是延遲鎖定迴路(“DLL”),以提供於所選的頻率下之對應的複數個輸出參考信號。這些範例的實施例典型是可透過控制信號或儲存的係數而加以程式化的,例如,為了對應的頻率選擇而用以調整PLL或DLL的可除頻倍數。Additional embodiments are also provided for generating a plurality of frequency reference signals (whether sinusoidal or square), such as one or more clock signals or a reference frequency source. In an exemplary embodiment, the clock/frequency reference of the present invention is coupled to one or more phase locked loops ("PLLs") or delay locked loops ("DLLs") to provide the selected frequencies. The corresponding multiple output reference signals. Embodiments of these examples are typically programmable via control signals or stored coefficients, for example, to adjust the frequency-division factor of the PLL or DLL for corresponding frequency selection.

此外,在提供有下文所論述之時脈產生器及/或時序/頻率參考器100之極高可利用的輸出頻率之下,新的操作模式係可利用的。舉例而言,時脈的起動時間實際或實質上為可忽略的,而容許時脈產生器及/或時序/頻率參考器100能夠反覆地起動與停止,例如,為了省電而完全關閉或為脈衝式的。舉例而言,其並非為持續運行作為一時脈,該時脈產生器及/或時序/頻率參考器100係可操作於週期式或非週期式之相當短的、離散的區間或叢發(亦即,脈衝式),以用於藉由第二電路180(諸如:處理器)所做的指令處理。如更為詳細論述於後,在快速的起動時間之下,此種脈衝式操作係提供電力節省,因為每微瓦(mW)之功率消耗係處理更多的指令(每秒百萬個指令或MIPS)。此外,除了其它用途之外,此種脈衝模式亦可被利用以週期性同步化一第二時脈或振盪器。因此,該時脈產生器及/或時序/頻率參考器100(以及於下文所論述之其它的實施例)係具有複數個操作模式,其包括:一時脈模式、一時序及/或頻率參考模式、一省電模式、與一脈衝模式。In addition, new operational modes are available under the extremely high output frequencies provided by the clock generator and/or timing/frequency reference 100 discussed below. For example, the start-up time of the clock is actually or substantially negligible, and the allowable clock generator and/or the timing/frequency reference 100 can be started and stopped repeatedly, for example, completely shut down for power saving or Pulsed. For example, it is not a continuous operation, and the clock generator and/or timing/frequency reference device 100 can operate in a relatively short, discrete interval or burst of periodic or aperiodic (also That is, pulsed) for processing by instructions made by the second circuit 180, such as a processor. As discussed in more detail, this pulsed operation provides power savings under fast start-up times because each microwatt (mW) of power consumption processes more instructions (millions of instructions per second or MIPS). Moreover, such pulse modes can be utilized, among other uses, to periodically synchronize a second clock or oscillator. Accordingly, the clock generator and/or timing/frequency reference 100 (and other embodiments discussed below) have a plurality of modes of operation including: a clock mode, a timing and/or frequency reference mode , a power saving mode, and a pulse mode.

第四,如更為詳細論述於後,該時脈產生器及/或時序/頻率參考器100係包括特徵為在製程、電壓、溫度(“PVT”)與老化的變化之下的高度準確的頻率產生。此等特徵係包括頻率調諧與選擇、以及對於可被歸因於溫度及/或電壓變動、製程變化與IC老化所引起的頻率變化之補償。Fourth, as discussed in more detail later, the clock generator and/or timing/frequency reference 100 includes highly accurate features characterized by variations in process, voltage, temperature ("PVT") and aging. Frequency is generated. These characteristics include frequency tuning and selection, as well as compensation for frequency variations that can be attributed to temperature and/or voltage variations, process variations, and IC aging.

第五,該時脈產生器及/或時序/頻率參考器100係產生一顯著且相當高的頻率,諸如:於數百MHz與GHz的範圍,其接著被除頻至複數個較低的頻率。各個此種除頻以“N”(為整數之比率的一個有理數)係造成顯著的雜訊降低,其中相位雜訊為降低N倍,而相位雜訊功率為降低N2 倍。因此,本發明之時脈產生器係造成相較於其它直接或是透過倍頻來產生其輸出的振盪器所可得到者而言為顯著較低的相對週期抖動。Fifth, the clock generator and/or timing/frequency reference 100 produces a significant and relatively high frequency, such as in the range of hundreds of MHz and GHz, which is then divised to a plurality of lower frequencies. . Each such division by "N" (a rational number in the ratio of integers) results in significant noise reduction, where the phase noise is reduced by a factor of N and the phase noise power is reduced by a factor of two . Thus, the clock generator of the present invention results in significantly lower relative period jitter than is available to other oscillators that produce their output either directly or through frequency multiplication.

此等特徵係更為詳細說明於圖2,該圖係描繪根據本發明的教示之第一範例的包含頻率控制器215的裝置200之實施例的方塊圖。如於圖2所示,裝置200係一時脈產生器及/或時序/頻率參考器,其提供一或多個輸出信號,諸如:一具有複數個頻率中之任一者(運用頻率選擇器205所選出)的時脈或參考信號。該裝置(或時脈產生器)200係包括一振盪器210(具有一諧振元件)、一頻率控制器215、一除頻器220、一模式選擇器225、以及上述之頻率選擇器205。根據本發明,振盪器210係產生一具有相當高頻率f 0 之信號。由於上述之PVT或老化的變化,頻率控制器215係被利用以頻率選擇或調諧該振盪器210,使得振盪頻率f 0 係可選自複數個潛在的振盪頻率,亦即,頻率控制器215係提供具有在PVT及老化的變化下為準確的頻率之輸出信號。These features are described in more detail in FIG. 2, which is a block diagram depicting an embodiment of an apparatus 200 including a frequency controller 215 in accordance with a first example of the teachings of the present invention. As shown in FIG. 2, apparatus 200 is a clock generator and/or a timing/frequency reference that provides one or more output signals, such as: one having a plurality of frequencies (using frequency selector 205) The selected clock or reference signal. The apparatus (or clock generator) 200 includes an oscillator 210 (having a resonant element), a frequency controller 215, a frequency divider 220, a mode selector 225, and the frequency selector 205 described above. According to the present invention, based oscillator 210 generates a signal having the relatively high frequency f 0. Due to the above-described changes in PVT or aging, the frequency controller 215 is utilized to frequency select or tune the oscillator 210 such that the oscillating frequency f 0 can be selected from a plurality of potential oscillating frequencies, that is, the frequency controller 215 Provides an output signal with an accurate frequency at PVT and aging changes.

舉例而言,在給定此等PVT變化之下,來自一個振盪器(諸如:振盪器210)之輸出頻率係可變化±5%。對於某些應用而言,諸如:其利用環式振盪器者而言,此種頻率變化性可能是可接受的。然而,根據本發明,時脈產生器200有較大的準確度是所期望的,尤其是對於較靈敏或複雜的應用而言更是如此,諸如:提供用於整合的微處理器、微控制器、數位信號處理器、通信控制器、等等之時脈信號。因此,頻率控制器215係被利用以針對於此等PVT變化而調整,使得來自該振盪器之輸出頻率是所選擇的或是所要的頻率f 0 ,其具有被縮小幾個數量級的變異大小,諸如:±0.25%或更低,且具有相當低的抖動。For example, given these PVT variations, the output frequency from an oscillator (such as oscillator 210) can vary by ±5%. For some applications, such as those utilizing a ring oscillator, such frequency variability may be acceptable. However, in accordance with the present invention, greater accuracy of the clock generator 200 is desirable, especially for more sensitive or complex applications, such as providing microprocessors for integration, micro-control Clock signal of the device, digital signal processor, communication controller, etc. Thus, the frequency controller 215 is utilized to adjust for such PVT variations such that the output frequency from the oscillator is the selected or desired frequency f 0 having a variation size that is reduced by several orders of magnitude, Such as: ±0.25% or lower, and has a relatively low jitter.

根據本發明的教示之頻率控制器215的各種範例的實施例係在以下詳細地被描繪。例如,請參照圖21,該圖是描繪根據本發明的教示之範例的頻率控制器1415及裝置1400之方塊圖,一個振盪器(諧振器310以及持續放大器305)係提供一具有諧振頻率f 0 的第一輸出信號。該範例的頻率控制器1415係耦接至該振盪器並且響應於一第二信號(例如,由一或多個感測器1440所提供的第二信號)來修改該諧振頻率f 0 。該範例的頻率控制器1415係包括以下的一或多個構件:互導調變器1420、可變的參數調變器(或控制器)1425(例如,一或多個以下所述的受控電容模組或是受控電抗模組)、製程(或其它參數)調變器(或補償器)1430、電壓補償器1455、係數暫存器1435,且亦可包含一個老化變化補償器1460。根據所選的實施例,該頻率控制器1415亦可包含一或多個感測器1440、類比至數位(A/D)轉換器(“ADC”)1445以及控制邏輯區塊1450。例如,圖4中所描繪之溫度相依的電流源I(T)(或更概括而言是yI(x))產生器415係根據本發明而有效地作用為一個溫度感測器,其係提供一個以環境或是接面溫度的函數來改變之對應的輸出電流。此種溫度相依的輸出電流可藉由A/D轉換器(ADC)1445而被轉換成為一個數位信號,並且被利用來提供對應的係數(儲存在暫存器1435中)以供該頻率控制器1415的各種調變器或補償器1420、1425、1430、1455以及1460來加以利用,以按照各種的參數(例如,一個可變的操作溫度或是可變的製程)來控制該諧振(或是輸出)頻率f 0 。在其它所舉出的實施例中,此種溫度相依的輸出電流係直接被提供(作為一第二信號,而無中間的A/D轉換)至各種的調變器,例如是被提供至互導調變器1420以及可變的參數調變器(或控制器)1425。於是,這些調變器例如是透過修改通過該諧振器310以及持續放大器305的電流、或是透過修改耦合至諧振器310且有效地構成該諧振器310的部分之有效電抗或阻抗(例如,電容、電感或電阻),來修改該諧振頻率f 0 。例如,該有效電抗(或阻抗)的修改可以是藉由耦合固定的或是可變的電容至該諧振器310、或是從該諧振器310去耦合固定的或是可變的電容、或是修改一或多個耦合至該諧振器的電抗大小,例如,藉由修改一個控制電壓或是其它連續的控制參數。Various exemplary embodiments of frequency controller 215 in accordance with the teachings of the present invention are depicted in detail below. For example, please refer to FIG. 21, which is a block diagram depicting a frequency controller 1415 and apparatus 1400 in accordance with an exemplary embodiment of the present invention. An oscillator (resonator 310 and continuous amplifier 305) provides a resonant frequency f 0 . The first output signal. The frequency controller 1415 of the example is coupled to the oscillator and modifies the resonant frequency f 0 in response to a second signal (eg, a second signal provided by the one or more sensors 1440). The example frequency controller 1415 includes one or more of the following components: a transconductance modulator 1420, a variable parameter modulator (or controller) 1425 (eg, one or more of the following controlled The capacitor module or the controlled reactance module), the process (or other parameter) modulator (or compensator) 1430, the voltage compensator 1455, the coefficient register 1435, and may also include an aging change compensator 1460. The frequency controller 1415 may also include one or more sensors 1440, an analog to digital (A/D) converter ("ADC") 1445, and a control logic block 1450, in accordance with selected embodiments. For example, the temperature dependent current source I(T) (or more generally yI(x)) generator 415 depicted in FIG. 4 effectively functions as a temperature sensor in accordance with the present invention, which provides A corresponding output current is changed as a function of the ambient or junction temperature. Such temperature dependent output current can be converted to a digital signal by an A/D converter (ADC) 1445 and utilized to provide corresponding coefficients (stored in register 1435) for the frequency controller Various modulators or compensators 1420, 1425, 1430, 1455, and 1460 of 1415 are utilized to control the resonance in accordance with various parameters (eg, a variable operating temperature or a variable process) (or Output) frequency f 0 . In other embodiments, such temperature dependent output currents are provided directly (as a second signal without intermediate A/D conversion) to various modulators, for example, being provided to each other. A modulator 1420 and a variable parameter modulator (or controller) 1425. Thus, the modulators are, for example, by modifying the current through the resonator 310 and the sustain amplifier 305, or by modifying the effective reactance or impedance (eg, capacitance) that is coupled to the resonator 310 and effectively forms part of the resonator 310. , inductance or resistance) to modify the resonant frequency f 0 . For example, the effective reactance (or impedance) can be modified by coupling a fixed or variable capacitance to the resonator 310, or decoupling a fixed or variable capacitor from the resonator 310, or The magnitude of one or more reactances coupled to the resonator is modified, for example, by modifying a control voltage or other continuous control parameter.

在以下所述各種所舉出的實施例中,該互導調變器1420以及可變的參數調變器(或控制器)1425一般是被實施來利用一個溫度參數,使得在操作溫度的變化下能夠提供一個實質上穩定的諧振頻率f 0 。熟習此項技術者將瞭解到的是,這些調變器可被實施以其它可變的參數(例如,由於製程引起的變化、電壓變化、老化以及其它的頻率變化)之一個函數或是響應於該等可變的參數來提供一個實質上穩定的諧振頻率f 0 In various embodiments described below, the transconductance modulator 1420 and the variable parameter modulator (or controller) 1425 are typically implemented to utilize a temperature parameter such that changes in operating temperature next to provide a substantially stable resonance frequency f 0. Those skilled in the art will appreciate that these modulators can be implemented as a function of other variable parameters (e.g., due to process-induced changes, voltage changes, aging, and other frequency changes) or in response to The variable parameters provide a substantially stable resonant frequency f 0 .

請再次參考圖2,為了改善效能及減小抖動(雜訊)以及其它的干擾,本發明並不採用產生一個低頻率輸出且將其倍頻至一較高的頻率(如同運用PLL與DLL所典型作成者),本發明係產生一相當高頻率的輸出f 0 ,其接著為運用除頻器220而除頻至一或多個較低的頻率(f 1 f n )。具有來自除頻器220之複數個頻率的一或多個頻率之時脈信號係接著可運用頻率選擇器205來加以選擇。如上所指出地,此種頻率選擇係在無突波且低延遲下被提供,其係提供極快且無突波的頻率切換。此外,複數個操作模式亦運用模式選擇器225而被提供。Referring again to Figure 2, in order to improve performance and reduce jitter (noise) and other interference, the present invention does not use to generate a low frequency output and multiply it to a higher frequency (as with PLL and DLL). The present invention produces a relatively high frequency output f 0 which is then divised to one or more lower frequencies ( f 1 to f n ) using the frequency divider 220. A clock signal having one or more frequencies from a plurality of frequencies of the frequency divider 220 can then be selected using the frequency selector 205. As noted above, such frequency selection is provided without surge and low delay, which provides extremely fast and surge free frequency switching. In addition, a plurality of modes of operation are also provided using mode selector 225.

圖3係更詳細描繪根據本發明的教示之第二範例的裝置實施例作為時脈產生器及/或時序/頻率參考器300的方塊圖。請參考圖3,時脈產生器及/或時序/頻率參考器300係包含一諧振器310以及一持續放大器305(構成一個振盪器395)、一溫度補償器(或調變器)315、一製程變化補償器(或調變器)320、一頻率校準模組325、一電壓變化補償器(或調變器)380、一老化(時間)變化補償器(或調變器)365、一或多個係數暫存器340,且視所選擇的實施例而定,亦可包括:感測器385、一類比至數位轉換器(“ADC”)390、一除頻器與方波產生器330、一電壓隔離器355、一諧振頻率選擇器360、一輸出頻率選擇器335、一模式選擇器345以及一低延遲的起動模組399。該持續放大器305、溫度補償器315、製程變化補償器320、電壓隔離器355、電壓變化補償器380、老化變化補償器365、諧振頻率選擇器360、以及頻率校準模組325係經常被納入於一頻率控制器之中,諸如:頻率控制器349(或是215或1415)。或者是,該持續放大器305與諧振器310可被視為構成一個振盪器395,而其中各種的控制器元件(例如,溫度補償器315、製程變化補償器320、電壓隔離器355、電壓變化補償器380、老化變化補償器365、諧振頻率選擇器360、感測器385、ADC 390以及頻率校準模組325)中的一或多個係內含在一個頻率控制器349(或是215或1415)之內。亦應注意的是,於時序或頻率參考器實施例中可以不需要(方塊330之)方波產生器。3 is a block diagram showing in greater detail a device embodiment in accordance with a second example of the teachings of the present invention as a clock generator and/or timing/frequency reference 300. Referring to FIG. 3, the clock generator and/or the timing/frequency reference device 300 includes a resonator 310 and a continuous amplifier 305 (constituting an oscillator 395), a temperature compensator (or modulator) 315, and a a process variation compensator (or modulator) 320, a frequency calibration module 325, a voltage variation compensator (or modulator) 380, an aging (time) variation compensator (or modulator) 365, one or A plurality of coefficient registers 340, and depending on the selected embodiment, may also include: a sensor 385, an analog to digital converter ("ADC") 390, a frequency divider and a square wave generator 330. A voltage isolator 355, a resonant frequency selector 360, an output frequency selector 335, a mode selector 345, and a low delay start module 399. The continuous amplifier 305, the temperature compensator 315, the process variation compensator 320, the voltage isolator 355, the voltage variation compensator 380, the aging change compensator 365, the resonant frequency selector 360, and the frequency calibration module 325 are often included in Among a frequency controllers, such as: frequency controller 349 (or 215 or 1415). Alternatively, the sustain amplifier 305 and the resonator 310 can be considered to constitute an oscillator 395, and various controller components (eg, temperature compensator 315, process variation compensator 320, voltage isolator 355, voltage variation compensation) One or more of the 380, the aging change compensator 365, the resonant frequency selector 360, the sensor 385, the ADC 390, and the frequency calibration module 325 are included in a frequency controller 349 (or 215 or 1415). )within. It should also be noted that a square wave generator (block 330) may not be required in a timing or frequency reference embodiment.

該諧振器310可以是儲存能量之任何類型的諧振器,例如:耦接以形成一種LC諧振電路之一電感器(L)與一電容器(C),其中,該LC諧振電路係具有複數個LC諧振電路配置中之一個所選擇的配置、或者是電氣或機電式等效於一電感器耦接至一電容器、或是於此技藝典型被表示為一電感器耦接至一電容器。此種LC諧振器在圖4中係被描繪為諧振器405。除了LC諧振器之外,其它的諧振器係被視為等同的,且在本發明之範疇內;舉例而言,諧振器310可為一陶瓷諧振器、一機械諧振器(例如:XTAL)、一微機電(“MEMS”)諧振器、或一薄膜體聲波諧振器。於其它實例中,各種的諧振器都可以由電氣或機電式比擬為LC諧振器來加以表示,且亦為於本發明之範疇內。於範例的實施例中,LC諧振電路已經被利用作為一諧振器,以提供完整之整合的解決方案之高的Q值。The resonator 310 can be any type of resonator that stores energy, for example, coupled to form an inductor (L) and a capacitor (C), one of the LC resonant circuits, wherein the LC resonant circuit has a plurality of LCs A selected configuration of the resonant circuit configuration, either electrically or electromechanically equivalent to an inductor coupled to a capacitor, or the art is typically represented as an inductor coupled to a capacitor. Such an LC resonator is depicted as resonator 405 in FIG. Other resonators are considered equivalent except for LC resonators, and are within the scope of the present invention; for example, resonator 310 can be a ceramic resonator, a mechanical resonator (eg, XTAL), A microelectromechanical ("MEMS") resonator, or a film bulk acoustic resonator. In other examples, various resonators may be represented by electrical or electromechanical analogy to LC resonators and are also within the scope of the present invention. In the exemplary embodiment, the LC resonant circuit has been utilized as a resonator to provide a high Q value for a complete integrated solution.

該持續放大器305係對於諧振器310提供起動以及持續的放大。溫度補償器315係對於諧振器310提供頻率控制,以根據由於溫度所引起的變化來調整振盪頻率、於選定的實施例中,視所期望或需要之控制的程度而定,溫度補償器315可包括在電流以及頻率上之控制,如以下對於所選的實施例所述者。例如,該溫度補償器315可包括圖21的互導調變器1420以及可變的參數調變器1425中之一或是兩者,其中調變器1420與1425都被實施為響應於溫度變動。類似地,製程變化補償器320係對於諧振器310提供頻率控制,以根據半導體製造技術所固有的製程變化:於一特定工廠內的製程變化(例如:批次或運轉的變化、於一特定的晶圓內之變化、以及於同一晶圓內之晶粒到晶粒間的變化)以及於不同的工廠與工廠間的製程(例如:130奈米與90奈米製程)之間的製程變化,來調整振盪頻率。電壓變化補償器380可被利用來在電源電壓變化以及其它電壓變化之下維持一個穩定的輸出頻率。老化變化補償器365可被利用來在隨著IC老化而電路元件經過一段時間發生對應的變化之下維持一個穩定的輸出頻率。頻率校準模組325係被利用以從可發生於諧振器310中的複數個振盪頻率之間而微調及選擇所期望的輸出頻率f 0 ,亦即:從複數個可利用或是潛在的頻率選擇輸出頻率f 0 。於所選的實施例中,係數暫存器340被運用以儲存利用於各種範例的補償器與校準實施例中的係數值,即如以下更加詳細敘述者。The sustain amplifier 305 provides startup and continued amplification for the resonator 310. Temperature compensator 315 provides frequency control for resonator 310 to adjust the oscillating frequency based on changes due to temperature, and in selected embodiments, depending on the degree of control desired or required, temperature compensator 315 may Control over current and frequency is included, as described below for the selected embodiment. For example, the temperature compensator 315 can include one or both of the transconductance modulator 1420 of FIG. 21 and the variable parameter modulator 1425, wherein the modulators 1420 and 1425 are both implemented to respond to temperature changes. . Similarly, process variation compensator 320 provides frequency control for resonator 310 to vary process variations inherent to semiconductor fabrication techniques: process variations within a particular plant (eg, batch or operational variations, for a particular Variations in the wafer, as well as grain-to-grain changes in the same wafer) and process variations between different plant-to-factor processes (eg, 130 nm and 90 nm processes), To adjust the oscillation frequency. Voltage variation compensator 380 can be utilized to maintain a stable output frequency under supply voltage variations as well as other voltage variations. The aging change compensator 365 can be utilized to maintain a stable output frequency as the circuit component undergoes corresponding changes over a period of time as the IC ages. Based frequency calibration module 325 may be utilized to occur from between the resonator 310 in a plurality of oscillation frequency fine tuning, and selecting a desired output frequency f 0, that is: from the plurality of available frequency selection potential or Output frequency f 0 . In selected embodiments, coefficient register 340 is utilized to store coefficient values for use in various examples of compensator and calibration embodiments, i.e., as described in greater detail below.

如上所述,該頻率控制器349在選定的實施例中亦可包含多個感測器385中之一與類比至數位轉換器(ADC)390。此外,該頻率控制器中的許多其它補償器及調變器亦包含作用為感測器的構件,例如,溫度相依的電流源以及其它的電壓變化偵測器。除了被利用來產生各種複數個被儲存用於對各種的切換元件提供控制的係數、切換受控電抗模組(在以下敘述)至該諧振器310(作為一種離散形式的控制)、以及變化藉由耦合或切換至該諧振器310的電抗所提供的有效電抗量(一種連續形式的控制)之外,各種的感測器、補償器以及調變器亦可被利用來對於該諧振器310的諧振頻率提供其它形式之連續的控制。如以下所描繪與敘述,來自感測器、電流產生器、控制電壓等等的各種連續的輸出係在本發明的範疇內作用為控制信號。例如,各種的控制電壓(可能隨著一個所選的參數(例如,溫度)變化或者可能相對於一個所選的參數是固定的)係作用為控制信號,該控制信號係被用來修改利用變容器做成的受控電容模組之對應的大小。As noted above, the frequency controller 349 can also include one of the plurality of sensors 385 and an analog to digital converter (ADC) 390 in selected embodiments. In addition, many other compensators and modulators in the frequency controller also include components that function as sensors, such as temperature dependent current sources and other voltage change detectors. In addition to being utilized to generate a plurality of various coefficients stored to provide control over various switching elements, switching a controlled reactance module (described below) to the resonator 310 (as a discrete form of control), and In addition to the effective amount of reactance (a continuous form of control) provided by the coupling or switching to the reactance of the resonator 310, various sensors, compensators, and modulators can also be utilized for the resonator 310. The resonant frequency provides other forms of continuous control. As depicted and described below, various continuous outputs from sensors, current generators, control voltages, etc., function as control signals within the scope of the present invention. For example, various control voltages (which may vary with a selected parameter (eg, temperature) or may be fixed relative to a selected parameter) act as control signals that are used to modify utilization The corresponding size of the controlled capacitor module made of the container.

除了溫度與製程補償之外,電壓隔離器355係提供與電壓之變化(諸如:來自一電源供應器)的隔離,且可獨立地被實施或是作為其它構件之部分,諸如:溫度補償器315之部分。除了對於此等PVT及老化之變化的頻率調整之外,諧振頻率亦可透過諧振頻率選擇器360來獨立地加以選擇,用於得到來自一可利用的頻率範圍之一所選的頻率。In addition to temperature and process compensation, voltage isolator 355 provides isolation from changes in voltage (such as from a power supply) and can be implemented independently or as part of other components, such as temperature compensator 315. Part of it. In addition to frequency adjustments for such changes in PVT and aging, the resonant frequency can also be independently selected by resonant frequency selector 360 for obtaining a selected frequency from one of the available frequency ranges.

針對時脈信號之產生,時脈產生器300係利用一除頻器(於模組330中)以轉換輸出振盪頻率f 0 成為複數個較低的頻率(f 1 f n ),且運用一方波產生器(亦於模組330中)以轉換一實質正弦的振盪信號成為用於時脈應用之一實質方波的信號。頻率選擇器335係接著提供具有該複數個頻率之一或多個可利用的輸出信號之選擇,且模式選擇器345亦可提供操作模式之選擇,諸如:提供一低功率模式、一脈衝模式、一參考模式、等等。運用此等構件,時脈產生器300係提供複數個高度準確(於PVT下)、低抖動、且穩定的輸出頻率f 0 f 1 f n ,具有歸因於該等PVT變化所造成之最小到可忽略的頻率漂移,因而針對於靈敏或複雜應用提供充分的準確度與穩定度,即如上所述者。For the generation of the clock signal, the clock generator 300 uses a frequency divider (in the module 330) to convert the output oscillation frequency f 0 into a plurality of lower frequencies ( f 1 to f n ), and uses one side. The wave generator (also in module 330) converts a substantially sinusoidal oscillating signal into a signal for a substantial square wave of the clock application. The frequency selector 335 then provides a selection of one or more of the plurality of available output signals, and the mode selector 345 can also provide a selection of modes of operation, such as providing a low power mode, a pulse mode, A reference mode, and so on. Using these components, the clock generator 300 provides a plurality of highly accurate (under PVT), low jitter, and stable output frequencies f 0 , f 1 to f n , which are caused by such PVT variations. Minimize to negligible frequency drift, thus providing sufficient accuracy and stability for sensitive or complex applications, as described above.

圖4係描繪根據本發明的教示之範例的頻率控制器、振盪器、與頻率校準實施例之高階的示意方塊圖。如圖4中所示,該諧振器係實施為一諧振的LC諧振電路405,且該頻率控制器係實施為數個元件,即:一負互導放大器410(被運用以實施該持續放大器)、一溫度響應式(或溫度相依式)電流產生器(I(T))(或是更概括而言為響應於任何此種參數“x”的yI(x))415、一溫度響應式(或溫度相依的)頻率(f0 (T))補償模組420、一製程變化補償模組425,且亦可包括一頻率校準模組430。各種的溫度響應式或溫度相依的模組415與420都是對溫度變動靈敏的、或是響應於溫度變動的,且提供對應的調整,俾使諧振頻率於此等PVT及老化變化下都是穩定且準確的。4 is a schematic block diagram depicting a higher order of a frequency controller, oscillator, and frequency calibration embodiment in accordance with an example of the teachings of the present invention. As shown in FIG. 4, the resonator is implemented as a resonant LC resonant circuit 405, and the frequency controller is implemented as a plurality of components, namely: a negative transconductance amplifier 410 (used to implement the sustaining amplifier), a temperature responsive (or temperature dependent) current generator (I(T)) (or more generally yI(x)) 415 in response to any such parameter "x", a temperature responsive (or The temperature dependent (f 0 (T)) compensation module 420, a process variation compensation module 425, and a frequency calibration module 430. The various temperature responsive or temperature dependent modules 415 and 420 are either temperature sensitive or responsive to temperature variations and provide corresponding adjustments such that the resonant frequency is such a PVT and aging change. Stable and accurate.

諧振的LC諧振電路405及一持續放大器係可等同地描述為一簡諧振盪器或諧波核心(core),且所有該等變化都在本發明之範疇內。應注意的是:儘管諧振的LC諧振電路405係一電感器435並聯於一電容器440,其它的電路拓撲結構(topology)亦為己知且為等效於前述者,諸如:一電感串聯一電容。另一此種等效的拓撲結構係說明於圖8。此外,如上所述,其它類型的諧振器亦可被利用且均視為等同於本文所述之範例的諧振的LC諧振電路。再者,如在以下更加詳細論述的,另外的電容及/或電感(固定及可變兩者(且更一般稱之為阻抗或電抗(或是電抗元件)))係分布於各種的模組中,且為有效形成諧振的LC諧振電路405之部分,並且被利用作為本發明的頻率控制器的部分。此外,對應的電阻(各種阻抗的電阻性成分)RL 445與RC 450係個別地顯示,但應瞭解其分別是固有在電感器435與電容器440之內者,其之發生是歸因於製造之部分,而非為該個別的電感器435與電容器440之外的構件或單獨的構件。反而,該等額外或是固有的(寄生的)電阻亦可納入為對於PVT變化之補償的部分者,即如以下參考圖29所描繪及敘述者。The resonant LC resonant circuit 405 and a continuous amplifier are equally described as a harmonic oscillator or harmonic core, and all such variations are within the scope of the present invention. It should be noted that although the resonant LC resonant circuit 405 is an inductor 435 connected in parallel with a capacitor 440, other circuit topologies are known and equivalent to the foregoing, such as: an inductor in series with a capacitor. . Another such equivalent topology is illustrated in FIG. Moreover, as noted above, other types of resonators can also be utilized and are each considered to be equivalent to the resonant LC resonant circuit described herein. Furthermore, as discussed in more detail below, additional capacitors and/or inductors (both fixed and variable (and more generally referred to as impedance or reactance (or reactive components)) are distributed across various modules. It is part of the LC resonant circuit 405 that effectively forms resonance and is utilized as part of the frequency controller of the present invention. In addition, the corresponding resistors (resistive components of various impedances) R L 445 and R C 450 are individually shown, but it should be understood that they are inherently within the inductor 435 and the capacitor 440, respectively, which is attributed to The portion of the fabrication, rather than the individual components of the individual inductor 435 and capacitor 440 or separate components. Instead, such additional or inherent (parasitic) resistances may also be included as part of the compensation for PVT variations, as depicted and described below with reference to FIG.

諧振的LC諧振電路或振盪器405之電感器435與電容器440的大小被定為實質或大約提供所選擇的振盪頻率f 0 、或是於f 0 附近之振盪頻率範圍。此外,電感器435與電容器440的大小係可定為具有或符合IC佈局的面積要求,較高的頻率需要較少的面積。熟習此項技術者將會體認到的是:,但只是作為第一階的近似而已,因為如下文所論述,諸如阻抗RL 與RC 、任何額外的電阻器、以及溫度與製程變化與其它失真之其它的因素都會影響f 0 ,而可能內含在第二與第三階的近似中。舉例而言,電感器435與電容器440的尺寸可定為產生於1至5 GHz範圍內之一諧振頻率;在其它的實施例中,較高或較低的頻率可能是所期望的,且所有該等頻率都在本發明之範疇內。此外,電感器435與電容器440係可運用任何半導體或其它電路製程技術來加以製造,且可以例如是CMOS相容的、雙載子接面電晶體相容的,而在其它實施例中,電感器435與電容器440係可運用絕緣體上矽(SOI)、金屬-絕緣體-金屬(MiM)、多晶矽-絕緣體-多晶矽(PiP)、砷化鎵(GaAs)、應變矽(strained-silicon)、半導體異接面技術、或基於微機電(MEMS-based)的技術來加以製造,此亦為舉例而非為限制的。應為瞭解的是,所有該等施行與實施例都是在本發明之範疇內。此外,除了諧振的LC諧振電路405之外、或是取代諧振的LC諧振電路405,其它的諧振器及/或振盪器實施例亦可被利用且亦為在本發明之範疇內。如運用於本文者,“LC諧振電路”將會是表示且指稱任何及所有可能提供振盪的電感器與電容器之電路佈局、組態或拓撲結構,而無論其是如何實施的。應注意到的是,運用諸如CMOS技術之習用製程以製造振盪器405之能力係允許時脈產生器與其它電路(諸如:第二電路180)整合且單片式地加以製造,因而提供本發明之一個顯著的優點。The size of the inductor 435 and capacitor 440 of the resonant LC resonant circuit or oscillator 405 is set to substantially or approximately provide the selected oscillating frequency f 0 , or an oscillating frequency range around f 0 . In addition, inductor 435 and capacitor 440 may be sized to have or conform to the area requirements of the IC layout, with higher frequencies requiring less area. Those who are familiar with this technology will recognize that: , but only as a first-order approximation, as discussed below, such as impedances R L and R C , any additional resistors, and other factors such as temperature and process variations and other distortions affect f 0 , and may It is included in the approximation of the second and third orders. For example, inductor 435 and capacitor 440 may be sized to produce a resonant frequency in the range of 1 to 5 GHz; in other embodiments, higher or lower frequencies may be desirable, and all These frequencies are all within the scope of the invention. In addition, inductor 435 and capacitor 440 can be fabricated using any semiconductor or other circuit processing technique and can be, for example, CMOS compatible, bipolar junction transistor compatible, while in other embodiments, inductor 435 and capacitor 440 can use silicon-on-insulator (SOI), metal-insulator-metal (MiM), polysilicon-insulator-polysilicon (PiP), gallium arsenide (GaAs), strained-silicon, semiconductor Bonding techniques, or fabrication based on MEMS-based techniques, are also by way of example and not limitation. It should be understood that all such embodiments and embodiments are within the scope of the invention. Furthermore, other resonator and/or oscillator embodiments may be utilized in addition to or in place of the resonant LC resonant circuit 405 and are also within the scope of the present invention. As used herein, "LC resonant circuit" shall mean and refer to any and all circuit arrangements, configurations or topologies of inductors and capacitors that may provide oscillation, regardless of how they are implemented. It should be noted that the ability to fabricate the oscillator 405 using conventional processes such as CMOS technology allows the clock generator to be integrated with other circuits, such as the second circuit 180, and fabricated monolithically, thus providing the present invention. A significant advantage.

此外,圖4所示之電容440係僅為涉及諧振的LC諧振電路405之諧振與頻率決定的整體電容之一部分,且為一固定的電容。於選定的實施例中,舉例而言,此固定的電容係可代表最終被利用於該振盪器之總電容的約10%至90%。或者若為所要的,該電容440亦可以被實施為一可變的電容。如更為詳細論述於後,整體電容係被分散,使得額外之固定與可變的電容係選擇性地納入於時脈產生器及/或時序/頻率參考器300之內,且例如為由頻率控制器(215、1415)的構件(例如,溫度響應式頻率(f 0 (T))補償模組420與製程變化補償模組425)所提供,以提供選擇諧振頻率f 0 且允許諧振頻率f 0 為實質無關於溫度與製程變化。In addition, the capacitor 440 shown in FIG. 4 is only a part of the overall capacitance determined by the resonance and frequency of the resonant LC resonant circuit 405, and is a fixed capacitor. In selected embodiments, for example, the fixed capacitance can represent approximately 10% to 90% of the total capacitance of the oscillator. Alternatively, if desired, the capacitor 440 can also be implemented as a variable capacitor. As discussed in more detail, the overall capacitance is dispersed such that additional fixed and variable capacitances are selectively incorporated within the clock generator and/or timing/frequency reference 300, and for example by frequency The components of the controller (215, 1415) (eg, temperature responsive frequency ( f 0 (T)) compensation module 420 and process variation compensation module 425) are provided to provide a selected resonant frequency f 0 and allow resonant frequency f 0 is no substantial changes with respect to temperature and process.

於所選的實施例中,電感435已經被固定,但是亦可以可變的方式被實施,或是被實施為固定與可變的電感之一組合。因此,熟習此項技術者將會體認到的是:針對於頻率調諧及溫度與製程的非相依性,固定與可變的電容之詳細論述係類似地相關於電感的選取。舉例而言,不同的電感係可被切換進出該振盪器,以類似地提供調諧。此外,單一個電感器之電感亦可被調變。因此,所有該等電感與電容變化都是在本發明之範疇內,並且被描繪為圖20的範例的受控阻抗模組1305以及圖25至27的受控電抗模組1805之可切換的、可變的及/或固定的電抗元件或構件。In the selected embodiment, the inductor 435 has been fixed, but may be implemented in a variable manner or as a combination of one of a fixed and a variable inductor. Therefore, those skilled in the art will recognize that the detailed discussion of fixed and variable capacitance is similarly related to the choice of inductance for frequency tuning and temperature and process non-dependency. For example, different inductive systems can be switched in and out of the oscillator to similarly provide tuning. In addition, the inductance of a single inductor can also be modulated. Accordingly, all such inductance and capacitance variations are within the scope of the present invention and are depicted as switchable of the controlled impedance module 1305 of the example of FIG. 20 and the controlled reactance module 1805 of FIGS. 25-27. Variable and/or fixed reactive components or components.

亦如圖4所示者,諧振的LC諧振電路405與所得到的輸出信號(稱為於節點或線路470與475的第一(輸出)信號)係一差動信號,並且提供共模拒斥(common-mode rejection)。其它的配置(包括:非差動或其它之單端的配置)亦在本發明之範疇內。舉例而言,於單端的配置中,各種的模組(例如:485、460)將僅需要其中一個實體即可,而非為了如圖所示之平衡的配置而用到兩個實體。類似地,下文論述之其它的構件與特徵(諸如:除頻器)亦將具有一種單端而非為差動的組態。除了在圖6與8中所示的差動LC振盪器之外,此等另外的範例LC振盪器(差動及單端兩種)係在以下參考圖31-37加以論述。此外,圖示的各種實施例係利用各種形式(例如,CMOS、累積模式的MOSFET(“AMOS”)、反轉模式的MOSFET(“IMOS”)、等等)之MOSFET電晶體(金屬氧化物半導體場效電晶體);其它的實施方式也是可利用的,諸如:運用雙載子接面電晶體(“BJT”)、BiCMOS、等等。所有該等實施例都被視為等同的,且在本發明之範疇內。As also shown in FIG. 4, the resonant LC resonant circuit 405 and the resulting output signal (referred to as the first (output) signal at nodes or lines 470 and 475) are differential signals and provide common mode rejection. (common-mode rejection). Other configurations, including: non-differential or other single-ended configurations, are also within the scope of the present invention. For example, in a single-ended configuration, various modules (eg, 485, 460) would only require one of the entities, rather than two entities for a balanced configuration as shown. Similarly, other components and features discussed below, such as frequency dividers, will also have a single-ended configuration rather than a differential configuration. In addition to the differential LC oscillators shown in Figures 6 and 8, these additional exemplary LC oscillators (differential and single-ended) are discussed below with reference to Figures 31-37. Moreover, the various embodiments illustrated are MOSFET transistors (metal oxide semiconductors) that utilize various forms (eg, CMOS, accumulation mode MOSFET ("AMOS"), inversion mode MOSFET ("IMOS"), etc.) Field effect transistors); other embodiments are also available, such as the use of dual carrier junction transistors ("BJT"), BiCMOS, and the like. All such embodiments are considered equivalent and are within the scope of the invention.

該負互導放大器410係被選擇以透過互導(g m )調變與其電阻器之導通電阻而提供溫度補償。互導(g m )調變亦可獨立利用於頻率選擇。本發明之另一項重大優點係負互導放大器410之選擇,以提供起動與持續的放大,因為振盪振幅及頻率均受到持續放大器之互導所影響,除了提供溫度補償之外,也提供振幅調變以及頻率微調(或調諧)。負互導放大器410將會響應於橫跨諧振的LC諧振電路405(如圖示為橫跨節點470與475)之一電壓“v”而注入電流至諧振的LC諧振電路405(且更明確是到電容器440之上)。接著,該電流注入將改變(且扭曲)電壓波形(因為電壓為電流之積分),而造成於頻率上之改變或變化,其大致為反比於互導gm 之大小,即如於圖5A所示者。應注意到的是,此互導是一個負值,因為增益係被提供以抵消該諧振元件固有之損失。因此,每當“互導放大器”被運用於本文時,應瞭解為意指且僅為對於“負互導放大器”之一縮寫。接著,互導亦為偏壓電流之一個函數,實質上(大概)成比例於通過放大器410之電流(yI(x))的平方根(針對於MOSFET),且實質上(大概)成比例於通過放大器410之電流(yI(x))(針對於BJT),其為溫度相依的,而造成其為溫度及偏壓電流相依之一波形失真,即如於圖5B所示者。此外,如於圖5C所示,振盪頻率亦為關於該持續負互導放大器410的互導且為其之一個函數,而提供振盪頻率的選擇。再者,除了溫度相依性(如為I(T))之外,該電流亦可變化為其它的參數或變數之一個函數(因而更概括被稱為I(x)),諸如:電壓或外部調諧,且亦可為諸如被放大一個因數“y”(如後所述);因此,電流係稱作為“yI(x)”。The negative-based transconductance amplifier 410 is selected to ON resistance through the transconductance (g m) of the modulator and its resistor to provide temperature compensation. The mutual conductance ( g m ) modulation can also be used independently for frequency selection. Another significant advantage of the present invention is the choice of negative transconductance amplifier 410 to provide both start-up and continuous amplification because the amplitude and frequency of the oscillation are both affected by the mutual conductance of the sustain amplifier, providing amplitude in addition to providing temperature compensation. Modulation and frequency fine tuning (or tuning). The negative transconductance amplifier 410 will inject current into the resonant LC resonant circuit 405 in response to a voltage "v" across the resonant LC resonant circuit 405 (as shown across nodes 470 and 475) (and more specifically Above capacitor 440). Next, this current injection will change (and distortion) voltage waveform (because the voltage of the current of integration), which leads to a change or a change in the frequency, which is approximately inversely proportional to the transconductance g size m of, i.e., as in FIG. 5A Shower. It should be noted that this mutual conductance is a negative value because the gain is provided to counteract the inherent loss of the resonant element. Therefore, whenever a "transimpedance amplifier" is used in this document, it should be understood to mean and is only an abbreviation for "negative transconductance amplifier". Next, the mutual conductance is also a function of the bias current, substantially (probably) proportional to the square root of the current through the amplifier 410 (yI(x)) (for the MOSFET), and is substantially (probably) proportional to The current of amplifier 410 (yI(x)) (for BJT) is temperature dependent, causing it to be a waveform distortion dependent on temperature and bias current, as shown in Figure 5B. Furthermore, as shown in FIG. 5C, the oscillation frequency is also a function of the mutual conductance of the continuous negative transconductance amplifier 410 and provides a selection of the oscillation frequency. Furthermore, in addition to temperature dependence (eg, I(T)), the current can also be changed to a function of other parameters or variables (and thus more generally referred to as I(x)), such as: voltage or external Tuning, and may also be such as being amplified by a factor "y" (as described later); therefore, the current is referred to as "yI(x)".

如上所指出地,更一般來說,此可變的電流yI(x)可被利用為感測器或是一部分的感測器,例如,圖21的一或多個感測器1440或互導調變器1420或是圖25的感測器1815。例如,當此可變的電流由I(T)產生器415所提供,而使得所提供的電流是溫度的一個函數(參數或變數“x”=溫度參數“T”)時,I(T)產生器415係藉此作用為一個溫度感測器,並且可如此被利用在範例的實施例中,例如,被該頻率控制器(215、349、1415)利用來響應於溫度變動以調整該諧振頻率f 0 。例如,圖21的互導調變器1420可包括此種溫度(或其它參數)響應式電流源415(其亦作用為一個感測器1440),其係提供電流給一個持續放大器305。As noted above, more generally, the variable current yI(x) can be utilized as a sensor or as part of a sensor, such as one or more sensors 1440 or transconductance of FIG. The modulator 1420 is also the sensor 1815 of FIG. For example, when this variable current is provided by I(T) generator 415 such that the supplied current is a function of temperature (parameter or variable "x" = temperature parameter "T"), I(T) Generator 415 acts thereby as a temperature sensor and can be utilized in the exemplary embodiment, for example, by the frequency controller (215, 349, 1415) to adjust the resonance in response to temperature variations. Frequency f 0 . For example, the transconductance modulator 1420 of FIG. 21 can include such a temperature (or other parameter) responsive current source 415 (which also functions as a sensor 1440) that provides current to a continuous amplifier 305.

本發明之重要創新的突破係包括:有利地利用此等潛在的失真,以對於產生該振盪器所選的f 0 值提供頻率補償、及透過該持續放大器之互導的調變之頻率調變。因此,如將更為詳細論述於後,第一,該互導係可針對於頻率選擇而被修正或改變,且第二,藉由大致為即時或接近即時之基礎上來修改電流yI(x),以補償其歸因於溫度、電壓、製程或老化之該等頻率變化。根據本發明,所選擇的頻率f 0 以及其相對於溫度變化之穩定度係可透過互導g m 之適當選擇及I(T)之選擇而決定之。換言之,根據本發明,該偏壓電流係作成是溫度相依的,如為I(T)(或更概括是yI(x)),其於是影響該互導g m ,因而影響振盪頻率f 0 。此種方法亦可被利用於其它的變數,諸如:電壓變動、製程變化或是老化變化。Breakthrough based important innovations of the present invention comprises: advantageously utilize the potential of such distortion, the value for f 0 to generate the selected oscillator to provide frequency compensation, frequency modulation, and continuously through the transconductance amplifier of the modulation . Thus, as will be discussed in more detail later, first, the mutual conductance can be modified or changed for frequency selection, and second, the current yI(x) can be modified by substantially instantaneous or near instantaneous. To compensate for such frequency changes due to temperature, voltage, process or aging. In accordance with the present invention, the selected frequency f 0 and its stability with respect to temperature variations can be determined by the appropriate choice of transconductance g m and the choice of I(T). In other words, according to the present invention, the bias current is made temperature dependent system, such as I (T) (or, more generally are yI (x)), which then influence the transconductance g m, and thus affect the oscillation frequency f 0. This method can also be utilized for other variables such as voltage variations, process variations, or aging changes.

圖6係描繪根據本發明的教示之範例的負互導放大器(410)、溫度響應式電流產生器(I(T)415)、與LC諧振電路的諧振器(405)實施例的電路圖。如於圖6所示,諧振的LC諧振電路500係耦接至一負互導放大器,該負互導放大器係被實施為一互補交叉耦接對的放大器505(由電晶體M1、M2、M3與M4所組成),接著透過一個電壓隔離器510(被實施為電流鏡(電晶體525A與525B)並且在此可互換地稱呼之)而耦接至一溫度響應式電流產生器(I(x))515。電流鏡510(電壓隔離器)亦可被實施於一種串級拓撲結構(520A與520B)中,諸如以提供關於電源供應器的變化之改良穩定度且隔離該振盪器與電源供應器(電壓隔離)。該溫度響應式電流產生器515係可被實施為利用諸如其分別為於圖7A、7B與7C所示之CTAT(與絕對溫度成互補)、PTAT(與絕對溫度成比例)、或PTAT2 (與絕對溫度平方成比例)、以及於圖7D所示之CTAT、PTAT、與PTAT2 的組合之拓撲結構。於各個實例中,注入至負互導放大器(互補交叉耦接對的放大器)505之電流I(T)(或yI(x))係具有溫度相依性,諸如:增大電流(PTAT或PTAT2 )或減小電流(CTAT)為增高溫度之一個函數,即如圖所示。舉例而言,如於圖7D所示,此等溫度響應式電流產生器之一或多個組合亦可實施為諸如CTAT並聯於PTAT。6 is a circuit diagram depicting a negative transconductance amplifier (410), a temperature responsive current generator (I(T) 415), and a resonator (405) embodiment of an LC resonant circuit, in accordance with an example of the teachings of the present invention. As shown in FIG. 6, the resonant LC resonant circuit 500 is coupled to a negative transconductance amplifier that is implemented as a complementary cross-coupled pair of amplifiers 505 (by transistors M1, M2, M3). And M4), then coupled to a temperature responsive current generator (I(x) by a voltage isolator 510 (implemented as a current mirror (transistors 525A and 525B) and interchangeably referred to herein) )) 515. Current mirror 510 (voltage isolator) can also be implemented in a cascade topology (520A and 520B), such as to provide improved stability with respect to variations in the power supply and to isolate the oscillator from the power supply (voltage isolation ). The temperature responsive current generator 515 can be implemented to utilize CTAT (complementary to absolute temperature), PTAT (proportional to absolute temperature), or PTAT 2 (such as shown in Figures 7A, 7B, and 7C, respectively). The topology is proportional to the absolute temperature squared, and the combination of CTAT, PTAT, and PTAT 2 shown in Figure 7D. In various examples, the current I(T) (or yI(x)) injected into the negative transconductance amplifier (the amplifier of the complementary cross-coupled pair) 505 is temperature dependent, such as increasing the current (PTAT or PTAT 2). Or reduce the current (CTAT) as a function of the increased temperature, as shown. For example, as shown in FIG. 7D, one or more combinations of such temperature responsive current generators can also be implemented such as CTAT in parallel with PTAT.

一特定的溫度響應式或溫度相依式電流產生器之選擇亦為所利用的製程之一個函數;舉例而言,CTAT係可用於TSMC之製程。更概括而言,由於不同的製造者係利用不同的材料,諸如:鋁或銅,因此RL 一般會是不同的,而造成不同的溫度係數,其於是為改變該振盪器之溫度係數,因而需要於I(T)補償上有所差異。對應而言,提供一有效平坦的頻率響應而作為溫度之一個函數可能需要不同比率之CTAT、PTAT與PTAT2 補償。並未單獨顯示的是,於圖7A、7B、7C與7D所示之各種的溫度響應式電流產生器係可包括一起動電路。此外,包含所選的溫度響應式電流產生器配置之電晶體係可不同地加以偏壓,諸如:針對於圖示的範例拓撲結構,對於CTAT(M7與M8)及PTAT2 (M13與M14)為偏壓於強反轉區,而對於PTAT(M9與M10)及PTAT2 (M11與M12)則於次臨界區(subthreshold)。The choice of a particular temperature responsive or temperature dependent current generator is also a function of the process utilized; for example, CTAT can be used in the TSMC process. More generally, since different manufacturers utilize different materials, such as aluminum or copper, R L will generally be different, resulting in different temperature coefficients, which are then used to change the temperature coefficient of the oscillator. There is a need to differ in I(T) compensation. Correspondingly, providing a effectively flat frequency response as a function of temperature may require different ratios of CTAT, PTAT, and PTAT 2 compensation. Not separately shown, the various temperature responsive current generators shown in Figures 7A, 7B, 7C, and 7D can include a companion circuit. In addition, the cell system including the selected temperature responsive current generator configuration can be biased differently, such as for the illustrated example topology, for CTAT (M7 and M8) and PTAT 2 (M13 and M14) It is biased to the strong reversal zone, while for PTAT (M9 and M10) and PTAT 2 (M11 and M12) it is in the subthreshold.

圖8係描繪根據本發明的教示之另外的範例負互導放大器、溫度響應式(或溫度相依的)電流產生器(I(T)或I(x))與LC諧振電路振盪器的實施例之電路方塊圖。如於圖8所示,諧振的LC諧振電路550係具有一種相較於前述者為不同的拓撲結構,但亦為耦接至一負互導放大器,該負互導放大器係被實施為一互補交叉耦接對的放大器505(電晶體M1、M2、M3與M4),接著為透過複數個電流鏡510(或520)與530而耦接至一溫度響應式(或溫度相依的)電流產生器(I(T)或I(x))515。如圖所示,複數個電流鏡係被利用以連續提供增益且增大進入負互導放大器505與諧振的LC諧振電路550之電流I(T)。提供電流至節點B且驅動該負互導放大器之電流鏡中的尾端(tail)元件(例如:於圖6之電晶體M6)係經常被選擇為一PMOS元件,且因此可能需要數級之鏡射(如圖示)來提供一PMOS電流鏡輸入至該g m 放大器。PMOS係經常被選擇,因為於現代CMOS製程中,PMOS元件係經常為埋入式通道元件,其已知為相較於相等尺寸且類似地偏壓之NMOS元件為呈現較小的閃爍(flicker)雜訊。於尾端元件中之減低的閃爍雜訊係降低該振盪器之相位雜訊與抖動,因為閃爍雜訊係由於電路中之非線性的主動元件而被升頻轉換到振盪頻率的附近。8 is an illustration of another example of a negative transconductance amplifier, a temperature responsive (or temperature dependent) current generator (I(T) or I(x)) and an LC resonant circuit oscillator in accordance with the teachings of the present invention. Circuit block diagram. As shown in FIG. 8, the resonant LC resonant circuit 550 has a different topology than the foregoing, but is also coupled to a negative transconductance amplifier that is implemented as a complementary The cross-coupled pair of amplifiers 505 (transistors M1, M2, M3, and M4) are then coupled to a temperature responsive (or temperature dependent) current generator through a plurality of current mirrors 510 (or 520) and 530 (I(T) or I(x)) 515. As shown, a plurality of current mirrors are utilized to continuously provide gain and increase the current I(T) entering the negative transconductance amplifier 505 and the resonant LC resonant circuit 550. A tail element (eg, transistor M6 in FIG. 6) in the current mirror that supplies current to node B and drives the negative transconductance amplifier is often selected as a PMOS element, and thus may require several stages mirror (as illustrated) to provide an input to the PMOS current mirror g m amplifier. PMOS systems are often chosen because in modern CMOS processes, PMOS components are often buried channel components, which are known to exhibit less flicker than NMOS components that are equally sized and similarly biased. Noise. The reduced flicker noise in the tail-end component reduces the phase noise and jitter of the oscillator because the flicker noise is upconverted to near the oscillation frequency due to the nonlinear active components in the circuit.

如上所指出,提供電流至負互導放大器505之電流鏡510或520(或其它電路)的部份在其輸出處應具有高阻抗,以降低電源的頻率漂移,諸如:藉著運用長的電晶體幾何結構與串級(cascode)配置以提高輸出電阻,且提供顯著的穩定度於節點B。此外,一分流電容器570亦可被運用以濾波,且因而降低來自各種的尾端元件之閃爍雜訊。As indicated above, the portion of current mirror 510 or 520 (or other circuitry) that supplies current to negative transconductance amplifier 505 should have a high impedance at its output to reduce the frequency drift of the power supply, such as by using long electrical current. Crystal geometry and cascode configuration to increase output resistance and provide significant stability to Node B. In addition, a shunt capacitor 570 can also be utilized to filter and thereby reduce flicker noise from various tail end components.

視所選擇的應用而定,具有其I(T)(或yI(x))偏壓之負互導放大器505的運用係可提供充分的頻率穩定度,俾使在該應用中額外的頻率控制器構件可能不是必要的或是非所期望的。然而,於其它的實施例中,額外的準確度與較小的頻率漂移係可運用更為詳細論述於下文之一或多個構件而被提供。Depending on the application chosen, the use of a negative transconductance amplifier 505 with its I(T) (or yI(x)) bias provides sufficient frequency stability for additional frequency control in this application. The components may not be necessary or desirable. However, in other embodiments, additional accuracy and smaller frequency drift may be provided using one or more of the components discussed in greater detail below.

除了提供一溫度相依的電流yI(x)(或I(T))之外,各種的電晶體M1、M2、M3與M4係各自具有於導通期間之一關聯的電阻,其亦可能傾向於振盪期間引起頻率失真與頻率漂移。於各個半週期中,不是M1與M4導通、就是M2與M3導通。此種電阻亦為溫度相依的。因此,電晶體M1、M2、M3與M4應該調整其尺寸(寬度與長度),以同時補償該等頻率效應。應注意到的是,注入至諧振的LC諧振電路405之電流係必須足以持續振盪(如於圖5C所示),且結果將具有一最小值,此可能限制可透過負互導放大器410(或505)與溫度相依的電流產生器415(或515)所易於實施的頻率控制的程度或能力。因此,I(T)與電晶體(M1、M2、M3與M4)的尺寸決定應該共同被選擇以提供振盪起動,以考量在功率消耗限制下的最大電流,且配合所選擇的IC面積與佈局。舉例而言,可選擇互導g m 以提供大致為充分的電流,以確保起動及持續振盪,其具有頻率特性為隨著溫度上升而減低頻率,隨後為決定電晶體M1、M2、M3與M4的尺寸為足夠大,以使得頻率為無關於溫度、或是隨著溫度上升而增高,隨後為藉著I(T)之適當的選擇而微調該頻率-溫度關係。於所選擇的典型實施例中,於PVT之下,此係造成約為±0.25%至0.5%的頻率準確度,其對於諸多應用而言可能是相當足夠的。In addition to providing a temperature dependent current yI(x) (or I(T)), the various transistors M1, M2, M3, and M4 each have a resistance associated with one of the on periods, which may also tend to oscillate. Causes frequency distortion and frequency drift during the period. In each half cycle, not M1 and M4 are turned on, that is, M2 and M3 are turned on. This resistance is also temperature dependent. Therefore, the transistors M1, M2, M3 and M4 should be sized (width and length) to compensate for these frequency effects simultaneously. It should be noted that the current flowing into the resonant LC resonant circuit 405 must be sufficient to sustain oscillation (as shown in Figure 5C), and the result will have a minimum which may limit the permeable transconductance amplifier 410 (or 505) The degree or ability of frequency control that is easily implemented by the temperature dependent current generator 415 (or 515). Therefore, the size decisions of I(T) and transistors (M1, M2, M3, and M4) should be selected together to provide an oscillating start to account for the maximum current under power consumption constraints, in conjunction with the selected IC area and layout. . For example, choose to provide a transconductance g m is substantially sufficient current to ensure the start and continues to oscillate, which has a frequency characteristic of the frequency reduced with increasing temperature, followed by a decision transistors M1, M2, M3 and M4 The size is large enough so that the frequency is independent of temperature or increases with temperature, and then the frequency-temperature relationship is fine-tuned by the appropriate choice of I(T). In the selected exemplary embodiment, under PVT, this results in a frequency accuracy of about ±0.25% to 0.5%, which may be quite sufficient for many applications.

請再次參考圖4,另外的補償模組亦被利用作為頻率控制器(215、349、1415)的部分,以提供對於諧振頻率f 0 之較大的控制與準確度,諸如:用於其可能需要較大的準確度與較少的變異(或頻率漂移)之應用、或是有些技術無法容許前述的技術在PVT或老化的變化下提供足夠的準確度之情形,諸如:提供大約±0.25%或更佳的頻率準確度。於此等情況中,溫度相依的(或溫度響應式)頻率(f 0 (T))補償模組420係可被利用,諸如:該範例的溫度響應式頻率(f 0 (T))補償模組420。舉例而言,此模組420係可利用受控的(或是可控制的)電容模組485來加以實施,其分別耦接至諧振的LC諧振電路405之各別側邊或軌道(線路470與475),且其分別是在共同控制之下,該共同控制係由第一複數(“w”)個切換係數(p 0 p (w 1) )(暫存器495)與一電壓控制器(VC T R L )480所提供,電壓控制器440係提供由第二複數(“x”)個切換係數(q 0 q (x 1) )(暫存器455)所決定的一控制電壓,代表性的實例係說明於圖9與10。(該用語“受控的”以及“可控制的”係在此可互換地被運用)。額外的範例實施例係被描繪在圖20中,其係描繪一個被利用在頻率-溫度補償模組中之範例的受控阻抗模組1300,例如,其係取代在模組420中的受控(或是可控制的)電容模組485、或是除了該電容模組485之外的額外的模組;在圖22中,其係描繪受控電容模組485的另一變化例為受控電容模組1500,其係具有複數個溫度相依的控制電壓或是其它參數相依的控制電壓(如圖23或26所示地產生);在圖25中,其係描繪複數個受控電抗模組1805,該些受控電抗模組1805係響應於來自控制邏輯1810與感測器1815的控制信號(包含來自該振盪器的回授)而被切換進出(耦合至該諧振器、或是從該諧振器去耦合);在圖26中,其係描繪複數個受控電抗模組1805,該些受控電抗模組1805係響應於控制信號(連續的)或是係數(離散的)而被切換進出及/或被切換至一個控制電壓;並且在圖27中,其係描繪複數個受控電抗模組1805,該些受控電抗模組1805係響應於控制信號而被切換,以用於電壓變化的補償。有數種可利用的不同類型的切換,例如,耦合或是去耦合一電抗或阻抗至該諧振器、或例如是切換耦合的電抗或阻抗至所選的控制電壓或其它的控制信號。Refer again to FIG 4, additional compensation module was also used as a frequency controller (215,349,1415) portion, in order to provide greater control and accuracy of the resonance frequency f 0, such as: which may be used Applications requiring greater accuracy and less variation (or frequency drift), or some techniques that do not allow the aforementioned techniques to provide sufficient accuracy under PVT or aging changes, such as: providing approximately ±0.25% Or better frequency accuracy. In such cases, a temperature dependent (or temperature responsive) frequency ( f 0 (T)) compensation module 420 can be utilized, such as: the example temperature responsive frequency ( f 0 (T)) compensation mode Group 420. For example, the module 420 can be implemented using a controlled (or controllable) capacitive module 485 coupled to respective sides or tracks of the resonant LC resonant circuit 405 (line 470). And 475), and respectively under common control, the common control system is composed of a first complex number ("w") switching coefficients ( p 0 to p (w - 1) ) (storage 495) and a voltage the controller (V C T R L) 480 is provided, the voltage controller 440 to provide system ( "x") a switching coefficient (q 0 to q (x - 1)) by a second complex (register 455) is determined A representative example of a control voltage is illustrated in Figures 9 and 10. (The terms "controlled" and "controllable" are used interchangeably herein). Additional exemplary embodiments are depicted in FIG. 20, which depicts an example of a controlled impedance module 1300 that is utilized in a frequency-temperature compensation module, for example, instead of being controlled in module 420. (or controllable) capacitor module 485, or an additional module in addition to the capacitor module 485; in Figure 22, another variant of the controlled capacitor module 485 is controlled The capacitor module 1500 has a plurality of temperature-dependent control voltages or other parameter-dependent control voltages (generated as shown in FIG. 23 or 26); in FIG. 25, it depicts a plurality of controlled reactance modules. 1805, the controlled reactance module 1805 is switched in and out (coupled to or from the resonator) in response to a control signal from the control logic 1810 and the sensor 1815 (including feedback from the oscillator) Resonator decoupling; in Figure 26, it depicts a plurality of controlled reactance modules 1805 that are switched in response to control signals (continuous) or coefficients (discrete) In and out and/or switched to a control voltage; and in Figure 27, A plurality of controlled reactance module 1805, the plurality of line controlled reactor module 1805 in response to the control signal is switched to compensate for voltage variations. There are several different types of switching that can be utilized, for example, coupling or decoupling a reactance or impedance to the resonator, or for example switching the reacted reactance or impedance to a selected control voltage or other control signal.

圖9係描繪根據本發明的教示之一個範例的第一可控制的電容模組635之電路圖,其可被利用作為於頻率-溫度補償模組420中之受控(或可控制的)電容模組485(且附接至諧振的LC諧振電路405之各側(節點或線路470與475))。如圖所示,受控(或可控制的)電容模組635係由一排或陣列之複數(w)個可切換的電容性模組640之二進制加權的固定電容器(C f )620與二進制或其它有差別加權的可變電容器(變容器)(Cv )615所組成。任何型式之固定電容器620與可變電容器(變容器)615都可被利用;於選定的實施例中,變容器615係AMOS(累積模式MOSFET)、IMOS(反轉模式MOSFET)、及/或接面/二極體變容器。各個可切換的電容性模組640係具有相同的電路佈局,且各者差異為二進制加權的電容,其中可切換的電容性模組6400 為具有一個單位之電容、可切換的電容性模組6401 為具有二個單位之電容、依此類推、可切換的電容性模組640( w 1 ) 為具有2( w 1 ) 個單位之電容,且各個單位係代表一特定的電容大小或值(典型為於毫微微法拉(fF)或微微法拉(pF))。如上所述,其它有差別加權的方式也同樣是可應用的,例如,線性或是二進制,並且亦可以由藉著切換電抗至一個所選的控制電壓來提供此種有差別的加權所構成,藉此增加或減少其有效電抗。9 is a circuit diagram depicting a first controllable capacitive module 635, which may be utilized as a controlled (or controllable) capacitive mode in a frequency-temperature compensation module 420, in accordance with one example of the teachings of the present invention. Group 485 (and attached to each side of the resonant LC resonant circuit 405 (node or lines 470 and 475)). , The fixed binary weighted capacitive capacitor module 640 of the controlled (or controllable) capacitor module 635 by a complex system or a row of the array (w) a switchable (C f) 620 binary FIG. Or other differentially weighted variable capacitor (varactor) (C v ) 615. Any type of fixed capacitor 620 and variable capacitor (varactor) 615 can be utilized; in selected embodiments, varactor 615 is an AMOS (accumulated mode MOSFET), IMOS (reverse mode MOSFET), and/or Face/diode varactor. Each switchable capacitive module 640 has the same circuit layout, and each difference is a binary weighted capacitor, wherein the switchable capacitive module 640 0 is a capacitive, switchable capacitive module having one unit. 640 1 is a capacitor with two units, and so on, the switchable capacitive module 640 ( w - 1 ) is a capacitor having 2 ( w - 1 ) units, and each unit represents a specific capacitance Or value (typically in femtofarad (fF) or picofarad (pF)). As noted above, other methods of differential weighting are equally applicable, such as linear or binary, and may also be provided by switching the reactance to a selected control voltage to provide such differential weighting. Thereby increasing or decreasing its effective reactance.

於各個可切換的模組640之內,每個固定與可變的電容係初始為相等的,其中可變的電容係允許為響應於被提供至節點625之控制電壓而改變。此控制電壓係接著為隨著溫度或是另一所選的可變的參數而改變,其造成的是:由受控電容模組635所提供之一整體電容或總電容亦變化為溫度(或是其它參數)之一函數,且其接著被利用以改變諧振頻率f 0 。在其它所選的實施例中,複數個控制電壓(包含靜態控制電壓)的任一個控制電壓都可被利用來提供其它類型的補償,即如以下所述者。此外,於各個可切換的電容性模組640之內,固定電容C f 或可變電容C v (非二者)係運用切換係數p 0 P (w 1) 而被切換至電路中。舉例而言,於所選擇的實施例中,對於一個特定或所選擇的模組640而言,當其對應的“p”係數為一邏輯高(或高電壓)時,對應的固定電容C f 係被切換進入該電路,而且對應的可變電容C v 係被切換離開該電路(且取決於該元件是AMOS或IMOS而分別耦接至一電源軌道電壓VD D 或接地(GND),以避免一浮接的節點,且使得呈現至諧振電路的電容為最小),而當其對應的“p”係數為一邏輯低(或低電壓)時,對應的固定電容C f 係被切換離開該電路,而對應的可變電容C v 係被切換進入該電路且耦接至被提供於節點625之控制電壓。Within each switchable module 640, each fixed and variable capacitance system is initially equal, wherein the variable capacitance is allowed to change in response to the control voltage provided to node 625. The control voltage is then changed with temperature or another selected variable parameter, which results in that the overall capacitance or total capacitance provided by the controlled capacitance module 635 also changes to temperature (or Is one of the other parameters) and it is then utilized to change the resonant frequency f 0 . In other selected embodiments, any of a plurality of control voltages (including static control voltages) can be utilized to provide other types of compensation, as described below. Further, in the respective capacitive switchable module 640, the fixed capacitance C f or a variable capacitance C v (not both) lines using switching coefficient p 0 to P (w - 1) is switched into the circuit. For example, in the embodiment chosen, for a particular or selected module 640, when the corresponding "p" coefficient of a logic high (or high voltage), the corresponding fixed capacitance C f Is switched into the circuit, and the corresponding variable capacitor C v is switched away from the circuit (and depending on whether the component is AMOS or IMOS, respectively coupled to a power rail voltage V D D or ground (GND), avoid a floating node contact, and so presents to the capacitance of the resonant circuit is minimized), when its corresponding "p" coefficient is a logic low (or low voltage), the corresponding fixed capacitance C f system is switched away from the The circuit, and the corresponding variable capacitor Cv , is switched into the circuit and coupled to the control voltage provided to node 625.

於一個範例的實施例中,總計為八個可切換的電容性模組640(與對應的第一複數個八個切換係數p 0 p 7 )係已經被實施以提供256個組合之固定與可變電容。因此,作為溫度變化的一個函數之於振盪頻率上的重要控制係被提供。In an exemplary embodiment, a total of eight switchable capacitive modules 640 (and corresponding first plurality of eight switching coefficients p 0 to p 7 ) have been implemented to provide 256 combinations of fixed and Variable capacitance. Therefore, an important control over the oscillation frequency as a function of temperature variation is provided.

在此範例的實施例中,應該注意到的是,藉由切換進出該固定電容C f 或是可變電容C v ,固定電容相對於可變電容的比例係改變,而該可控制的電容模組635的溫度響應量或程度係對應地改變。例如,在增加的可變電容C v 量之下,該可控制的電容模組635係響應於溫度(或是其它參數)來提供更大的電容變化性,藉此調整該諧振電路或其它振盪器的頻率響應。In this exemplary embodiment, it should be noted that by switching in and out of the fixed capacitor C f or the variable capacitor C v , the ratio of the fixed capacitor to the variable capacitor is changed, and the controllable capacitive mode is changed. The amount or degree of temperature response of group 635 is correspondingly changed. For example, under an increased amount of the variable capacitance C v, the line capacitance module 635 may be controlled in response to temperature (or other parameter) to provide a larger capacitance variability, thereby adjusting the resonant oscillating circuit or other The frequency response of the device.

圖10係描繪根據本發明的教示之一個範例的溫度相依的電壓控制模組650的電路圖,該電壓控制模組650係被利用以提供在(頻率溫度補償模組420之)可控制的電容模組635中之控制電壓,並且作為VC T R L 480(在圖4中)。如圖所示,電壓控制模組650係運用電流產生器655而產生一溫度相依的電流I(T)(或更概括為一電流I(x)),如先前所述為運用PTAT、PTAT2 及/或CTAT電流產生器之一或多個組合,且可共用負互導放大器410所利用的I(T)產生器415,而非為提供一單獨的產生器655。溫度相依的電流I(T)(或I(x))係透過電流鏡670而鏡射至一陣列或排之複數個可切換的電阻性模組或分支675與一固定的電容性模組或分支680,所有的模組或分支均為並聯配置的。在其它範例的實施例中,依據所要補償的參數變化,以下所述之其它的控制電壓產生器也可被利用。10 is a circuit diagram depicting a temperature dependent voltage control module 650 that is utilized to provide a controllable capacitive mode (of the frequency temperature compensation module 420) in accordance with an example of the teachings of the present invention. The control voltage in group 635 is taken as V C T R L 480 (in Figure 4). As shown, voltage control module 650 utilizes current generator 655 to generate a temperature dependent current I(T) (or more generally a current I(x)) as previously described for use of PTAT, PTAT 2 And/or one or more combinations of CTAT current generators, and may share the I(T) generator 415 utilized by the negative transconductance amplifier 410, rather than providing a separate generator 655. The temperature-dependent current I(T) (or I(x)) is mirrored through the current mirror 670 to an array or array of switchable resistive modules or branches 675 and a fixed capacitive module or Branch 680, all modules or branches are configured in parallel. In other exemplary embodiments, other control voltage generators described below may also be utilized depending on the parameter variations to be compensated.

在其它組合中,依據PTAT、PTAT2 及/或CTAT電流產生器的選擇及加權,一個與溫度無關的電流亦可被產生。例如,尺寸被定為具有相等大小及相反斜率的一個PTAT產生器以及一個CTAT產生器可被組合以產生一個電流產生器,該電流產生器係在溫度變動下提供一固定的電流。例如,此種電流產生器可被利用在圖30中所示的老化變化補償器中提供一固定的電流源。熟習此項技術者將會體認到的是,其它的電流源亦可被利用,例如,那些隨著電源電壓變化的電流源,並且可被利用作為對應的電壓感測器。In other combinations, a temperature independent current can also be generated depending on the selection and weighting of the PTAT, PTAT 2 and/or CTAT current generators. For example, a PTAT generator sized to have equal magnitudes and opposite slopes and a CTAT generator can be combined to produce a current generator that provides a fixed current under temperature variations. For example, such a current generator can be utilized to provide a fixed current source in the aging change compensator shown in FIG. Those skilled in the art will recognize that other current sources can also be utilized, such as those that vary with supply voltage, and can be utilized as corresponding voltage sensors.

電阻器685係可為任何型式或不同型式之組合,舉例而言,諸如:擴散電阻器(p或n)、多晶矽、金屬電阻器、自我對準金屬矽化(salicide)或非自我對準金屬矽化(unsalicide)的多晶矽電阻器、或井電阻器(p或n井)。依據所選的電阻器類型或是多個類型的組合,該電阻器685一般也將會有一對應的溫度相依性(或是響應),對於通過該所選的電阻器685之一個特定的電流,此係在橫跨該所選的電阻器685提供一個為溫度的一個函數之對應的電壓變化。例如,一個擴散電阻器一般將會有一個高的溫度係數(提供隨著溫度而有更大的電壓變化),而一個多晶矽電阻器一般將會有一個低的溫度係數(提供隨著溫度而有較小的電壓變化),而對於一個所選的模組675串聯複數個這些不同的電阻器類型的混合將會提供一個對應的響應在這些高與低的響應程度之間。或者是,該電阻器685的尺寸或加權可被定為提供不同的電壓位準為一特定的電流(諸如:一溫度相依的電流(例如,I(T)))之一個函數,亦藉此對於此種隨溫度變化的電流提供一個為溫度的一個函數之對應的電壓變化。Resistor 685 can be any type or combination of different types, such as: diffusion resistors (p or n), polysilicon, metal resistors, self-aligned metal salicide or non-self-aligned metal deuteration (unsalicide) polysilicon resistors, or well resistors (p or n wells). Depending on the type of resistor selected or a combination of multiple types, the resistor 685 will typically also have a corresponding temperature dependence (or response) for a particular current through the selected resistor 685, This provides a corresponding voltage change across the selected resistor 685 as a function of temperature. For example, a diffusion resistor will generally have a high temperature coefficient (providing a larger voltage change with temperature), while a polysilicon resistor will generally have a lower temperature coefficient (provided with temperature) A smaller voltage change), and a mixture of these multiple different resistor types in series for a selected module 675 will provide a corresponding response between these high and low response levels. Alternatively, the size or weighting of the resistor 685 can be determined to provide a different voltage level as a function of a particular current, such as a temperature dependent current (eg, I(T)), thereby For such a temperature-dependent current, a corresponding voltage change is provided as a function of temperature.

各個可切換的電阻性模組675係藉著第二複數(“x”)個切換係數q 0 q (x 1) 之一個對應的“q”係數而被切換進出於電壓控制模組650。當可切換的電阻性模組675被切換至該電路(諸如當其對應的係數為一邏輯高或高電壓)時,跨於其之對應的電阻器685之所得到的電壓亦為溫度相依的,這是因為溫度相依的電流I(T)之緣故。於一個所選的實施例中,三個可切換的電阻性模組675係被利用,其提供8種分支組合。因此,被提供至節點625之控制電壓亦為溫度(或是其它參數)之一個函數,因而提供對於在可控電容模組635中之可變電容器615的一溫度或是其它參數的相依性或靈敏度。其它更概括為參數相依的或是與溫度無關的電阻性模組係在以下分別參考圖23與26以及圖28來加以敘述。Each switchable resistive module 675 is switched into the voltage control module 650 by a corresponding "q" coefficient of the second complex number ("x") of the switching coefficients q 0 to q (x - 1) . . When the switchable resistive module 675 is switched to the circuit (such as when its corresponding coefficient is a logic high or high voltage), the resulting voltage across its corresponding resistor 685 is also temperature dependent. This is because of the temperature dependent current I(T). In one selected embodiment, three switchable resistive modules 675 are utilized that provide eight branch combinations. Thus, the control voltage provided to node 625 is also a function of temperature (or other parameter), thereby providing a dependency on a temperature or other parameter of variable capacitor 615 in controllable capacitive module 635 or Sensitivity. Other parametric or temperature independent resistive modules are described below with reference to Figures 23 and 26 and Figure 28, respectively.

第一複數個切換係數p 0 p (w 1) 與第二複數個切換係數q 0 q (x 1) 可藉著測試一個具有本發明之時脈產生器的代表性IC而在製造後來加以決定。一旦一個諧振頻率f 0 已經對於一個特定的製程被選出及/或校準(在以下參考圖11與12加以敘述),則該振盪器的溫度(或其它參數)響應係被判斷出且加以調整,以對於此種在環境或是操作溫度(或是其它可變的參數)的變化提供一個實質上固定之所選的諧振頻率f 0 。在範例的實施例中,第一複數個切換係數p 0 p (w 1) 係首先藉著測試各種的係數組合而被決定,以提供一粗略程度之調整,而造成為變化的環境溫度的一個函數之實質或幾乎為平坦的頻率響應。如在圖24中所示,多少有些固定的電容C f 或是可變的電容C v 被切換進出該振盪器。例如,當該振盪器對於溫度變化之未補償的頻率響應是由線1705或1710所表示時,額外的可變的電容C v 可被切換進入,此係對於該振盪器的頻率響應提供一個粗略的調整至大約線1715的位置。相反地,同樣是舉例而言,當該振盪器對於溫度變化之未補償的頻率響應是由線1725或1730所表示時,額外的固定的電容C f 可被切換進入,此係對於該振盪器的頻率響應提供一個粗略的調整至大約線1720的位置。A first plurality of switching coefficients p 0 to p (w - 1) and the second plurality of switching the coefficients q 0 q (x - 1) may be tested by having a clock generator according to the present invention in a representative IC Manufacturing was later decided. Once a resonant frequency f 0 has been selected and/or calibrated for a particular process (described below with reference to Figures 11 and 12), the temperature (or other parameter) response of the oscillator is determined and adjusted. A substantially fixed selected resonant frequency f 0 is provided for such changes in ambient or operating temperature (or other variable parameters). In an exemplary embodiment, the first plurality of switching coefficients p 0 to p (w - 1) are first determined by testing various combinations of coefficients to provide a coarse degree of adjustment resulting in a varying ambient temperature. The essence of a function or almost a flat frequency response. As shown in FIG. 24, somewhat fixed or variable capacitance C f of the capacitor C v is switched out of the oscillator. For example, when the frequency of the oscillator is uncompensated for temperature variations of the response is indicated by a line 1705 or 1710, additional variable capacitance C v may be switched to enter, this system the frequency response of the oscillator for providing a rough Adjust to the position of line 1715. Conversely, the same example, when the frequency of the oscillator is uncompensated for temperature variations of the response is indicated by a line 1725 or 1730, additional fixed capacitors can be switched into the C f, of the oscillator for this system The frequency response provides a rough adjustment to approximately the position of line 1720.

該第二複數個切換係數q 0 q (x 1) 係接著同樣是藉著測試各種的係數組合而被決定,以提供一較為精細程度之調整,而造成為變化的環境溫度的一個函數之實質或顯著為平坦的頻率響應,在圖24中被描繪為透過各種的電阻器685之溫度響應的選擇,來調整部分補償的頻率響應(線1715或1720)成為線1700之實質上平坦的響應。該第一與第二複數個係數係接著被載入至在所選的處理作業(或批次)中所製造的所有IC之個別的暫存器495與455中。根據製程,於其它情況之下,為了能夠得到較高的準確度,各個IC可個別加以校準。因此,結合由負互導放大器410與I(T)產生器415所提供之溫度補償,該時脈產生器之整體的頻率響應係實質上無關於溫度變動。The second plurality of switching coefficients q 0 to q (x - 1) is the line followed by the same test various combinations of coefficients is determined to provide a more refined level of the adjustment, as a change caused by a function of ambient temperature The substantial or significantly flat frequency response is depicted in FIG. 24 as the selection of the temperature response through various resistors 685 to adjust the partially compensated frequency response (line 1715 or 1720) to be substantially flat for line 1700. response. The first and second plurality of coefficients are then loaded into individual registers 495 and 455 of all ICs fabricated in the selected processing job (or batch). Depending on the process, in other cases, individual ICs can be individually calibrated in order to achieve higher accuracy. Thus, in combination with the temperature compensation provided by the negative transconductance amplifier 410 and the I(T) generator 415, the overall frequency response of the clock generator is substantially independent of temperature variations.

在其它範例的實施例中,該第一複數個切換係數p 0 p (w 1) 以及第二複數個切換係數q 0 q (x 1) 亦可以在該振盪器的動作期間被決定且動態地加以改變,例如,透過圖21中所示的感測器1440以及A/D轉換器1445、或是透過圖25中所示的感測器1815以及控制邏輯(或控制迴路)1810。在這些替代的實施例中,所儲存的第一及第二複數個係數可被省略或是繞過,其對應的電壓直接施加至如在圖9與10中所示之個別的切換構件以作為控制信號(並且,此係類似地延伸到以下所述的其它複數個係數)。In other exemplary embodiments, the first plurality of switching coefficients p 0 to p (w - 1) and the second plurality of switching coefficients q 0 to q (x - 1) may also be used during the operation of the oscillator. Deciding and dynamically changing, for example, through the sensor 1440 and A/D converter 1445 shown in FIG. 21, or through the sensor 1815 and control logic (or control loop) 1810 shown in FIG. . In these alternative embodiments, the stored first and second plurality of coefficients may be omitted or bypassed, and the corresponding voltages applied directly to the individual switching members as shown in Figures 9 and 10 as The control signal (and, this similarly extends to other complex coefficients as described below).

例如,如同在圖26中所示,即如以下更加詳細所述者,複數個電流源1955的任一個都可以用各種的組合來被提供至複數個電阻性模組,以響應於一個所選的參數“P”來產生複數個控制電壓,該些控制電壓可以用任意組合來被切換到該複數個受控電抗模組1805中的每一個,該些受控電抗模組1805例如是可被實施為受控電容模組1505(圖22),以控制該諧振器的有效電抗。此外,如圖28中所示,複數個固定的(與溫度無關的)控制電壓的任一個都可被產生。再者,其它或額外類型的電流源也可被利用,其係產生該控制電壓或是提供感測器385、1440功能,例如,那些可以隨著供應電壓VDD變化、或是與供應電壓、溫度以及其它參數無關的感測器。除了離散的控制之外,任何這些控制電壓都可被利用來對於例如是溫度變化的參數變化提供即時連續的控制。For example, as shown in FIG. 26, as described in more detail below, any of a plurality of current sources 1955 can be provided to a plurality of resistive modules in various combinations to respond to a selected one. The parameter "P" generates a plurality of control voltages, and the control voltages can be switched to each of the plurality of controlled reactance modules 1805 in any combination, and the controlled reactance modules 1805 can be, for example, Implemented as a controlled capacitor module 1505 (Fig. 22) to control the effective reactance of the resonator. Further, as shown in FIG. 28, any of a plurality of fixed (temperature independent) control voltages can be generated. Furthermore, other or additional types of current sources can also be utilized which generate the control voltage or provide the functions of the sensors 385, 1440, for example, those that can vary with the supply voltage VDD, or with the supply voltage, temperature And other parameter-independent sensors. In addition to discrete control, any of these control voltages can be utilized to provide instantaneous continuous control of parameter changes such as temperature changes.

因此,提供至諧振的LC諧振電路405之整體的電容係分配成為固定的部分與可變的部分之一組合,其中該可變的部分係響應來提供溫度補償,並且因此控制諧振頻率f 0 。被切換至電路(控制電容器模組635)之可變電容C v 愈大,則對於環境溫度的變動之頻率響應愈大。如上所指出地,固定與可變電容器兩者都可利用分別耦接或是切換至實質上固定或可變的電壓之可變電容器(變容器)來加以實施。Therefore, the capacitance of the LC resonant circuit 405 provided to the resonance is distributed as a fixed portion combined with one of the variable portions, wherein the variable portion is responsive to provide temperature compensation, and thus the resonant frequency f 0 . Is switched to a circuit (control capacitor module 635) of the variable capacitance C v is larger, the variation of the frequency response of greater ambient temperature. As noted above, both fixed and variable capacitors can be implemented with variable capacitors (varactors) that are respectively coupled or switched to a substantially fixed or variable voltage.

除了提供溫度補償之外,應注意到的是,一個被切換或是受控(或可控制的)電容模組635亦可被利用來選擇或調諧諧振頻率f 0 。熟習此項技術者亦將會明瞭的是,一個被切換或是可控制的電容模組635亦可被利用來提供對於其它參數變化(例如,製程變化、頻率及電壓變動)的頻率響應。此外,如以下參考圖20與25至27所述,一電容、一電感、一電阻或是任何其它的電抗或阻抗元件都可被利用在這些各種的範例實施例中,其係提供一個受控電抗或是阻抗模組來對於複數個可變的參數(例如溫度、電壓、製程或頻率)中之任一個提供一個所選的頻率響應。In addition to providing temperature compensation, it should be noted that a switched or controlled (or controllable) capacitive module 635 can also be utilized to select or tune the resonant frequency f 0 . It will also be apparent to those skilled in the art that a switched or controllable capacitive module 635 can also be utilized to provide a frequency response to other parameter variations (e.g., process variations, frequency and voltage variations). Furthermore, as described below with reference to Figures 20 and 25 through 27, a capacitor, an inductor, a resistor or any other reactance or impedance element can be utilized in these various exemplary embodiments, which provide a controlled A reactance or impedance module provides a selected frequency response for any of a plurality of variable parameters, such as temperature, voltage, process, or frequency.

圖22是描繪根據本發明的教示之(與圖23的模組1600一起)被利用在一個頻率-溫度補償模組420中、或是在更概括為一個頻率控制器215、349、1415中之範例的第二受控電容器模組1500(取代模組485與480或是作為該等模組之外的模組)之電路圖。該第二受控電容模組1500係類似於該第一受控電容模組635地運作,但為利用可變的電容,而非固定及可變的電容兩者,並且其係利用複數個不同的控制電壓,而非單一控制電壓。此外,此種可變的電容並非耦合至該諧振器或是從該諧振器去耦合(亦即,該些可變的電容總是耦合至該諧振器),而是被切換至不同的控制電壓以控制該頻率響應為一個所選的參數(例如溫度)的一個函數。再者,所選的實施例可利用少到只有一個模組,並且該有差別的加權可藉由切換至複數個控制電壓中之一個所選的控制電壓來加以達成。Figure 22 is a diagram depicting the use of (in conjunction with the module 1600 of Figure 23) in a frequency-temperature compensation module 420, or more generally as a frequency controller 215, 349, 1415, in accordance with the teachings of the present invention. A circuit diagram of an exemplary second controlled capacitor module 1500 (instead of modules 485 and 480 or as a module other than the modules). The second controlled capacitor module 1500 operates similarly to the first controlled capacitor module 635, but utilizes a variable capacitor, rather than both fixed and variable capacitors, and utilizes a plurality of different Control voltage, not a single control voltage. Moreover, such a variable capacitor is not coupled to or decoupled from the resonator (ie, the variable capacitors are always coupled to the resonator), but are switched to different control voltages. A function that controls the frequency response to a selected parameter (eg, temperature). Moreover, the selected embodiment can utilize as few as one module, and the differential weighting can be achieved by switching to a selected one of a plurality of control voltages.

請參照圖22,該第二受控電容器模組1500係利用複數(“g”)個可變的電容模組1505中之至少一個,每個可變的電容模組1505都包含可變的電容(Cv )1515A 0 至1515B ( g 1 ) (以A與B成對地描繪,對應到節點475或470之平衡的耦合,並且被描繪為具有二進制加權),該些可變的電容係可切換(透過複數個電晶體或是其它開關15200 至1520( g 1 ) )至複數個控制電壓V0 、V1 (x)至V( k 1 ) (x)中之一個所選的控制電壓,其中控制電壓V0 實質上是靜態的(實質上非響應於該所選的參數“x”,例如溫度),而其餘的控制電壓V1 (x)至V( k 1 ) (x)都大致是響應於該所選的參數“x”(例如溫度)或是對其靈敏的。如圖所示,每個對應的成對之可變電容器1515(A與B)的背板係彼此耦接(短路在一起),並且接著經由一個開關連接至一個所選的控制電壓。每個此種成對的可變電容1515都是可透過對應的係數(被描繪為第四複數個係數d 0 d 1 、...、d (k 1) h 0 h 1 、...、h (k 1) )來切換的,使得每個模組1505都可以個別且獨立地被切換至該複數個控制電壓V0 、V1 (x)至V( k 1 ) (x)中之任一個。因此,這些可切換的模組可以保持耦接至該諧振器,其中有效阻抗(例如,電抗)係透過切換至一或多個控制電壓來加以變化。Referring to FIG. 22, the second controlled capacitor module 1500 utilizes at least one of a plurality of ("g") variable capacitor modules 1505, each of which includes a variable capacitor. (C v) 1515 a 0 to 1515 B (g - 1) (depicted by a and B in pairs, to the corresponding coupling node 475 or 470 of the balance, and is depicted as having binary weighted), the plurality of variable The capacitor can be switched (through a plurality of transistors or other switches 1520 0 to 1520 ( g - 1 ) ) to one of a plurality of control voltages V 0 , V 1 (x) to V ( k - 1 ) (x) The selected control voltage, wherein the control voltage V 0 is substantially static (substantially non-responsive to the selected parameter "x", such as temperature), while the remaining control voltages V 1 (x) to V ( k - 1 ) (x) is generally responsive to the selected parameter "x" (eg temperature) or sensitive thereto. As shown, the backplanes of each corresponding pair of variable capacitors 1515 (A and B) are coupled to each other (short-circuited together) and then connected to a selected control voltage via a switch. Each such pair of variable capacitors 1515 is permeable to a corresponding coefficient (depicted as a fourth plurality of coefficients d 0 , d 1 , ..., d (k - 1) to h 0 , h 1 , ..., h (k - 1) ) are switched so that each module 1505 can be individually and independently switched to the plurality of control voltages V 0 , V 1 (x) to V ( k - 1 ) Any of (x). Thus, the switchable modules can remain coupled to the resonator, wherein the effective impedance (eg, reactance) is varied by switching to one or more control voltages.

圖23是描繪根據本發明的教示之被利用在一個頻率-溫度補償模組中之範例的第二電壓控制模組1600之電路圖。如在圖23中所繪,一個對參數靈敏或是響應的電流源655(例如,先前在圖7A至7D中所述且所示的各種CTAT、PTAT以及PTAT2 溫度靈敏的電流源中之任一種及其組合)係(透過一或多個電流鏡(例如,670、510、520))被提供至一個陣列或排的複數“k-1”個電阻性模組1605(被描繪為模組16050 、16051 至1605( k 1 ) ),每個電阻性模組1605係提供一個別或獨立的控制電壓V1 (x)、V2 (x)至V( k 1 ) (x),該控制電壓係被提供至(圖22的)模組1505。各種對應的電阻器16200 、16201 至1620( k 1 ) 可以是先前參考圖10所述的任何類型、尺寸或權重,以對於一個所選的參數(例如溫度)提供任何所選的電壓響應。如圖所示,一個靜態控制電壓V0 可以利用耦接在電壓源軌道VD D 與接地之間的任何分壓器來加以產生,其中對應的電阻大小或值16050 與1605y 係被選擇成提供該所要的靜態電壓位準。此外,複數個不同的靜態或是固定的(亦即,與溫度無關的)電壓之產生係被描繪在圖28中,其係藉由組合具有響應於溫度(或其它參數)之不同成形的電流之不同的電流源以及具有互補或相反的溫度響應之不同的溫度相依的電阻器,此係產生複數個在溫度變化下具有不同大小且實質上為固定的控制電壓。這各種的電壓中之任一個都可隨所需地被利用,作為該各種的控制電壓中之任一個。23 is a circuit diagram depicting a second voltage control module 1600 that is utilized in an example of a frequency-temperature compensation module in accordance with the teachings of the present invention. As depicted in Figure 23, a parameter sensitive or responsive current source 655 (e.g., any of the various CTAT, PTAT, and PTAT 2 temperature sensitive current sources previously described and illustrated in Figures 7A through 7D) One and a combination thereof (through one or more current mirrors (eg, 670, 510, 520)) is provided to an array or row of plural "k-1" resistive modules 1605 (depicted as modules 1605 0 , 1605 1 to 1605 ( k - 1 ) ), each resistive module 1605 provides a separate or independent control voltage V 1 (x), V 2 (x) to V ( k - 1 ) (x The control voltage is provided to the module 1505 (of FIG. 22). The various corresponding resistors 1620 0 , 1620 1 through 1620 ( k - 1 ) may be of any type, size or weight previously described with reference to FIG. 10 to provide any selected voltage for a selected parameter (eg, temperature). response. As shown, a static control voltage V 0 can be generated using any voltage divider coupled between the voltage source rail V D D and ground, where the corresponding resistor size or values 1605 0 and 1605 y are selected. Provide the desired static voltage level. In addition, the generation of a plurality of different static or fixed (i.e., temperature independent) voltages is depicted in Figure 28 by combining currents having different shapes in response to temperature (or other parameters). The different current sources and the different temperature dependent resistors having complementary or opposite temperature responses produce a plurality of substantially constant and substantially fixed control voltages under temperature variations. Any of these various voltages can be utilized as desired, as any of the various control voltages.

在範例的實施例中,該複數個控制電壓之每個此種控制電壓是不同的,以提供複數個控制電壓,每個控制電壓都是不同地響應或成形的(亦即,提供不同的響應(響應曲線)為所選的參數(例如,溫度)的變化之一個函數),其可以響應於不同的參數,而其它的控制電壓可以相對於一個所選的參數實質上是固定的。依據所選的實施例,該陣列或排的電阻性模組1605可以是透過對應的電晶體1610(被描繪為電晶體16100 、16101 至1610( k 1 ) )而為可切換的,並且藉此被切換進出該陣列1600,或是可以靜態地被內含(固定的連線1615,在圖23中被描繪為虛線),以自動地產生預設數目個控制電壓V0 、V1 (x)至V( k 1 ) (x)。依據電阻器1620(及/或電晶體1610,若有內含的話)的選擇,該各種的控制電壓V0 、V1 (x)至V( k 1 ) (x)分別將會是不同的、或者是對於該所選的參數或變數提供一個不同的響應,例如,不同的溫度響應。In an exemplary embodiment, each such control voltage of the plurality of control voltages is different to provide a plurality of control voltages, each control voltage being differently responsive or shaped (ie, providing a different response) (Response curve) is a function of the change in the selected parameter (eg, temperature), which may be responsive to different parameters, while other control voltages may be substantially fixed relative to a selected parameter. Depending on the embodiment selected, the array or row of resistive modules 1605 can be switchable through corresponding transistors 1610 (depicted as transistors 1610 0 , 1610 1 through 1610 ( k - 1 ) ), And thereby being switched into and out of the array 1600, or may be statically included (fixed connection 1615, depicted as a dashed line in FIG. 23) to automatically generate a predetermined number of control voltages V 0 , V 1 (x) to V ( k - 1 ) (x). Depending on the choice of resistor 1620 (and/or transistor 1610, if included), the various control voltages V 0 , V 1 (x) through V ( k - 1 ) (x) will be different, respectively. Or provide a different response to the selected parameter or variable, for example, a different temperature response.

類似地,圖26係描繪根據本發明的教示之可被利用來提供控制電壓給該各種的模組中的任一個模組之範例的第三電壓控制模組1900之電路方塊圖。如在圖26中所繪,複數個對參數靈敏或響應的電流源1955(例如,先前在圖7A至7D中所述且所示的各種的CTAT、PTAT以及PTAT2 溫度靈敏的電流源中之任一種及其組合)係(透過一或多個電流鏡(例如,670、510、520))被提供至一個陣列或排的複數“n-1”個電阻性模組1905(被描繪為模組19050 、19051 至1905( n 1 ) )。每個電阻性模組1905係提供一個別或獨立的控制電壓V0 (P)、V1 (P)、V2 (P)至V( n 1 ) (P),此係產生複數個響應於或是依據該所選的參數“P”而定的控制電壓,並且該些控制電壓係被提供至受控電抗模組1805、(圖22的)受控電容模組1505,或是任何利用一或多個控制電壓的其它模組。各種對應的電阻器19200 、19201 至1920( n 1 ) 都可以是先前所述的任何類型、尺寸或是權重,以對於一個所選的參數提供任何所選的電壓響應。電流源(或是電流源的組合)以及電阻器尺寸與類型的選擇係容許任何所要的控制電壓對於該所選的參數之響應的成形。此外,在圖28中所示之複數個不同的靜態或固定的(亦即,與溫度無關的)電壓中的任一個亦可隨所需地被利用,作為用於任何所論述的模組之各種的控制電壓中之任一個。Similarly, FIG. 26 depicts a circuit block diagram of a third voltage control module 1900 that can be utilized to provide control voltage to any of the various modules in accordance with the teachings of the present invention. As depicted in Figure 26, a plurality of current sources 1955 that are sensitive or responsive to the parameters (e.g., various CTAT, PTAT, and PTAT 2 temperature sensitive current sources previously described and illustrated in Figures 7A through 7D) Any one or a combination thereof (through one or more current mirrors (eg, 670, 510, 520)) is provided to an array or row of plural "n-1" resistive modules 1905 (depicted as a mode Group 1905 0 , 1905 1 to 1905 ( n - 1 ) ). Each resistive module 1905 provides a separate or independent control voltage V 0 (P), V 1 (P), V 2 (P) to V ( n - 1 ) (P), which produces a plurality of responses Or a control voltage according to the selected parameter "P", and the control voltages are provided to the controlled reactance module 1805, the controlled capacitor module 1505 (of FIG. 22), or any utilization One or more other modules that control the voltage. Corresponding to the various resistors 19200, 19201 to 1920 (n - 1) previously described may be of any type, size or weight, a selected voltage to provide any response to a selected parameter. The choice of current source (or combination of current sources) and resistor size and type allows for the shaping of the response of any desired control voltage to the selected parameter. Moreover, any of a plurality of different static or fixed (i.e., temperature independent) voltages shown in Figure 28 can be utilized as desired for use in any of the modules discussed. Any of a variety of control voltages.

依據所選的實施例,該陣列或排的電阻性模組1905可以是透過對應的電晶體1915(被描繪為電晶體19150 、19151 至1915( n 1 ) )而為可切換的,並且藉此動態或靜態地切換進出該陣列,以自動地產生複數個控制電壓V0 (P)、V1 (P)、V2 (P)至V( n 1 ) (P)。每個這些不同的控制電壓接著都可以(利用開關1930,例如,全縱橫式(crossbar)開關)用任何組合、靜態或動態地、在控制信號及/或係數1950的切換控制之下,被切換至受控電抗模組1805,該些受控電抗模組1805可被耦接至該諧振器、或是亦可被切換進出該諧振電路。因此,這些控制電壓中的任一個都可被利用來控制該諧振器(振盪器)的有效電抗,提供所產生的諧振頻率之離散與連續的控制。例如,這些參數相依的控制電壓V0 (P)、V1 (P)、V2 (P)至V( n 1 ) (P)中的任一個、或是該實質上與參數無關的控制電壓(圖28)中的任一個都可被提供至該受控阻抗模組1305或是受控電容模組1505或1805,以改變被提供至該諧振器的有效電容,此係對於來自複數個參數中的任一個參數之變化提供頻率控制。Depending on the embodiment selected, the array or row of resistive modules 1905 can be switchable through corresponding transistors 1915 (depicted as transistors 1915 0 , 1915 1 through 1915 ( n - 1 ) ), And thereby switching in and out of the array dynamically or statically to automatically generate a plurality of control voltages V 0 (P), V 1 (P), V 2 (P) to V ( n - 1 ) (P). Each of these different control voltages can then be switched (using switch 1930, for example, a full crossbar switch) in any combination, statically or dynamically, under control of the control signal and/or coefficient 1950. To the controlled reactance module 1805, the controlled reactance modules 1805 can be coupled to the resonator or can be switched into and out of the resonant circuit. Thus, any of these control voltages can be utilized to control the effective reactance of the resonator (oscillator), providing discrete and continuous control of the resulting resonant frequency. For example, any of these parameter dependent control voltages V 0 (P), V 1 (P), V 2 (P) to V ( n - 1 ) (P), or the substantially parameter-independent control Any of the voltages (Fig. 28) can be provided to the controlled impedance module 1305 or the controlled capacitance module 1505 or 1805 to vary the effective capacitance supplied to the resonator, for from a plurality of A change in any of the parameters provides frequency control.

請再次參照圖22,當這些不同的控制電壓V0 、V1 (x)至V( k 1 ) (x)、或是更概括為V0 (P)、V1 (P)、V2 (P)至V( n 1 ) (P)以及實質上固定的控制電壓中之任一個分別都是可利用的,並且可透過該第四複數個係數d 0 d 1 、...d (k 1) h 0 h 1 、...h (k 1) 來切換至該可變的電容模組1505中之可變的電容C v 1515時,一種對於所選的參數(例如溫度)之高度有彈性的、微調且高度可控制的頻率響應係被提供至該諧振器405,此係使得對於諧振頻率f 0 之高度準確的頻率控制成為可能的。例如,在模組1505( g 1 ) 中之可變的電容1515A ( g 1 ) 及1515B ( g 1 ) 可透過參數h 1 (或是一個對應的動態所施加的電壓,作為一個控制信號)被設定成邏輯高(或高電壓)而該第四複數個參數之其餘的h 參數被設定成邏輯低(或低電壓),以被切換至控制電壓V1 (x),此係提供第一頻率響應為溫度或是其它所選的參數的一個函數,而在模組15050 中之可變的電容1515A 0 及1515B 0 可透過參數d( k 1 ) (或是一個對應的動態所施加的電壓,作為另一個控制信號)被設定成一個邏輯高(或高電壓)而該第四複數個參數之其餘的d 參數被設定成一個邏輯低(或低電壓),以被切換至控制電壓V( k 1 ) (x),此係提供第二頻率響應為溫度或是其它所選的參數的一個函數、依此類推。如上所述,該第四複數個係數d 0 d 1 、...、d (k 1) h 0 h 1 、...、h (k 1) 也可以透過測試一或多個IC在製造後加以決定、或是亦可以在該振盪器的動作期間,例如是透過如在圖21中所繪的感測器1440以及A/D轉換器1445或是透過在圖25中所繪的感測器1815以及控制邏輯(或是控制迴路)1810來動態地加以決定及改變。更概括而言,此種透過係數或是控制信號的控制係被描繪在圖26中,並且可被利用以提供離散或連續的頻率控制之任一者或兩者為任何所選的參數(例如,溫度、電壓、製程、老化或是頻率)之一個函數。Referring again to Figure 22, when these different control voltages V 0 , V 1 (x) to V ( k - 1 ) (x), or more generally V 0 (P), V 1 (P), V 2 Any one of (P) to V ( n - 1 ) (P) and a substantially fixed control voltage is available, respectively, and is permeable to the fourth plurality of coefficients d 0 , d 1 , ... d (k - 1) to h 0 , h 1 , ... h (k - 1) to switch to the variable capacitance C v 1515 in the variable capacitance module 1505, one for the selected parameter ( e.g. temperature) of highly flexible, and highly controlled fine-tuning the frequency response of the system is provided to the resonator 405, so that the height of this system resonance frequency f 0 of an accurate frequency control becomes possible. For example, the variable capacitances 1515 A ( g - 1 ) and 1515 B ( g - 1 ) in module 1505 ( g - 1 ) can pass the parameter h 1 (or a corresponding dynamic applied voltage as a control signal is set to logic high (or high voltage) and the remaining h parameters of the fourth plurality of parameters are set to logic low (or low voltage) to be switched to control voltage V 1 (x), providing a first line frequency response function of a selected temperature or other parameters, and in the 15050 in the variable capacitance module 1515 a 0 and 1515 B 0 permeable parameter d (k - 1) (or A corresponding dynamic applied voltage, as another control signal, is set to a logic high (or high voltage) and the remaining d parameters of the fourth plurality of parameters are set to a logic low (or low voltage), To be switched to the control voltage V ( k - 1 ) (x), this provides a function of the second frequency response as a temperature or other selected parameter, and so on. As described above, the fourth plurality of coefficients d 0 , d 1 , ..., d (k - 1) to h 0 , h 1 , ..., h (k - 1) can also pass the test one or more The ICs are determined after fabrication, or may also be during operation of the oscillator, such as through sensor 1440 and A/D converter 1445 as depicted in FIG. 21 or through FIG. The depicted sensor 1815 and control logic (or control loop) 1810 dynamically determine and change. More generally, such a transmission coefficient or control of the control signal is depicted in Figure 26 and can be utilized to provide either or both of discrete or continuous frequency control for any selected parameter (e.g. , a function of temperature, voltage, process, aging, or frequency.

此外,取代針對於該第一、第二或第四複數個係數所儲存的係數,尤其是當對應的值將會是如上所述地動態地加以決定時,對應的電壓可以如上所述地直接被施加至該各種的開關(例如,電晶體1520或是模組640與650的開關電晶體),以作為控制信號。Furthermore, instead of the coefficients stored for the first, second or fourth plurality of coefficients, in particular when the corresponding value will be dynamically determined as described above, the corresponding voltage can be directly as described above It is applied to the various switches (eg, transistor 1520 or switching transistors of modules 640 and 650) as control signals.

請再次參考圖4,另一個補償模組亦被利用以對於諧振頻率f 0 提供較大的控制與準確度,亦針對於可能需要較大的準確度與較少的變異量(或頻率漂移)之應用,例如是提供於PVT之大約為±0.25%或更佳者的頻率準確度。於此等情形中,一製程變化補償模組425(諸如於圖11與12所示之範例模組)係可被利用以對於諧振頻率f 0 提供控制,而無關於製程變化。如上所指出地,這些各種的模組中的任一個都可包含任何阻抗、電抗或電阻,並且被做成響應於任何所選的參數,例如,溫度、製程變化、電壓變化以及頻率變化。Referring again to Figure 4, another compensation module is also utilized to provide greater control and accuracy for the resonant frequency f 0 , as well as for greater accuracy and less variation (or frequency drift). The application is, for example, a frequency accuracy of about ±0.25% or better for PVT. And the like in this case, a process variation compensation module 425 (such as the example in FIG. 11 and the module 12 shown) may be utilized to provide a system for controlling the resonance frequency f 0, without regard to process variation. As noted above, any of these various modules can include any impedance, reactance, or resistance and be configured to respond to any selected parameter, such as temperature, process variation, voltage variation, and frequency variation.

圖11係描繪根據本發明的教示之一個範例的第一製程變化補償模組760的電路圖。第一製程變化補償模組760係可被利用作為於圖4中之製程補償模組460,其中各個模組為附接至諧振的LC諧振電路405之一軌道或側邊(線路或節點470與475)。此外,各個第一製程變化補償模組760係由儲存於暫存器465之第三複數(“y”)個切換係數r 0 r (y 1) 所控制。第一製程變化補償模組760係提供一陣列之可切換的電容性模組,其具有有差別加權的(例如,二進制加權的)第一固定的電容750,用於諧振頻率f 0 之調整及選擇,其係藉著透過對應的複數個開關電晶體740(由一個對應的“r”係數所控制)來切換進出複數個固定的電容750。同樣地,當各個電容分支被切換進出該陣列或電路760時,對應的第一固定的電容係被加入於諧振的LC諧振電路中的振盪之可利用的總電容、或是自其中減去,藉以改變該有效電抗且調變該諧振頻率。第三複數個切換係數r 0 r (y 1) 亦為利用測試IC而在製造後加以決定的,其與第一與第二(或第四)複數個切換係數之決定係大致上為一種反覆的過程。此校準係運用頻率校準模組(325或430)與已知為具有一預定頻率之一參考振盪器而達成。該被決定的“r”係數係接著儲存在該生產或處理批次之IC的對應的暫存器465中。或者,舉例而言,各個IC係可各別地加以校準。11 is a circuit diagram depicting a first process variation compensation module 760 in accordance with one example of the teachings of the present invention. The first process variation compensation module 760 can be utilized as the process compensation module 460 of FIG. 4, wherein each module is one of the tracks or sides of the LC resonant circuit 405 attached to the resonance (the line or node 470 and 475). In addition, each of the first process variation compensation modules 760 is controlled by a third complex number ("y") of switching coefficients r 0 to r (y - 1) stored in the register 465. The first process variation compensation module 760 provides an array of switchable capacitive modules having differentially weighted (eg, binary weighted) first fixed capacitance 750 for adjustment of the resonant frequency f 0 and Alternatively, it is switched in and out of a plurality of fixed capacitors 750 by a corresponding plurality of switching transistors 740 (controlled by a corresponding "r" coefficient). Similarly, when each capacitor branch is switched in and out of the array or circuit 760, the corresponding first fixed capacitance is added to or subtracted from the total available capacitance of the oscillations added to the resonant LC resonant circuit. Thereby changing the effective reactance and modulating the resonant frequency. The third plurality of switching coefficients r 0 to r (y - 1) are also determined after manufacture by using the test IC, and the determination of the first and second (or fourth) plurality of switching coefficients is substantially A repetitive process. This calibration is achieved using a frequency calibration module (325 or 430) and a reference oscillator known to have a predetermined frequency. The determined "r" coefficient is then stored in the corresponding register 465 of the IC of the production or processing lot. Or, for example, individual IC systems can be individually calibrated.

除了此種校準方法之外,該第三複數個切換係數r 0 r (y 1) 亦可以利用其它以下所述的方法來加以決定,例如,利用各種的電壓及電流感測器來量測反映例如是電晶體臨界(threshold)電壓的製程參數、該諧振電路的電阻大小或值、或是由各種的電流源所產生之絕對的電流位準的參數或變數。此種量測出的值接著可被利用來提供對應的係數(該第三複數個切換係數r 0 r (y 1) )及/或控制信號以用於對應的頻率調整。例如,此種量測出或是感測到的值可被轉換成為數位值,其接著被索引至記憶體中的一個查閱表(lookup table),該表接著根據已知的值或是其它的校準或模型來提供所儲存的值。In addition to such a calibration method, the third plurality of switching coefficients r 0 to r (y - 1) can also be determined by other methods described below, for example, using various voltage and current sensors. The measurement reflects, for example, a process parameter of the transistor threshold voltage, a magnitude or value of the resistance of the resonant circuit, or a parameter or variable of the absolute current level produced by the various current sources. Such measured values can then be utilized to provide corresponding coefficients (the third plurality of switching coefficients r 0 to r (y - 1) ) and/or control signals for corresponding frequency adjustments. For example, such measured or sensed values can be converted to digital values, which are then indexed to a lookup table in memory, which is then based on known values or other Calibrate or model to provide the stored values.

為了避免另外的頻率失真,數項另外的特徵係可利用此第一製程變化補償模組760而被實施。第一,為了避免另外的頻率失真,MOS電晶體740之導通電阻應該是小的,且因此該電晶體之寬度/長度比是大的。第二,大的電容係可分為二個分支,二個對應的電晶體740為由相同的“r”係數所控制。第三,為了提供該諧振的LC諧振電路為在所有條件之下都具有一類似的負載,當一第一固定電容750被切換進出該電路760時,作為“虛設(dummy)”電容器(具有顯著較小的電容或是由製程之設計規則所允許之最小的尺寸)之一個對應的第二固定電容720係對應地根據對應的“r”係數之倒數而被切換進出該電路。因此,電晶體740之大約或實質為相同的導通電阻係恆為存在,僅為電容之量被改變而已。In order to avoid additional frequency distortion, several additional features may be implemented using the first process variation compensation module 760. First, in order to avoid additional frequency distortion, the on-resistance of the MOS transistor 740 should be small, and thus the width/length ratio of the transistor is large. Second, the large capacitance can be divided into two branches, and the two corresponding transistors 740 are controlled by the same "r" coefficient. Third, in order to provide the resonant LC resonant circuit with a similar load under all conditions, when a first fixed capacitor 750 is switched in and out of the circuit 760, it acts as a "dummy" capacitor (with significant A corresponding second fixed capacitor 720 of a smaller capacitance or a minimum size allowed by the design rules of the process is switched in and out of the circuit in accordance with the reciprocal of the corresponding "r" coefficient. Therefore, approximately or substantially the same on-resistance of the transistor 740 is always present, only the amount of capacitance is changed.

作為運用“虛設”電容之一個替代者,金屬熔絲或類似者可被利用以取代電晶體740。金屬熔絲係將保持原狀以內含對應的固定電容750,而可被“熔斷”(開路)以自諧振的LC共振405移除對應的固定電容750。As an alternative to the use of "dummy" capacitors, metal fuses or the like can be utilized in place of transistor 740. The metal fuse system will remain intact to contain the corresponding fixed capacitance 750, and can be "fuse" (open) to remove the corresponding fixed capacitance 750 from the self-resonant LC resonance 405.

圖12係描繪根據本發明的教示之一個範例的第二製程變化補償模組860的電路圖。第二製程變化補償模組860係可利用作為圖4中之製程補償模組460,其中各個模組為附接至諧振的LC諧振電路405之一軌道或側邊(線路470與475),而不是模組760。更概括而言,該第二製程變化補償模組860係被利用作為頻率控制器(215、349或1415)的部分,例如,製程(或其它參數)調變器或補償器1430(第21圖)。此外,各個第二製程變化補償模組860亦將由儲存於暫存器465中之第三複數個切換係數r 0 r (y 1) 所控制。(然而,因為不同的電路被運用於各個範例的製程變化補償模組760或860,對應之第三複數個切換係數r 0 r (y 1) 一般當然會是彼此不同的。)此外,此種切換可以如上所述地透過任何控制信號的使用來加以控制。12 is a circuit diagram depicting a second process variation compensation module 860 in accordance with one example of the teachings of the present invention. The second process variation compensation module 860 can be utilized as the process compensation module 460 of FIG. 4, wherein each module is attached to one of the tracks or sides of the resonant LC resonant circuit 405 (lines 470 and 475). Not module 760. More generally, the second process variation compensation module 860 is utilized as part of a frequency controller (215, 349, or 1415), such as a process (or other parameter) modulator or compensator 1430 (FIG. 21) ). In addition, each of the second process variation compensation modules 860 is also controlled by a third plurality of switching coefficients r 0 to r (y - 1) stored in the buffer 465. (However, since different circuits are applied to the process variation compensation modules 760 or 860 of the respective examples, the corresponding third plurality of switching coefficients r 0 to r (y - 1) will of course be different from each other.) Such switching can be controlled by the use of any control signals as described above.

應注意到的是,第12圖係提供不同於其它圖式所利用者之一個變容器圖例,其中,一變容器850係由一MOS電晶體所代表,而非為一個具有箭頭通過其之電容器。熟習此項技術者將會體認到的是,變容器通常為AMOS或IMOS電晶體,或是更概括為MOS電晶體,諸如於圖12所示者,且藉著短路該電晶體之源極與汲極來加以構成。因此,其它所示的變容器可視為包括(作為潛在的實施例)如同在圖12中所構成之AMOS或IMOS電晶體。此外,變容器850亦可以是相對於彼此為二進制加權的、或是可使用其它有差別的加權方式。It should be noted that Fig. 12 provides a varactor legend different from that used by other figures, wherein a varactor 850 is represented by a MOS transistor rather than a capacitor having an arrow therethrough. . It will be appreciated by those skilled in the art that the varactor is typically an AMOS or IMOS transistor, or more generally a MOS transistor, such as that shown in Figure 12, and by shorting the source of the transistor. It is composed with bungee jumping. Thus, other illustrated varactors can be considered to include (as a potential embodiment) an AMOS or IMOS transistor as constructed in FIG. In addition, varactors 850 may also be binary weighted with respect to each other, or other differential weighting methods may be used.

第二製程變化補償模組860係具有類似的結構概念,但是具有不同於第一製程變化補償模組760之另外的顯著差異。第二製程變化補償模組860係提供一陣列或排之複數個可切換的可變電容性模組865,而不具有MOS開關/電晶體,且因此通過MOS電晶體之損失或負載係消除。取而代之的是,該負載係呈現一低損失的電容;該低損失亦意味著:該振盪器起動功率為較小。於第二製程變化補償模組860中,一MOS變容器850係切換至Vin (可以是上述各種複數個控制電壓中之任一個)以提供一個對應的電容位準給該諧振的LC諧振電路405、或是可被切換至接地或電源軌道(電壓VD D ),藉以根據變容器850之幾何結構而提供最小的電容或最大的電容至諧振的LC諧振電路405。對於AMOS而言,被切換至電壓VD D 將會提供最小的電容且被切換至接地將會提供最大的電容,而相反的情形是對於IMOS而言。同樣地,第二製程變化補償模組860係由一個陣列之可變電容(諸如:變容器850)所組成,以用於諧振頻率f 0 之調整及選擇,其係藉由透過一個對應的“r”係數或是透過一個對應的控制信號的施加來耦合或是切換一個所選的變容器850至複數個控制電壓(Vin )中的任一個或是接地或VD D ,例如,切換在一第一電壓以及一第二電壓之間。在另一個替代例中,其並非是複數個或是一個陣列的變容器,而是一個變容器850可被利用,其被提供給該諧振電路的有效電抗係被一個所選的控制電壓所控制。The second process variation compensation module 860 has a similar structural concept but has another significant difference from the first process variation compensation module 760. The second process variation compensation module 860 provides an array or a plurality of switchable variable capacitance modules 865 without MOS switches/transistors, and thus is eliminated by loss or load of the MOS transistors. Instead, the load presents a low loss capacitance; this low loss also means that the oscillator starting power is small. In the second process variation compensation module 860, a MOS varactor 850 is switched to Vin (which may be any of the various plurality of control voltages described above) to provide a corresponding capacitance level to the resonant LC resonant circuit 405. Alternatively, it can be switched to a ground or power rail (voltage V D D ) to provide a minimum capacitance or maximum capacitance to resonant LC resonant circuit 405 depending on the geometry of varactor 850. For AMOS, switching to voltage V D D will provide the least capacitance and switching to ground will provide the maximum capacitance, and the opposite is true for IMOS. Similarly, the second process variation compensation module 860 is composed of an array of variable capacitors (such as varactor 850) for adjustment and selection of the resonant frequency f 0 by transmitting a corresponding " The r" coefficient is either coupled or switched by a corresponding control signal application or switching a selected varactor 850 to any of a plurality of control voltages ( Vin ) or ground or V D D , for example, switching in a Between the first voltage and a second voltage. In another alternative, instead of a plurality or an array of varactors, a varactor 850 can be utilized that is provided to the resonant circuit with an effective reactance that is controlled by a selected control voltage. .

當各個電容分支被切換至一個對應的控制電壓、接地或VD D 時,對應的可變電容係被加入或是不納入於諧振的LC諧振電路之振盪可利用的總電容,藉以改變其有效電抗且調變該諧振頻率。更特定而言,對於一種AMOS實施而言,耦接至VD D (作為Vi n )係提供較小的電容,且耦接至接地(Vi n =0)係提供較大的電容,然而對於一種IMOS實施而言則為相反的,其中,耦接至VD D (作為Vi n )係提供較大的電容,且耦接至接地(Vi n =0)係提供較小的電容,其假設的是:於LC諧振電路之軌道(圖4之節點或線路470與475)上的電壓係介於零伏特與電壓VD D 之間,且顯著或實質為遠離該任一個電壓位準。耦合至VD D 與接地之間的電壓,例如是該各種的控制電壓中的許多控制電壓作為Vin ,此將會提供一個對應的中間位準的電容給該諧振電路。該第三複數個切換係數r 0 r (y 1) 也是運用測試IC而在製造後加以決定的,此亦與第一與第二複數個切換係數之決定大致為一種反覆的過程。被決定的“r”係數係接著儲存於該生產或處理批次之IC的對應的暫存器465中。同樣地,個別的IC亦可各別校準及測試。此外,任意所選數目的模組850也可以動態地加以控制,以在振盪器動作期間提供連續的頻率控制。When each capacitor branch is switched to a corresponding control voltage, ground or V D D , the corresponding variable capacitance is added or not included in the resonance of the LC resonant circuit, the total available capacitance of the oscillation, thereby changing its effective Reacts and modulates the resonant frequency. More specifically, for an AMOS implementation, coupling to V D D (as V i n ) provides a smaller capacitance, and coupling to ground (V i n =0) provides a larger capacitance, However, for an IMOS implementation, the opposite is true, where coupling to V D D (as V i n ) provides a larger capacitance, and coupling to ground (V i n =0) provides a smaller Capacitor, which assumes that the voltage on the track of the LC resonant circuit (nodes of Figure 4 or lines 470 and 475) is between zero volts and voltage V D D and is significantly or substantially farther away from the voltage Level. The voltage coupled between V D D and ground, for example, is a plurality of control voltages of the various control voltages as Vin , which will provide a corresponding intermediate level of capacitance to the resonant circuit. The third plurality of switching coefficients r 0 to r (y - 1) are also determined after manufacture using the test IC, and this is also a process of repeating the determination of the first and second plurality of switching coefficients. The determined "r" coefficient is then stored in the corresponding register 465 of the IC of the production or processing lot. Similarly, individual ICs can be individually calibrated and tested. In addition, any selected number of modules 850 can also be dynamically controlled to provide continuous frequency control during oscillator operation.

如上所指出地,依據變容器的類型(AMOS或是IMOS),切換任何可變的電容性模組865至VD D 或接地,以作為第一及第二電壓位準,此係產生對應的最大電容或沒有(可忽略的)電容被內含來作為用於該諧振器(LC諧振電路)之有效電容。然而,如上所述,其它在此最大與最小值之間中間的電容位準亦可藉由切換該可變的電容性模組865至一個對應的控制電壓來加以產生。利用複數個具有不同大小的控制電壓係使得該可變的電容性模組865之對應的電容被加入該LC諧振電路(或是自其減去),因此改變其有效電抗且調變該諧振頻率。As indicated above, depending on the type of varactor (AMOS or IMOS), any variable capacitive modules 865 to V D D or ground are switched to serve as the first and second voltage levels, which produces corresponding The maximum capacitance or no (negligible) capacitance is included as an effective capacitance for the resonator (LC resonant circuit). However, as discussed above, other capacitance levels intermediate between the maximum and minimum values can also be generated by switching the variable capacitive module 865 to a corresponding control voltage. Using a plurality of control voltage systems having different sizes, the corresponding capacitance of the variable capacitive module 865 is added to (or subtracted from) the LC resonant circuit, thereby changing its effective reactance and modulating the resonant frequency. .

圖28係描繪根據本發明的教示之被利用在頻率、製程以及其它參數補償模組中之範例的第四電壓控制模組2050之電路圖。請參照圖28,複數個實質上固定的電壓模組2060(被描繪為2060A 、2060B 、2060C 至2060K )係被利用來產生對應的複數個控制電壓,該些控制電壓相對於一個所選的參數(例如,溫度)實質上是固定的,並且具有對應的複數個不同的大小,此係產生複數個具有不同大小的控制電壓VA 、VB 、VC 至VK 。如圖所示,該複數個不同的實質上靜態或固定的(亦即,與溫度無關的)電壓係藉由組合不同的電流源2055(被描繪為電流源2055A 、2055B 、2055C 至2055K )來加以產生,每個電流源對於溫度或其它參數係具有不同的響應(亦即,響應於溫度(或其它參數)之不同成形的電流),且具有複數個電阻器2040中之一個對應的電阻器(被描繪為對應的電阻器2040A 、2040B 、2040C 至2040K ),每個電阻器係具有一個溫度或其它參數相依的響應,該響應係相反或互補於該特定的模組2060之對應的電流源2055。每個對應的電流源2055與電阻器2040係被選擇為具有此種彼此相反或互補的響應,以有效地抵消另一方對於該所選的參數之響應。例如,一個電流源2055係被選擇為具有適當大小的一特定的PTAT、CTAT或是CTAT2 電流源之組合,而一個電阻器2040係根據尺寸、類型、等等而被選擇,使得所產生的電壓在該參數變化(例如,溫度變化)下實質上是固定的。這些各種的電壓中之任一個都可隨所需地被利用,以作為該各種的控制電壓中之任一個,例如,提供圖12中所示之可變的電容性模組865之對應的Vin ,以調整該諧振器的有效電容(電抗)以及所產生的諧振頻率。28 is a circuit diagram depicting a fourth voltage control module 2050 that is utilized in an example of frequency, process, and other parameter compensation modules in accordance with the teachings of the present invention. Referring to FIG. 28, a plurality of substantially fixed voltage modules 2060 (depicted as 2060 A , 2060 B , 2060 C to 2060 K ) are utilized to generate a corresponding plurality of control voltages relative to one The selected parameters (e.g., temperature) are substantially fixed and have a corresponding plurality of different sizes, which produces a plurality of control voltages V A , V B , V C to V K having different sizes. As shown, the plurality of different substantially static or fixed (i.e., temperature independent) voltages are combined by different current sources 2055 (depicted as current sources 2055 A , 2055 B , 2055 C to 2055 K ) is generated, each current source having a different response to temperature or other parameters (ie, a current shaped in response to temperature (or other parameter)) and having one of a plurality of resistors 2040 Corresponding resistors (depicted as corresponding resistors 2040 A , 2040 B , 2040 C to 2040 K ), each resistor having a temperature or other parameter dependent response that is opposite or complementary to the particular A corresponding current source 2055 of module 2060. Each corresponding current source 2055 and resistor 2040 is selected to have such a reverse or complementary response to each other to effectively cancel the other party's response to the selected parameter. For example, a current source 2055 is selected to have a particular combination of a particular PTAT, CTAT, or CTAT 2 current source, and a resistor 2040 is selected based on size, type, etc., such that The voltage is substantially fixed under this parameter change (eg, temperature change). Any of these various voltages can be utilized as desired to serve as any of the various control voltages, for example, to provide a corresponding Vin of the variable capacitive module 865 shown in FIG. To adjust the effective capacitance (reactance) of the resonator and the resulting resonant frequency.

亦應注意的是,對於諸如溫度補償器315(或410、415及/或420)與製程變化補償器320(或425與460)之模組的所述實施例(諸如於圖6至12所示者)係可針對其它目的而被利用。舉例而言,對於補償器315(或410、415及/或420)之種種所述實施例係可作成相依於製程變化而非為溫度。類似地,對於補償器320(或425與460)之種種所述實施例係可作成相依於溫度而非為製程變化。因此,針對於此等與其它的模組之實施例不應該被視為受限於所述的範例電路與結構,因為熟習此項技術者將會體認到其它等效的電路及應用,其均為於本發明之範疇內。It should also be noted that the described embodiments of modules such as temperature compensator 315 (or 410, 415 and/or 420) and process variation compensator 320 (or 425 and 460) are such as those illustrated in Figures 6-12. The presenter can be utilized for other purposes. For example, the various embodiments of compensator 315 (or 410, 415, and/or 420) can be made dependent on process variations rather than temperature. Similarly, the various embodiments of compensator 320 (or 425 and 460) can be made dependent on temperature rather than process variation. Therefore, embodiments of such modules and other modules should not be considered to be limited to the example circuits and structures described, as those skilled in the art will recognize other equivalent circuits and applications. All are within the scope of the invention.

如上所指出地,各種所舉出的受控電容模組(485、635、460、760、860、1501)可被一般化成為任何電抗或阻抗元件,不管是一個電容、電感、電阻、或是電容、電感或電阻的組合。一個陣列或排1300的此種複數(“a”)個可切換的受控阻抗(或電抗)模組1305係被描繪在圖20中,並且可被利用在本發明的頻率控制器(215、349、1400)之內,作為各種的調變器或補償器(315、320、355、1420、1425、1430)中之任一者。每個不同加權的受控電抗或阻抗模組1305(被描繪為13050 、13051 至1305( a 1 ) )係由一或多個固定的電抗Z f 1315、可變的電抗Z v 1310或是“虛設”電抗1320所構成,其係可響應於第五複數個係數(s 0 s 1 s (a 1) )中之一個對應的係數“s”來切換的。該受控電抗或阻抗模組1305的陣列一般可被實施成如上相關於在各種的實施例的任一者中之各種的受控電容模組的任一個模組所述地運作。如同以上對於其它組的係數所述,該第五複數個係數可以在製造後或動態地加以決定。此外,依據該實施方式,各種的電抗或阻抗可如先前所述地被切換進出該陣列1300或是被切換至各種的控制電壓或接地,並且可被利用來響應於複數個參數之任一個,例如,溫度變化、電壓變動、製程或頻率,以提供該振盪器之一個所選的頻率響應。As noted above, the various controlled capacitor modules (485, 635, 460, 760, 860, 1501) can be generalized to any reactance or impedance component, whether a capacitor, inductor, resistor, or A combination of capacitors, inductors, or resistors. Such a complex ("a") switchable controlled impedance (or reactance) module 1305 of an array or bank 1300 is depicted in FIG. 20 and can be utilized in the frequency controller of the present invention (215, Within 349, 1400), it is any of various modulators or compensators (315, 320, 355, 1420, 1425, 1430). Each of the different weighted controlled reactance or impedance modules 1305 (depicted as 1305 0 , 1305 1 to 1305 ( a - 1 ) ) is composed of one or more fixed reactances Z f 1315, variable reactance Z v 1310 Or a "dummy" reactance 1320, which is switchable in response to a corresponding coefficient "s" of the fifth plurality of coefficients ( s 0 , s 1 to s (a - 1) ). The array of controlled reactance or impedance modules 1305 can generally be implemented to operate as described above with respect to any of the various modules of the various controlled capacitive modules of any of the various embodiments. As described above for the coefficients of the other groups, the fifth plurality of coefficients can be determined after manufacture or dynamically. Moreover, in accordance with this embodiment, various reactances or impedances can be switched into and out of the array 1300 as previously described or switched to various control voltages or grounds, and can be utilized in response to any of a plurality of parameters, For example, temperature changes, voltage variations, processes, or frequencies to provide a selected frequency response of the oscillator.

類似地,請參照圖25,一個陣列或排的複數“n”個可切換的受控電抗模組1805係被描繪(為受控電抗模組18050 至1805( n 1 ) ),並且其亦可被利用在本發明的頻率控制器(215、1415)之內,作為各種的調變器或補償器(315、320、355、1420、1425、1430)中之任一種。這些受控電抗模組1805亦可以是二進制、線性地或是不同加權的,並且被切換進出各種的電路、被切換至一或多個控制電壓或是該些控制電壓的任意組合,並且可以響應於任何所選的參數。該陣列的受控電抗模組1805一般可被實施成如上相關於在各種的實施例的任一者中之各種的受控電容模組的任一個模組所述地運作。在此範例的實施例中並非是透過複數個係數而被切換至該振盪器,該受控電抗模組1805係在回授被提供之下(線路或節點1820),透過由感測器1815與控制邏輯1810所直接提供的電壓或電流而動態地被切換,並且該回授可被實施為此項技術中已知者或是如上所述者,所有的此種變化都被視為在本發明的範疇之內。此外,該電抗模組更可較廣義地被視為阻抗模組,其具有電阻性及/或電抗特點,例如,利用在圖29中所示之各種的電阻器。Similarly, referring to FIG. 25, an array or a plurality of "n" switchable controlled reactance modules 1805 are depicted (for the controlled reactance modules 1805 0 to 1805 ( n - 1 ) ), and It can also be utilized within the frequency controller (215, 1415) of the present invention as any of a variety of modulators or compensators (315, 320, 355, 1420, 1425, 1430). The controlled reactance modules 1805 can also be binary, linear, or differently weighted and switched into and out of various circuits, switched to one or more control voltages, or any combination of the control voltages, and can be responsive For any selected parameters. The array of controlled reactance modules 1805 can generally be implemented to operate as described above with respect to any of the various modules of the various controlled capacitive modules of any of the various embodiments. In this exemplary embodiment, instead of being switched to the oscillator through a plurality of coefficients, the controlled reactance module 1805 is provided under feedback (line or node 1820) through the sensor 1815. The voltage or current directly supplied by the control logic 1810 is dynamically switched, and the feedback can be implemented as known in the art or as described above, all of which are considered to be in the present invention. Within the scope of the category. In addition, the reactance module can be more generally regarded as an impedance module having resistive and/or reactive characteristics, for example, using various resistors shown in FIG.

例如,此種在所選的參數上之變化可以用先前所述的複數個方式中之任一個來加以判斷出,例如,透過一個對溫度靈敏的電流源、其它的溫度感測器或是響應於該所選的參數之任何其它類型的感測器。例如,一個感測器可包括一電壓橫跨一個二極體,此係提供一個響應於溫度的電壓輸出。請參照圖21,此種感測器1440的輸出可被提供至A/D轉換器1445,該A/D轉換器1445係提供一個指示被感測出的參數之位準的數位輸出,該數位輸出接著可被利用為對應的係數(上述的複數個係數中之任一個),或是被利用來動態地切換各種的受控電抗或阻抗模組(例如,1305、1805)或是各種的第二受控電容模組中之任一個。類似地,感測器1815的輸出可被提供至控制邏輯1810,該控制邏輯1810亦可以靜態或動態地、在有來自該諧振器的回授或沒有回授之下,調整各種的電抗。For example, such changes in selected parameters can be determined using any of the previously described plurality of modes, for example, by a temperature sensitive current source, other temperature sensors, or in response. Any other type of sensor for the selected parameter. For example, a sensor can include a voltage across a diode that provides a voltage output that is responsive to temperature. Referring to FIG. 21, the output of such a sensor 1440 can be provided to an A/D converter 1445, which provides a digital output indicating the level of the sensed parameter, the digit The output can then be utilized as a corresponding coefficient (any of the above plurality of coefficients) or used to dynamically switch between various controlled reactance or impedance modules (eg, 1305, 1805) or various Any one of the two controlled capacitor modules. Similarly, the output of sensor 1815 can be provided to control logic 1810, which can also adjust various reactances either statically or dynamically, with or without feedback from the resonator.

圖27係描繪根據本發明的教示之範例的電壓變化補償模組2000之電路方塊圖,並且可被利用為圖3與21中所示的電壓變化補償器380、1455。請參照圖27,一個可切換的電阻性模組1650係利用電阻器16200 與1620y 來構成一個分壓器,其係提供電壓V0 。在供應電壓(電源軌道)VD D 變動的情形中,電壓V0 係對應地被改變。由於電壓V0 可在控制信號或係數1950的控制下被切換(開關1930)(如上所述)至任何的受控電抗模組1805,因此耦合至該諧振電路的有效電容亦被改變,藉此調變該諧振頻率。於是,該諧振頻率可以在此種電壓變動下受到控制。其它的實施方式在根據其它所舉出的實施例之下將會是明顯的,因而亦在本發明的範疇之內。27 is a circuit block diagram depicting a voltage variation compensation module 2000 in accordance with an example of the teachings of the present invention, and may be utilized as the voltage variation compensators 380, 1455 shown in FIGS. 3 and 21. Referring to Figure 27, a switchable resistive module 1650 utilizes resistors 1620 0 and 1620 y to form a voltage divider that provides a voltage V 0 . In the case where the supply voltage (power rail) V D D fluctuates, the voltage V 0 is correspondingly changed. Since the voltage V 0 can be switched (switch 1930) (as described above) to any of the controlled reactance modules 1805 under control of the control signal or coefficient 1950, the effective capacitance coupled to the resonant circuit is also changed, thereby Modulate the resonant frequency. Thus, the resonant frequency can be controlled under such voltage variations. Other embodiments will be apparent from the following examples, and are therefore within the scope of the invention.

如上所指出地,除了圖4的固有或寄生的電阻RL 445與RC 450之外,該諧振電路的諧振頻率亦可以藉由改變耦接到該諧振電路的電阻來加以修改。圖29係描繪根據本發明的教示之範例的電阻性控制模組2100之電路圖,其可被利用作為各種的頻率控制模組以及各種的頻率控制器中之任一種的全部或是部分。此種電阻性控制模組2100可被插入在圖4的諧振器405中之節點Q,與電感器435及RL 445串聯或是與電容器440及RC 450串聯、或兩者皆是。每個可切換的電阻性模組2115(被描繪為該複數個可切換的電阻性模組2115M 、2115N 、2115O 至2115U )都具有一個不同加權的(例如,二進制加權的)電阻器2105(被描繪為對應的電阻器2105M 、2105N 、2105O 至2105U ),並且可在控制信號及/或係數1950的控制下,透過對應的電晶體或開關2110(被描繪為電晶體2110M 、2110N 、2110O 至2110U )而切換進出該陣列或模組2100。如上所指出地,此種切換亦提供另一種機構來控制或調變該諧振器405的諧振頻率,並且可以是任何所選的參數之一個函數、或可以是與參數無關的,以例如是用於諧振頻率的選擇。As noted above, in addition to the inherent or parasitic resistances R L 445 and R C 450 of Figure 4, the resonant frequency of the resonant circuit can also be modified by varying the resistance coupled to the resonant circuit. 29 is a circuit diagram depicting a resistive control module 2100 in accordance with an example of the teachings of the present invention that can be utilized as all or part of any of a variety of frequency control modules and various frequency controllers. Such a resistive control module 2100 can be inserted into node Q in resonator 405 of FIG. 4, in series with inductors 435 and RL 445 or in series with capacitors 440 and R C 450, or both. Each switchable resistive module 2115 (depicted as the plurality of switchable resistive modules 2115 M , 2115 N , 2115 O to 2115 U ) has a different weighted (eg, binary weighted) resistance 2105 (depicted as corresponding resistors 2105 M , 2105 N , 2105 O to 2105 U ), and can be transmitted through a corresponding transistor or switch 2110 under control of a control signal and/or coefficient 1950 (depicted as electricity) The crystals 2110 M , 2110 N , 2110 O to 2110 U ) are switched in and out of the array or module 2100. As noted above, such switching also provides another mechanism to control or modulate the resonant frequency of the resonator 405, and can be a function of any selected parameter, or can be parameter independent, for example, The choice of resonant frequency.

圖30係描繪根據本發明的教示之範例的老化變化補償器2200之方塊圖。如在圖30中所繪,各種的感測器係被利用來量測一個相關的參數,該參數是(或可能是)受到時間過去之影響、或者是隨著IC的壽命而變化,例如,電壓感測器2205來量測電晶體的臨界電壓,電阻感測器2210來量測該諧振電路的一或多個電阻的大小或值,且/或電流感測器來量測由各種的電流源所產生之絕對的電流位準。在一個特定的時間點之一項所選的量測係(經由多工器2220)被提供至ADC 2225,用於轉換成為一個數位值,該數位值係被儲存在一個暫存器或其它非依電性記憶體2230中。當該IC第一次被供電或是初始化時,一個初始的量測結果係被儲存在該暫存器2230中,以提供用於後續的量測之比較基礎。接著,可進行額外的量測,該所產生的值係在暫存器2230中被儲存為對應之目前的值,其係被描繪為電壓、電阻及電流之目前的值與初始的值。對於一個特定的參數而言(例如,電壓),目前的值與初始的值可被讀取及比較,接著比較器2235係提供一個成比例於在該兩個值之間的任何差值之對應的老化補償信號。此種由該老化補償信號所提供的差值接著可被利用以提供對應的係數及/或控制信號,以用於對應的頻率調整。例如,此種老化補償信號可被索引至記憶體2240中的一個查閱表,該查閱表接著根據已知的值或是其它老化影響的校準或模型來提供所儲存的值,並且提供來用於利用任何上述之各種的調變器及補償器之對應的頻率調整。30 is a block diagram depicting an aging variation compensator 2200 in accordance with an example of the teachings of the present invention. As depicted in Figure 30, various sensors are utilized to measure a related parameter that is (or may be) affected by time elapsed or that varies with the life of the IC, for example, The voltage sensor 2205 measures the threshold voltage of the transistor, the resistance sensor 2210 measures the magnitude or value of one or more resistors of the resonant circuit, and/or the current sensor measures the current by various currents. The absolute current level produced by the source. A selected measurement system (via multiplexer 2220) at a particular point in time is provided to ADC 2225 for conversion to a digital value that is stored in a register or other non-status In the electrical memory 2230. When the IC is powered or initialized for the first time, an initial measurement is stored in the register 2230 to provide a basis for comparison for subsequent measurements. Additional measurements can then be made, the resulting values being stored in the register 2230 as corresponding current values, which are depicted as current and initial values of voltage, resistance, and current. For a particular parameter (eg, voltage), the current value can be read and compared to the initial value, and then comparator 2235 provides a ratio proportional to any difference between the two values. Aging compensation signal. Such differences provided by the aging compensation signal can then be utilized to provide corresponding coefficients and/or control signals for corresponding frequency adjustments. For example, such an aging compensation signal can be indexed to a lookup table in memory 2240, which then provides the stored value based on a known value or other calibration or model of aging effects and is provided for The corresponding frequency adjustments of any of the various modulators and compensators described above are utilized.

如上所述,本發明的時脈產生器及時序/頻率參考器(100、200、300)可以利用廣泛種類的振盪器。在範例的實施例中,諧振的LC振盪器係被運用以提供一輸出信號(以作為一第一參考信號),其係具有一個相對較高的Q值、較低的抖動以及減低的相位雜訊。範例的第一及第二差動LC振盪器已經在以上參照圖4、6與8加以論述。諧振的振盪器的其它類型也是在本發明的範疇之內,並且範例的LC振盪器係被描繪在圖31-37中並且在以下參照該些圖來加以論述,其中一主動式電感器係描繪在圖38中。這些其它的範例的LC振盪器及電感器類型(被動式或主動式)可以等同於先前所述的LC振盪器而被利用,並且為了描述其等同的動作,其亦結合先前在圖4中所描述之範例的頻率控制器構件,亦即,補償模組420與425來加以說明。應瞭解的是,除了在圖31-37中明確描繪的構件之外,任何其它的控制器電抗模組、控制電壓產生器、頻率控制、校準、頻率選擇、除頻以及其它構件亦可以等同地被利用。As described above, the clock generator and timing/frequency reference (100, 200, 300) of the present invention can utilize a wide variety of oscillators. In an exemplary embodiment, a resonant LC oscillator is utilized to provide an output signal (as a first reference signal) having a relatively high Q value, low jitter, and reduced phase mismatch. News. Exemplary first and second differential LC oscillators have been discussed above with reference to Figures 4, 6 and 8. Other types of resonant oscillators are also within the scope of the present invention, and exemplary LC oscillators are depicted in Figures 31-37 and are discussed below with reference to the figures, wherein an active inductor is depicted In Figure 38. These other examples of LC oscillator and inductor types (passive or active) can be utilized equivalent to the previously described LC oscillator, and to describe their equivalent actions, they are also described in connection with FIG. 4 previously. Examples of frequency controller components, namely, compensation modules 420 and 425, are described. It should be understood that any other controller reactance module, control voltage generator, frequency control, calibration, frequency selection, frequency division, and other components may equally be identical to the components explicitly depicted in Figures 31-37. Be exploited.

亦應該注意的是,在圖38中所示之範例的主動式電感器、或是任何其它的主動式電感器都可被用來取代在圖1-37的任一圖的拓撲結構中所示的任一個被動式電感器。類似地,各種利用n-MOS或p-MOS電晶體的拓撲結構係被描繪;任何類型的電晶體都可以等同地被利用。於是,任何被動式或主動式電感器、或是任何類型的電晶體的利用都視為是等同的且在本發明的範疇之內。It should also be noted that the active inductor of the example shown in Figure 38, or any other active inductor, can be used instead of the topology shown in any of Figures 1-37. Any of the passive inductors. Similarly, various topologies utilizing n-MOS or p-MOS transistors are depicted; any type of transistor can be utilized equally. Thus, the use of any passive or active inductor, or any type of transistor, is considered equivalent and within the scope of the present invention.

在以下所述的各種LC振盪器可以提供一個差動或是單端的第一參考信號。如上所述的可以用廣泛種類的方式實施為受控電抗模組之各種的補償模組420與425可以用複數種方式和各種的振盪器結合。第一,受控電抗模組(被描繪為補償模組420與425)可以和一或多個所描繪的電容器中之任一個並聯耦接。在許多例子中,多個受控電抗模組的實例可被耦接至所描繪的LC振盪器。因此,用於耦接之對應的節點係被標示為節點「A」與節點「B」,以指出用於耦接至給定的LC振盪器拓撲結構之對應的節點,其中可利用於耦接之另外的實例係被描述為對應的節點「A’」(A-單撇)與節點「B’」(B-單撇)及/或對應的節點「A”」(A-雙撇)與節點「B”」(B-雙撇)。第二,雖然受控電抗模組(被描繪為補償模組420與425)在各個圖31-37中並未個別地予以繪出,但是其可被利用來取代一或多個所描繪的電容器中之任一個。熟習此項技術者將會理解到有無數個其它的變化,其全部都被視為均等的,且都在本發明的範疇之內。The various LC oscillators described below can provide a differential or single-ended first reference signal. The various compensation modules 420 and 425, which can be implemented as a controlled reactance module in a wide variety of ways as described above, can be combined with various oscillators in a number of ways. First, the controlled reactance modules (depicted as compensation modules 420 and 425) can be coupled in parallel with any of one or more of the depicted capacitors. In many examples, examples of multiple controlled reactance modules can be coupled to the depicted LC oscillator. Accordingly, the corresponding nodes for coupling are labeled as node "A" and node "B" to indicate the corresponding node for coupling to a given LC oscillator topology, which can be utilized for coupling Further examples are described as corresponding nodes "A'" (A-single) and node "B'" (B-single) and/or corresponding nodes "A" (A-double) and Node "B"" (B-double). Second, although the controlled reactance modules (depicted as compensation modules 420 and 425) are not individually depicted in each of Figures 31-37, they can be utilized in place of one or more of the depicted capacitors. Any one. Those skilled in the art will appreciate that there are numerous other variations, all of which are considered equivalent and are within the scope of the present invention.

圖31是描繪根據本發明的教示之可被利用的第三範例的LC振盪器2260之電路圖,其係利用一種差動n-MOS交叉耦接的拓撲結構來加以做成的,並且其係在圖8中所示的LC振盪器之一變化例。如圖所示,該裝置2250係包括具有一種差動n-MOS交叉耦接的拓撲結構之第三範例的LC振盪器2260、以及先前在圖4的雙重平衡配置中所論述的頻率控制器及頻率校準模組(補償模組420與425)。輸出頻率f 0 係在節點470A 與475A 之間獲得的,此係等同於先前論述的節點470與475,因而其可用來取代在圖式與此說明書中所有對於節點470與475之參照。31 is a circuit diagram depicting an LC oscillator 2260 of a third example that can be utilized in accordance with the teachings of the present invention, which is constructed using a differential n-MOS cross-coupling topology and is tied to A variation of one of the LC oscillators shown in FIG. As shown, the device 2250 includes an LC oscillator 2260 having a third example of a differential n-MOS cross-coupled topology, and a frequency controller previously discussed in the dual balanced configuration of FIG. Frequency calibration module (compensation modules 420 and 425). The output frequency f 0 is obtained between nodes 470 A and 475 A , which is equivalent to nodes 470 and 475 previously discussed, and thus may be used in place of all references to nodes 470 and 475 in the drawings and in this specification.

該交叉耦接的n-MOS電晶體2251與2252係透過電流鏡530A(或530B)而被耦接至一偏壓電流,該偏壓電流例如是利用同樣為先前論述的參數響應式電流I(x)產生器515(或415)、或者是其它固定或可變的電流源。頻率控制器模組(480、485,其係具有係數暫存器455與495)以及頻率校準模組(460,其係具有係數暫存器465)係如圖所示地橫跨節點A與B而耦接至該振盪器,並且亦如先前論述地運作。如圖所示,電感器2253及2254(以及所繪的電阻)可以等同地由中心分接的電感器2257(其中心分接係耦接至VD D )所取代,並且插設在節點A與B之間,且可以是固定或可變的。此外,亦如先前論述的,各種的電容可被實施為固定或可變的,並且被描繪為固定及可變電容器兩者。在範例的實施例中,該電阻亦可以為固定或可變的。The cross-coupled n-MOS transistors 2251 and 2252 are coupled to a bias current through a current mirror 530A (or 530B), such as using a parameter responsive current I (also discussed previously) ( x) Generator 515 (or 415), or other fixed or variable current source. The frequency controller module (480, 485, which has coefficient registers 455 and 495) and the frequency calibration module (460, which has a coefficient register 465) are shown across the nodes A and B as shown. It is coupled to the oscillator and also operates as previously discussed. As shown, inductors 2253 and 2254 (and the depicted resistors) can be replaced by a centrally tapped inductor 2257 (with its center tap coupled to V D D ) and plugged into node A. Between B and can be fixed or variable. Moreover, as previously discussed, various capacitors can be implemented as fixed or variable and are depicted as both fixed and variable capacitors. In an exemplary embodiment, the resistance can also be fixed or variable.

對於熟習此項技術者將為明顯的是,在圖6中所示的振盪器之類似的交叉耦接的n-MOS版本可以類似地被實施(藉由消除(以短路來取代)所繪的交叉耦接的p-MOS電晶體M1與M2)。It will be apparent to those skilled in the art that a similar cross-coupled n-MOS version of the oscillator shown in Figure 6 can be similarly implemented (by eliminating (replaced by a short circuit) Cross-coupled p-MOS transistors M1 and M2).

圖32是描繪根據本發明的教示之可被利用的第四範例的LC振盪器2280之電路圖,其係利用一種差動p-MOS交叉耦接的拓撲結構來加以做成的,並且其係在圖8中所示的LC振盪器之一變化例。如圖所示,該裝置2270係包括具有一種差動p-MOS交叉耦接的拓撲結構之第四範例的LC振盪器2280、以及先前在圖4的雙重平衡配置中所論述的頻率控制器及頻率校準模組(補償模組420與425)。輸出頻率f 0 係在節點470B 與475B 之間獲得的,此係等同於先前論述的節點470與475,因而其可用來取代在圖式與此說明書中所有對於節點470與475之參照。32 is a circuit diagram depicting an LC oscillator 2280 of a fourth example that can be utilized in accordance with the teachings of the present invention, which is constructed using a differential p-MOS cross-coupled topology and is A variation of one of the LC oscillators shown in FIG. As shown, the device 2270 includes an LC oscillator 2280 having a fourth example of a differential p-MOS cross-coupled topology, and a frequency controller previously discussed in the dual balanced configuration of FIG. Frequency calibration module (compensation modules 420 and 425). The output frequency f 0 is obtained between nodes 470 B and 475 B , which is equivalent to nodes 470 and 475 previously discussed, and thus may be used in place of all references to nodes 470 and 475 in the drawings and in this specification.

該交叉耦接的p-MOS電晶體2271與2272係透過電流鏡510(或520)而被耦接至一偏壓電流,該偏壓電流例如是利用同樣為先前論述的參數響應式電流I(x)產生器515(或415)、或者是,其它固定或可變的電流源。該頻率控制器模組(480、485,其係具有係數暫存器455與495)以及頻率校準模組(460,其係具有係數暫存器465)係如圖所示地橫跨節點A與B而耦接至該振盪器,並且亦如先前論述地運作。如圖所示,電感器2273及2274(以及所繪的電阻)可以等同地由中心分接的電感器2277(其中心分接係耦接至接地)所取代,並且插設在節點A與B之間,且可以是固定或可變的。此外,亦如先前論述的,各種的電容可被實施為固定或可變的,並且係被描繪為固定及可變電容器兩者。在範例的實施例中,該電阻亦可以為固定或可變的。The cross-coupled p-MOS transistors 2271 and 2272 are coupled to a bias current through a current mirror 510 (or 520), such as a responsive current I (also referred to as previously discussed). x) Generator 515 (or 415), or other fixed or variable current source. The frequency controller module (480, 485, which has coefficient registers 455 and 495) and the frequency calibration module (460, which has a coefficient register 465) are shown across the node A as shown B is coupled to the oscillator and also operates as previously discussed. As shown, inductors 2273 and 2274 (and the depicted resistors) can be replaced by a centrally tapped inductor 2277 (whose center tap is coupled to ground) and interposed at nodes A and B. Between, and can be fixed or variable. Moreover, as previously discussed, various capacitors can be implemented as fixed or variable and are depicted as both fixed and variable capacitors. In an exemplary embodiment, the resistance can also be fixed or variable.

再者,對於熟習此項技術者將為明顯的是,在圖6中所示的振盪器之類似的交叉耦接的p-MOS版本可以類似地被實施(藉由消除(以短路來取代)所繪的交叉耦接的n-MOS電晶體M3與M4)。Again, it will be apparent to those skilled in the art that a similar cross-coupled p-MOS version of the oscillator shown in Figure 6 can be similarly implemented (by elimination (replaced by a short circuit)) The depicted cross-coupled n-MOS transistors M3 and M4).

圖33是描繪根據本發明的教示之可被利用的第五範例的LC振盪器2305之電路圖,其係具有一種單端Colpitts配置(或拓撲結構)。如圖所示,該裝置2300係包括該第三範例的LC振盪器2305,其係具有一種單端Colpitts配置(或拓撲結構)以及先前論述的頻率控制器與頻率校準模組(補償模組420與425的單端版本)的部份。頻率控制器與頻率校準模組(485、460)係橫跨如圖所示的節點A與B並聯耦接至電容器2310、或是橫跨如圖所示的節點A’與B’並聯耦接至電容器2315、或兩者皆是(個別地橫跨節點A與B而並聯電容器2310且橫跨節點A’與B’而並聯電容器2315)。輸出頻率f 0 係在節點470C 與475C 之間獲得的,此係等同於先前論述的節點470與475,因而其亦可用來取代在圖式與此說明書中所有對於節點470與475之參照。33 is a circuit diagram depicting a fifth example LC oscillator 2305 that can be utilized in accordance with the teachings of the present invention, having a single-ended Colpitts configuration (or topology). As shown, the apparatus 2300 includes the LC oscillator 2305 of the third example having a single-ended Colpitts configuration (or topology) and a previously discussed frequency controller and frequency calibration module (compensation module 420). Part of the single-ended version with 425). The frequency controller and the frequency calibration module (485, 460) are coupled in parallel across the nodes A and B as shown in the figure to the capacitor 2310, or in parallel across the nodes A' and B' as shown. To capacitor 2315, or both (single capacitor 2310 is connected in parallel across nodes A and B and capacitors 2315 are connected in parallel across nodes A' and B'). The output frequency f 0 is obtained between nodes 470 C and 475 C , which is equivalent to nodes 470 and 475 previously discussed, and thus may be used instead of all references to nodes 470 and 475 in the drawings and in this specification. .

電晶體2325可被耦接至一固定或可變的偏壓電壓或是其它的電路節點(未個別地繪出)。此外,一偏壓電流亦被設置,其例如是利用同樣為先前論述的參數響應式電流I(x)產生器515、或者是,其它固定或可變的電流源。該頻率控制器模組(480、485,其係具有係數暫存器455與495)以及頻率校準模組(460,其係具有係數暫存器465)亦如先前論述地運作。此外,各種的電抗(電感器2320、電容器2310與2315)亦如先前論述地可被實施為固定或可變的。在範例的實施例中,電阻2330亦可以為固定或可變的。The transistor 2325 can be coupled to a fixed or variable bias voltage or other circuit node (not individually drawn). In addition, a bias current is also provided, which utilizes, for example, a parameter responsive current I(x) generator 515, also discussed previously, or other fixed or variable current source. The frequency controller module (480, 485, which has coefficient registers 455 and 495) and the frequency calibration module (460, which has a coefficient register 465) also operate as previously discussed. In addition, various reactances (inductor 2320, capacitors 2310 and 2315) can also be implemented as fixed or variable as previously discussed. In an exemplary embodiment, the resistor 2330 can also be fixed or variable.

圖34是描繪根據本發明的教示之可被利用的第六範例的LC振盪器之電路圖,其係具有一種差動、共基極的Colpitts配置(或拓撲結構)。如圖所示,該裝置2400係包括第六範例的LC振盪器2405,其係具有一種差動、共基極的Colpitts配置(或拓撲結構)以及先前在圖4的雙重平衡配置中所述的頻率控制器與頻率校準模組。輸出頻率f 0 係在節點470D 與475D 之間獲得的,此亦等同於先前論述的節點470與475,因而其亦可用來取代在圖式與此說明書中所有對於節點470與475之參照。Figure 34 is a circuit diagram depicting an LC oscillator of a sixth example that may be utilized in accordance with the teachings of the present invention, having a differential, common base Colpitts configuration (or topology). As shown, the apparatus 2400 includes a sixth example LC oscillator 2405 having a differential, common base Colpitts configuration (or topology) and previously described in the dual balanced configuration of FIG. Frequency controller and frequency calibration module. Based on the output frequency f 0 between nodes D 470 and D 475 obtained, also goes to the previously discussed equivalent to the node 470 and 475, which may thus be used to replace in the drawings with reference to this specification for all of the nodes 470 and 475 .

電晶體2425與2426可被耦接至一固定或可變的偏壓電壓。儘管被描繪為利用n-MOS電晶體,電晶體2425與2426亦提供一個在本發明中等同的利用雙載子接面電晶體的例子。此外,一或多個偏壓電流亦被設置,其例如是利用同樣為先前論述的參數響應式電流I(x)產生器515、或者是,一或多個其它固定或可變的電流源。頻率控制器模組(480、485,其係具有係數暫存器455與495)以及頻率校準模組(460,其係具有係數暫存器465)係如圖所示地橫跨節點A與B並聯耦接至電容器2415、或是如圖所示地橫跨節點A’與B’並聯耦接至電容器2410、或是如圖所示地橫跨節點A”與B”並聯耦接至電容器2430、或是這三種配置的任一種組合,並且其亦如先前論述地運作。此外,各種的電抗(電感器2420、電容器2410、2415與2430)亦如先前論述地可被實施為固定或可變的。Transistors 2425 and 2426 can be coupled to a fixed or variable bias voltage. Although depicted as utilizing an n-MOS transistor, transistors 2425 and 2426 also provide an example of a dual-contact junction transistor that is equivalent in the present invention. In addition, one or more bias currents are also provided, such as utilizing a parameter responsive current I(x) generator 515, also discussed previously, or one or more other fixed or variable current sources. The frequency controller module (480, 485, which has coefficient registers 455 and 495) and the frequency calibration module (460, which has a coefficient register 465) are shown across the nodes A and B as shown. Parallelly coupled to capacitor 2415, or coupled in parallel across node A' and B' to capacitor 2410 as shown, or coupled in parallel across node A" and B" to capacitor 2430 as shown Or any combination of these three configurations, and it also operates as previously discussed. In addition, various reactances (inductor 2420, capacitors 2410, 2415, and 2430) can also be implemented as fixed or variable as previously discussed.

圖35是描繪根據本發明的教示之可被利用的第七範例的LC振盪器2505之電路圖,其係具有一種差動、共集極的Colpitts配置(或拓撲結構)。如圖所示,該裝置2500係包括第七範例的LC振盪器2505,其係具有一種差動、共集極的Colpitts配置(或拓撲結構)以及先前在圖4的雙重平衡配置中所述的頻率控制器與頻率校準模組。輸出頻率f 0 係在節點470E 與475E 之間獲得的,此亦等同於先前論述的節點470與475,因而其可用來取代在圖式與此說明書中所有對於節點470與475之參照。35 is a circuit diagram depicting an LC oscillator 2505 of a seventh example that may be utilized in accordance with the teachings of the present invention, having a Colpitts configuration (or topology) of differential, common collectors. As shown, the apparatus 2500 includes an LC oscillator 2505 of the seventh example having a differential, common collector Colpitts configuration (or topology) and previously described in the dual balanced configuration of FIG. Frequency controller and frequency calibration module. The output frequency f 0 is obtained between nodes 470 E and 475 E , which is also equivalent to nodes 470 and 475 previously discussed, and thus may be used in place of all references to nodes 470 and 475 in the drawings and in this specification.

一或多個偏壓電流係被設置,其例如是利用同樣為先前論述的參數響應式電流I(x)產生器515、或者是,一或多個其它固定或可變的電流源。頻率控制器模組(480、485,其係具有係數暫存器455與495)以及頻率校準模組(460,其係具有係數暫存器465)係如圖所示地橫跨節點A與B並聯耦接至電容器2515、或是如圖所示地橫跨節點A’與B’並聯耦接至電容器2510、或是如圖所示地橫跨節點A”與B”並聯耦接至電容器2530、或是這三種配置的任一種組合,並且其亦如先前論述地運作。此外,各種的電抗(電感器2520、電容器2510、2515與2530)亦如先前論述地可被實施為固定或可變的。One or more bias currents are provided, for example, using a parameter responsive current I(x) generator 515, also discussed previously, or one or more other fixed or variable current sources. The frequency controller module (480, 485, which has coefficient registers 455 and 495) and the frequency calibration module (460, which has a coefficient register 465) are shown across the nodes A and B as shown. Parallelly coupled to capacitor 2515, or coupled in parallel across node A' and B' to capacitor 2510 as shown, or coupled in parallel across node A" and B" to capacitor 2530 as shown Or any combination of these three configurations, and it also operates as previously discussed. In addition, various reactances (inductor 2520, capacitors 2510, 2515, and 2530) can also be implemented as fixed or variable as previously discussed.

圖36是描繪根據本發明的教示之可被利用的第八範例的LC振盪器2605之電路圖,其係具有一種單端Hartley配置(或拓撲結構)。如圖所示,該裝置2600係包括第八範例的LC振盪器2605,其係具有一種單端Hartley配置(或拓撲結構)以及先前論述的頻率控制器與頻率校準模組的部份。同樣是因為該振盪器2605是單端的而非差動的,所以頻率控制器與頻率校準模組(485、460)僅耦接至一軌(節點470F ),而不是具有圖4的雙重平衡配置。如圖所示,輸出頻率f 0 係在節點470F 與475F 之間獲得的,此亦等同於先前論述的節點470與475,因而其可用來取代在圖式與此說明書中所有對於節點470與475之參照。(此外,儘管頻率控制器與頻率校準模組(485、460)係被描繪在節點470F 以及在節點475F 上的接地電位之間,但是該頻率控制器與頻率校準模組(485、460)亦被視為並聯橫跨電容器2610在節點470F 與VD D 之間,因為VD D 亦等同於AC接地。)36 is a circuit diagram depicting an LC oscillator 2605 of an eighth example that can be utilized in accordance with the teachings of the present invention, having a single-ended Hartley configuration (or topology). As shown, the apparatus 2600 includes an LC oscillator 2605 of the eighth example having a single-ended Hartley configuration (or topology) and portions of the frequency controller and frequency calibration module discussed previously. Also because the oscillator 2605 is single-ended rather than differential, the frequency controller and frequency calibration module (485, 460) are only coupled to one rail (node 470 F ), rather than having the double balance of FIG. Configuration. As shown, the output frequency f 0 is obtained between nodes 470 F and 475 F , which is also equivalent to nodes 470 and 475 previously discussed, and thus may be used in place of all of the nodes 470 in the drawings and in this specification. With reference to 475. (Furthermore, although the frequency controller and frequency calibration module (485, 460) are depicted between node 470 F and the ground potential at node 475 F , the frequency controller and frequency calibration module (485, 460) It is also considered to be parallel across capacitor 2610 between nodes 470 F and V D D because V D D is also equivalent to AC ground.)

電晶體2625可被耦接至一固定或可變的偏壓電壓。此外,一偏壓電流亦被設置,例如是利用同樣為先前論述的參數響應式電流I(x)產生器515、或者是,其它固定或可變的電流源。頻率控制器模組(480、485,其係具有係數暫存器455與495)以及頻率校準模組(460,其係具有係數暫存器465)亦如先前論述地運作。此外,各種的電抗(電感器2615與2620、電容器2610)亦如先前論述地可被實施為固定或可變的。在範例的實施例中,電阻2630亦可以為固定或可變的。The transistor 2625 can be coupled to a fixed or variable bias voltage. In addition, a bias current is also set, for example, using a parameter responsive current I(x) generator 515, also discussed previously, or other fixed or variable current source. The frequency controller modules (480, 485, which have coefficient registers 455 and 495) and the frequency calibration module (460, which has coefficient registers 465) also operate as previously discussed. In addition, various reactances (inductors 2615 and 2620, capacitor 2610) can also be implemented as fixed or variable as previously discussed. In an exemplary embodiment, resistor 2630 can also be fixed or variable.

比較圖33與36,明顯將可知的是,該Hartley配置可以從該Colpitts配置導出,其係藉由將電感器換成電容器以及將電容器換成電感器。請再次參照圖34與35,對於熟習此項技術者因此將為明顯的是,共基極與共集極兩種差動的Hartley振盪器配置都可以藉由交換在所描述的差動的Colpitts配置中的電容器及電感器來加以形成。於是,兩種差動的Hartley振盪器配置並未個別地加以描述。Comparing Figures 33 and 36, it will be apparent that the Hartley configuration can be derived from the Colpitts configuration by replacing the inductor with a capacitor and replacing the capacitor with an inductor. Referring again to Figures 34 and 35, it will be apparent to those skilled in the art that the common base and common collector differential Hartley oscillator configurations can be exchanged by the described Colpitts in the differential. Capacitors and inductors in the configuration are formed. Thus, the two differential Hartley oscillator configurations are not individually described.

圖37是描繪根據本發明的教示之可被利用的第九範例的LC振盪器之電路圖,其係具有一種單端Pierce配置(或拓撲結構)。如圖所示,該裝置2700係包括第九範例的LC振盪器2705,其係具有一種單端Pierce配置(或拓撲結構)以及先前論述的頻率控制器與頻率校準模組的部份。同樣是因為該振盪器2705是單端的而非差動的,所以頻率控制器與頻率校準模組(485、460)僅耦接至一軌(節點470G ),而不是具有圖4的雙重平衡配置。如圖所示,輸出頻率f 0 係在節點470G 與475G 之間獲得的,此亦等同於先前論述的節點470與475,因而其可用來取代在圖式與此說明書中所有對於節點470與475之參照。此外,該頻率控制器與頻率校準模組(485,460)係如圖所示地橫跨節點A與B並聯耦接至電容器2710、或是如圖所示地橫跨節點A’與B’並聯耦接至電容器2715、或兩者皆是(個別地橫跨節點A與B並聯至電容器2710以及橫跨節點A’與B’並聯至電容器2715)。37 is a circuit diagram depicting an LC oscillator of a ninth example that can be utilized in accordance with the teachings of the present invention, having a single-ended Pierce configuration (or topology). As shown, the apparatus 2700 includes a LC oscillator 2705 of the ninth example having a single-ended Pierce configuration (or topology) and portions of the frequency controller and frequency calibration module discussed previously. Also because the oscillator 2705 is single-ended rather than differential, the frequency controller and frequency calibration module (485, 460) are only coupled to one rail (node 470 G ) instead of having the double balance of FIG. Configuration. As shown, the output frequency f 0 is obtained between nodes 470 G and 475 G , which is also equivalent to nodes 470 and 475 previously discussed, and thus may be used in place of all of the nodes 470 in the drawings and in this specification. With reference to 475. In addition, the frequency controller and frequency calibration module (485, 460) are coupled in parallel to the capacitor 2710 across nodes A and B as shown, or across nodes A' and B' as shown. Parallel coupling to capacitor 2715, or both (individually across node A and B in parallel to capacitor 2710 and across nodes A' and B' in parallel to capacitor 2715).

該振盪器2705係包含一個電感性負載2720,該電感性負載2720例如是可以一個電感器、或是一個電感器並聯一個電容器(呈現一整體的電感),並且亦如先前論述地可被實施為固定或可變的。該電感性負載2705係與一個反相器2725及電阻2730並聯。該頻率控制器模組(480、485,其係具有係數暫存器455與495)以及頻率校準模組(460,其係具有係數暫存器465)亦如先前論述地運作。此外,各種的電容2710與2715亦如先前論述地可被實施為固定或可變的。在範例的實施例中,該電阻2730亦可以為固定或可變的。The oscillator 2705 includes an inductive load 2720, which may be, for example, an inductor or an inductor in parallel with a capacitor (presenting an integral inductance) and, as previously discussed, may be implemented as Fixed or variable. The inductive load 2705 is connected in parallel with an inverter 2725 and a resistor 2730. The frequency controller module (480, 485, which has coefficient registers 455 and 495) and the frequency calibration module (460, which has a coefficient register 465) also operate as previously discussed. In addition, various capacitors 2710 and 2715 can also be implemented as fixed or variable as previously discussed. In an exemplary embodiment, the resistor 2730 can also be fixed or variable.

應注意到的是,根據本發明的教示,各種的LC振盪器拓撲結構中之任一種都可被實施來提供一種正交配置(或拓撲結構),其可以和頻率補償(對於溫度、製程變化以及其它的參數變化)一起被利用。例如、兩個LC振盪器可以彼此交叉耦接並且適當地和頻率控制器模組(480、485,其係具有係數暫存器455與495)以及頻率校準模組(460,其係具有係數暫存器465)一起被配置,以提供複數個具有90°的相位關係之第一參考信號(於0°、90°、180°及/或270°)。It should be noted that any of a variety of LC oscillator topologies can be implemented to provide an orthogonal configuration (or topology) that can be compensated with frequency (for temperature, process variations, in accordance with the teachings of the present invention). And other parameter changes) are used together. For example, two LC oscillators can be cross-coupled to each other and suitably to the frequency controller module (480, 485, which has coefficient registers 455 and 495) and a frequency calibration module (460, which has coefficients for the time being The registers 465) are configured together to provide a plurality of first reference signals (at 0°, 90°, 180°, and/or 270°) having a phase relationship of 90°.

圖38是描繪根據本發明的教示之可被利用的範例的主動式電感器2910的配置之電路圖。儘管該主動式電感器2910係被描繪為利用雙載子接面電晶體,但是可利用任意類型的CMOS電晶體來獲得等效的電路。主動式電感器2910可被利用於任何在此所述的LC振盪器或是其等同的振盪器之電感器或電感性負載中之任一個,並且可以提供在IC面積上節省的優點。所描繪的主動式電感器2910一般將會在節點D耦接至振盪器的其它部份。一偏壓電流亦被設置,例如是利用同樣為先前論述的參數響應式電流I(x)產生器515、或者是,其它固定或可變的電流源。此外,該主動式電感器2910係被舉例為一個例子而無限制性的-其它的主動式電感器電路也可以等同地被利用,其包含利用其它類型的電晶體及電路配置之主動式電感器電路。38 is a circuit diagram depicting a configuration of an active inductor 2910 that can be utilized in accordance with the teachings of the present invention. Although the active inductor 2910 is depicted as utilizing a bipolar junction transistor, any type of CMOS transistor can be utilized to obtain an equivalent circuit. The active inductor 2910 can be utilized in any of the LC oscillators or their equivalent oscillator inductors or inductive loads described herein, and can provide the savings in IC area. The depicted active inductor 2910 will typically be coupled to other portions of the oscillator at node D. A bias current is also set, for example, using a parametric responsive current I(x) generator 515, also discussed previously, or other fixed or variable current source. Moreover, the active inductor 2910 is exemplified as an example without limitation - other active inductor circuits can equally be utilized, including active inductors utilizing other types of transistors and circuit configurations. Circuit.

熟習此項技術者將會體認到無數的變化都可利用於上述各種範例的LC振盪器實施例。例如,各種放大器可用廣泛種類的方式來加以實施,例如,僅利用p通道電晶體、僅利用n通道電晶體、或是利用p與n通道電晶體的組合,即如同所示者。此外,各種的放大器及電流鏡相對於各種的諧振器而可以有各種的電路位置及配置。單一或是多個電感器或電突器的變化都可以等同地被利用。例如,各種的拓撲結構可以是對稱或是非對稱的、互補或是非互補的、或是交叉耦接或非交叉耦接的。所有的此類變化都被視為是等同的且在本發明的範疇之內。Those skilled in the art will recognize that numerous variations are available for the LC oscillator embodiments of the various examples described above. For example, various amplifiers can be implemented in a wide variety of ways, for example, using only p-channel transistors, using only n-channel transistors, or using a combination of p- and n-channel transistors, as shown. In addition, various amplifiers and current mirrors can have various circuit positions and configurations with respect to various resonators. Variations in single or multiple inductors or abrupt devices can be utilized equally. For example, various topologies may be symmetric or asymmetric, complementary or non-complementary, or cross-coupled or non-cross-coupled. All such variations are considered equivalent and are within the scope of the invention.

請再次參考圖2、3、18與25-27,展頻的功能亦可被實施。根據本發明,例如而非限制性的,展頻的功能例如是透過控制邏輯1810及/或控制邏輯或控制係數1950,而可被實施在時脈/頻率參考器(100、200、300)之內,以隨著時間經過而改變第一參考信號的第一頻率、或是可被實施在各種的除頻器、頻率選擇器或模式選擇器(220、205、225、330、335、345、1000、1050)或鎖定電路(例如,PLL/DLL 1205)中的任一個之內,以隨著時間經過而改變相對應的第二參考信號的第二頻率。例如,(控制邏輯及/或儲存係數的暫存器1950的)控制電路可被耦接至複數個可切換的受控電抗模組,並且適配於提供該複數個可切換的受控電抗模組之時間相依的切換以修改該第一頻率,並且提供一個隨著時間經過而有複數個不同的第一頻率之展頻的第一參考信號。同樣是舉例來說,(控制邏輯及/或儲存係數的暫存器1950的)控制電路可被耦接至一或多個鎖定電路(PLL/DLL 1205),其中該控制電路係適配於提供該可除頻倍數之時間相依的變異,以提供一個隨著時間經過而有複數個不同的第二頻率之展頻的第二參考信號。繼續以該例子來說,(一個鎖定電路(PLL/DLL 1205)的)各種除頻器、或是其它的除頻電路中之任一個都可被實施為計數器,其中該控制電路係適配於修改終端或是最終計數,該計數器係在該終端或是最終計數之際提供一個輸出信號。Please refer to Figures 2, 3, 18 and 25-27 again, and the spread spectrum function can also be implemented. In accordance with the present invention, for example and without limitation, the spread spectrum function can be implemented in the clock/frequency reference (100, 200, 300), for example, via control logic 1810 and/or control logic or control coefficients 1950. Changing the first frequency of the first reference signal over time, or may be implemented in various frequency dividers, frequency selectors, or mode selectors (220, 205, 225, 330, 335, 345, Within 1000, 1050) or any of the locking circuits (eg, PLL/DLL 1205), the second frequency of the corresponding second reference signal is varied over time. For example, a control circuit (of control logic and/or storage coefficient register 1950) can be coupled to a plurality of switchable controlled reactance modules and adapted to provide the plurality of switchable controlled reactance modes The group of time dependent switchings modifies the first frequency and provides a first reference signal having a spread of a plurality of different first frequencies over time. Also by way of example, control circuitry (of control logic and/or storage coefficient register 1950) can be coupled to one or more lockout circuits (PLL/DLL 1205), wherein the control circuitry is adapted to provide The time dependent variation of the frequency multiple can be used to provide a second reference signal having a spread of a plurality of different second frequencies over time. Continuing with this example, any of the various frequency dividers (of a locking circuit (PLL/DLL 1205), or other frequency dividing circuit, can be implemented as a counter, wherein the control circuit is adapted to Modify the terminal or final count, which provides an output signal at the terminal or at the end of the count.

請再次參考圖21,本發明的頻率控制器215、349、1415可包括一或多個以下的構件:(1)互導調變器1410(例如,410、415以及圖6至8中所示的實施例),在範例的實施例中,其亦可包含或是耦接至持續放大器305;(2)可變的參數調變器1425,以響應於任何所選的參數(例如,溫度、製程變化、電壓變化或是頻率)來調變該諧振頻率f 0 ,例如,各種的受控電容模組485、635、1505或是受控電抗模組1305、1805;(3)製程(或其它參數)調變器或補償器1430,例如,製程變化補償器425、760、860或是受控電抗模組1305、1805;(4)電壓變化補償器380、1455;及/或(5)老化(時間)變化補償器(或調變器)365、1460。熟習此項技術者將會觀察到,在互導調變器1410、可變的參數調變器1425、或製程(或其它參數)調變器或補償器1430或是其它補償器及調變器之間的各種劃分都是任意的,且並非限制本發明之範疇,因為每一種劃分都可被做成響應於上述的任何參數,且分別都可被利用於上述的任何目的(例如,該可變的參數調變器1425可被利用來補償製程變化、等等,而非例如是溫度變化)。此外,依據所選的實施方式,一或多個係數暫存器1435(例如,455、465、495)可被利用以儲存上述的複數個係數中之任一個。在替代的實施例中,此種係數可能是不需要的,而是切換電壓或電流直接且靜態或動態地被施加作為控制信號。Referring again to FIG. 21, the frequency controllers 215, 349, 1415 of the present invention may include one or more of the following components: (1) a transconductance modulator 1410 (eg, 410, 415 and shown in FIGS. 6-8) Embodiments), in an exemplary embodiment, may also include or be coupled to a continuous amplifier 305; (2) a variable parameter modulator 1425 responsive to any selected parameter (eg, temperature, Process variation, voltage change, or frequency) to modulate the resonant frequency f 0 , such as various controlled capacitor modules 485, 635, 1505 or controlled reactance modules 1305, 1805; (3) process (or other Parameter) modulator or compensator 1430, for example, process variation compensator 425, 760, 860 or controlled reactance module 1305, 1805; (4) voltage change compensator 380, 1455; and / or (5) aging (Time) variation compensator (or modulator) 365, 1460. Those skilled in the art will observe a transconductance modulator 1410, a variable parameter modulator 1425, or a process (or other parameter) modulator or compensator 1430 or other compensators and modulators. The various divisions between them are arbitrary and do not limit the scope of the invention, as each division can be made to respond to any of the above parameters and can be utilized for any of the above purposes, respectively (eg, The variable parameter modulator 1425 can be utilized to compensate for process variations, etc., rather than, for example, temperature changes. Moreover, depending on the selected implementation, one or more coefficient registers 1435 (e.g., 455, 465, 495) can be utilized to store any of the plurality of coefficients described above. In an alternative embodiment, such a factor may be undesirable, but the switching voltage or current is applied directly and statically or dynamically as a control signal.

同樣地,在範例的實施例中,這各種的構件都可包含一個感測器1440、1815(例如,yI(x)(或I(T))產生器415、515)、或例如是感測器可被設置作為一個別的構件,例如,上述耦接至二極體的電流源。再者,根據所選的實施例,A/D轉換器1445以及控制邏輯1450、1810也可被用來提供所選的頻率控制。Likewise, in the exemplary embodiment, the various components may include a sensor 1440, 1815 (eg, yI(x) (or I(T)) generator 415, 515), or for example, sensing The device can be configured as a separate component, such as the current source coupled to the diode. Again, in accordance with selected embodiments, A/D converter 1445 and control logic 1450, 1810 can also be used to provide selected frequency control.

概括而言,本發明之範例的實施例係提出一種用於一個諧振器的頻率控制之裝置,其中該諧振器係適配於提供一個具有一諧振頻率之第一信號。該裝置係包括一個感測器(1440、1815),該感測器適配於響應複數個參數中之至少一個參數來提供一第二信號(例如,控制電壓);以及一個頻率控制器(215,1415),其係耦接至該感測器並且可耦接至該諧振器,其中該頻率控制器係適配於響應該第二信號來修改該諧振頻率。該複數個參數是可變的並且包括至少一個以下的參數:溫度、製程、電壓、頻率以及老化。In summary, an exemplary embodiment of the present invention provides an apparatus for frequency control of a resonator, wherein the resonator is adapted to provide a first signal having a resonant frequency. The apparatus includes a sensor (1440, 1815) adapted to provide a second signal (eg, a control voltage) in response to at least one of a plurality of parameters; and a frequency controller (215) , 1415), coupled to the sensor and coupled to the resonator, wherein the frequency controller is adapted to modify the resonant frequency in response to the second signal. The plurality of parameters are variable and include at least one of the following parameters: temperature, process, voltage, frequency, and aging.

在範例的實施例中,該頻率控制器更適配於響應該第二信號來修改一個耦接至該諧振器的電抗或阻抗元件,例如,響應於該第二信號來修改該諧振器的總電容(圖9)、將一個固定的或是可變的電容(635)耦合到該諧振器或是從該諧振器去耦合之、藉由切換該變容器至一個所選的控制電壓來修改一個耦接至該諧振器的變容器之有效電抗、或者等效的是響應於該第二信號來修改該諧振器的一個電感,例如,藉由將一個固定的或是可變的電感耦合到該諧振器或是從該諧振器去耦合之、或是響應於該第二信號來修改該諧振器的一個電阻(或其它阻抗),例如,藉由將一個電阻耦合到該諧振器或是從該諧振器去耦合之。In an exemplary embodiment, the frequency controller is further adapted to modify a reactance or impedance component coupled to the resonator in response to the second signal, for example, modifying the total of the resonator in response to the second signal Capacitor (Fig. 9), coupling a fixed or variable capacitor (635) to the resonator or decoupling from the resonator, modifying one by switching the varactor to a selected control voltage An effective reactance of the varactor coupled to the resonator, or equivalently modifying an inductance of the resonator in response to the second signal, for example, by coupling a fixed or variable inductance to the The resonator is either decoupled from the resonator or modifies a resistance (or other impedance) of the resonator in response to the second signal, for example, by coupling a resistor to the resonator or from the The resonator is decoupled.

在範例的實施例中,該頻率控制器可進一步包括:一個適配於儲存第一複數個係數的係數暫存器;以及一個第一陣列(635),其係具有複數個耦接至該係數暫存器且可耦接至該諧振器之可切換的電容性模組,每個可切換的電容性模組係具有一個固定的電容615以及一個可變的電容620,每個可切換的電容性模組係響應於該第一複數個係數中之一個對應的係數以在該固定的電容以及該可變的電容之間切換,並且切換每個可變的電容至一個控制電壓。該複數個可切換的電容性模組可以是二進制加權的。該頻率控制器可進一步包括一個第二陣列650,其係具有複數個耦接至該係數暫存器之可切換的電阻性模組並且更具有一個電容性模組,該電容性模組以及該複數個可切換的電阻性模組係進一步耦接至一個節點625以提供該控制電壓,其中每個可切換的電阻性模組係響應於儲存在該係數暫存器中的第二複數個係數之一個對應的係數,以切換該可切換的電阻性模組至該控制電壓節點625。在選定的實施例中,該感測器係更包括一個響應於溫度的電流源655,其中該電流源係透過一個電流鏡670而被耦接至該第二陣列,以在橫跨該複數個可切換的電阻性模組中之至少一個可切換的電阻性模組上產生該控制電壓。同樣在選定的實施例中,該電流源係具有至少一個CTAT、PTAT或PTAT2 配置(圖7A至7D)。此外,該複數個可切換的電阻性模組之每個可切換的電阻性模組對於一個所選的電流係具有不同的溫度響應。In an exemplary embodiment, the frequency controller may further include: a coefficient register adapted to store the first plurality of coefficients; and a first array (635) having a plurality of couplings to the coefficient a register and a switchable capacitive module coupled to the resonator, each switchable capacitive module having a fixed capacitor 615 and a variable capacitor 620, each switchable capacitor The module is responsive to a corresponding one of the first plurality of coefficients to switch between the fixed capacitance and the variable capacitance, and switches each variable capacitance to a control voltage. The plurality of switchable capacitive modules can be binary weighted. The frequency controller may further include a second array 650 having a plurality of switchable resistive modules coupled to the coefficient register and further having a capacitive module, the capacitive module and the A plurality of switchable resistive modules are further coupled to a node 625 to provide the control voltage, wherein each switchable resistive module is responsive to a second plurality of coefficients stored in the coefficient register A corresponding coefficient is used to switch the switchable resistive module to the control voltage node 625. In selected embodiments, the sensor further includes a current source 655 responsive to temperature, wherein the current source is coupled to the second array via a current mirror 670 to span the plurality of The control voltage is generated on at least one of the switchable resistive modules of the switchable resistive module. Also in selected embodiments, the current source has at least one CTAT, PTAT or PTAT 2 configuration (Figs. 7A through 7D). In addition, each switchable resistive module of the plurality of switchable resistive modules has a different temperature response for a selected current system.

在其它範例的實施例中,該感測器是一個溫度感測器並且響應於溫度變化來改變該第二信號。該所選的實施例亦可包含一個耦接至該溫度感測器的類比至數位轉換器1445,以響應於該第二信號來提供一個數位輸出信號,且包含一個控制邏輯區塊1450以轉換該數位輸出信號成為該第一複數個係數。In other exemplary embodiments, the sensor is a temperature sensor and changes the second signal in response to a change in temperature. The selected embodiment can also include an analog to digital converter 1445 coupled to the temperature sensor to provide a digital output signal in response to the second signal and including a control logic block 1450 for conversion The digital output signal becomes the first plurality of coefficients.

在其它範例的實施例中,該頻率控制器係更包括一個製程變化補償器320、425、760或860,該製程變化補償器可耦接至該諧振器且適配於響應該複數個參數中之一個製程參數來修改該諧振頻率。該製程變化補償器可進一步包括一個適配於儲存複數個係數的係數暫存器;以及具有複數個耦接至該係數暫存器以及該諧振器之可切換的電容性模組之一個陣列760,每個可切換的電容性模組係具有一個第一固定的電容750以及一個第二固定的電容720,每個可切換的電容性模組係響應於該複數個係數中之一個對應的係數以在該第一固定的電容以及該第二固定的電容之間切換。在其它範例的實施例中,該製程變化補償器可進一步包括一個適配於儲存複數個係數的係數暫存器;以及一個陣列860,其係具有複數個耦接至該係數暫存器以及該諧振器之二進制加權的可切換的可變的電容性模組865,每個可切換的可變的電容性模組係響應於該複數個係數中之一個對應的係數以在一個第一電壓以及一個第二電壓之間切換。In other exemplary embodiments, the frequency controller further includes a process variation compensator 320, 425, 760 or 860, the process variation compensator can be coupled to the resonator and adapted to respond to the plurality of parameters One of the process parameters to modify the resonant frequency. The process variation compensator can further include a coefficient register adapted to store a plurality of coefficients; and an array 760 having a plurality of switchable capacitive modules coupled to the coefficient register and the resonator Each switchable capacitive module has a first fixed capacitor 750 and a second fixed capacitor 720, and each switchable capacitive module is responsive to a corresponding one of the plurality of coefficients Switching between the first fixed capacitance and the second fixed capacitance. In other exemplary embodiments, the process variation compensator can further include a coefficient register adapted to store a plurality of coefficients; and an array 860 having a plurality of couplings to the coefficient register and the a binary weighted switchable variable capacitive module 865 of the resonator, each switchable variable capacitive module responsive to a corresponding one of the plurality of coefficients to be at a first voltage and Switch between a second voltage.

在其它範例的實施例中,一種頻率控制器係更包括一個適配於儲存第一複數個係數的係數暫存器;以及一個第一陣列1500,其係具有複數個耦接至該係數暫存器且可耦接至該諧振器之可切換的二進制加權的電容性模組1505,每個可切換的電容性模組係具有一個可變的電容1515,每個可切換的電容性模組係響應於該第一複數個係數中之一個對應的係數以切換(1520)該可變的電容至複數個控制電壓中之一個所選的控制電壓。該感測器可包括一個響應於溫度的電流源,並且該頻率控制器亦可包含一個具有複數個電阻性模組1605的第二陣列1600,該些電阻性模組1605係透過一個電流鏡(670、510、520)而耦接至該電流源(655),該複數個電阻性模組係適配於提供該複數個控制電壓,並且其中該複數個電阻性模組的每個電阻性模組對於溫度係具有不同的響應,並且其係適配於響應一個來自該電流源的電流來提供該複數個控制電壓中之一個對應的控制電壓。In other exemplary embodiments, a frequency controller further includes a coefficient register adapted to store the first plurality of coefficients; and a first array 1500 having a plurality of couplings to the coefficient temporary storage And a switchable binary-weighted capacitive module 1505 coupled to the resonator, each switchable capacitive module having a variable capacitor 1515, each switchable capacitive module Resisting (1520) the variable capacitance to a selected one of the plurality of control voltages in response to a corresponding one of the first plurality of coefficients. The sensor can include a current source responsive to temperature, and the frequency controller can also include a second array 1600 having a plurality of resistive modules 1605 that pass through a current mirror ( 670, 510, 520) coupled to the current source (655), the plurality of resistive modules are adapted to provide the plurality of control voltages, and wherein each resistive mode of the plurality of resistive modules The set has a different response to the temperature system and is adapted to provide a corresponding one of the plurality of control voltages in response to a current from the current source.

在其它範例的實施例中,一種用於一個諧振器的頻率控制之裝置係包括一個適配於儲存第一複數個係數的係數暫存器;以及一個第一陣列(1300、1800),其係具有複數個耦接至該係數暫存器以及該諧振器之可切換的電抗模組(1305、1805),每個可切換的電抗模組係響應於該第一複數個係數中之一個對應的係數以切換一個對應的電抗至該諧振器來修改該諧振頻率。該對應的電抗可以是一個固定的或是可變的電感、一個固定的或是可變的電容、或是兩者之任意組合。該對應的電抗可被切換在該諧振器與一個控制電壓或一個接地電位之間,並且該控制電壓可以藉由一個響應於溫度的電流源來加以決定。例如,該對應的電抗是可變的並且被切換在該諧振器以及複數個控制電壓中之一個所選的控制電壓之間。在選定的實施例中,該第一複數個係數係藉由一個響應於複數個變數參數中的至少一個參數(例如,溫度、製程、電壓以及頻率)的感測器而被校準或是決定。In other exemplary embodiments, an apparatus for frequency control of a resonator includes a coefficient register adapted to store a first plurality of coefficients; and a first array (1300, 1800) Having a plurality of switchable reactance modules (1305, 1805) coupled to the coefficient register and the resonator, each switchable reactance module responsive to one of the first plurality of coefficients The coefficient modifies the resonant frequency by switching a corresponding reactance to the resonator. The corresponding reactance can be a fixed or variable inductance, a fixed or variable capacitance, or any combination of the two. The corresponding reactance can be switched between the resonator and a control voltage or a ground potential, and the control voltage can be determined by a current source responsive to temperature. For example, the corresponding reactance is variable and switched between the resonator and a selected one of a plurality of control voltages. In selected embodiments, the first plurality of coefficients are calibrated or determined by a sensor responsive to at least one of a plurality of variable parameters (eg, temperature, process, voltage, and frequency).

在範例的實施例中,該複數個可切換的電抗模組可進一步包括(電抗模組635的)複數個二進制加權的可切換的電容性模組640,每個可切換的電容性模組係具有一個固定的電容以及一個可變的電容,每個可切換的電容性模組係響應於該第一複數個係數中之一個對應的係數以在該固定的電容以及該可變的電容之間切換,並且切換每個可變的電容至一個控制電壓。該裝置亦可包含一個響應於溫度的電流源655;以及一個第二陣列,其係具有複數個耦接至該係數暫存器且可選擇性地耦接至該電流源之可切換的電阻性模組675,該第二陣列更具有一個電容性模組680,該電容性模組以及該複數個可切換的電阻性模組係進一步耦接至一個節點625以提供該控制電壓,每個可切換的電阻性模組係響應於儲存在該係數暫存器中的第二複數個係數中之一個對應的係數,以切換該可切換的電阻性模組至該控制電壓節點,並且其中該複數個可切換的電阻性模組之每個可切換的電阻性模組對於來自該電流源之一個所選的電流係具有不同的溫度響應。In an exemplary embodiment, the plurality of switchable reactive modules may further include a plurality of binary weighted switchable capacitive modules 640 (of the reactance module 635), each switchable capacitive module Having a fixed capacitance and a variable capacitance, each switchable capacitive module is responsive to a corresponding one of the first plurality of coefficients to be between the fixed capacitance and the variable capacitance Switch and switch each variable capacitor to a control voltage. The device can also include a current source 655 responsive to temperature; and a second array having a plurality of switchable resistives coupled to the coefficient register and selectively coupled to the current source The module 675 further includes a capacitive module 680. The capacitive module and the plurality of switchable resistive modules are further coupled to a node 625 to provide the control voltage. Switching the resistive module to switch the switchable resistive module to the control voltage node in response to a corresponding one of a second plurality of coefficients stored in the coefficient register, and wherein the plurality Each switchable resistive module of each of the switchable resistive modules has a different temperature response to a selected current system from the current source.

在其它範例的實施例中,該複數個可切換的電抗模組更包括(可控制的電容器模組1500的)複數二進制加權的可切換的電容性模組1505,每個可切換的電容性模組係具有一個可變的電容1515,每個可切換的電容性模組係響應於該第一複數個係數中之一個對應的係數以切換(1520)該可變的電容至複數個控制電壓中之一個所選的控制電壓。該裝置亦可包含一個響應於溫度的電流源655;以及一個具有複數個電阻性模組1605的第二陣列,該些電阻性模組1605係透過一個電流鏡(670、510、520)而耦接至該電流源,該複數個電阻性模組係適配於提供該複數個控制電壓,並且其中該複數個電阻性模組的每個電阻性模組對於溫度係具有不同的響應,並且其係適配於響應來自該電流源的一個電流以提供該複數個控制電壓中之一個對應的控制電壓。In other exemplary embodiments, the plurality of switchable reactive modules further includes a plurality of binary weighted switchable capacitive modules 1505 (of the controllable capacitor module 1500), each switchable capacitive module The group has a variable capacitance 1515, and each switchable capacitive module is responsive to a corresponding one of the first plurality of coefficients to switch (1520) the variable capacitance to the plurality of control voltages One of the selected control voltages. The device can also include a current source 655 responsive to temperature; and a second array having a plurality of resistive modules 1605 coupled by a current mirror (670, 510, 520) Connected to the current source, the plurality of resistive modules are adapted to provide the plurality of control voltages, and wherein each of the plurality of resistive modules has a different response to the temperature system, and Is adapted to respond to a current from the current source to provide a corresponding one of the plurality of control voltages.

在其它範例的實施例中,該複數個可切換的電抗模組可進一步包括(製程變化補償器760的)複數個耦接至該係數暫存器以及該諧振器之二進制加權的可切換的電容性模組,每個可切換的電容性模組係具有一個第一固定的電容750以及一個第二固定的電容720,每個可切換的電容性模組係響應於該複數個係數中之一個對應的係數以在該第一固定的電容以及該第二固定的電容之間做切換。在其它範例的實施例中,該複數個可切換的電抗模組可進一步包括(製程變化補償模組860的)複數個耦接至該係數暫存器以及該諧振器之二進制加權的可切換的可變的電容性模組865,每個可切換的可變的電容性模組係響應於該複數個係數中之一個對應的係數以在一個第一電壓以及一個第二電壓之間做切換。In other exemplary embodiments, the plurality of switchable reactive modules may further include (a plurality of process variation compensators 760) coupled to the coefficient register and binary weighted switchable capacitors of the resonator Each of the switchable capacitive modules has a first fixed capacitor 750 and a second fixed capacitor 720, and each switchable capacitive module is responsive to one of the plurality of coefficients Corresponding coefficients are switched between the first fixed capacitance and the second fixed capacitance. In other exemplary embodiments, the plurality of switchable reactance modules may further include (a plurality of process variation compensation modules 860) coupled to the coefficient register and binary weighted switchable of the resonator A variable capacitive module 865, each switchable variable capacitive module is responsive to a corresponding one of the plurality of coefficients to switch between a first voltage and a second voltage.

在範例的實施例中,一種根據本發明的教示之裝置係包括一個適配於提供一個具有一諧振頻率之第一信號的諧振器310、405;以及一個溫度補償器315,其係耦接至該諧振器並且適配於響應溫度變化來修改該諧振頻率。該諧振器是以下的諧振器中之至少一個:一個電感器(L)以及一個電容器(C)被配置以構成一個LC-諧振電路的諧振器;一陶瓷諧振器、一機械式諧振器、一微機電諧振器或是一薄膜體聲波諧振器。該裝置可進一步包括一個耦接至該諧振器以及該溫度補償器的負互導放大器410,其中該溫度補償器係更適配於響應溫度變化來修改一個通過該負互導放大器的電流。該溫度補償器可更包括一個響應於溫度變化的電流源415、515、655。In an exemplary embodiment, an apparatus in accordance with the teachings of the present invention includes a resonator 310, 405 adapted to provide a first signal having a resonant frequency; and a temperature compensator 315 coupled to The resonator is also adapted to modify the resonant frequency in response to a change in temperature. The resonator is at least one of the following resonators: an inductor (L) and a capacitor (C) configured to form a resonator of an LC-resonant circuit; a ceramic resonator, a mechanical resonator, and a The microelectromechanical resonator is either a film bulk acoustic resonator. The apparatus can further include a negative transconductance amplifier 410 coupled to the resonator and the temperature compensator, wherein the temperature compensator is further adapted to modify a current through the negative transconductance amplifier in response to a change in temperature. The temperature compensator can further include a current source 415, 515, 655 responsive to temperature changes.

在其它範例的實施例中,該溫度補償器係更包括:一個電流源415、515、655,其係適配於提供一個響應於溫度變化的電流;一個適配於儲存第一複數個係數的係數暫存器;複數個耦接至該諧振器以及該電流源的電阻性模組675、1605,該複數個電阻性模組中的至少一個電阻性模組係適配於提供一個控制電壓或是複數個控制電壓;以及複數個可切換的電抗模組(1305、1805、635、1505),其係耦接至該諧振器以及該電流源並且可選擇性地耦接至該複數個電阻性模組中的至少一個電阻性模組。In other exemplary embodiments, the temperature compensator further includes: a current source 415, 515, 655 adapted to provide a current responsive to a change in temperature; and a second adapted to store the first plurality of coefficients a coefficient register; a plurality of resistive modules 675, 1605 coupled to the resonator and the current source, at least one of the plurality of resistive modules being adapted to provide a control voltage or a plurality of controllable voltages; and a plurality of switchable reactive modules (1305, 1805, 635, 1505) coupled to the resonator and the current source and selectively coupled to the plurality of resistive At least one resistive module in the module.

在其它範例的實施例中,本發明係提供一種用於一個諧振器的頻率控制之頻率控制器,其係包括:一個適配於儲存第一複數個係數以及第二複數個係數的係數暫存器;一個電流源415、515、655,其係適配於提供一個對應於一溫度的電流;一個具有複數個耦接至該係數暫存器之可切換的電阻性模組675、1605之第一陣列,並且其更具有一個電容性模組,該第一陣列係進一步透過一個電流鏡而耦接至該電流源以在橫跨該複數個可切換的電阻性模組中之至少一個可切換的電阻性模組上產生至少一個控制電壓,每個可切換的電阻性模組係響應於該第二複數個係數之一個對應的係數以切換該可切換的電阻性模組來提供該控制電壓至一個控制電壓節點;以及一個第二陣列,其係具有複數個耦接至該係數暫存器以及該諧振器之二進制加權的可切換的電容性模組640,每個可切換的電容性模組係具有一個固定的電容以及一個可變的電容,每個可切換的電容性模組係響應於該第一複數個係數中之一個對應的係數以在該固定的電容以及該可變的電容之間做切換,並且切換每個可變的電容至該控制電壓節點。In other exemplary embodiments, the present invention provides a frequency controller for frequency control of a resonator, comprising: a coefficient temporary storage adapted to store a first plurality of coefficients and a second plurality of coefficients a current source 415, 515, 655 adapted to provide a current corresponding to a temperature; a plurality of switchable resistive modules 675, 1605 having a plurality of coupled to the coefficient register An array, and further having a capacitive module, the first array being further coupled to the current source through a current mirror to be switchable across at least one of the plurality of switchable resistive modules Generating at least one control voltage on the resistive module, each switchable resistive module is responsive to a corresponding coefficient of the second plurality of coefficients to switch the switchable resistive module to provide the control voltage To a control voltage node; and a second array having a plurality of binary weighted switchable capacitive modules 640 coupled to the coefficient register and the resonator, each The switchable capacitive module has a fixed capacitance and a variable capacitance, and each switchable capacitive module is responsive to a corresponding one of the first plurality of coefficients to be at the fixed capacitance And switching between the variable capacitors and switching each variable capacitor to the control voltage node.

請再次參照圖3與4,該時脈產生器及/或時序/頻率參考器(100、200或300)亦可包括一頻率校準模組(325或430)。此頻率校準模組係一件個別的專利申請案之標的,但是其高階的功能係簡述於後。圖13係描繪根據本發明的教示之一個範例的頻率校準模組900(其可被利用作為模組325或430)的高階方塊圖。頻率校準模組900係包括:一數位除頻器910、一計數器為主的頻率偵測器915、一數位脈衝計數器905、與一校準暫存器930(其亦可被利用作為暫存器465)。在利用一測試IC之下,來自時脈產生器(100、200或300)之輸出信號係被除頻(910)且於頻率偵測器915中與一已知的參考頻率920作比較。依據時脈產生器(100、200或300)相對於該參考為快或慢,下(down)或上(up)的脈衝係被提供至脈衝計數器905。根據彼等結果,第三複數個切換係數r 0 r (y 1) 係被決定,且時脈產生器(100、200或300)係被校準至一所選的參考頻率。同樣地,個別的IC亦可被各別校準及測試。Referring again to FIGS. 3 and 4, the clock generator and/or timing/frequency reference (100, 200 or 300) may also include a frequency calibration module (325 or 430). This frequency calibration module is the subject of an individual patent application, but its high-level functions are outlined below. 13 is a high level block diagram depicting a frequency calibration module 900 (which may be utilized as module 325 or 430) in accordance with one example of the teachings of the present invention. The frequency calibration module 900 includes a digital frequency divider 910, a counter-based frequency detector 915, a digital pulse counter 905, and a calibration register 930 (which can also be utilized as a temporary register 465). ). Under a test IC, the output signal from the clock generator (100, 200 or 300) is frequency divided (910) and compared to a known reference frequency 920 in frequency detector 915. Pulses that are fast or slow, down or up are provided to the pulse counter 905 depending on whether the clock generator (100, 200 or 300) is relatively high relative to the reference. Based on their results, the third plurality of switching coefficients r 0 to r (y - 1) are determined and the clock generator (100, 200 or 300) is calibrated to a selected reference frequency. Similarly, individual ICs can be individually calibrated and tested.

請再次參照圖2、3與4,熟習此項技術者將理解的是:於PVT下之高度準確、低抖動、自由運行且自我參考的振盪器係已經加以敘述,其係提供具有一可選擇且可調諧的諧振頻率f 0 之一差動、實質正弦的信號,而可利用於節點470與475。針對於諸多應用而言,此信號是足夠的且可被直接利用(且可被輸出於圖1的匯流排125或135、圖2的線路250、或圖3的線路350之上、或是在圖4的軌道或線路470與475之間)。舉例而言,此信號可被利用作為一時序或頻率參考。根據本發明,另外的應用是可利用的,其包括:時脈產生(實質方波)、除頻、低延遲的頻率切換、與模式選擇,即如下所述者。Referring again to Figures 2, 3 and 4, it will be understood by those skilled in the art that highly accurate, low jitter, free running and self-referential oscillators under PVT have been described and are provided with an option. And one of the tunable resonant frequencies f 0 is a differential, substantially sinusoidal signal that can be utilized at nodes 470 and 475. This signal is sufficient for many applications and can be utilized directly (and can be output on bus bar 125 or 135 of FIG. 1, line 250 of FIG. 2, or line 350 of FIG. 3, or The track of Figure 4 or between lines 470 and 475). For example, this signal can be utilized as a timing or frequency reference. Additional applications are available in accordance with the present invention, including: clock generation (substantial square wave), frequency division, low delay frequency switching, and mode selection, ie, as described below.

圖14係描繪根據本發明的教示之一個範例的除頻器與方波產生器1000、一個範例的非同步頻率選擇器1050、以及範例的突波抑制模組1080之方塊圖。如上所指出地,除頻器與方波產生器1000係可納入或包含模組220及/或330,且頻率選擇器1050(與突波抑制模組1080一起或是沒有一起)可納入模組205及/或335中或包含該等模組。14 is a block diagram depicting a frequency divider and square wave generator 1000, an exemplary non-synchronous frequency selector 1050, and an exemplary surge suppression module 1080, in accordance with one example of the teachings of the present invention. As noted above, the frequency divider and square wave generator 1000 can incorporate or include modules 220 and/or 330, and the frequency selector 1050 (with or without the surge suppression module 1080) can be incorporated into the module. These modules are included or included in 205 and/or 335.

請參照圖14,來自該振盪器之輸出信號(即:具有一頻率f 0 之一差動且實質正弦的信號,諸如:於圖2的線路250、或圖3的線路350之上、或是在圖4的軌道或線路470與475之間的輸出)係被輸入至除頻器與方波產生器1000。此實質正弦的信號之頻率係被除頻任何一或多個任意值“N”而成為“m”個不同的頻率(包括f 0 於適當處),且被轉換為實質方波信號,而造成具有m+1個不同的可利用頻率(成為頻率f 0 f 1 f 2 f n )之複數個實質方波信號,其係被輸出於線路或匯流排1020之上。具有m+1個不同的可利用頻率之此等實質方波信號的任一者係可透過範例的非同步頻率選擇器1050而被非同步地選擇,該非同步頻率選擇器1050係如圖所示而可實施為一多工器。具有m+1個不同的可利用頻率之此等實質方波信號的任一者之選擇係可透過複數個選擇線路(Sm 到S0 )1055所達成,而提供具有所選的頻率之一實質方波信號,而被輸出於線路1060之上。Referring to FIG. 14, the output signal from the oscillator (ie: and substantially sinusoidal signal, such as one having a frequency f 0 of the differential: Line 250 in FIG. 2, or on the line 350 of FIG. 3, or The output between the tracks or lines 470 and 475 of FIG. 4 is input to the frequency divider and square wave generator 1000. The frequency of the substantially sinusoidal signal is divided by any one or more arbitrary values "N" to become "m" different frequencies (including f 0 where appropriate), and converted into a substantial square wave signal, resulting in A plurality of substantial square wave signals having m+1 different available frequencies (becoming frequencies f 0 , f 1 , f 2 to f n ) are output on the line or bus bar 1020. Any of these substantial square wave signals having m+1 different available frequencies may be selected asynchronously by an exemplary non-synchronous frequency selector 1050, which may be as shown Implemented as a multiplexer. Selecting any one of m + 1 of the system having different frequencies may be utilized such may be substantial square wave signal (the S 0 S m) 1055 reached via a plurality of select lines, one of the frequencies while providing a substantial square having a selected The wave signal is output on line 1060.

作為非同步頻率選擇之部分者,突波抑制亦為由突波抑制模組1080所提供,該突波抑制模組1080係可用複數個方式實施,其包括:透過圖14所示的一或多個範例的D型正反器(DFF)之運用。突波係可能發生於一非同步的頻率轉變中,其中,一高態或一低態並未維持一段充分的期間,因而可能在由該輸出時脈信號所驅動之電路中造成亞穩定度(metastability)。舉例而言,一非同步頻率轉變係可能造成於一第一頻率之低態轉變至於一第二頻率之高態,而在一時點,該高態為將要轉變回到於第二頻率之低態,而造成一電壓尖脈波(spike)或突波。為了避免潛在的突波被提供作為一輸出時脈信號之部分者,所選擇的實質方波信號(具有選擇的頻率)係於線路1060之上被提供至一第一DFF 1065,該DFF 1065係提供一保存(holding)狀態;若一突波發生時,其將被保存直到一時脈邊緣觸發該DFF為止。為了避免突波發生於時脈邊緣處,該等DFF係可被提供時脈為小於最大可利用的頻率,或是一或多個額外的DFF(諸如:DFF 1070)係可被運用,因為於等待另一個時脈信號之期間,來自DFF 1065之Q輸出將會已經穩定化至一第一狀態(高或低)或是一第二狀態(低或高),諸如至電源或接地軌道。本發明人已經證實的是:2個DFF是足夠的,而附加額外的DFF可能是所期望的,但是額外的DFF係引起增加的切換延遲。儘管是利用範例的DFF來加以說明,但是其它的正反器或計數器也可以利用,且熟習此項技術者將知悉可達成此結果之多種其它的等效實施方式,且所有該等變化係於本發明之範疇內。As part of the non-synchronous frequency selection, the spur suppression is also provided by the spur suppression module 1080. The spur suppression module 1080 can be implemented in a plurality of manners, including: transmitting one or more as shown in FIG. An example of the use of the D-type flip-flop (DFF). The glitch system may occur in an asynchronous frequency transition in which a high state or a low state is not maintained for a sufficient period of time and may cause metastability in the circuit driven by the output clock signal ( Metastability). For example, a non-synchronous frequency transition may cause a low state of a first frequency to transition to a high state of a second frequency, and at a time point, the high state is a low state to be converted back to the second frequency. , causing a voltage spike or glitch. In order to avoid potential bursts being provided as part of an output clock signal, the selected substantial square wave signal (having a selected frequency) is provided over line 1060 to a first DFF 1065, which is a DFF 1065 system. A holding state is provided; if a glitch occurs, it will be saved until the edge of the clock triggers the DFF. In order to prevent glitch from occurring at the edge of the clock, the DFFs can be provided with a clock that is less than the maximum available frequency, or one or more additional DFFs (such as DFF 1070) can be used because While waiting for another clock signal, the Q output from DFF 1065 will have stabilized to a first state (high or low) or a second state (low or high), such as to a power or ground track. The inventors have confirmed that 2 DFFs are sufficient, and the addition of additional DFFs may be desirable, but the additional DFFs cause increased switching delays. Although illustrated with the exemplary DFF, other flip-flops or counters may be utilized, and those skilled in the art will be aware of a variety of other equivalent embodiments that achieve this result, and all such variations are Within the scope of the invention.

根據本發明的教示之該種範例的低延遲頻率切換係描繪於圖15中。圖15亦為說明本發明之“實質”方波,其為利用於各種技術之典型的實際方波,且呈現合理的變化、下衝(undershoot)、與過衝(overshoot)於其個別的高與低態(因而非為教科書實例之完全的“平坦”)。圖15A係描繪自1 MHz至33 MHz之非同步的無突波切換,而圖15B係描繪自4 MHz至8 MHz、接著至16 MHz、且接著至33 MHz之量測到的無突波切換。This example of low latency frequency switching in accordance with the teachings of the present invention is depicted in FIG. Figure 15 also illustrates the "substantial" square wave of the present invention, which is a typical square wave typical of various techniques, and exhibits reasonable variations, undershoot, and overshoot at its individual heights. With a low state (and thus not a complete "flat" for textbook examples). Figure 15A depicts the unsynchronized bumpless switching from 1 MHz to 33 MHz, while Figure 15B depicts the no-surge switching measured from 4 MHz to 8 MHz, then to 16 MHz, and then to 33 MHz. .

請再次參照圖14,該除頻器與方波產生器1000係可用許多種方式實施之,諸如:差動或單端式,圖示的除頻器僅係為範例而已。由於來自圖4所示的振盪器之輸出是差動的(跨於線路或軌道470與475),第一除頻器1005亦為差動式且提供互補的輸出,以對於振盪器呈現一實質固定的負載且維持相位對準,且為快速的,以支援諸如於GHz範圍之高頻。此外,可能為必要或適當的是,拒絕第一除頻器1005之任何弛張模式的振盪。第二除頻器1010亦可為差動式且提供任何任意的除頻(除以“M”),諸如除以一個整數、2的倍數、一有理數、或任何其它的量或數目、等等。針對於此種除頻器之拓撲結構或配置是此技術中已知的,且任何該種除頻器都可被利用。舉例且非為限制而言,此種除頻器係可為一個序列(多級)的計數器或正反器1075,諸如:於圖16所示之彼等正反器,其提供以2的倍數之除頻,各級之輸出係提供一個不同的頻率,且更提供用於下一級之一時脈信號,且亦被回授至其本身的輸入,即如圖所示者。如圖所示,複數個頻率係接著可利用以輸出於線路或匯流排1020之上,諸如:f 0 /2、f 0 /4、等等、到f 0 /2N 。此外,如圖所示,緩衝器1085亦可被利用於該振盪器至第一除頻器1005之間以提供充分的電壓來驅動該第一除頻器1005,且亦可被利用於第二除頻器1010級之間以隔離可能也會影響信號上升與下降時間之狀態相依的負載變化。Referring again to Figure 14, the frequency divider and square wave generator 1000 can be implemented in a number of ways, such as differential or single-ended, and the illustrated frequency dividers are merely examples. Since the output from the oscillator shown in Figure 4 is differential (across lines or tracks 470 and 475), the first frequency divider 1005 is also differential and provides a complementary output to present a substantial Fixed load and maintain phase alignment, and fast to support high frequencies such as in the GHz range. Furthermore, it may be necessary or appropriate to reject the oscillation of any relaxation mode of the first frequency divider 1005. The second frequency divider 1010 can also be differential and provide any arbitrary frequency division (divide by "M"), such as by an integer, a multiple of 2, a rational number, or any other amount or number, etc. . Topologies or configurations for such frequency dividers are known in the art, and any such frequency divider can be utilized. By way of example and not limitation, such a frequency divider can be a sequence (multi-stage) counter or flip-flop 1075, such as the ones shown in FIG. 16, which are provided in multiples of two The frequency division, the output of each stage provides a different frequency, and is provided for one of the next level of the clock signal, and is also fed back to its own input, as shown. As shown, a plurality of frequency systems are then available for output over the line or bus bar 1020, such as: f 0 /2, f 0 /4, etc., to f 0 /2 N . In addition, as shown, the buffer 1085 can also be utilized between the oscillator and the first frequency divider 1005 to provide sufficient voltage to drive the first frequency divider 1005, and can also be utilized in the second The load variation between the stages of the frequency divider 1010 may also affect the state of the signal rise and fall times.

亦應注意的是,各種正反器的運用亦已提供一實質方波,因為任何的實質正弦信號係已經被提供作為時脈給一正反器,該正反器的輸出係接著被拉至一高或低電壓。其它的方波產生器亦可被利用,即如此技藝所習知者或變成習知者。於所示的實施例中,為了維持相位對準,差動信號係透過最後的除頻而維持。在最後的除頻之後,該複數個信號(各具有不同的頻率)然後被形成為方形(於模組1015)以提供實質平均分割(例如50:50)的工作週期,俾使信號於一第一(高)狀態之時間係實質相等於該信號於一第二(低)狀態之時間。It should also be noted that the use of various flip-flops has also provided a substantial square wave, since any substantial sinusoidal signal system has been provided as a clock to a flip-flop, the output of which is then pulled to A high or low voltage. Other square wave generators can also be utilized, i.e., those skilled in the art or become known to those skilled in the art. In the illustrated embodiment, to maintain phase alignment, the differential signal is maintained through the final divide. After the final divide, the plurality of signals (each having a different frequency) are then formed into a square (in module 1015) to provide a substantially average split (eg, 50:50) duty cycle, causing the signal to be The time of a (high) state is substantially equal to the time at which the signal is in a second (low) state.

圖17係描繪根據本發明的教示之一個範例的模式選擇模組的方塊圖。存在有一些情況是不需要高度準確、高性能的參考器(諸如:本發明之一種時脈產生器(100、200或300)),該些情況例如是一種低功率、待命(standby)模式。於此等情況中,根據本發明,並無時脈輸出被提供、或只是一個低功率、降低性能的時脈1105輸出被提供。舉例而言,於相當低的頻率下,一種低性能的環式振盪器係可在低功率消耗下提供適當的效能。如圖17所示,針對此等情況,低功率振盪器1105之輸出係可被選擇(透過多工器1100),且提供作為至其它電路之一時脈輸出。然而,於較高頻率下,該種低效能的振盪器係消耗頗多的功率,典型為顯著超過本發明之振盪器。典型存在有作為頻率的一個函數之一“平滑轉折(break-even)”點,在該點之後,時脈產生器(100、200或300)係提供較高的效能及較低的功率消耗,且可被選擇(透過多工器1100),且被提供作為至其它電路之一時脈輸出。因此,時脈產生器(100、200或300)亦可被利用以提供一低功率模式。Figure 17 is a block diagram depicting a mode selection module in accordance with one example of the teachings of the present invention. There are some cases where a highly accurate, high performance reference device (such as a clock generator (100, 200 or 300) of the present invention) is not required, such as a low power, standby mode. In such cases, in accordance with the present invention, no clock output is provided, or only a low power, reduced performance clock 1105 output is provided. For example, at relatively low frequencies, a low performance ring oscillator can provide adequate performance at low power consumption. As shown in Figure 17, for these situations, the output of the low power oscillator 1105 can be selected (through the multiplexer 1100) and provided as a clock output to one of the other circuits. However, at higher frequencies, such inefficient oscillators consume a significant amount of power, typically significantly exceeding the oscillator of the present invention. Typically there is a "break-even" point as a function of frequency, after which the clock generator (100, 200 or 300) provides higher performance and lower power consumption, It can be selected (through multiplexer 1100) and provided as a clock output to one of the other circuits. Thus, the clock generator (100, 200 or 300) can also be utilized to provide a low power mode.

此外,在利用模式選擇器1110之下,其它的模式係可被選擇,諸如:一種無電力模式,而非只是一低頻率或睡眠模式,因為時脈產生器(100、200或300)係可相當快速重新起動、或諸如是選擇一種脈衝模式,其中該時脈產生器(100、200或300)係以叢發或區間、週期性或非週期性來反覆地停止及重新起動。各種的參考模式係論述於後。In addition, under the mode selector 1110, other modes can be selected, such as: a no power mode, rather than just a low frequency or sleep mode, because the clock generator (100, 200 or 300) can be A fairly quick restart, or such as selecting a pulse mode, wherein the clock generator (100, 200 or 300) is repeatedly stopped and restarted in bursts or intervals, periodic or aperiodic. Various reference modes are discussed later.

明顯對比於先前技藝,此種運用本發明的時脈產生器及/或時序/頻率參考器(100、200或300)之脈衝式時脈係提供電力節省或保存。儘管較多電力可能被消耗於一特定的叢發期間,但是因為該時脈為具有一相當高的頻率,較多的指令係處理於該區間內,隨後在無脈衝或關斷的區間之期間則是沒有或有限的耗電,此造成相較於一種連續運作的時脈而有較高的MIPS/mW。反之,由於先前技藝的時脈之相當長的起動時間與鎖定,該種脈衝式時脈係於先前技藝中造成較多的耗電與較小的效率。Significantly compared to prior art, such a pulsed clock system utilizing the clock generator and/or timing/frequency reference (100, 200 or 300) of the present invention provides power savings or savings. Although more power may be consumed during a particular burst period, because the clock has a relatively high frequency, more commands are processed in the interval and then during the no-pulse or turn-off interval. There is no or limited power consumption, which results in a higher MIPS/mW than a continuously operating clock. Conversely, due to the relatively long start-up time and locking of the prior art clocks, such pulsed clocks have resulted in more power consumption and less efficiency in the prior art.

圖18係描繪根據本發明的教示之用於第二振盪器之一個範例的同步化模組1200的方塊圖。如上所述,時脈產生器及/或時序/頻率參考器(100、200或300)係可提供一參考模式以同步化其它的振盪器或時脈,其可以是低功率或否,諸如:第二振盪器1210(例如:環式、弛張、或相位移振盪器)。來自時脈產生器及/或時序/頻率參考器(100、200或300)之一輸出信號係隨著需要而進一步被除頻以形成複數個可利用的參考頻率,其中一參考頻率係選自此複數個頻率。此係可運用上述的模組而達成,諸如:藉著運用現存的除頻器(例如,220、330、1000)、且接著為提供來自頻率選擇器1050(或205或335)之參考信號。舉例而言,請參照圖3,模式選擇器345係可選擇一參考模式,且提供來自頻率選擇器335之輸出參考信號至一第二振盪器(具有同步化模組)375。諸如PLL或DLL 1205之同步化模組係接著被利用以同步化來自第二振盪器1210之輸出信號至由時脈產生器及/或時序/頻率參考器(100、200或300)所提供之參考信號。除了連續同步化模式之外,一種脈衝式的同步化亦可被提供,其中,時脈產生器及/或時序/頻率參考器(100、200或300)係提供一脈衝式的輸出,且同步化係發生於此等脈衝區間之期間,以作為一同步化區間。18 is a block diagram depicting a synchronization module 1200 for an example of a second oscillator in accordance with the teachings of the present invention. As noted above, the clock generator and/or timing/frequency reference (100, 200 or 300) can provide a reference mode to synchronize other oscillators or clocks, which can be low power or no, such as: A second oscillator 1210 (eg, a ring, relaxation, or phase shift oscillator). An output signal from one of the clock generator and/or the timing/frequency reference (100, 200 or 300) is further divided as needed to form a plurality of available reference frequencies, wherein a reference frequency is selected from This multiple frequency. This can be accomplished using the modules described above, such as by using an existing frequency divider (e.g., 220, 330, 1000), and then providing a reference signal from frequency selector 1050 (or 205 or 335). For example, referring to FIG. 3, the mode selector 345 selects a reference mode and provides an output reference signal from the frequency selector 335 to a second oscillator (with a synchronization module) 375. A synchronization module such as a PLL or DLL 1205 is then utilized to synchronize the output signal from the second oscillator 1210 to the clock generator and/or the timing/frequency reference (100, 200 or 300). Reference signal. In addition to the continuous synchronization mode, a pulsed synchronization can also be provided, wherein the clock generator and/or the timing/frequency reference (100, 200 or 300) provides a pulsed output and is synchronized. The system occurs during these pulse intervals as a synchronization interval.

圖19係描繪根據本發明的教示之一種範例的方法之流程圖,且提供有用的摘要。該種方法係開始於起始步驟1220,諸如:透過時脈產生器及/或時序/頻率參考器(100、200或300)的起動。應注意到的是,儘管於圖19所示為連續的步驟,此等步驟係可以任何的順序發生,且通常可隨著時脈產生器及/或時序/頻率參考器(100、200或300)運作而為同時發生。請參考圖19,具有一諧振頻率之一諧振信號係產生於步驟1225,諸如:透過LC諧振電路405或諧振器310。於步驟1230,諧振頻率係響應於溫度而被調整,諸如:透過一調整電流與頻率的溫度補償器315。於步驟1235,諧振頻率係響應於製程變化而被調整,諸如:透過製程變化補償器320。如上所指出地,步驟1235可被執行為第一校準步驟,接著是步驟1230的溫度調整。於步驟1240,具有諧振頻率之諧振信號係被除頻成為具有對應的複數個頻率之複數個第二信號,其中,該複數個頻率係實質為等於或低於諧振頻率,諸如:透過除頻器330或1000。於步驟1245,一輸出信號係選自該複數個第二信號,舉例而言,諸如透過頻率選擇器335或1050。舉例而言,根據所選擇的實施例或模式,所選擇的輸出信號係可直接被提供作為一個參考信號。19 is a flow chart depicting a method in accordance with an example of the teachings of the present invention and provides a useful summary. The method begins at an initial step 1220, such as by a start of a clock generator and/or a timing/frequency reference (100, 200 or 300). It should be noted that although successive steps are shown in FIG. 19, the steps may occur in any order and may generally be with a clock generator and/or a timing/frequency reference (100, 200 or 300). ) Operational at the same time. Referring to FIG. 19, a resonant signal having a resonant frequency is generated in step 1225, such as through LC resonant circuit 405 or resonator 310. At step 1230, the resonant frequency is adjusted in response to temperature, such as by a temperature compensator 315 that adjusts current and frequency. At step 1235, the resonant frequency is adjusted in response to a process change, such as through process variation compensator 320. As noted above, step 1235 can be performed as a first calibration step followed by a temperature adjustment at step 1230. In step 1240, the resonant signal having the resonant frequency is divided into a plurality of second signals having a corresponding plurality of frequencies, wherein the plurality of frequencies are substantially equal to or lower than the resonant frequency, such as: a frequency divider. 330 or 1000. At step 1245, an output signal is selected from the plurality of second signals, such as, for example, through frequency selector 335 or 1050. For example, depending on the selected embodiment or mode, the selected output signal can be provided directly as a reference signal.

於其它的實施例中,諸如:當輸出信號係一差動信號而非為單端信號,且當諧振信號係一實質正弦的信號時,於步驟1250,該種方法係繼續轉換該差動、實質正弦的信號成為一單端、實質方波的信號,如為需要的話,該方波的信號具有實質為相等的高與低的工作週期,諸如以產生一時脈輸出信號,其例如是運用模組330或1000。於步驟1255,一操作模式亦被選自複數個操作模式,其中,複數個操作模式係可為選自包含一時脈模式、一時序與頻率參考模式、一省電模式、與一脈衝模式之一群組,舉例而言,諸如是運用模式選擇器225或345。於步驟1260,當一參考模式於步驟1255中選出時,該種方法係繼續進行至步驟1265,以響應於輸出信號而同步化一第三信號(例如:來自一第二振盪器),諸如於圖18所示者。在步驟1260或1265之後,於返回步驟1270中,該方法係可結束或重複(繼續)(諸如:藉著時脈產生器及/或時序/頻率參考器(100、200或300)連續運作)。In other embodiments, such as when the output signal is a differential signal rather than a single-ended signal, and when the resonant signal is a substantially sinusoidal signal, in step 1250, the method continues to convert the differential, The substantially sinusoidal signal becomes a single-ended, substantially square wave signal that, if desired, has substantially equal high and low duty cycles, such as to generate a clock output signal, such as a mode of operation. Group 330 or 1000. In step 1255, an operation mode is also selected from a plurality of operation modes, wherein the plurality of operation modes may be one selected from the group consisting of a clock mode, a timing and frequency reference mode, a power saving mode, and a pulse mode. The group, for example, is the application mode selector 225 or 345. In step 1260, when a reference mode is selected in step 1255, the method proceeds to step 1265 to synchronize a third signal (eg, from a second oscillator) in response to the output signal, such as Figure 18 shows. After step 1260 or 1265, in a return to step 1270, the method may end or repeat (continue) (such as continuous operation by a clock generator and/or a timing/frequency reference (100, 200 or 300)) .

此外,概括而言,本發明係提出一種裝置,其包含:一諧振器,其係適配於提供具有一諧振頻率之一第一信號;一耦接至該諧振器的放大器;以及,一頻率控制器(耦接至該諧振器),其係適配於選擇具有複數個頻率之一第一頻率的一諧振頻率。該種裝置亦包括一除頻器(耦接至諧振器),其係適配於除頻具有第一頻率之第一信號成為具有對應的複數個頻率之複數個第二信號,該複數個頻率係實質為等於或低於第一頻率,諸如:藉由除以一個有理數。Moreover, in summary, the present invention provides an apparatus comprising: a resonator adapted to provide a first signal having a resonant frequency; an amplifier coupled to the resonator; and a frequency A controller (coupled to the resonator) adapted to select a resonant frequency having a first frequency of one of a plurality of frequencies. The device also includes a frequency divider (coupled to the resonator) adapted to divide the first signal having the first frequency into a plurality of second signals having a corresponding plurality of frequencies, the plurality of frequencies It is substantially equal to or lower than the first frequency, such as by dividing by a rational number.

該第一信號係可為一差動信號或一單端信號。當第一信號係一差動信號時,該除頻器係更適配於轉換該差動信號成為一單端信號。類似地,當第一信號係一實質正弦的信號時,該除頻器係更適配於轉換該實質正弦的信號成為一實質方波的信號。The first signal can be a differential signal or a single-ended signal. When the first signal is a differential signal, the frequency divider is adapted to convert the differential signal into a single-ended signal. Similarly, when the first signal is a substantially sinusoidal signal, the frequency divider is more adapted to convert the substantially sinusoidal signal into a substantially square wave signal.

在各種的實施例中,該除頻器可包含連續串聯耦接之複數個正反器或計數器,其中,一個所選的正反器或計數器之一輸出係一個先前的正反器或計數器之一頻率除以二;或更為概括而言,該除頻器包含連續串聯耦接之複數個除頻器,其中,在後的除頻器之一輸出相較於在前的除頻器之輸出為具有較低的頻率。該複數個除頻器可為差動、單端、或差動且單端,諸如:差動且隨之以一最終的單端級。該除頻器亦可包括一方波產生器,其為適配於轉換第一信號成為具有一實質相等的高與低的工作週期之一實質方波信號。In various embodiments, the frequency divider can include a plurality of flip-flops or counters coupled in series, wherein one of the selected flip-flops or one of the counters is a previous flip-flop or counter. Dividing a frequency by two; or more generally, the frequency divider comprises a plurality of frequency dividers coupled in series, wherein the output of one of the subsequent frequency dividers is compared to the previous frequency divider The output is at a lower frequency. The plurality of frequency dividers can be differential, single-ended, or differential and single-ended, such as: differential and then with a final single-ended stage. The frequency divider can also include a square wave generator adapted to convert the first signal into a substantially square wave signal having a substantially equal high and low duty cycle.

本發明亦可包括一耦接至該除頻器的頻率選擇器,且為適配於提供來自該複數個第二信號之一輸出信號。該頻率選擇器更可包含一多工器與一突波抑制器。The invention can also include a frequency selector coupled to the frequency divider and adapted to provide an output signal from one of the plurality of second signals. The frequency selector can further include a multiplexer and a surge suppressor.

本發明亦可包括一耦接至該頻率選擇器的模式選擇器,其中,該模式選擇器係適配於提供複數個操作模式,其可為選自包含一時脈模式、一時序與頻率參考模式、一省電模式、與一脈衝模式之一群組。The present invention can also include a mode selector coupled to the frequency selector, wherein the mode selector is adapted to provide a plurality of modes of operation, which can be selected from the group consisting of a clock mode, a timing and frequency reference mode , a power saving mode, and a group of one pulse mode.

針對一參考模式,本發明亦可包括一耦接至模式選擇器的同步化電路;及,一受控振盪器,其係耦接至同步化電路且適配於提供一第三信號;其中,於時序與頻率參考模式中,該模式選擇器係更適配於耦接輸出信號至同步化電路,以控制第三信號之時序與頻率。此同步化電路係可為一延遲鎖定迴路、一相位鎖定迴路、或一注入鎖定電路。For a reference mode, the present invention may also include a synchronization circuit coupled to the mode selector; and a controlled oscillator coupled to the synchronization circuit and adapted to provide a third signal; In the timing and frequency reference mode, the mode selector is further adapted to couple the output signal to the synchronization circuit to control the timing and frequency of the third signal. The synchronization circuit can be a delay locked loop, a phase locked loop, or an injection locking circuit.

在所選的實施例中,該放大器係可為一負互導放大器。該頻率控制器係更可適配於響應溫度而修改通過該負互導放大器之一電流,且可包含響應於溫度之一電流源。此電流源係可具有選自複數個配置之一或多個配置,諸如:包含CTAT、PTAT、與PTAT2 配置之複數個配置。此外,頻率控制器係更可適配於響應一電壓而修改通過該負互導放大器之一電流以選擇該諧振頻率,修改該負互導放大器之一互導以選擇該諧振頻率、或修改通過該負互導放大器之一電流。該頻率控制器亦可包括一電壓隔離器,其係耦接至諧振器且適配於實質隔離該諧振器以免於電壓變化,且可包含一電流鏡,其更可具有一種串級配置。該頻率控制器係可進一步適配於響應製程變化、溫度變化、或電壓變化而修改該諧振器之一電容或一電感。In selected embodiments, the amplifier can be a negative transconductance amplifier. The frequency controller is further adapted to modify the current through one of the negative transconductance amplifiers in response to temperature and may include a current source responsive to one of the temperatures. The current source may have one or more configurations selected from a plurality of configurations, such as a plurality of configurations including CTAT, PTAT, and PTAT 2 configurations. In addition, the frequency controller is further adapted to modify a current through the negative transconductance amplifier to select the resonant frequency in response to a voltage, modify one of the negative transconductance amplifiers to select the resonant frequency, or modify the pass. One of the negative transconductance amplifier currents. The frequency controller can also include a voltage isolator coupled to the resonator and adapted to substantially isolate the resonator from voltage variations, and can include a current mirror, which can further have a cascade configuration. The frequency controller is further adapted to modify a capacitance or an inductance of the resonator in response to a process change, a temperature change, or a voltage change.

該頻率控制器係可具有針對於此等種種功能之各種的實施例,且可更包含:一個適配於儲存第一複數個係數的係數暫存器;以及一第一陣列,其係具有耦接至該係數暫存器及諧振器之複數個可切換的電容性模組,各個可切換的電容性模組係具有一固定電容與一可變電容,各個可切換的電容性模組為響應於該第一複數個係數中之一個對應的係數以在該固定電容與可變電容之間做切換,並且切換各個可變電容至一控制電壓。該複數個可切換的電容性模組係可為二進制加權的,或是具有另一種加權方式。該頻率控制器亦可包括:一第二陣列,其係具有耦接至該係數暫存器之複數個可切換的電阻性模組且更具有一電容性模組,該電容性模組與複數個可切換的電阻性模組係更耦接至一節點以提供該控制電壓,各個可切換的電阻性模組為響應於儲存在該係數暫存器中之第二複數個係數的一個對應的係數,以切換該可切換的電阻性模組至該控制電壓節點;以及一溫度相依的電流源,其係為透過一電流鏡耦接至該第二陣列。The frequency controller can have various embodiments for such various functions, and can further include: a coefficient register adapted to store the first plurality of coefficients; and a first array coupled Connected to the plurality of switchable capacitive modules of the coefficient register and the resonator, each switchable capacitive module has a fixed capacitor and a variable capacitor, and each switchable capacitive module is responsive A coefficient corresponding to one of the first plurality of coefficients is switched between the fixed capacitor and the variable capacitor, and each variable capacitor is switched to a control voltage. The plurality of switchable capacitive modules can be binary weighted or have another weighting method. The frequency controller may further include: a second array having a plurality of switchable resistive modules coupled to the coefficient register and further comprising a capacitive module, the capacitive module and the plurality The switchable resistive module is further coupled to a node to provide the control voltage, and each switchable resistive module is responsive to a corresponding one of the second plurality of coefficients stored in the coefficient register a coefficient to switch the switchable resistive module to the control voltage node; and a temperature dependent current source coupled to the second array via a current mirror.

該頻率控制器亦可包含一個製程變化補償器,其係耦接至該諧振器且適配於響應製程變化來修改該諧振頻率。在一個範例的實施例中,該製程變化補償器可包括:一個適配於儲存複數個係數的係數暫存器;以及一個具有複數個耦接至該係數暫存器以及該諧振器之可切換的電容性模組之陣列,每個可切換的電容性模組係具有一個第一固定的電容以及一個第二固定的電容,每個可切換的電容性模組係響應於該複數個係數中之一個對應的係數以在該第一固定的電容以及該第二固定的電容之間做切換。該複數個可切換的電容性模組可以是二進制加權的、或是具有其它的加權方式。The frequency controller can also include a process variation compensator coupled to the resonator and adapted to modify the resonant frequency in response to process variations. In an exemplary embodiment, the process variation compensator can include: a coefficient register adapted to store a plurality of coefficients; and a switchable plurality of coupled to the coefficient register and the resonator An array of capacitive modules, each switchable capacitive module having a first fixed capacitance and a second fixed capacitance, each switchable capacitive module being responsive to the plurality of coefficients A corresponding coefficient is switched between the first fixed capacitance and the second fixed capacitance. The plurality of switchable capacitive modules can be binary weighted or have other weighting methods.

在另一範例的實施例中,該製程變化補償器可包括:一個適配於儲存複數個係數的係數暫存器;以及一個具有複數個耦接至該係數暫存器以及該諧振器之可切換的可變的電容性模組之陣列,每個可切換的可變的電容性模組係響應於該複數個係數中之一個對應的係數以在一個第一電壓以及一個第二電壓之間做切換。該複數個可切換的可變的電容性模組亦可以是二進制加權的、或是具有其它的加權方式。In another exemplary embodiment, the process variation compensator can include: a coefficient register adapted to store a plurality of coefficients; and a plurality of coupled to the coefficient register and the resonator An array of switched variable capacitive modules, each switchable variable capacitive module responsive to a corresponding one of the plurality of coefficients to be between a first voltage and a second voltage Do the switching. The plurality of switchable variable capacitive modules can also be binary weighted or have other weighting methods.

本發明亦可包含一個頻率校準模組,其係耦接至該頻率控制器且適配於響應一個參考信號來修改該諧振頻率。例如,該頻率校準模組可包含一個耦接至該頻率控制器的除頻器,該除頻器係適配於轉換一個從具有該第一頻率的第一信號導出之輸出信號成為一較低的頻率,以提供一個除頻後的信號;一個耦接至該除頻器的頻率偵測器,該頻率偵測器係適配於比較該參考信號與該除頻後的信號並且提供一或多個上信號或是下信號;以及一個耦接至該頻率偵測器的脈衝計數器,該脈衝計數器係適配於判斷在該一或多個上信號或是下信號之間的差值,作為在該輸出信號以及該參考信號之間的差值之一指示者。The invention can also include a frequency calibration module coupled to the frequency controller and adapted to modify the resonant frequency in response to a reference signal. For example, the frequency calibration module can include a frequency divider coupled to the frequency controller, the frequency divider being adapted to convert an output signal derived from the first signal having the first frequency to a lower level. Frequency to provide a frequency-divided signal; a frequency detector coupled to the frequency divider, the frequency detector is adapted to compare the reference signal with the frequency-divided signal and provide one or a plurality of upper signals or lower signals; and a pulse counter coupled to the frequency detector, the pulse counter adapted to determine a difference between the one or more upper signals or the lower signals, as One of the difference between the output signal and the reference signal is indicated.

運用於本發明之諧振器係可包含耦接以形成一LC諧振電路之一電感器(L)與一電容器(C),該LC諧振電路係具有複數種LC諧振電路配置中之一種所選的配置,諸如:串聯、並聯、等等,且可包括其它的構件。於其它實施例中,該諧振器係可選自一群組,其包含:一陶瓷諧振器、一機械諧振器、一微機電諧振器、與一薄膜體聲波諧振器,或是電氣等效於一電感器(L)耦接至一電容器(C)之任何其它的諧振器。The resonator system used in the present invention may include an inductor (L) coupled to one of an LC resonant circuit and a capacitor (C) having a selected one of a plurality of LC resonant circuit configurations. Configurations such as: series, parallel, etc., and may include other components. In other embodiments, the resonator may be selected from the group consisting of: a ceramic resonator, a mechanical resonator, a microelectromechanical resonator, and a film bulk acoustic resonator, or electrically equivalent to An inductor (L) is coupled to any other resonator of a capacitor (C).

例如,該諧振器典型是包括一或多個電感器及電容器,其係構成一或多個LC-諧振電路或是LC諧振器。在第一實施例中,一種雙重平衡的差動LC振盪器拓撲結構係被利用。在其它的範例實施例中,差動或單端LC振盪器拓撲結構都可被利用,例如,單端Colpitts LC振盪器、單端Hartley LC振盪器、差動Colpitts LC振盪器(共基極與共集極的兩種形式)、差動Hartley LC振盪器(也是共基極與共集極的兩種形式)、單端Pierce LC振盪器、正交振盪器(例如,由至少兩個雙重平衡的差動LC振盪器所構成)、或是主動式電感器LC振盪器(其可被實施為差動或是單端的)。其它的目前為已知的或是將會變成己知的LC振盪器拓撲結構都被視為等同的且在本發明的範疇之內。For example, the resonator typically includes one or more inductors and capacitors that form one or more LC-resonant circuits or LC resonators. In the first embodiment, a double balanced differential LC oscillator topology is utilized. In other example embodiments, a differential or single-ended LC oscillator topology can be utilized, such as a single-ended Colpitts LC oscillator, a single-ended Hartley LC oscillator, a differential Colpitts LC oscillator (with a common base and Two forms of common collectors), differential Hartley LC oscillators (also two forms of common base and common collector), single-ended Pierce LC oscillators, quadrature oscillators (for example, by at least two double balances) The differential LC oscillator is constructed, or the active inductor LC oscillator (which can be implemented as differential or single-ended). Other LC oscillator topologies that are currently known or will become known are considered equivalent and within the scope of the present invention.

本發明之裝置係可利用作為一種時序及頻率參考器、或作為一種時脈產生器。此外,本發明亦可包括:一第二振盪器(諸如:環式、弛張、或相位移振盪器),其係提供一第二振盪器輸出信號;以及,一模式選擇器,其係耦接至該頻率控制器及第二振盪器,該模式選擇器係適配於切換至第二振盪器輸出信號,以提供一省電模式。另外的操作模式係可由耦接至該頻率控制器之一模式選擇器所提供,該模式選擇器係可適配於週期性起始及停止該諧振器以提供一脈衝式的輸出信號,或是適配於選擇性起始及停止該諧振器而提供一省電模式。The apparatus of the present invention can be utilized as a timing and frequency reference, or as a clock generator. In addition, the present invention may also include: a second oscillator (such as a ring, relaxation, or phase shift oscillator) that provides a second oscillator output signal; and a mode selector coupled To the frequency controller and the second oscillator, the mode selector is adapted to switch to the second oscillator output signal to provide a power saving mode. The additional mode of operation may be provided by a mode selector coupled to the frequency controller, the mode selector being adapted to periodically initiate and stop the resonator to provide a pulsed output signal, or A power saving mode is provided adapted to selectively initiate and stop the resonator.

於另一個選擇的實施例中,本發明之裝置係包含:一諧振器,其係適配於提供具有一諧振頻率之一第一信號;一耦接至該諧振器的放大器;一溫度補償器,其係耦接至該放大器及諧振器,該溫度補償器係適配於響應溫度而修改該諧振頻率;一製程變化補償器,其係耦接至該諧振器,該製程變化補償器係適配於響應製程變化而修改該諧振頻率;一除頻器,其係耦接至該諧振器,該除頻器係適配於除頻具有該諧振頻率之第一信號成為具有對應的複數個頻率之複數個第二信號,該複數個頻率係實質為等於或低於該諧振頻率;以及,一頻率選擇器,其係耦接至該除頻器,該頻率選擇器係適配於提供來自該複數個第二信號之一輸出信號。In another selected embodiment, the apparatus of the present invention comprises: a resonator adapted to provide a first signal having a resonant frequency; an amplifier coupled to the resonator; a temperature compensator The system is coupled to the amplifier and the resonator, the temperature compensator is adapted to modify the resonant frequency in response to temperature; a process variation compensator coupled to the resonator, the process variation compensator is adapted And modulating the resonant frequency to modify the resonant frequency; a frequency divider is coupled to the resonator, the frequency divider is adapted to divide the first signal having the resonant frequency to have a corresponding plurality of frequencies a plurality of second signals, the plurality of frequencies being substantially equal to or lower than the resonant frequency; and a frequency selector coupled to the frequency divider, the frequency selector adapted to provide from the One of a plurality of second signals outputs a signal.

於另一個選擇的實施例中,本發明之裝置係產生一時脈信號,且包含:一LC諧振器,其係適配於提供具有一諧振頻率之一差動、實質正弦的第一信號;一負互導放大器,其係耦接至該LC諧振器;一溫度補償器,其係耦接至該負互導放大器及LC諧振器,該溫度補償器係適配於響應溫度而修改在該負互導放大器中之一電流,且進一步適配於響應溫度而修改該LC諧振器之一電容;一製程變化補償器,其係耦接至該LC諧振器,該製程變化補償器係適配於響應製程變化而修改該LC諧振器之電容;一除頻器,其係耦接至該諧振器,該除頻器係適配於轉換及除頻具有該諧振頻率之第一信號成為具有對應的複數個頻率之複數個單端、實質方波的第二信號,該複數個頻率係實質為等於或低於該諧振頻率,且各個第二信號係具有一實質相等的高與低的工作週期;以及一頻率選擇器,其係耦接至該除頻器,該頻率選擇器係適配於提供來自該複數個第二信號之一輸出信號。In another selected embodiment, the apparatus of the present invention generates a clock signal and includes: an LC resonator adapted to provide a first signal having a differential, substantially sinusoidal shape having a resonant frequency; a negative transconductance amplifier coupled to the LC resonator; a temperature compensator coupled to the negative transconductance amplifier and the LC resonator, the temperature compensator adapted to modify the temperature in response to the temperature a current in the transconductance amplifier, and further adapted to modify a capacitance of the LC resonator in response to the temperature; a process variation compensator coupled to the LC resonator, the process variation compensator adapted to Modulating the capacitance of the LC resonator in response to a process change; a frequency divider coupled to the resonator, the frequency divider being adapted to convert and divide the first signal having the resonant frequency to have a corresponding a plurality of single-ended, substantially square-wave second signals of a plurality of frequencies, the plurality of frequencies being substantially equal to or lower than the resonant frequency, and each of the second signals having a substantially equal high and low duty cycle; And a frequency Selector, which line is coupled to the frequency divider, the frequency selector adapted to provide a system the plurality of second signal from one of the output signal.

由前文可知,在未脫離本發明之新穎概念的精神與範疇之下可實施諸多的變化與修改。將瞭解到的是,關於本文所說明之特定方法與裝置並非打算作為限制或是應該被推斷為限制用的。而是,落入申請專利範圍之範疇內的所有該等修改係欲由所附的申請專利範圍所涵蓋。It will be apparent that various changes and modifications can be made without departing from the spirit and scope of the invention. It will be appreciated that the specific methods and apparatus described herein are not intended to be limiting or should be construed as limiting. Rather, all such modifications as fall within the scope of the appended claims are intended to be

100...時脈產生器及/或時序/頻率參考器100. . . Clock generator and/or timing/frequency reference

120...介面(I/O電路)120. . . Interface (I/O circuit)

125、135...匯流排125, 135. . . Busbar

140、145...線路140, 145. . . line

150...系統150. . . system

180...第二電路180. . . Second circuit

200...裝置200. . . Device

205...頻率選擇器205. . . Frequency selector

210...振盪器210. . . Oscillator

215...頻率控制器215. . . Frequency controller

220...除頻器220. . . Frequency divider

225...模式選擇器225. . . Mode selector

250...線路250. . . line

300...時脈產生器及/或時序/頻率參考器300. . . Clock generator and/or timing/frequency reference

305...持續放大器305. . . Continuous amplifier

310...諧振器310. . . Resonator

315...溫度補償器(調變器)315. . . Temperature compensator

320...製程變化補償器(調變器)320. . . Process change compensator (modulator)

325...頻率校準模組325. . . Frequency calibration module

330...除頻器與方波產生器330. . . Frequency divider and square wave generator

335...輸出頻率選擇器335. . . Output frequency selector

340...係數暫存器340. . . Coefficient register

345...模式選擇器345. . . Mode selector

340...頻率控制器340. . . Frequency controller

350...線路350. . . line

355...電壓隔離器355. . . Voltage isolator

360...諧振頻率選擇器360. . . Resonant frequency selector

365...老化(時間)變化補償器(調變器)365. . . Aging (time) change compensator (modulator)

380...電壓變化補償器(調變器)380. . . Voltage change compensator

385...感測器385. . . Sensor

390...類比至數位轉換器390. . . Analog to digital converter

395...振盪器395. . . Oscillator

399...低延遲的起動模組399. . . Low delay starter module

405...諧振器405. . . Resonator

410...負互導放大器410. . . Negative transconductance amplifier

415...I(T)(yI(x))產生器415. . . I(T)(yI(x)) generator

420...溫度響應式(溫度相依的)頻率(f0 (T))補償模組420. . . Temperature responsive (temperature dependent) frequency (f 0 (T)) compensation module

425...製程變化補償模組425. . . Process variation compensation module

430...頻率校準模組430. . . Frequency calibration module

435...電感器435. . . Inductor

440...電容器440. . . Capacitor

445、450...電阻445, 450. . . resistance

455...暫存器455. . . Register

460...模組460. . . Module

465...暫存器465. . . Register

470、475...節點(線路)470, 475. . . Node (line)

470A 、475A ...節點470 A, 475 A. . . node

470B 、475B ...節點470 B , 475 B. . . node

470C 、475C ...節點470 C , 475 C. . . node

470D 、475D ...節點470 D , 475 D . . . node

470E 、475E ...節點470 E , 475 E. . . node

470F 、475F ...節點470 F , 475 F. . . node

470G 、475G ...節點470 G, 475 G. . . node

480...電壓控制器480. . . Voltage controller

485...模組485. . . Module

495...暫存器495. . . Register

500...LC諧振電路500. . . LC resonant circuit

505...放大器505. . . Amplifier

510...電壓隔離器(電流鏡)510. . . Voltage isolator (current mirror)

515...溫度響應式電流產生器(I(x))515. . . Temperature responsive current generator (I(x))

520...電流鏡520. . . Current mirror

520A、520B...串級拓撲結構520A, 520B. . . Cascade topology

525A、525B...電晶體525A, 525B. . . Transistor

530、530A、530B...電流鏡530, 530A, 530B. . . Current mirror

550...LC諧振電路550. . . LC resonant circuit

570...分流電容器570. . . Shunt capacitor

615...可變電容器(變容器)615. . . Variable capacitor

620...固定電容器620. . . Fixed capacitor

625...節點625. . . node

635...第一可控制(受控)電容模組635. . . First controllable (controlled) capacitor module

640、6400 、6401 ~640( w 1 ) ...可切換的電容性模組 640,640 0, 640 1 ~ 640 ( w - 1). . . Switchable capacitive module

650...電壓控制模組650. . . Voltage control module

655...電流產生器655. . . Current generator

670...電流鏡670. . . Current mirror

675...可切換的電阻性模組(分支)675. . . Switchable resistive module (branch)

680...固定的電容性模組(分支)680. . . Fixed capacitive module (branch)

685...電阻器685. . . Resistor

720...第二固定電容720. . . Second fixed capacitor

740...開關電晶體740. . . Switching transistor

750...第一固定的電容750. . . First fixed capacitance

760...第一製程變化補償模組760. . . First process variation compensation module

850...變容器850. . . Variable container

860...第二製程變化補償模組860. . . Second process change compensation module

865...可切換的可變電容性模組865. . . Switchable variable capacitance module

900...頻率校準模組900. . . Frequency calibration module

905...數位脈衝計數器905. . . Digital pulse counter

910...數位除頻器910. . . Digital frequency divider

915...頻率偵測器915. . . Frequency detector

920...參考頻率920. . . Reference frequency

930...校準暫存器930. . . Calibration register

1000...除頻器與方波產生器1000. . . Frequency divider and square wave generator

1005...第一除頻器1005. . . First frequency divider

1010...第二除頻器1010. . . Second frequency divider

1020...線路(匯流排)1020. . . Line (bus bar)

1050...非同步頻率選擇器1050. . . Asynchronous frequency selector

1055...選擇線路1055. . . Select line

1060...線路1060. . . line

1065、1070...DFF1065, 1070. . . DFF

1075...計數器(正反器)1075. . . Counter (positive and reverse)

1080...突波抑制模組1080. . . Surge suppression module

1085...緩衝器1085. . . buffer

1100...多工器1100. . . Multiplexer

1105...時脈1105. . . Clock

1200...同步化模組1200. . . Synchronization module

1205...PLL(DLL)1205. . . PLL (DLL)

1210...第二振盪器1210. . . Second oscillator

1220、1225、1230、1235、1240、1245、1250、1255、1260、1265、1270...步驟1220, 1225, 1230, 1235, 1240, 1245, 1250, 1255, 1260, 1265, 1270. . . step

1300...陣列1300. . . Array

1305、13050 、13051 ~1305( a 1 ) ...受控阻抗模組1305, 1305 0 , 1305 1 ~ 1305 ( a - 1 ) . . . Controlled impedance module

1310...可變的電抗1310. . . Variable reactance

1315...固定的電抗1315. . . Fixed reactance

1320...虛設電抗1320. . . Virtual reactance

1400...裝置1400. . . Device

1415...頻率控制器1415. . . Frequency controller

1420...互導調變器1420. . . Mutual transconductor

1425...可變的參數調變器(控制器)1425. . . Variable parameter modulator (controller)

1430...製程(其它參數)調變器(補償器)1430. . . Process (other parameters) modulator (compensator)

1435...係數暫存器1435. . . Coefficient register

1440...感測器1440. . . Sensor

1445...類比至數位(A/D)轉換器1445. . . Analog to digital (A/D) converter

1450...控制邏輯區塊1450. . . Control logic block

1455...電壓補償器1455. . . Voltage compensator

1460...老化變化補償器1460. . . Aging change compensator

1500、1501、1505...受控電容模組1500, 1501, 1505. . . Controlled capacitor module

1515、1515A 0 ~1515B ( g 1 ) ...可變的電容1515, 1515 A 0 ~ 1515 B ( g - 1 ) . . . Variable capacitance

15200 ~1520( g 1 ) ...開關1520 0 ~ 1520 ( g - 1 ) . . . switch

1600...第二電壓控制模組1600. . . Second voltage control module

1605、16050 、16051 ~1605( k 1 ) ...電阻性模組1605, 1605 0 , 1605 1 ~ 1605 ( k - 1 ) . . . Resistive module

1610、16100 、16101 ~1610( k 1 ) ...電晶體1610, 1610 0 , 1610 1 ~ 1610 ( k - 1 ) . . . Transistor

16200 、16201 ~1620( k 1 ) ...電阻器1620 0 , 1620 1 ~ 1620 ( k - 1 ) . . . Resistor

1650...可切換的電阻性模組1650. . . Switchable resistive module

1700、1705、1710、1715、1720、1725、1730...頻率響應1700, 1705, 1710, 1715, 1720, 1725, 1730. . . Frequency response

1800...陣列1800. . . Array

1805、18050 ~1805( n 1 ) ...受控電抗模組1805, 1805 0 ~ 1805 ( n - 1 ) . . . Controlled reactance module

1810...控制邏輯(控制迴路)1810. . . Control logic

1815...感測器1815. . . Sensor

1820...線路(節點)1820. . . Line (node)

1900...第三電壓控制模組1900. . . Third voltage control module

1905、19050 、19051 ~1905( n 1 ) ...電阻性模組1905, 1905 0 , 1905 1 ~ 1905 ( n - 1 ) . . . Resistive module

1915、19150 、19151 ~1915( n 1 ) ...電晶體1915, 1915 0 , 1915 1 ~ 1915 ( n - 1 ) . . . Transistor

19200 、19201 ~1920( n 1 ) ...電阻器1920 0 , 1920 1 ~ 1920 ( n - 1 ) . . . Resistor

1930...開關1930. . . switch

1950...控制信號(係數)1950. . . Control signal (coefficient)

1955...電流源1955. . . Battery

2000...電壓變化補償模組2000. . . Voltage variation compensation module

2040、2040A 、2040B 、2040C ~2040K ...電阻器2040, 2040 A , 2040 B , 2040 C ~ 2040 K. . . Resistor

2050...第四電壓控制模組2050. . . Fourth voltage control module

2055、2055A 、2055B 、2055C ~2055K ...電流源 2055,2055 A, 2055 B, 2055 C ~ 2055 K. . . Battery

2060、2060A 、2060B 、2060C ~2060K ...固定的電壓模組2060, 2060 A , 2060 B , 2060 C ~ 2060 K. . . Fixed voltage module

2100...電阻性控制模組2100. . . Resistive control module

2105、2105M 、2105N 、2105O ~2105U ...電阻器2105, 2105 M , 2105 N , 2105 O ~ 2105 U. . . Resistor

2110、2110M 、2110N 、2110O ~2110U ...電晶體(開關) 2110,2110 M, 2110 N, 2110 O ~ 2110 U. . . Transistor (switch)

2115、2115M 、2115N 、2115O ~2115U ...電阻性模組2115, 2115 M , 2115 N , 2115 O ~ 2115 U. . . Resistive module

2200...老化變化補償器2200. . . Aging change compensator

2205...電壓感測器2205. . . Voltage sensor

2210...電阻感測器2210. . . Resistance sensor

2220...多工器2220. . . Multiplexer

2225...ADC2225. . . ADC

2230...暫存器(記憶體)2230. . . Register (memory)

2235...比較器2235. . . Comparators

2240...記憶體2240. . . Memory

2250...裝置2250. . . Device

2251、2252...電晶體2251, 2252. . . Transistor

2253、2254...電感器2253, 2254. . . Inductor

2257...電感器2257. . . Inductor

2260...LC振盪器2260. . . LC oscillator

2270...裝置2270. . . Device

2271、2272...電晶體2271, 2272. . . Transistor

2273、2274...電感器2273, 2274. . . Inductor

2277...電感器2277. . . Inductor

2280...LC振盪器2280. . . LC oscillator

2300...裝置2300. . . Device

2305...LC振盪器2305. . . LC oscillator

2310、2315...電容器2310, 2315. . . Capacitor

2320...電感器2320. . . Inductor

2325...電晶體2325. . . Transistor

2330...電阻2330. . . resistance

2400...裝置2400. . . Device

2405...LC振盪器2405. . . LC oscillator

2410、2415...電容器2410, 2415. . . Capacitor

2420...電感器2420. . . Inductor

2425、2426...電晶體2425, 2426. . . Transistor

2430...電容器2430. . . Capacitor

2500...裝置2500. . . Device

2505...LC振盪器2505. . . LC oscillator

2510、2515...電容器2510, 2515. . . Capacitor

2520...電感器2520. . . Inductor

2530...電容器2530. . . Capacitor

2600...裝置2600. . . Device

2605...LC振盪器2605. . . LC oscillator

2610...電容器2610. . . Capacitor

2615...電感器2615. . . Inductor

2625...電晶體2625. . . Transistor

2630...電阻2630. . . resistance

2700...裝置2700. . . Device

2705、2715...LC振盪器2705, 2715. . . LC oscillator

2720...電感性負載2720. . . Inductive load

2725...反相器2725. . . inverter

2730...電阻2730. . . resistance

2910...主動式電感器2910. . . Active inductor

當配合構成本說明書之一部分的所附圖式與實例來參照揭示內容時,本發明之目的、特徵與優點係將更為容易理解,其中相同的參考圖號係被用來識別在各個圖式中相同或類似的構件,其中:圖1係描繪根據本發明的教示之第一範例的系統實施例之方塊圖。The objects, features, and advantages of the present invention will be more readily understood from the aspects of the appended claims <RTIgt; The same or similar components, wherein: Figure 1 is a block diagram depicting a system embodiment in accordance with a first example of the teachings of the present invention.

圖2係描繪根據本發明的教示之第一範例的裝置實施例之方塊圖。2 is a block diagram depicting an embodiment of an apparatus in accordance with a first example of the teachings of the present invention.

圖3係描繪根據本發明的教示之第二範例的裝置實施例之方塊圖。3 is a block diagram depicting an embodiment of an apparatus in accordance with a second example of the teachings of the present invention.

圖4係描繪根據本發明的教示之範例的頻率控制器、振盪器與頻率校準實施例的高階示意方塊圖。4 is a high level schematic block diagram depicting a frequency controller, oscillator, and frequency calibration embodiment in accordance with an example of the teachings of the present invention.

圖5A係描繪注入一個具有一特定的濾波器響應的振盪器之電流的諧波內容所造成的振盪器電壓波形(頻率)失真的範例圖形。Figure 5A is a diagram showing an exemplary graph of oscillator voltage waveform (frequency) distortion caused by the harmonic content of a current injected into an oscillator having a particular filter response.

圖5B係描繪在圖5A中所示的振盪器電壓波形(頻率)為溫度的一個函數之範例圖形。Figure 5B is an exemplary graph depicting the oscillator voltage waveform (frequency) shown in Figure 5A as a function of temperature.

圖5C係描繪振盪器頻率為持續放大器的互導的一個函數之範例圖形。Figure 5C is a diagram showing an example of a function of the oscillator frequency as a function of the mutual conductance of the sustain amplifier.

圖6係描繪根據本發明的教示之第一範例的負互導放大器、溫度響應式電流產生器(I(T))、與LC諧振電路振盪器實施例的電路圖。6 is a circuit diagram depicting a negative transconductance amplifier, a temperature responsive current generator (I(T)), and an LC resonant circuit oscillator embodiment in accordance with a first example of the teachings of the present invention.

圖7A係描繪根據本發明的教示之範例的溫度響應式CTAT電流產生器之電路圖。7A is a circuit diagram depicting a temperature responsive CTAT current generator in accordance with an example of the teachings of the present invention.

圖7B係描繪根據本發明的教示之範例的溫度響應式PTAT電流產生器之電路圖7B is a circuit diagram depicting a temperature responsive PTAT current generator in accordance with an example of the teachings of the present invention.

圖7C係描繪根據本發明的教示之範例的溫度響應式PTAT2 電流產生器之電路圖。7C is a circuit diagram depicting a temperature responsive PTAT 2 current generator in accordance with an example of the teachings of the present invention.

圖7D係描繪根據本發明的教示之具有所選的CTAT、PTAT以及PTAT2 配置之範例的可選擇且具有擴充性的溫度響應式電流產生器之電路圖。7D is a circuit diagram depicting an alternative and scalable temperature responsive current generator having an example of selected CTAT, PTAT, and PTAT 2 configurations in accordance with the teachings of the present invention.

圖8係描繪根據本發明的教示之第二範例的負互導放大器、溫度響應式電流產生器(I(T))以及LC諧振電路振盪器實施例之電路與方塊圖。8 is a circuit and block diagram depicting an embodiment of a negative transconductance amplifier, a temperature responsive current generator (I(T)), and an LC resonant circuit oscillator in accordance with a second example of the teachings of the present invention.

圖9係描繪根據本發明的教示之被利用在一個頻率-溫度補償模組中之範例的第一受控(或是可控制的)電容模組之電路圖。9 is a circuit diagram depicting a first controlled (or controllable) capacitive module of an example utilized in a frequency-temperature compensation module in accordance with the teachings of the present invention.

圖10係描繪根據本發明的教示之被利用在一個頻率-溫度補償模組中之範例的第一電壓控制模組之電路圖。10 is a circuit diagram depicting a first voltage control module that is utilized in an example of a frequency-temperature compensation module in accordance with the teachings of the present invention.

圖11係描繪根據本發明的教示之範例的第一製程變化補償模組之電路圖。11 is a circuit diagram depicting a first process variation compensation module in accordance with an example of the teachings of the present invention.

圖12係描繪根據本發明的教示之範例的第二製程變化補償模組之電路圖。12 is a circuit diagram depicting a second process variation compensation module in accordance with an example of the teachings of the present invention.

圖13係描繪根據本發明的教示之範例的頻率校準模組之方塊圖。13 is a block diagram depicting a frequency calibration module in accordance with an example of the teachings of the present invention.

圖14係描繪根據本發明的教示之範例的除頻器、方波產生器、非同步頻率選擇器與突波抑制模組之方塊圖。14 is a block diagram depicting a frequency divider, a square wave generator, a non-synchronous frequency selector, and a surge suppression module in accordance with an example of the teachings of the present invention.

圖15A與15B係描繪根據本發明的教示之範例的低延遲頻率切換之圖形。15A and 15B are diagrams depicting low latency frequency switching in accordance with an example of the teachings of the present invention.

圖16係描繪根據本發明的教示之範例的除頻器之方塊圖。Figure 16 is a block diagram depicting a frequency divider in accordance with an example of the teachings of the present invention.

圖17係描繪根據本發明的教示之範例的電源模式選擇模組之方塊圖。17 is a block diagram depicting a power mode selection module in accordance with an example of the teachings of the present invention.

圖18係描繪根據本發明的教示之用於一個第二振盪器之範例的同步化模組之方塊圖。18 is a block diagram depicting a synchronization module for an example of a second oscillator in accordance with the teachings of the present invention.

圖19係描繪根據本發明的教示之範例的方法之流程圖。19 is a flow chart depicting a method in accordance with an example of the teachings of the present invention.

圖20係描繪根據本發明的教示之被利用在一個補償模組中之範例的受控阻抗模組之方塊與電路圖。20 is a block and circuit diagram depicting an example of a controlled impedance module utilized in a compensation module in accordance with the teachings of the present invention.

圖21係描繪根據本發明的教示之第一範例的頻率控制器與裝置之方塊圖。21 is a block diagram depicting a frequency controller and apparatus in accordance with a first example of the teachings of the present invention.

圖22係描繪根據本發明的教示之被利用在一個頻率-溫度補償模組中之範例的第二受控電容模組之電路圖。22 is a circuit diagram depicting a second controlled capacitance module of an example utilized in a frequency-temperature compensation module in accordance with the teachings of the present invention.

圖23係描繪根據本發明的教示之被利用在一個頻率-溫度補償模組中之範例的第二電壓控制模組之電路圖。23 is a circuit diagram depicting a second voltage control module that is utilized in an example of a frequency-temperature compensation module in accordance with the teachings of the present invention.

圖24係描繪根據本發明的教示之響應於溫度變化的範例的頻率控制之圖。Figure 24 is a diagram depicting an example of frequency control in response to temperature changes in accordance with the teachings of the present invention.

圖25係描繪根據本發明的教示之第二範例的頻率控制器與裝置之方塊圖。Figure 25 is a block diagram depicting a frequency controller and apparatus in accordance with a second example of the teachings of the present invention.

圖26係描繪根據本發明的教示之被利用在一個參數補償模組中之範例的第三受控電容模組以及範例的第三電壓控制模組之電路圖。26 is a circuit diagram depicting a third controlled capacitance module and an exemplary third voltage control module of an example utilized in a parameter compensation module in accordance with the teachings of the present invention.

圖27係描繪根據本發明的教示之範例的電壓變化補償模組之電路與方塊圖。27 is a circuit and block diagram depicting a voltage variation compensation module in accordance with an example of the teachings of the present invention.

圖28係描繪根據本發明的教示之被利用在頻率與製程補償模組中之範例的第四電壓控制模組之電路圖。28 is a circuit diagram depicting a fourth voltage control module that is utilized in an example of a frequency and process compensation module in accordance with the teachings of the present invention.

圖29係描繪根據本發明的教示之範例的電阻性控制模組之電路圖。29 is a circuit diagram depicting a resistive control module in accordance with an example of the teachings of the present invention.

圖30係描繪根據本發明的教示之範例的老化變化補償器之方塊圖。30 is a block diagram depicting an aging change compensator in accordance with an example of the teachings of the present invention.

圖31係描繪根據本發明的教示之可被利用的第三範例的LC振盪器之電路圖。31 is a circuit diagram depicting an LC oscillator of a third example that can be utilized in accordance with the teachings of the present invention.

圖32係描繪根據本發明的教示之可被利用的第四範例的LC振盪器之電路圖。32 is a circuit diagram depicting an LC oscillator of a fourth example that can be utilized in accordance with the teachings of the present invention.

圖33係描繪根據本發明的教示之可被利用的第五範例的LC振盪器之電路圖。Figure 33 is a circuit diagram depicting an LC oscillator of a fifth example that can be utilized in accordance with the teachings of the present invention.

圖34係描繪根據本發明的教示之可被利用的第六範例的LC振盪器之電路圖。Figure 34 is a circuit diagram depicting an LC oscillator of a sixth example that can be utilized in accordance with the teachings of the present invention.

圖35係描繪根據本發明的教示之可被利用的第七範例的LC振盪器之電路圖。Figure 35 is a circuit diagram depicting an LC oscillator of a seventh example that can be utilized in accordance with the teachings of the present invention.

圖36係描繪根據本發明的教示之可被利用的第八範例的LC振盪器之電路圖。36 is a circuit diagram depicting an LC oscillator of an eighth example that can be utilized in accordance with the teachings of the present invention.

圖37係描繪根據本發明的教示之可被利用的第九範例的LC振盪器之電路圖。37 is a circuit diagram depicting an LC oscillator of a ninth example that can be utilized in accordance with the teachings of the present invention.

圖38係描繪根據本發明的教示之一個主動式電感器實施例的方塊圖。38 is a block diagram depicting an embodiment of an active inductor in accordance with the teachings of the present invention.

420...溫度響應式(溫度相依的)頻率(f0 (T))補償模組420. . . Temperature responsive (temperature dependent) frequency (f 0 (T)) compensation module

425...製程變化補償模組425. . . Process variation compensation module

430...頻率校準模組430. . . Frequency calibration module

455、465...暫存器455, 465. . . Register

460...模組460. . . Module

470A 、475A ...節點470 A , 475 A . . . node

480...電壓控制器480. . . Voltage controller

485...模組485. . . Module

495...暫存器495. . . Register

530A、530B...電流鏡530A, 530B. . . Current mirror

2250...裝置2250. . . Device

2251、2252...電晶體2251, 2252. . . Transistor

2253、2254...電感器2253, 2254. . . Inductor

2257...電感器2257. . . Inductor

2260...LC振盪器2260. . . LC oscillator

Claims (19)

一種用於提供一個第一參考信號之裝置,該裝置係包括:一個簡諧振盪器,其係包括一個電感器以及一個電容器,該簡諧振盪器係適配於提供該具有一第一頻率的第一參考信號,並且運作在不鎖定至一個外部的參考信號之下;複數個電阻性模組,其係適配於產生複數個電壓控制信號;複數個可切換的受控電抗模組,其係耦接至該簡諧振盪器以及該複數個電阻性模組,該複數個電抗模組的每個電抗模組係適配於響應該複數個電壓控制信號中之一個對應的電壓控制信號,來提供一所選的電抗以修改該第一頻率;一個耦接至該複數個開關的係數暫存器,該係數暫存器係適配於儲存複數個切換係數;以及複數個耦接至該複數個電阻性模組及複數個受控電抗模組的開關,該複數個開關的每個開關係響應於一個對應的切換係數,以將該複數個控制電壓中之一所選的控制電壓耦接至一個對應的受控電抗模組。 A device for providing a first reference signal, the device comprising: a harmonic oscillator comprising an inductor and a capacitor, the harmonic oscillator being adapted to provide the first frequency a first reference signal and operating without being locked to an external reference signal; a plurality of resistive modules adapted to generate a plurality of voltage control signals; a plurality of switchable controlled reactance modules, The plurality of reactive modules are adapted to respond to a corresponding voltage control signal of the plurality of voltage control signals, Providing a selected reactance to modify the first frequency; a coefficient register coupled to the plurality of switches, the coefficient register being adapted to store a plurality of switching coefficients; and a plurality of couplings to the a plurality of resistive modules and switches of the plurality of controlled reactance modules, each of the plurality of switches being responsive to a corresponding switching coefficient to one of the plurality of control voltages The control voltage is coupled to the controlled reactance corresponding to a module. 如申請專利範圍第1項之裝置,其中該複數個開關係進一步響應於一個對應的切換係數,以耦接該複數個受控電抗模組中之一個對應的受控電抗模組至該簡諧振盪器以修改該第一頻率。 The apparatus of claim 1, wherein the plurality of open relationships are further responsive to a corresponding switching coefficient to couple a corresponding one of the plurality of controlled reactance modules to the harmonic An oscillator to modify the first frequency. 如申請專利範圍第1項之裝置,其中該簡諧振盪器係 具有以下的配置中之至少一個配置:雙重平衡的差動LC配置;差動n-MOS交叉耦接的拓撲結構;差動p-MOS交叉耦接的拓撲結構;單端Colpitts LC配置;單端Hartley LC配置;差動共基極的Colpitts LC配置;差動共集極的Colpitts LC配置;差動共基極的Hartley LC配置;差動共集極的Hartley LC配置;單端Pierce LC振盪器、或是正交LC振盪器配置。 The device of claim 1, wherein the harmonic oscillator system Having at least one of the following configurations: a dual balanced differential LC configuration; a differential n-MOS cross-coupled topology; a differential p-MOS cross-coupled topology; a single-ended Colpitts LC configuration; Hartley LC configuration; Colpitts LC configuration for differential common base; Colpitts LC configuration for differential common collector; Hartley LC configuration for differential common base; Hartley LC configuration for differential common collector; single-ended Pierce LC oscillator Or an orthogonal LC oscillator configuration. 如申請專利範圍第1項之裝置,其中該複數個受控電抗模組係更包括:相對應地耦接至該複數個開關及電壓控制器之複數個可變的電容器,該複數個可變的電容器係適配於響應一個對應的控制電壓來提供一個所選的電容;以及相對應地耦接至該複數個開關之複數個固定的電容器,該複數個固定的電容器係適配於響應一個對應的切換係數來提供一個所選的電容。 The apparatus of claim 1, wherein the plurality of controlled reactance modules further comprises: a plurality of variable capacitors correspondingly coupled to the plurality of switches and voltage controllers, the plurality of variable capacitors Capacitor is adapted to provide a selected capacitance in response to a corresponding control voltage; and a plurality of fixed capacitors correspondingly coupled to the plurality of switches, the plurality of fixed capacitors being adapted to respond to a A corresponding switching factor is provided to provide a selected capacitance. 如申請專利範圍第1項之裝置,其中該複數個控制電壓中之至少一個控制電壓係響應於複數個參數中之一個參數,其中該複數個參數是可變的,且包括以下的參數中之至少一個:溫度、製程、電壓、老化及頻率。 The device of claim 1, wherein the at least one of the plurality of control voltages is responsive to one of a plurality of parameters, wherein the plurality of parameters are variable and include the following parameters At least one: temperature, process, voltage, aging, and frequency. 如申請專利範圍第5項之裝置,其更包括:一個耦接至該複數個電阻性模組的電流源,該電流源係適配於提供一個參數相依的電流至該複數個電阻性模組中之至少一個電阻性模組,以產生該複數個控制電壓中之至少一個參數相依的控制電壓。 The device of claim 5, further comprising: a current source coupled to the plurality of resistive modules, the current source being adapted to provide a parameter dependent current to the plurality of resistive modules And at least one resistive module to generate a control voltage dependent on at least one of the plurality of control voltages. 如申請專利範圍第6項之裝置,其中該電流源係具有至少一個與絕對溫度成互補的(CTAT)配置、與絕對溫度成比例的(PTAT)配置、或是與絕對溫度平方成比例的(PTAT2 )配置。The device of claim 6, wherein the current source has at least one (CTAT) configuration complementary to absolute temperature, proportional to absolute temperature (PTAT) configuration, or proportional to absolute temperature squared ( PTAT 2 ) configuration. 如申請專利範圍第1項之裝置,其中該複數個受控電抗模組更包括複數個不同加權的固定的電容以及可變的電容,並且其中該複數個開關係響應於該複數個切換係數以將一個固定的電容耦接至該簡諧振盪器,並且將該複數個控制電壓中之一個第一控制電壓耦接至一個可變的電容,該可變的電容係耦接至該簡諧振盪器。 The device of claim 1, wherein the plurality of controlled reactance modules further comprise a plurality of fixed weights of fixed capacitance and variable capacitance, and wherein the plurality of open relationships are responsive to the plurality of switching coefficients Coupling a fixed capacitor to the harmonic oscillator, and coupling one of the plurality of control voltages to a variable capacitor coupled to the simple harmonic Device. 如申請專利範圍第1項之裝置,其中該複數個受控電抗模組更包括:複數個耦接至該係數暫存器及簡諧振盪器之不同加權的可切換的電容性模組,每個可切換的電容性模組係具有一個第一固定的電容以及一個第二固定的電容,每個可切換的電容性模組係響應於該複數個係數中之一個對應的係數,以在該第一固定的電容以及第二固定的電容之間做切換。 The device of claim 1, wherein the plurality of controlled reactance modules further comprises: a plurality of switchable capacitive modules coupled to the coefficient register and the harmonic oscillator, each weighted switchable capacitor module The switchable capacitive module has a first fixed capacitance and a second fixed capacitance, and each switchable capacitive module is responsive to a corresponding one of the plurality of coefficients to Switching between the first fixed capacitor and the second fixed capacitor. 如申請專利範圍第1項之裝置,其中該複數個受控電抗模組更包括:至少一個耦接至該係數暫存器及簡諧振盪器之可切換的可變的電容性模組,該至少一個可切換的可變的電容性模組係響應於該複數個係數中之一個對應的係數,以在複數個控制電壓中之一個第一電壓以及一個第二電壓之間做 切換。 The apparatus of claim 1, wherein the plurality of controlled reactance modules further comprises: at least one switchable variable capacitive module coupled to the coefficient register and the harmonic oscillator, At least one switchable variable capacitive module is responsive to a corresponding one of the plurality of coefficients to perform between a first voltage and a second voltage of the plurality of control voltages Switch. 如申請專利範圍第1項之裝置,其中該複數個受控電抗模組更包括:複數個耦接至該係數暫存器及簡諧振盪器之可切換的可變的電容性模組,每個可切換的可變的電容性模組係響應於該複數個係數中之一個對應的係數,以切換至複數個控制電壓中之一個所選的控制電壓,該複數個控制電壓係包括複數個不同大小的電壓,並且其中該所選的控制電壓對於溫度變化實質上是固定的。 The apparatus of claim 1, wherein the plurality of controlled reactance modules further comprises: a plurality of switchable variable capacitive modules coupled to the coefficient register and the harmonic oscillator, each The switchable variable capacitive module is responsive to a corresponding one of the plurality of coefficients to switch to a selected one of a plurality of control voltages, the plurality of control voltages comprising a plurality of Different sized voltages, and wherein the selected control voltage is substantially fixed for temperature changes. 如申請專利範圍第1項之裝置,其更包括:複數個耦接至該振盪器的除頻器,該複數個除頻器係適配於提供具有複數個對應的頻率之對應的複數個第二參考信號。 The device of claim 1, further comprising: a plurality of frequency dividers coupled to the oscillator, the plurality of frequency dividers being adapted to provide a plurality of corresponding numbers having a plurality of corresponding frequencies Two reference signals. 如申請專利範圍第1項之裝置,其更包括:一個耦接至該頻率選擇器的模式選擇器,該模式選擇器係適配於提供複數個操作模式,該複數個操作模式係選自一個群組,該群組係包括一個時脈模式、一個時序及頻率參考模式、一個省電模式、以及一個脈衝模式。 The device of claim 1, further comprising: a mode selector coupled to the frequency selector, the mode selector adapted to provide a plurality of modes of operation, the plurality of modes of operation being selected from the group consisting of A group consisting of a clock mode, a timing and frequency reference mode, a power saving mode, and a pulse mode. 如申請專利範圍第1項之裝置,其更包括:一個耦接至該簡諧振盪器的方波產生器,該方波產生器係適配於轉換該頻率參考信號成為一個具有實質上相等的工作週期的方波時脈信號。 The apparatus of claim 1, further comprising: a square wave generator coupled to the harmonic oscillator, the square wave generator adapted to convert the frequency reference signal into a substantially equal The square wave clock signal of the duty cycle. 如申請專利範圍第14項之裝置,其更包括:一個處理器,其係耦接至該方波產生器並且與該裝置 構成一個積體電路。 The device of claim 14, further comprising: a processor coupled to the square wave generator and coupled to the device Form an integrated circuit. 如申請專利範圍第1項之裝置,其更包括:複數個耦接至該簡諧振盪器的除頻器或鎖定電路,該複數個除頻器或鎖定電路係適配於提供具有複數個對應的頻率之對應的複數個第二參考信號。 The device of claim 1, further comprising: a plurality of frequency dividers or locking circuits coupled to the harmonic oscillator, the plurality of frequency dividers or locking circuits being adapted to provide a plurality of correspondences The frequency corresponds to a plurality of second reference signals. 如申請專利範圍第16項之裝置,其更包括:耦接至該複數個除頻器或鎖定電路的控制電路,該控制電路係適配於提供一個控制信號至該複數個除頻器或鎖定電路以修改一個可除頻倍數,來提供該複數個第二參考信號中之一個展頻的第二參考信號。 The device of claim 16, further comprising: a control circuit coupled to the plurality of frequency dividers or locking circuits, the control circuit being adapted to provide a control signal to the plurality of frequency dividers or locks The circuit modifies a divisible multiple to provide a second reference signal of one of the plurality of second reference signals. 如申請專利範圍第16項之裝置,其更包括:耦接至該複數個受控電抗模組的控制電路,該控制電路係適配於提供一個控制信號至該複數個受控電抗模組以選擇性地切換該複數個受控電抗模組,來修改該第一頻率以提供一個展頻的第一參考信號。 The device of claim 16, further comprising: a control circuit coupled to the plurality of controlled reactance modules, the control circuit being adapted to provide a control signal to the plurality of controlled reactance modules The plurality of controlled reactance modules are selectively switched to modify the first frequency to provide a first reference signal of the spread spectrum. 一種用於提供一個第一參考信號並且具有一個整合的處理器之積體電路,該積體電路係包括:一個簡諧振盪器,其係包括一個電感器以及一個電容器,該簡諧振盪器係適配於提供該具有一第一頻率的第一參考信號;複數個電阻性模組,其係適配於產生複數個電壓控制信號;耦接至該簡諧振盪器以及複數個電阻性模組之複數個受控電容模組,該複數個電容模組的每個電容模組係適配 於響應該複數個電壓控制信號中之一個對應的電壓控制信號來提供一個所選的電容以修改該第一頻率;一個耦接至該複數個開關的係數暫存器,該係數暫存器係適配於儲存複數個切換係數;耦接至該複數個電阻性模組以及複數個受控電容模組之複數個開關,該複數個開關的每個開關係響應於一個對應的切換係數來耦接該複數個控制電壓中之一個所選的控制電壓至一個對應的受控電容模組;一個除頻器電路,其係耦接至該簡諧振盪器並且適配於轉換該第一參考信號成為一個具有實質相等的工作週期之實質方波的時脈信號;以及一個處理器,其係耦接至該除頻器電路並且適配於接收該時脈信號。 An integrated circuit for providing a first reference signal and having an integrated processor, the integrated circuit comprising: a harmonic oscillator comprising an inductor and a capacitor, the harmonic oscillator system Configuring to provide the first reference signal having a first frequency; a plurality of resistive modules adapted to generate a plurality of voltage control signals; coupled to the harmonic oscillator and the plurality of resistive modules a plurality of controlled capacitor modules, each capacitor module of the plurality of capacitor modules is adapted Providing a selected capacitor to modify the first frequency in response to a corresponding one of the plurality of voltage control signals; a coefficient register coupled to the plurality of switches, the coefficient register Configuring to store a plurality of switching coefficients; a plurality of switches coupled to the plurality of resistive modules and the plurality of controlled capacitor modules, each open relationship of the plurality of switches being coupled in response to a corresponding switching coefficient Connecting a selected one of the plurality of control voltages to a corresponding controlled capacitor module; a frequency divider circuit coupled to the harmonic oscillator and adapted to convert the first reference signal A clock signal that becomes a substantial square wave having substantially equal duty cycles; and a processor coupled to the frequency divider circuit and adapted to receive the clock signal.
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