WO2004090622A1 - Afficheur a cristaux liquides comportant une structure de pixels a transistors a film mince double - Google Patents

Afficheur a cristaux liquides comportant une structure de pixels a transistors a film mince double Download PDF

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Publication number
WO2004090622A1
WO2004090622A1 PCT/CN2003/000258 CN0300258W WO2004090622A1 WO 2004090622 A1 WO2004090622 A1 WO 2004090622A1 CN 0300258 W CN0300258 W CN 0300258W WO 2004090622 A1 WO2004090622 A1 WO 2004090622A1
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WO
WIPO (PCT)
Prior art keywords
liquid crystal
crystal display
pixel
switching transistor
gate
Prior art date
Application number
PCT/CN2003/000258
Other languages
English (en)
Chinese (zh)
Inventor
Chu-Hung Tsai
Original Assignee
Quanta Display Inc.
Quanta Display Japan Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Quanta Display Inc., Quanta Display Japan Inc. filed Critical Quanta Display Inc.
Priority to AU2003236120A priority Critical patent/AU2003236120A1/en
Priority to PCT/CN2003/000258 priority patent/WO2004090622A1/fr
Publication of WO2004090622A1 publication Critical patent/WO2004090622A1/fr

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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/13624—Active matrix addressed cells having more than one switching element per pixel

Definitions

  • the invention provides a liquid crystal display with a double thin film transistor (TFT) pixel structure, particularly a liquid crystal display with high resolution and high display frequency.
  • TFT thin film transistor
  • Thin-film transistor liquid crystal displays mainly use thin-film transistors arranged in a matrix, and cooperate with electronic components such as appropriate capacitors and connection pads to drive liquid crystal pixels, thereby generating rich and beautiful images.
  • a conventional thin film transistor liquid crystal display basically includes a transparent substrate having a plurality of thin film transistors arranged in a plurality of groups, pixel electrodes ⁇ orthogonal scanning lines (scan or gate) line) and signal line (data or signal line), a filter (color filter), and the liquid crystal material filled between the transparent substrate and the filter, and supplemented with appropriate electronic components to drive the liquid crystal pixels to produce rich and beautiful Graphics.
  • TFT-LCD is widely used in portable information products such as notebook personal digital assistant (PDA) due to its thin and light appearance, low power consumption and no radiation pollution. It has even been gradually replaced. Trends in CRT monitors for traditional desktop computers.
  • PDA notebook personal digital assistant
  • FIG. 1 is a schematic diagram of a 1TT-LCD
  • FIG. 2A is a schematic diagram of an equivalent circuit of a pixel 20 in the prior art
  • FIG. 2B is a top view of a pixel 20 in the prior art.
  • a TFT-LCD 10 includes a scanning line driving circuit area 12, a signal line driving circuit area 14, and a pixel array area 16.
  • the pixel array area 16 further includes a plurality of pixels. (Not shown).
  • each pixel 20 disposed in the pixel array region 16 includes a liquid crystal cell filled with liquid crystal molecules (not shown). (liquid crystal unit, LC. unit) 22, and the liquid crystal cell 22 is electrically connected to a common counter electrode (CE) and a thin film transistor (TFT) 24.
  • a gate electrode 26 is electrically connected to the thin film transistor 24 is a scanning line G n
  • a source electrode 28 is electrically connected to a signal line S n
  • a drain electrode 32 is electrically connected to a pixel electrode (pixel electrode, not shown).
  • the pixel 20 further includes a storage capacitor SC (storage capacitor) electrically connected to the liquid crystal cell 22 and a common electrode, and a gate-drain capacitor GD (gate-drain capacitor) electrically connected to the gate 26 and the drain of the thin film transistor 24 32.
  • a storage capacitor SC storage capacitor
  • GD gate-drain capacitor
  • FIG. 3 is a schematic diagram of charging the pixel 20 of FIG. 2 in the prior art.
  • a first voltage pulse is first applied to the previous column of scanning lines G n ., According to its pulse timing, and then according to its pulse timing for the next period (next period). ) Is applied to the next column of scanning lines 0.
  • a second voltage pulse is also applied to the previous line of signal lines S n + 1 according to its pulse timing, and then according to its pulse. timing is applied on top of the next cycle line signal line S n.
  • the film The transistor 24 will be turned on (tum-on) to charge the pixel electrode (not shown), so as to raise the so-called pixel voltage, and then fill the liquid crystal in the liquid crystal cell (not shown) in the pixel 20 Molecules (not shown) are rotated to the desired angle to control the penetration of light.
  • the number of scanning lines and signal lines must be greatly increased.
  • the charging time of each pixel is relatively large. (Ton) will be shortened. Due to the rotation of the liquid crystal molecules, a certain amount of pixel voltage is required, that is, when the charging time is not enough for the pixel voltage to be large enough, a sufficient electric field cannot be provided to charge the liquid crystal. The molecules are rotated to the expected angle, which will seriously affect the penetration of light to each pixel and even cause defective products.
  • channel width channel width to channel length (W / L value)
  • FIG. 4 is a schematic diagram of a gate-drain capacitance generated by a thin film transistor 60 in a conventional liquid crystal display.
  • the gate 62 and the drain 64 of the thin film transistor 60 are conductive materials, and the gate 62 and the drain 64 are isolated by an insulating material (not shown), the gate of the thin film transistor 60 is The overlapped region 66 of 62 and drain 64 forms a parasitic gate-drain capacitance (GD), and when the ratio of the channel width to the channel length of the thin film transistor 60 is increased, The capacitance (Cgd) of the gate-drain capacitance is also increased.
  • GD parasitic gate-drain capacitance
  • the voltage applied to the liquid crystal cell 22 is the voltage difference between the common electrode CE and the pixel electrode (not shown).
  • the pixel The electrode (not shown) is not connected to any voltage source, so it is in a floating state. At this time, if there is any voltage change around the pixel electrode (not shown), this voltage change will be coupled to the parasitic capacitor.
  • the pixel electrode (not shown) changes its voltage so that the voltage applied to the liquid crystal cell 22 deviates from the originally set value. This voltage variation is called the feed-through voltage (V FD ), which can be expressed as:
  • V FD [C GD / (C LC + C SC + C GD )] * AV G. (1)
  • C se is the capacitance value of the storage capacitor SC
  • C is the capacitance value of the gate-drain capacitance of the thin film transistor 24
  • ⁇ V Q is applied to the scan The amplitude of the pulse voltage on the line. Therefore, when the ratio of the channel width to the channel length of the thin film transistor 60 is increased, the capacitance value of the gate-drain capacitance is also increased, thereby causing a change in the V FD value.
  • the current manufacturing process mostly divides the panel into several areas and exposes them in multiple times. In this case, each area is often aligned when the exposure is aligned. There will be different offsets, plus the effect of the channel width to channel length ratio being increased, it is quite easy to produce stitching defects, which will cause the final LCD to produce a shot mum phenomenon and become a manufacturing process. The last insurmountable obstacle.
  • the object of the present invention is to provide a liquid crystal display (two TFT pixel structure liquid crystal display, two TFT pixel structure LCD) with a double thin film transistor pixel structure, especially a high resolution and high display frequency. display frequency).
  • the liquid crystal display with high display frequency of the present invention includes at least one first scan line, at least one second scan line, at least one first signal line, at least one second signal line, and at least one pixel.
  • the pixel is electrically connected to the first scan line, the second scan line, the first signal line and the second signal line, and the pixel includes a liquid crystal molecule filled with a plurality of liquid crystal molecules.
  • a gate of the first switching transistor is electrically connected to the first scan line, a source is electrically connected to the first signal line, a drain is electrically connected to the pixel electrode; and a gate of the second switching transistor is Electrically connected to the second scan line, a source electrically connected to the second signal line, and a drain electrically connected to the pixel electrode.
  • the first switching transistor has a first channel length (L,) and a first channel width
  • the second switching transistor has a second channel length (L 2 ) and a second channel width (W 2 )
  • a ratio (W, / ⁇ ) of the first channel width to the first channel length is smaller than a ratio (W 2 / L 2 ) of the second channel width to the second channel length.
  • the liquid crystal display of the present invention uses an additional thin film transistor to charge the pixel electrode in advance when the previous line of scanning lines and the previous line of signal lines receive voltage pulses, and then receives the voltage pulses in the next line of scanning lines and the next line of signal lines. At this time, the pixel electrode continues to be charged, so that the pixel voltage rises to the expected voltage value, so not only the charging time of each pixel will change from T. n is increased to 2T. n , the picture quality of the display screen will not be affected, and no bright spots are allowed.
  • the method of the present invention does not have to be limited to the existing method of increasing the ratio of the channel width to the channel length of the thin film transistor in response to the specifications of high resolution and high display frequency.
  • the capacitance value of the gate-drain capacitor is not It will be increased, so the feed-through voltage (VFD) can be greatly reduced, and when the present invention is used in an actual production line, it can also effectively produce a high-resolution, high display frequency, wireless ripple (shot rnura). Size panel.
  • Figure 1 is a schematic diagram of a TFT-LCD.
  • FIG. 2A is a schematic diagram of an equivalent circuit of a pixel in the prior art.
  • FIG. 2B is a top view of a pixel in the prior art.
  • FIG. 3 is a schematic diagram of charging the pixel of FIG. 2 in the prior art.
  • FIG. 4 is a schematic diagram of a gate-drain capacitance generated by a thin film transistor in a conventional liquid crystal display.
  • FIG. 5A is a schematic diagram of an equivalent circuit of each pixel of the present invention.
  • FIG. 5B is a top view of each pixel of the present invention.
  • FIG. 6 is a schematic diagram of charging the pixel of FIG. 5 in the present invention. detailed description
  • FIG. 5A is a schematic diagram of an equivalent circuit of each pixel 100 according to the present invention
  • FIG. 5B is a top view of each pixel 100 according to the present invention.
  • each pixel 100 of the present invention includes a liquid crystal unit (LC unit) 102 filled with liquid crystal molecules (not shown) ⁇ a pixel electrode , Not shown), a first thin film transistor (first TFT) 104 and a second thin film transistor (second TFT) 106.
  • the liquid crystal cell 102 is electrically connected to a common counter electrode (CE), and both the first thin film transistor 104 and the second thin film transistor 106 are used as switches to control the pixel electrodes (not shown). Charging.
  • CE common counter electrode
  • the gate electrode 108 of the first thin film transistor 104 is electrically connected to the scan line G n4 in the previous column, the source 112 of the first thin film transistor 104 is electrically connected to the signal line S n + 1 in the previous row, and the drain of the first thin film transistor 104 114 is electrically connected to the pixel electrode (not shown); and a second gate electrode 118 is electrically connected to the thin film transistor 106 after a scanning line G n, the source of the second thin film transistor 106 is electrically connected to the line 122 signal line S n, The drain electrode 124 of the second thin film transistor 106 is electrically connected to a pixel electrode (not shown).
  • the first thin film transistor 104 has a first channel length (L and a first channel width (W)
  • the second thin film transistor 106 has a second channel length (L 2 ) and a second channel width (W 2 )
  • the ratio of the first channel width to the first channel length (WL,) Is smaller than the ratio (W 2 / L 2 ) of the second channel width to the second channel length.
  • the pixel 100 also includes at least one storage capacitor SC.
  • a common situation shown in FIG. 5A is a case where a storage capacitor SC is electrically connected to the liquid crystal cell 102 and a common electrode.
  • a first gate-drain capacitor (GD1) derived from an overlapping region (not shown) of the gate 108 and the drain 114 of the thin film transistor 104 is electrically connected to the gate 108 and the drain of the first thin film transistor 104 Electrode 114, and a second gate-drain capacitor GD2 (second gate-drain capacitor) derived from the overlap region (not shown) of gate 118 and drain 124 of second thin film transistor 106 is electrically connected to the second thin film The gate 118 and the drain 124 of the transistor 106.
  • One of the functions of the storage capacitor SC is to reduce the effect of the leakage current on the voltage of the liquid crystal cell 102, that is, to assist the liquid crystal cell 102 to store the charge, and the first gate-drain capacitor GDI and the second gate-drain capacitor GD2 is a parasitic capacitor.
  • FIG. 6 is a schematic diagram of charging the pixel 100 of FIG. 5 in the present invention.
  • a first voltage pulse is first applied to the scan line of the previous column according to its pulse time, and then is applied to the scan line of the next column G n in the next cycle according to its pulse timing.
  • a second voltage pulse is first applied to the signal line S n + 1 on the previous line according to its pulse timing, and then applied to the signal on the next line in the next period according to its pulse timing. on line S n.
  • the first thin film transistor 104 When the first voltage pulse and the second voltage pulse are simultaneously applied to the scan line and the signal line Sn + 1 , the first thin film transistor 104 will be turned on to charge the pixel electrode (not shown) ( charge) to raise the so-called pixel voltage to a certain level.
  • the second thin film transistor 106 When the first voltage pulse and the second voltage pulse are simultaneously applied to the scanning line G n and the signal line 8 ′, the second thin film transistor 106 will be turned on to continue to the pixel electrode (not shown). Charging causes the pixel voltage to continue to rise, thereby driving liquid crystal molecules (not shown) filled in the liquid crystal cell (not shown) in the pixel 100 to rotate to a desired angle to control the degree of light transmission.
  • the method of the present invention is equivalent to increasing the charging time of each pixel from Ton to 2Ton, and because the charging time of each pixel is stretched to twice, so under the requirements of high resolution, The display frequency of the invented liquid crystal display can be significantly increased.
  • the charging rate of the second thin film transistor 106 will be significantly greater than The charging rate of the first thin film transistor 104, and at the same time, because the entire charging time 2Ton is very short, the first and second voltage pulses are respectively applied to the previous row of scanning lines G n _ and the previous one of the signal lines S n + 1 .
  • the display quality of the display screen will not be deteriorated because the first thin film transistor 104 has been turned on and the pixel electrodes are precharged. .
  • the first thin film transistor 104 and the second thin film transistor 106 are both used to charge the pixel electrode (not shown), when one of the transistors fails, there is still another one that can be used for charging. Since the phenomenon of light defects is not generated, the yield can be effectively improved, and even zero defect products can be produced. Moreover, since the liquid crystal display of the present invention can use the first thin film transistor 104 for pre-charging, the charging time will be relatively lengthened. Therefore, the present invention does not need to be as general as the aforementioned prior art. The ratio of the channel width to the channel length (W 2 / L 2 ) of the transistor 106 is used to solve the problem that the luminance voltage cannot be reached.
  • the process of the present invention is also less prone to produce a shot mura phenomenon.
  • the liquid crystal display of the present invention utilizes the addition of a thin film transistor, the pixel electrodes are charged in advance when receiving voltage pulses in the previous line of scanning lines and the signal lines in the previous line, and then in the next line of scanning lines and the next line of signal lines. When the voltage pulse is received, the pixel electrode is continuously charged to increase the pixel voltage to the expected voltage value, which not only can increase the charging time, but also can keep the capacitance value of the gate-drain capacitor from being increased.
  • the present invention uses the addition of a thin film transistor to charge the pixel electrode in advance when the previous line of scanning lines and the previous line of signal lines receive voltage pulses, and then the next line of scanning lines and the next line of signals
  • the line receives the voltage pulse, it continues to charge the pixel electrode, so that the pixel voltage rises to the expected voltage value, so not only the charging time of each pixel will change from T. n is increased to 2T. ⁇ , the picture quality of the display screen will not be affected, and no bright spots are allowed.
  • the method of the present invention does not have to be limited to the existing method of increasing the ratio of the channel width to the channel length of the thin film transistor in response to the specifications of high resolution and high display frequency.
  • the capacitance value of the gate-drain capacitor is not It will be increased, so the feed-through voltage (VFD) can be greatly reduced, and when the present invention is used in an actual production line, it can also effectively produce a large-scale, high-resolution, high-frequency display, wireless shot mura (shot mura). Size panel.
  • Drain 66 overlap area

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

L'invention se rapporte à un afficheur à cristaux liquides comportant une structure de pixels à transistors à film mince double, qui comprend une première et une seconde ligne de balayage, une première et une seconde ligne de signaux et des pixels. Les pixels comportent des électrodes, les premiers et seconds transistors. La grille et la source du premier et du second transistor sont connectées électriquement à la première et à la seconde ligne de balayage, et à la première et à la seconde ligne de signaux respectivement, et les drains de deux des transistors sont connectés électriquement aux électrodes de pixels. Le premier transistor présente un rapport de sa largeur à sa longueur de canal qui est inférieur aux rapports des seconds transistors.
PCT/CN2003/000258 2003-04-11 2003-04-11 Afficheur a cristaux liquides comportant une structure de pixels a transistors a film mince double WO2004090622A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
AU2003236120A AU2003236120A1 (en) 2003-04-11 2003-04-11 A liquid crystal display having double thin film transistor pixel structure
PCT/CN2003/000258 WO2004090622A1 (fr) 2003-04-11 2003-04-11 Afficheur a cristaux liquides comportant une structure de pixels a transistors a film mince double

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2003/000258 WO2004090622A1 (fr) 2003-04-11 2003-04-11 Afficheur a cristaux liquides comportant une structure de pixels a transistors a film mince double

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WO2004090622A1 true WO2004090622A1 (fr) 2004-10-21

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1773601B (zh) * 2004-11-12 2010-05-05 三星电子株式会社 显示装置及其驱动方法
US7869676B2 (en) 2005-11-10 2011-01-11 Chimei Innolux Corporation Liquid crystal display panel with dual-TFTs pixel units having different TFT channel width/length ratios
CN102034422A (zh) * 2010-12-14 2011-04-27 友达光电股份有限公司 显示装置的驱动方法以及显示装置
US8810606B2 (en) 2004-11-12 2014-08-19 Samsung Display Co., Ltd. Display device and driving method thereof
TWI471638B (zh) * 2007-10-19 2015-02-01 Semiconductor Energy Lab 顯示裝置，其驅動方法，及使用該顯示裝置之電子裝置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1089041A (zh) * 1992-12-30 1994-07-06 株式会社金星社 液晶显示器有源矩阵
CN1278073A (zh) * 1999-06-04 2000-12-27 权五敬 液晶显示器
CN1346450A (zh) * 1999-12-03 2002-04-24 三菱电机株式会社 液晶显示装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1089041A (zh) * 1992-12-30 1994-07-06 株式会社金星社 液晶显示器有源矩阵
CN1278073A (zh) * 1999-06-04 2000-12-27 权五敬 液晶显示器
CN1346450A (zh) * 1999-12-03 2002-04-24 三菱电机株式会社 液晶显示装置

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1773601B (zh) * 2004-11-12 2010-05-05 三星电子株式会社 显示装置及其驱动方法
US8810606B2 (en) 2004-11-12 2014-08-19 Samsung Display Co., Ltd. Display device and driving method thereof
US9058787B2 (en) 2004-11-12 2015-06-16 Samsung Display Co., Ltd. Display device and driving method thereof
US9390669B2 (en) 2004-11-12 2016-07-12 Samsung Display Co., Ltd. Display device and driving method thereof
US7869676B2 (en) 2005-11-10 2011-01-11 Chimei Innolux Corporation Liquid crystal display panel with dual-TFTs pixel units having different TFT channel width/length ratios
TWI471638B (zh) * 2007-10-19 2015-02-01 Semiconductor Energy Lab 顯示裝置，其驅動方法，及使用該顯示裝置之電子裝置
CN102034422A (zh) * 2010-12-14 2011-04-27 友达光电股份有限公司 显示装置的驱动方法以及显示装置

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