WO2004086688A1 - Atm switching device of low capacitance - Google Patents

Atm switching device of low capacitance Download PDF

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Publication number
WO2004086688A1
WO2004086688A1 PCT/KR2004/000657 KR2004000657W WO2004086688A1 WO 2004086688 A1 WO2004086688 A1 WO 2004086688A1 KR 2004000657 W KR2004000657 W KR 2004000657W WO 2004086688 A1 WO2004086688 A1 WO 2004086688A1
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WO
WIPO (PCT)
Prior art keywords
switch
dualization
control
card
atm
Prior art date
Application number
PCT/KR2004/000657
Other languages
French (fr)
Inventor
Sung Hyuk Choi
Original Assignee
Utstarcom Korea Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Utstarcom Korea Limited filed Critical Utstarcom Korea Limited
Publication of WO2004086688A1 publication Critical patent/WO2004086688A1/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/25—Routing or path finding in a switch fabric
    • H04L49/256—Routing or path finding in ATM switching fabrics
    • H04L49/258—Grouping
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/24—Multipath
    • H04L45/245—Link aggregation, e.g. trunking
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/15—Interconnection of switching modules
    • H04L49/1515—Non-blocking multistage, e.g. Clos
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/25—Routing or path finding in a switch fabric
    • H04L49/253—Routing or path finding in a switch fabric using establishment or release of connections between ports
    • H04L49/254—Centralised controller, i.e. arbitration or scheduling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3081—ATM peripheral units, e.g. policing, insertion or extraction
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5672—Multiplexing, e.g. coding, scrambling
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate

Definitions

  • the present invention relates to a small-capacity El/Tl interface ATM switch that has eight (8) line cards accommodating sixteen (16) El or TI links and supports a port dualization. More particularly, the present invention relates to a low-priced, small-capacity ATM switch, which can accommodate up to 80 TI ports or 63 El ports for dualization.
  • an interface between a framer chip of the line card and an LMA (Inverse Multiplexing for ATM) chip is a serial interface that supports up to 2.048Mbps, which is relatively low
  • an LMA chip that accommodates up to 84 links is mounted on the switch and control card; the port output of each dualized line card is configured to support hot-standby; and each line card, on which no processor is mounted, is controlled by the switch and control card.
  • the ATM switch performs its switching function and supports a dualization of a switch fabric, using a stand-alone mode of an ATM buffer management chip.
  • the ATM switch cannot sufficiently support the port dualization in terms of hardware, or
  • the object of the present invention is to provide a low-priced, small-capacity ATM switch, which can accommodate up to 80 TI ports or 63 El ports to achieve a dualization.
  • an interface between a framer chip of the line card and an LMA chip is a serial interface that supports up to 2.048Mbps, which is relatively low
  • an LMA chip that accommodates up to 84 links is mounted on the switch and control card; the port output of each dualized line card is configured to support hot-standby; and each line card, on which no processor is mounted, is controlled by the switch and control card.
  • the ATM switch performs its switching function and supports the dualization of a switch fabric, using a stand-alone mode of an ATM buffer management chip.
  • the present invention comprises: an interface card that comprises passive elements and connectors for link interfacing and accommodates 16 ports; a line card that accommodates four (4) ports for mounting an LIU and four (4) framer chips, and 16 ports around said framer chip; and a switch and control card for variably assigning a bandwidth, performing ATM cell switching, and providing an interfacing function for implementing instructions to control dualization boards and line cards.
  • the line card according to the present invention is also characterized by comprising: an LED unit for indicating a link status; a clock synchronization unit for performing a synchronization by receiving a reference clock from the switch and control card; a dualization logic unit for performing a determination which ports are active and controlling output enablement of an output buffer to support a hot standby port dualization; and a control interface unit for interfacing chip initialization instructions and framer control instructions, which are issued from a processor of the switch and control card.
  • the switch and control card is also characterized by comprising: an LMA function unit for variably assigning a bandwidth by grouping links; an ATM class processing unit for setting information including connection configuration information; an ABM chip for stand-alone ATM cell switching, a dualization control unit for supporting a processor dualization and a switch dualization between the dualization boards of the switch and control card, and a dualization of an LMA output to the line card; an 8260 processor module for controlling the switch; and a control interface unit providing an interfacing function that allows the 8260 processor module of the switch and control card to implement control instructions from each line card.
  • LMA function chips all of LMA function chips, ATM class processing chips, and processor modules can be removed from the line card and be positioned mainly in the switch and control card unit. Consequently, a separate switch fabric chip may not be used, and thus unit costs and power consumption of the overall device can be reduced. In addition, unit costs of power supply cards can also be decreased by way of reducing the power consumption. Further, with respect to a group configuration used for an LMA function, 0 to
  • 16 links can be grouped into one group in the prior arts, whereas up to 32 links can be grouped into one group in the invention. Also, since the links on the device can be grouped into a single group, the device's flexibility is increased. Furthermore, the dualization configuration can be implemented into a hot-standby configuration, so that a rapid hardware changeover is possible when links are switched. Also, the number of LMA groups that the overall device can support becomes 30, and one-to-one LPC communication can be implemented through Ethernet between processors that are configured by a dualization, so that high-speed IPC communication can be established.
  • Fig. 1 is a block diagram that illustrates a configuration of an interface card and a line card according to the present invention, which accommodate 16 ports, respectively.
  • Fig. 2 is a block diagram that illustrates a configuration of a switch and control card according to the present invention.
  • Fig. 3 is a block diagram that illustrates a link dualization configuration between links and switches and control cards according to the present invention.
  • Fig. 4 is a block diagram that illustrates a switch dualization configuration between switches and control cards according to the present invention.
  • Fig. 5 is an overview of a small-capacity switch according to the present invention.
  • Fig. 6 shows an example of a switch and control card according to the present invention, which has an additional optical interface.
  • FIG. 1 is a block diagram that illustrates a configuration of an interface card and a line card according to the present invention, which accommodate 16 ports, respectively.
  • reference number 100 refers to the interface card, which comprises passive elements.
  • Reference number 200 refers to the line card, which consists mainly of framers. That is, as shown in Fig.l, the left-hand side is interface card 100, and the right-hand side is line card 200.
  • Interface card 100 comprises passive elements such as transformers for link interface and connectors.
  • Line card 200 is configured to accommodate 4 ports for mounting an LIU and four (4) framer chips to support 16 TI or El ports.
  • line card 200 comprises an LED unit 210 for indicating a link status, a clock synchronization unit 220 for performing a synchronization by receiving a reference clock from the switch and control card, a dualization logic unit 230 for performing a determination which ports are active and controlling output enablement of an output buffer to support a hot standby port dualization, and a control interface unit 240 for interfacing chip initialization instructions and framer control instructions, which are issued from the processor of the switch and control card,.
  • Fig. 2 is a block diagram that illustrates a configuration of a switch and control card according to the present invention.
  • the switch and control card according to the present invention comprises: an LMA function unit 310 for variably assigning a bandwidth by grouping linlcs; an ATM class processing unit 320 for setting information including connection configuration information; an ABM chip 330 for stand-alone ATM cell switching; a dualization control unit 340 for supporting a processor dualization and a switch dualization between the dualization boards of the switch and control card, and a dualization of an LMA output to the line card; an 8260 processor module 350 for controlling the switch; and a control interface unit 360 providing an interfacing function that allows the 8260 processor module of the switch and control card to implement control instructions from each line card.
  • an LMA function unit 310 for variably assigning a bandwidth by grouping linlcs
  • an ATM class processing unit 320 for setting information including connection configuration information
  • an ABM chip 330 for stand-alone ATM cell switching
  • Fig. 3 is a block diagram that illustrates a link dualization configuration between linlcs and switches and control cards according to the present invention
  • Fig. 4 is a block diagram that illustrates a switch dualization configuration between switches and control cards according to the present invention.
  • the link dualization configuration between links and switches and control cards is a hot-standby dualization configuration, wherein the link dualization controls the output ports in two directions, i.e., from the line card to the switch and control card and vice versa, so that an active port signal will be outputted.
  • FIG. 4 it shows a configuration of a switch dualization configuration between switches and control cards.
  • An ABM chip that is responsible for stand-alone switching function has two output ports and two input ports, wherein both of the output ports may be used for output while one of the input ports may be selected for input.
  • an ABM chip may always selectively process the loop-backed signals.
  • Figs. 5 and 6 show a front and rear overview of a small-capacity switch according to the present invention.
  • the small-capacity switch comprises power supply cards 511 and 512, a switch and control card 520, a Tl/El line card 530, a Tl/El interface card 630, a TI line card for expansion 540, and a TI interface card for expansion 640.
  • TI line card for expansion 540 and the TI interface card for expansion 640 are mounted only when TI links are interfaced, and each of the power supply cards 511 and 512 is mounted on the left-hand and right-hand side of the front as shown in Fig. 5, respectively.
  • Switch and control card 520 is mounted dualized in the middle of the front as shown in Fig. 5.
  • the present invention in the above is applicable to a 600-Mbps ATM switch that switches ATM cells through El or TI level ports. More particularly, the present invention is applicable to a reliable, low-priced and small-capacity ATM switch that requires a port dualization and a switch dualization, or an ATM switch that requires 80 TI links or 60 El links that are dualized through 160 or 126 ports.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

The present invention relates to a small-capacity E1/T1 interface ATM switch that has eight (8) line cards accommodating sixteen (16) EI or T1 links and supports a port dualization. More particularly, the present invention relates to a low-priced, small-capacity ATM switch, which can accommodate up to 80 T1 ports or 63 E1 ports for dualization. In the ATM switch, considering that an interface between a framer chip of the line card and an IMA (Inverse Multiplexing for ATM) chip is a serial interface that supports up to 2.048Mbps, which is relatively low, an IMA chip that accommodates up to 84 links is mounted on the switch and control card; the port output of each dualized line card is configured to support hot-standby; and each line card, on which no processor is mounted, is controlled by the switch and control card. Also, the ATM switch performs its switching function and supports a dualization of a switch fabric, using a stand-alone mode of an ATM buffer management chip.

Description

ATM SWITCHING DEVICE OF LOW CAPACITANCE
TECHNICAL FIELD
The present invention relates to a small-capacity El/Tl interface ATM switch that has eight (8) line cards accommodating sixteen (16) El or TI links and supports a port dualization. More particularly, the present invention relates to a low-priced, small-capacity ATM switch, which can accommodate up to 80 TI ports or 63 El ports for dualization. hi the ATM switch, considering that an interface between a framer chip of the line card and an LMA (Inverse Multiplexing for ATM) chip is a serial interface that supports up to 2.048Mbps, which is relatively low, an LMA chip that accommodates up to 84 links is mounted on the switch and control card; the port output of each dualized line card is configured to support hot-standby; and each line card, on which no processor is mounted, is controlled by the switch and control card. Also, the ATM switch performs its switching function and supports a dualization of a switch fabric, using a stand-alone mode of an ATM buffer management chip.
BACKGROUND ART
In general, a conventional small-capacity ATM switch contains problems, as set forth below:
- The ATM switch cannot sufficiently support the port dualization in terms of hardware, or
- Cost increases since a processor, an ATM function chip, an LMA function chip, and the like should be mounted on each line card, and - The ATM switch is costly, since it requires both a switching card and a control card.
DISCLOSURE OF THE INVENTION
The object of the present invention is to provide a low-priced, small-capacity ATM switch, which can accommodate up to 80 TI ports or 63 El ports to achieve a dualization. In the ATM switch, considering that an interface between a framer chip of the line card and an LMA chip is a serial interface that supports up to 2.048Mbps, which is relatively low, an LMA chip that accommodates up to 84 links is mounted on the switch and control card; the port output of each dualized line card is configured to support hot-standby; and each line card, on which no processor is mounted, is controlled by the switch and control card. Also, the ATM switch performs its switching function and supports the dualization of a switch fabric, using a stand-alone mode of an ATM buffer management chip.
In order to accomplish the above, the present invention comprises: an interface card that comprises passive elements and connectors for link interfacing and accommodates 16 ports; a line card that accommodates four (4) ports for mounting an LIU and four (4) framer chips, and 16 ports around said framer chip; and a switch and control card for variably assigning a bandwidth, performing ATM cell switching, and providing an interfacing function for implementing instructions to control dualization boards and line cards.
In order to achieve the above object, the line card according to the present invention is also characterized by comprising: an LED unit for indicating a link status; a clock synchronization unit for performing a synchronization by receiving a reference clock from the switch and control card; a dualization logic unit for performing a determination which ports are active and controlling output enablement of an output buffer to support a hot standby port dualization; and a control interface unit for interfacing chip initialization instructions and framer control instructions, which are issued from a processor of the switch and control card.
In order to achieve the above object, the switch and control card according to the present invention is also characterized by comprising: an LMA function unit for variably assigning a bandwidth by grouping links; an ATM class processing unit for setting information including connection configuration information; an ABM chip for stand-alone ATM cell switching, a dualization control unit for supporting a processor dualization and a switch dualization between the dualization boards of the switch and control card, and a dualization of an LMA output to the line card; an 8260 processor module for controlling the switch; and a control interface unit providing an interfacing function that allows the 8260 processor module of the switch and control card to implement control instructions from each line card. According to the present invention, all of LMA function chips, ATM class processing chips, and processor modules can be removed from the line card and be positioned mainly in the switch and control card unit. Consequently, a separate switch fabric chip may not be used, and thus unit costs and power consumption of the overall device can be reduced. In addition, unit costs of power supply cards can also be decreased by way of reducing the power consumption. Further, with respect to a group configuration used for an LMA function, 0 to
16 links can be grouped into one group in the prior arts, whereas up to 32 links can be grouped into one group in the invention. Also, since the links on the device can be grouped into a single group, the device's flexibility is increased. Furthermore, the dualization configuration can be implemented into a hot-standby configuration, so that a rapid hardware changeover is possible when links are switched. Also, the number of LMA groups that the overall device can support becomes 30, and one-to-one LPC communication can be implemented through Ethernet between processors that are configured by a dualization, so that high-speed IPC communication can be established.
BRIEF DESCRIPTION OF DRAWINGS
Fig. 1 is a block diagram that illustrates a configuration of an interface card and a line card according to the present invention, which accommodate 16 ports, respectively. Fig. 2 is a block diagram that illustrates a configuration of a switch and control card according to the present invention.
Fig. 3 is a block diagram that illustrates a link dualization configuration between links and switches and control cards according to the present invention.
Fig. 4 is a block diagram that illustrates a switch dualization configuration between switches and control cards according to the present invention.
Fig. 5 is an overview of a small-capacity switch according to the present invention.
Fig. 6 shows an example of a switch and control card according to the present invention, which has an additional optical interface.
BEST MODE FOR CARRYING OUT THE INVENTION
Referring to the attached drawings, a preferred embodiment of the small- capacity ATM switch of the present invention according to the above-mentioned technical idea will be explained. Fig. 1 is a block diagram that illustrates a configuration of an interface card and a line card according to the present invention, which accommodate 16 ports, respectively.
As shown in Fig.l, reference number 100 refers to the interface card, which comprises passive elements. Reference number 200 refers to the line card, which consists mainly of framers. That is, as shown in Fig.l, the left-hand side is interface card 100, and the right-hand side is line card 200. Interface card 100 comprises passive elements such as transformers for link interface and connectors. Line card 200 is configured to accommodate 4 ports for mounting an LIU and four (4) framer chips to support 16 TI or El ports.
Further, line card 200 comprises an LED unit 210 for indicating a link status, a clock synchronization unit 220 for performing a synchronization by receiving a reference clock from the switch and control card, a dualization logic unit 230 for performing a determination which ports are active and controlling output enablement of an output buffer to support a hot standby port dualization, and a control interface unit 240 for interfacing chip initialization instructions and framer control instructions, which are issued from the processor of the switch and control card,.
Fig. 2 is a block diagram that illustrates a configuration of a switch and control card according to the present invention. As shown in Fig. 2, the switch and control card according to the present invention comprises: an LMA function unit 310 for variably assigning a bandwidth by grouping linlcs; an ATM class processing unit 320 for setting information including connection configuration information; an ABM chip 330 for stand-alone ATM cell switching; a dualization control unit 340 for supporting a processor dualization and a switch dualization between the dualization boards of the switch and control card, and a dualization of an LMA output to the line card; an 8260 processor module 350 for controlling the switch; and a control interface unit 360 providing an interfacing function that allows the 8260 processor module of the switch and control card to implement control instructions from each line card.
Fig. 3 is a block diagram that illustrates a link dualization configuration between linlcs and switches and control cards according to the present invention, and Fig. 4 is a block diagram that illustrates a switch dualization configuration between switches and control cards according to the present invention.
As shown in Figs. 3 and 4, the link dualization configuration between links and switches and control cards is a hot-standby dualization configuration, wherein the link dualization controls the output ports in two directions, i.e., from the line card to the switch and control card and vice versa, so that an active port signal will be outputted.
Referring to Fig. 4, it shows a configuration of a switch dualization configuration between switches and control cards. An ABM chip that is responsible for stand-alone switching function has two output ports and two input ports, wherein both of the output ports may be used for output while one of the input ports may be selected for input.
However, since only cards whose switches are active transmit cells toward the line cards, the switch and control card that is substantially in standby mode need not receive and process the cells from the active card. Accordingly, as shown in the drawings, an ABM chip may always selectively process the loop-backed signals.
Since a card that has been in a standby mode should operate smoothly using an existing connection configuration when it is switched, operations except for processing of actual cells (e.g. configuring connections) should be in process through LPC communication between processors.
Figs. 5 and 6 show a front and rear overview of a small-capacity switch according to the present invention.
As shown in the drawings, the small-capacity switch comprises power supply cards 511 and 512, a switch and control card 520, a Tl/El line card 530, a Tl/El interface card 630, a TI line card for expansion 540, and a TI interface card for expansion 640.
TI line card for expansion 540 and the TI interface card for expansion 640 are mounted only when TI links are interfaced, and each of the power supply cards 511 and 512 is mounted on the left-hand and right-hand side of the front as shown in Fig. 5, respectively. Switch and control card 520 is mounted dualized in the middle of the front as shown in Fig. 5.
While the above drawings illustrate a symmetric disposition with respect to the switch card in the middle, which reflects dualization of the line cards, the cards related to TI expansion are located adjacent to each other when configuring dualization between the adjacent boards. The present invention in the above is applicable to a 600-Mbps ATM switch that switches ATM cells through El or TI level ports. More particularly, the present invention is applicable to a reliable, low-priced and small-capacity ATM switch that requires a port dualization and a switch dualization, or an ATM switch that requires 80 TI links or 60 El links that are dualized through 160 or 126 ports. While the present invention has been described above in conjunction with specific preferred embodiments of a small-capacity ATM switch, it is evident that numerous alternatives, modifications and variations will be apparent to those skilled in the art without departing from the scope of the present invention. Thus, the breadth and scope of the present invention should not be limited by any of the above- described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.

Claims

1. A small-capacity ATM switch device, comprising: an interface card, which accommodates 16 ports, comprising passive elements and connectors for link interfacing; an LED unit for indicating a link status; a clock synchronization unit for performing a synchronization by receiving a reference clock from the switch and control card; a dualization logic unit for performing a determination which ports are active and controlling output enablement of an output buffer to support a hot standby port dualization; a switch and control card for variably assigning a bandwidth, performing ATM cell switching, and providing an interfacing function for implementing instructions to control dualization boards and line cards; and a line card comprising a control interface unit for interfacing chip initialization instructions and framer control instructions, which are issued from a processor of the switch and control card.
2. A small-capacity ATM switch device as claimed in claim 1, wherein said switch and control card comprises: an LMA function unit for variably assigning a bandwidth by grouping links; an ATM class processing unit for setting information including connection configuration information; an ABM chip for stand-alone ATM cell switching; a dualization control unit for supporting a processor dualization and a switch dualization between the dualization boards of the switch and control card, and a dualization of an LMA output to the line card; an 8260 processor module for controlling the switch; and a control interface unit providing an interfacing function that allows the 8260 processor module of the switch and control card to implement control instructions from each line card.
3. A small-capacity ATM switch device as claimed in claim 1, wherein a link dualization configuration between the links and the switches and control cards supports a dualization using a hot-standby dualization configuration where the link dualization controls output ports in two directions, i.e., from the line card to the switch and control card and from the switch and control card to the line card, so that active port signals may be outputted.
4. A small-capacity switch device as claimed in claim 1, wherein a switch dualization configuration between the switches and control cards is characterized in that an ABM chip that is responsible for stand-alone switching function has two output ports and two input ports, and both of the output ports may be used for output while one of the input ports is configured to be selected for input.
PCT/KR2004/000657 2003-03-25 2004-03-24 Atm switching device of low capacitance WO2004086688A1 (en)

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Application Number Priority Date Filing Date Title
KR10-2003-0018556 2003-03-25
KR1020030018556A KR20040083871A (en) 2003-03-25 2003-03-25 ATM Switching Device of Low Capacitance

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EP2050222A2 (en) * 2006-08-04 2009-04-22 Broadcom Corporation Integrated switch

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US6009092A (en) * 1996-12-24 1999-12-28 International Business Machines Corporation LAN switch architecture
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US5870382A (en) * 1995-09-04 1999-02-09 Fujitsu Limited Automatic protection switching system for ATM exchange network
US6009092A (en) * 1996-12-24 1999-12-28 International Business Machines Corporation LAN switch architecture
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2050222A2 (en) * 2006-08-04 2009-04-22 Broadcom Corporation Integrated switch
EP2050222A4 (en) * 2006-08-04 2012-06-27 Broadcom Corp Integrated switch
US8498291B2 (en) 2006-08-04 2013-07-30 Broadcom Corporation Integrated switch

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