CN101119171B - Clock synchronous system and method of advanced telecommunication computer system - Google Patents
Clock synchronous system and method of advanced telecommunication computer system Download PDFInfo
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- CN101119171B CN101119171B CN2007100771377A CN200710077137A CN101119171B CN 101119171 B CN101119171 B CN 101119171B CN 2007100771377 A CN2007100771377 A CN 2007100771377A CN 200710077137 A CN200710077137 A CN 200710077137A CN 101119171 B CN101119171 B CN 101119171B
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- gusset plate
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/12—Synchronisation of different clock signals provided by a plurality of clock generators
Abstract
The present invention discloses a simultaneous system and a method of the advanced telecom computer system. The system is positioned in a case which includes a gusset plate and a backing plate, the system includes clock daughter cards, a clock rear loading module, an intermediate small backing deal; the clock rear loading module is used for connecting to benchmark of an outside clock for transmitting to a clock daughter card by the intermediate small backing deal; the receiving port is connected to a clock signal, providing an output port; the clock daughter card is used for receiving and processing the outside clock benchmark, choose the benchmark clock, transmit to the three clock buses on the backing deal after three types of clock is processed; the outputting port is connected to a simultaneous clock for transmitting to the clock rear loading module by the intermediate small backing deal; the intermediate small backing deal is used for connecting the clock benchmarks of all clock daughter cards to be connected to each other and connecting the connected clock outputting port. The present invention saves the clock resources and reduces the cost; only one clock rearing plug-in card is needed; the connecting simultaneous clock output has only one cable, reducing the complicacy and improving the reliability of the system.
Description
Technical field
The present invention relates to ATCA (advanced telecom computer architecture) platform field, relate in particular to the clock system and the method for this system.
Background technology
The modern communication field, transmission of Information and exchange are finished by time division multiplex, in order to obtain frequency and timing signal accurately, all need to rely on Clock Synchronization Technology and could go out useful information by correct demultiplexing, make the output data code check consistent with the data bit rate of input, thereby avoid data in transmission and exchange process because of the asynchronous slip damage that produces data, cause the error rates of data increase, communication efficiency and quality decline even communication disruption.When ATCA platform application during, need equally to guarantee whole cabinet, and cascade cabinet clock is in synchronous regime in circuit domain.3.0 regulation and stipulations that PICMG (PCI industrial computer vendor organization) formulates the electrical specification of synchronous clock, ways of distribution, and intelligent management mode.The synchronous clock interface adopts the bus structure of MLVDS (multinode low-voltage differential signal), guarantees the reliable transmission of clock.ATCA supports three couples of clock bus: CLK1A/B, CLK2A/B, CLK3A/B, it is 8K, 19.44M that standard defines CLK1A/B, CLK2A/B respectively, and CLK3A/B is self-defining clock line, and each clock all has one group of backup clock, totally six pairs of differential lines all are positioned on the Zone2 socket.Active/standby two cover clock sources respectively drive a cover bus, selection for two cover clocks, the ATCA regulation and stipulation, for receiving veneer, adopt distributed processing mode, receive the validity of the own monitoring clock bus of veneer A, B, and oneself determines to get where overlap bus, if the clock failure of current selection or index variation can be selected other one road clock according to switchover policy, master/backup clock does not have strict the differentiation.The ATCA standard is not stipulated drive end and receiving end pickup groove position in addition, consult by IPMC (intelligent platform management controller) and chassis management module by each gusset plate fully, determine that where which gusset plate driving overlaps clock, produces conflict to prevent same clock Multipoint Drive.
In order to realize the clock synchronization of ATCA system, following two schemes are arranged in the prior art:
Scheme one: the time clock feature of ATCA system is incorporated into power board, adopt AMC (advanced sandwich sub card) subcard mode, perhaps adopt off-gauge subcard to realize the synchronous clock function, power board carries motherboard as it, become the drive source of ATCA clock bus, as shown in Figure 3, a power board outputs to backboard clock bus A, an other power board outputs to backboard clock bus B, and plug-in card respectively goes out a cascade clock cable behind two power boards.Different with traditional product is that there is not main and standby relation in this clock board, the same topological structure of forming a double star plane with power board.The system synchronization clock can also be exported the multipath clock signal by the plug-in card panel behind Zone3 except that outputing to core bus A, B, use or the online case of synchronisation stage for clock test.Two of every kind of clock bus A and B on the ATCA backboard, the output of a respectively corresponding clock board, the switching of clock reference is judged by each gusset plate oneself on the gusset plate.When the ATCA platform uses in the circuit domain occasion, can insert the AMC subcard of band line interface on the gusset plate, extract 8K line synchronization clock, be divided into two-way and on the back plug-in card in gusset plate Zone3 district, export, receive respectively by cable behind the Zone3 clock of two switching boards on the plug-in card.Plug-in card is also supported conventional clock benchmark inputs such as 2Mbps, 2Mbits, 5MHz behind the Zone3 of power board except that supporting 2 route road clock inputs.When the ATCA platform needs Multi-frame cascading, setting certain frame in the system is root node, this frame place power board configurable clock generator subcard, run-down lines extraction clock or 2Mbps, the input of 2Mbits isochronon benchmark, the system synchronization clock of output is distributed to the back plug-in card input end of the power board of other frames by cable, be distributed to each gusset plate in the frame by power board by clock bus again, the power board of all the other frames is the interpolated clock subcard not.
Scheme two: insert the function that module is finished scheme one described all clock aspects after setting up clock node plate and clock separately.As shown in Figure 4, a clock node plate is exported clock simultaneously to backboard clock bus A, B, and plug-in card respectively goes out a cascade clock cable behind two clock node plates.Two clock node plates are positioned at the adjacent slot position, use the UPDATE passage of ATCA definition to come active and standby usefulness.
In conjunction with the ATCA construction characteristic, as can be seen, scheme two can utilize the UPDATE passage of ATCA to realize the master/backup clock gusset plate, can prevent the Single Point of Faliure of clock node plate, but must use adjacent two groove positions, obviously waste valuable groove position resource, reduced the processing power of system.And, be difficult to accomplish a cable output for the cascade clock that the back slotting module of two clock node plates is exported, be difficult for realizing the clock synchronization of cascade cabinet.The shortcoming of scheme one also clearly, see accompanying drawing, the clock cable of cascade has two-way, must with point-to-point connection of back plug-in card of opposite end ATCA cabinet power board, increased switching strategy complicacy on the plate, be difficult to guarantee that two power boards use the clock reference on same road, and influenced the external interface quantity of inserting module after power board outputs to.For these two kinds of schemes, the external clock benchmark of same kind must provide two-way to come mean allocation to two block clock node plate at least, the reference clock resource of waste operator preciousness.
Summary of the invention
Technical matters to be solved by this invention provides a kind of clock system and method for advanced telecom computer architecture, only need one the tunnel when making the external clock benchmark insert, the cable or the optical fiber outlet of unique ATCA cabinet cascade are provided on module card behind the clock simultaneously.
For solving the problems of the technologies described above, the present invention is achieved by the following technical solutions:
A kind of clock system of advanced telecom computer architecture, this system is positioned at cabinet, and described cabinet comprises gusset plate and backboard, and described system comprises: insert module, middle layer mezzanine module behind clock daughter card, the clock;
Insert module behind the described clock and be used to insert the external clock benchmark, send it to clock daughter card by middle layer mezzanine module; Reception to its processing, and provides cascade clock signal output interface from the cascade clock signal of clock daughter card;
Described clock daughter card is positioned on the described gusset plate, is used for receiving, handles the external clock benchmark, selects the punctual clock of a roadbed according to priority, behind three kinds of clocks that the system that is processed into needs, it is sent to three clock bus on the described backboard respectively; The output cascade synchronous clock sends to by middle layer mezzanine module and to insert module behind the clock;
Described middle layer mezzanine module is positioned at the Zone3 district of gusset plate, is used for the clock reference access interface interconnection with clock daughter card on each groove position gusset plate, the interconnection of cascade clock output interface.
Wherein, the pros and cons of described middle layer mezzanine module all has two plug sockets: a row is for Zone3 socket 1, is used to connect the clock reference output interface of inserting module behind the clock reference access interface of clock daughter card and the clock; Another row is for Zone3 socket 2, is used to connect the cascade clock access interface of inserting module behind the cascade clock output interface of clock daughter card and the clock; All Zone3 socket 1 interconnection, all Zone3 socket 2 interconnection.
Wherein, described clock system also comprises chassis management module, and this module is used for the configuring external clock reference, offers clock daughter card, and reports current benchmark selection situation and clock synchronization situation to webmaster.
Wherein, described clock system also comprises the intelligent platform management controller daughter card module, this module is positioned on the described gusset plate, be used to realize the veneer management function, measurement, monitor node board status, the recording exceptional event log, and when unusual to described chassis management module report and alarm or status information.
Wherein, described clock daughter card independently is positioned on the gusset plate in the advanced sandwich sub card mode, inserts the rear portion that the later module card form of module is positioned at cabinet behind the described clock.
A kind of clock synchronizing method of advanced telecom computer architecture may further comprise the steps:
A: two clock daughter card are inserted two gusset plates respectively, two active and standby usefulness of clock daughter card, and plug-in card behind the clock linked to each other with each gusset plate by middle layer mezzanine module;
B: cabinet powers on, and chassis management module normally starts, and obtains the physical slot item of clock bus drive end, and this clock bus drive end is the gusset plate that is inserted with clock daughter card;
C: according to above-mentioned physical slot item, chassis management module is provided with above-mentioned two gusset plates and uses same clock reference;
D: insert module behind the clock external clock benchmark is sent to above-mentioned two gusset plates by middle layer mezzanine module, wherein the best gusset plate of health condition is handled described external clock benchmark, select the punctual clock of a roadbed according to priority, behind the clock of three kinds of frequencies that the system that is processed into needs, send it to three clock bus on the described backboard, and obtain the cascade clock signal, insert module after sending it to clock.
Wherein, the method of obtaining the physical slot item of clock bus drive end among the described step b is: the intelligent platform management controller daughter card module communication on chassis management module and each gusset plate, obtain the clock daughter card situation on the throne on the gusset plate, obtain the physical slot item of clock bus drive end according to the hardware address of gusset plate.
Wherein, also comprise after the described steps d:
E: chassis management module is monitored the health status of above-mentioned two gusset plates in real time, force select command according to health status or webmaster, select the gusset plate of clock signal, the time point that switches and switch by the clock output of two gusset plates of hardware controls of gusset plate.
F: the cascade cabinet is according to the monitoring situation of the gusset plate that inserts the cascade clock to the cascade input clock, the clock of selecting suitable cascade to come.
Wherein, described steps d also comprises: another gusset plate of described two gusset plates is only handled input reference, does not allow to output to the slotting module in backboard clock bus and back.
Wherein, the groove position of each gusset plate is selected at random in the described method, does not need adjacent.
The present invention has following beneficial effect:
(1) minimum requirements only needs operator to provide one road clock reference to get final product, and saves the clock resource of operator, has reduced cost.
(2) plug-in card only needs one behind the clock, can be positioned at any groove position, and such as being inserted in the groove position that does not need plug-in card after the function, the back slot position that saves can be used for the gusset plate of the external or outer outbound port of other needs.
(3) output of the synchronous clock of cascade has only a cable, does not need interactive information between each cabinet, has reduced the complicacy of management software selection clock reference strategy, has improved the reliability of system.
Description of drawings
1.1 and 1.2 are respectively chassis management module functional schematic and hardware elementary diagram among Fig. 1;
Fig. 2 is an IPMC subcard structural representation;
Fig. 3 is the method synoptic diagram of prior art scheme one;
Fig. 4 is the method synoptic diagram of prior art scheme two;
Fig. 5 is the clock daughter card schematic diagram;
Fig. 6 inserts module diagram behind the clock;
Fig. 7 is a middle layer of the present invention mezzanine synoptic diagram;
Fig. 8 is a clock system structural representation of the present invention.
Embodiment
Clock system of the present invention comprises chassis management module, IPMC (intelligent platform management controller) daughter card module; Also comprise: insert module, middle layer mezzanine module behind clock daughter card, the clock.
Below each module is introduced respectively, wherein the IPMC subcard is independently to be positioned on the gusset plate of each ATCA, realize the veneer management function of PICMG3.0 regulation and stipulation, measurement, monitor node board status, the recording exceptional event log, and when unusual, pass through IPMB (Intelligent Platform Management Bus) interface to chassis management module report and alarm or status information.Webmaster can pass through chassis management module, and whether configuration querying external clock benchmark, and chassis management module reports current benchmark to select situation to webmaster, clock be synchronous etc.
Clock daughter card is in the AMC mode, perhaps independently be positioned on the gusset plate of each ATCA with off-gauge subcard form, be used for satisfying the requirement of clock synchronous network, receive, handle the external sync clock signal, comprise that clock reference extracts and receiving circuit frequency dividing circuit, digital phase discriminator, clock regeneration circuit, clock quality circulatory monitoring circuit.
Insert module behind the clock and be positioned at the rear portion of ATCA cabinet with RTM (back module card) form, be different from other double star plane situations, only use module card after to finish access, the impedance matching of external clock benchmark, the level conversion of cascade clock, driving, distribution, monitoring, and the cascade clock is with cable or optical fiber output.
Middle layer mezzanine device is positioned at the Zone3 district of veneer, the Zone3 district that can connect all groove positions, according to the product concrete condition, also can be reduced to the Zone3 district of two adjacent slot positions of independent connection, realize that the outside input clock benchmark of single channel distributes in the interconnection of a plurality of ATCA gusset plates, circuit extracts the output interconnection of clock, each groove position cascade clock.
The implementation method of above-mentioned clock system may further comprise the steps:
The first step: two clock daughter card are inserted two gusset plates with the trough position respectively,, be connected to certain groove position at random with inserting module behind the clock by middle layer mezzanine module;
Second step: cabinet powers on, after the normal startup of chassis management module, by the IPMC subcard communication on IPMB interface and each gusset plate, obtain clock daughter card situation on the throne on the gusset plate, obtain the physical slot item of clock bus drive end according to the hardware address of gusset plate, and report webmaster, the real-time display synchronization clock of graphics mode groove position and state;
The 3rd step: according to the physical slot item of the second bus driver end that obtain of step, chassis management module is inquired about the health condition of these two gusset plates, by IPMB (Intelligent Platform Management Bus) interface, these two gusset plates are set use same clock reference, insert module behind the clock external clock benchmark is sent to this two gusset plates by middle layer mezzanine module, the best gusset plate of chassis management module and health condition is communicated by letter then, make its clock that will handle output on the clock bus of ATCA backboard, the output cascade synchronous clock is inserted module behind clock, and an other gusset plate is only handled the input reference clock, does not allow to output to the slotting module in backboard clock bus and back;
The 4th step: chassis management module is monitored the health condition of these two gusset plates in real time, according to health condition, perhaps force select command, select the gusset plate of clock signal, the time point that switches and switch by the clock output of two gusset plates of hardware controls of gusset plate according to webmaster;
The 5th step: because the selection of the cascade clock switching point of output is suitable, do not influence the clock synchronization situation of cascade cabinet, the cascade cabinet does not need extra process, as long as according to the monitoring situation of the gusset plate that inserts the cascade clock to the cascade input clock, the independent clock of selecting suitable cascade to come gets final product.
The present invention is described in further detail below in conjunction with drawings and Examples:
Fig. 1 is chassis management module functional schematic and hardware elementary diagram, and hardware core is that logical device is realized I
2C interface is realized various network management interfaces by module software, communicates with IPMC, is used for monitoring, controlling gusset plate plate and other functional module of cabinet, and reporting system is unusual and carry out basic recovery operation.
1) hot plug management;
2) power allocation manager;
3) case radiation management;
4) opening/closing of electronic switch Control Node plate and backboard connectivity port;
5) backboard IPMB bus failure detects, manages and recovers.
As shown in Figure 2, IPMC subcard software, hardware mainly are achieved as follows function:
1) provides the Intelligent Platform Management Bus interface of ATCA normalized definition, and can support hot plug buffering and isolated controlling function;
2) possesses the non-volatile memories function of Sensor Data Record and other critical datas;
3) provide power-management interface, comprise the control of one-board power supply switch, veneer CPU state, the control of veneer useful load power supply the ATCA veneer;
4) provide the control interface of ATCA veneer front panel pilot lamp, comprise the control of off-line state pilot lamp, Hot swap LED, stand by lamp and the identification of front panel handle switch state;
5) provide a hardware monitoring interface, realize supervision, fan speed measurement and rotating speed control veneer voltage, temperature.
Clock daughter card schematic diagram as shown in Figure 5, clock daughter card be used for to outside reference change, frequency division, quality monitoring, by priority and the quality situation of single-chip microcomputer according to clock reference, select one road clock, carry out bit comparison mutually with the clock of OCXO on the subcard (constant-temperature crystal oscillator) output, phase difference value is converted to aanalogvoltage by D/A (digital-to-analog conversion) device, and the phase place of control OCXO clock is consistent with reference clock.This moment is to the clock of OCXO output frequency division once more, the synchronous clock of the various frequencies that generation system needs.The AMC subcard of standard can be adopted, also self-defining subcard can be adopted.
Accompanying drawing 6 is depicted as the structure of inserting module behind the clock; Structure such as Fig. 7 of middle layer mezzanine module, its pros and cons all has two plug sockets: a row is for Zone3 socket 1, is used to connect the clock reference output interface of inserting module behind the clock reference access interface of clock daughter card and the clock; Another row is for Zone3 socket 2, is used to connect the cascade clock access interface of inserting module behind the cascade clock output interface of clock daughter card and the clock; All Zone3 socket 1 interconnection, all Zone3 socket 2 interconnection.Insert module and the supporting use of middle layer mezzanine behind the clock, finish external reference clock and be linked into the gusset plate that each might the interpolated clock subcard, according to cascade cabinet distance and environment for use, the synchronous clock of cascade cabinet that is used for to gusset plate output carries out level conversion, output on the socket on the plug-in card panel of back, perhaps be converted to light signal by optical module, so as by cable or (with) optical fiber is connected the cascade cabinet.
The one-piece construction synoptic diagram of clock system of the present invention as shown in Figure 8, wherein hardware module partly comprises:
A, chassis management module;
B, IPMC (intelligent platform management controller) daughter card module;
Specific descriptions are seen above-mentioned accompanying drawing 1,2 explanations.These two standard modules that module is the PICMG3.0 normalized definition comprise and realize the IPMI agreement of communicating by letter between these two modules, mainly finish between gusset plate and the cabinet and to report veneer management functions such as management, monitoring, webmaster order realization about gusset plate information.
C, clock daughter card;
Insert module behind D, the clock;
E, middle layer mezzanine device;
These three modules are the invention core, its clock synchronization implementation mode is: at first from the external clock benchmark of operator, perhaps the native system gusset plate extracts the external interface line clock, by plug-in card behind the cable incoming clock, import the middle layer mezzanine into by the back plug-in card, all Zone3 district socket 1 interconnection on the mezzanine of middle layer, socket 2 provides the interconnection of level output connection clock, guarantee to insert behind the clock module insert at random any groove position can both the input clock benchmark to gusset plate, the output cascade clock is to back plug-in card.Gusset plate is connected plug 1 gang socket 1, plug 2 gang sockets 2 with Zone3 plug, the socket of back plug-in card by the middle layer mezzanine.Clock reference is by the clock daughter card of plug 1 access node plate, carry out the Reference mass monitoring, select the punctual clock of a roadbed to carry out frequency division, phase demodulation, the OCXO output clock consistent on the control clock daughter card with frequency, the phase place of reference clock, then according to the IPMC and the chassis management module negotiation result of this plate, the control clock drives, is distributed on the backboard clock bus A/B, by frequency transformation, needed other frequency clocks of generation system, be converted to suitable level, output to plug-in card behind the clock, guarantee that any time total system has only a clock drive end.
The above only is preferred embodiment of the present invention, not in order to restriction the present invention, all any modifications of being done within the spirit and principles in the present invention, is equal to and replaces and improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. the clock system of an advanced telecom computer architecture, this system is positioned at cabinet, and described cabinet comprises gusset plate and backboard, it is characterized in that, and described system comprises: insert module, middle layer mezzanine module behind clock daughter card, the clock;
Insert module behind the described clock and be used to insert the external clock benchmark, send it to clock daughter card by middle layer mezzanine module; Reception to its processing, and provides cascade clock signal output interface from the cascade clock signal of clock daughter card;
Described clock daughter card is positioned on the described gusset plate, is used for receiving, handles the external clock benchmark, selects the punctual clock of a roadbed according to priority, behind the clock of three kinds of frequencies that the system that is processed into needs, it is sent to three clock bus on the described backboard respectively; The output cascade clock signal sends to by middle layer mezzanine module and to insert module behind the clock;
Described middle layer mezzanine module is positioned at the Zone3 district of gusset plate, is used for the clock reference access interface interconnection with clock daughter card on each groove position gusset plate, and is used for the cascade clock output interface interconnection with clock daughter card on each groove position gusset plate.
2. the clock system of advanced telecom computer architecture as claimed in claim 1, it is characterized in that, the pros and cons of described middle layer mezzanine module all has two plug sockets: a row is for Zone3 socket 1, is used to connect the clock reference output interface of inserting module behind the clock reference access interface of clock daughter card and the clock; Another row is for Zone3 socket 2, is used to connect the cascade clock access interface of inserting module behind the cascade clock output interface of clock daughter card and the clock; All Zone3 socket 1 interconnection, all Zone3 socket 2 interconnection.
3. the clock system of advanced telecom computer architecture as claimed in claim 1, it is characterized in that, described clock system also comprises chassis management module, this module is used for the configuring external clock reference, offer clock daughter card, and report current benchmark selection situation and clock synchronization situation to webmaster.
4. the clock system of advanced telecom computer architecture as claimed in claim 3, it is characterized in that, described clock system also comprises the intelligent platform management controller daughter card module, this module is positioned on the described gusset plate, be used to realize the veneer management function, measure, the monitor node board status, the recording exceptional event log, and when unusual to described chassis management module report and alarm or status information.
5. the clock system of advanced telecom computer architecture as claimed in claim 1 is characterized in that, described clock daughter card independently is positioned on the gusset plate in the advanced sandwich sub card mode, inserts the rear portion that the later module card form of module is positioned at cabinet behind the described clock.
6. the clock synchronizing method of an advanced telecom computer architecture is characterized in that, may further comprise the steps:
A: two clock daughter card are inserted two gusset plates respectively, two active and standby usefulness of clock daughter card, and link to each other with each gusset plate by middle layer mezzanine module inserting module behind the clock;
B: cabinet powers on, and chassis management module normally starts, and obtains the physical slot item of clock bus drive end, and this clock bus drive end is the gusset plate that is inserted with clock daughter card;
C: according to above-mentioned physical slot item, chassis management module is provided with above-mentioned two gusset plates and uses same clock reference;
D: insert module behind the clock external clock benchmark is sent to above-mentioned two gusset plates by middle layer mezzanine module, wherein the best gusset plate of health condition is handled described external clock benchmark, select the punctual clock of a roadbed according to priority, behind the clock of three kinds of frequencies that the system that is processed into needs, send it to three clock bus on the backboard of described cabinet, and obtain the cascade clock signal, insert module after sending it to clock.
7. the clock synchronizing method of advanced telecom computer architecture as claimed in claim 6, it is characterized in that, the method of obtaining the physical slot item of clock bus drive end among the described step b is: the intelligent platform management controller daughter card module communication on chassis management module and each gusset plate, obtain the clock daughter card situation on the throne on the gusset plate, obtain the physical slot item of clock bus drive end according to the hardware address of gusset plate.
8. the clock synchronizing method of advanced telecom computer architecture as claimed in claim 6 is characterized in that, also comprises after the described steps d:
E: chassis management module is monitored the health status of above-mentioned two gusset plates in real time, pressure select command according to health status or webmaster, select the gusset plate of output cascade clock signal, the time point that switches and switch by the clock output of two gusset plates of hardware controls of gusset plate;
F: the cascade cabinet is according to the monitoring situation of the gusset plate that inserts the cascade clock signal to the cascade input clock signal, the clock signal of selecting suitable cascade to come.
9. the clock synchronizing method of advanced telecom computer architecture as claimed in claim 6, it is characterized in that, described steps d also comprises: another gusset plate of described two gusset plates is only handled the input clock benchmark, inserts module after not allowing to output to backboard clock bus and clock.
10. the clock synchronizing method of advanced telecom computer architecture as claimed in claim 6 is characterized in that, the groove position of each gusset plate is selected at random in the described method, does not need adjacent.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2007100771377A CN101119171B (en) | 2007-09-14 | 2007-09-14 | Clock synchronous system and method of advanced telecommunication computer system |
| BRPI0722011A BRPI0722011B1 (en) | 2007-09-14 | 2007-12-25 | clock synchronization system and method for advanced telecommunications computing architecture |
| PCT/CN2007/003767 WO2009033342A1 (en) | 2007-09-14 | 2007-12-25 | A clock synchronization system and method for the advanced telecommunication computing architecture |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2007100771377A CN101119171B (en) | 2007-09-14 | 2007-09-14 | Clock synchronous system and method of advanced telecommunication computer system |
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| Publication Number | Publication Date |
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| CN101119171A CN101119171A (en) | 2008-02-06 |
| CN101119171B true CN101119171B (en) | 2011-04-06 |
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| CN2007100771377A Active CN101119171B (en) | 2007-09-14 | 2007-09-14 | Clock synchronous system and method of advanced telecommunication computer system |
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|---|---|
| CN (1) | CN101119171B (en) |
| BR (1) | BRPI0722011B1 (en) |
| WO (1) | WO2009033342A1 (en) |
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| CN102227102B (en) * | 2011-06-23 | 2014-08-20 | 天津光电通信技术有限公司 | Large capacity information selection and gathering system of SDH |
| CN102662455B (en) * | 2012-05-30 | 2016-04-20 | 曙光信息产业(北京)有限公司 | The control device that a kind of RTM powers on |
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| CN111190757B (en) * | 2019-12-10 | 2023-09-01 | 散裂中子源科学中心 | Back plate connection plug-in of accelerator time sequence and quick machine protection integrated system |
| CN111427809B (en) * | 2020-03-09 | 2023-08-04 | 中国人民解放军海军航空大学青岛校区 | Picosecond-level high-precision timing synchronous high-speed interconnection backboard |
| CN111880603B (en) * | 2020-07-27 | 2022-06-17 | 浪潮集团有限公司 | Multi-chassis feedback result control trigger synchronization method, device, equipment and medium |
| CN113641555B (en) * | 2021-08-17 | 2023-11-24 | 中国联合网络通信集团有限公司 | Fault equipment positioning method, device, equipment and readable storage medium |
| CN114815965B (en) * | 2022-06-29 | 2022-09-20 | 中星联华科技（北京）有限公司 | Clock signal generating and synchronizing method and device |
| CN115981441B (en) * | 2023-03-21 | 2023-07-25 | 湖南博匠信息科技有限公司 | Advanced telecom computing architecture chassis component and chassis based on double star topology |
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| KR100772188B1 (en) * | 2005-12-08 | 2007-11-01 | 한국전자통신연구원 | ATCA back-plane apparatus and ATCA switching system using the same |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101006738A (en) * | 2004-09-08 | 2007-07-25 | Ut斯达康通讯有限公司 | Central base station system based on advanced telecommunication computer system structure |
| CN1786936A (en) * | 2004-12-09 | 2006-06-14 | 株式会社日立制作所 | Multi node server system |
| CN1937484A (en) * | 2006-09-21 | 2007-03-28 | 华为技术有限公司 | Method and system for realizing multi-clock synchronization |
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| BRPI0722011A2 (en) | 2015-02-10 |
| BRPI0722011B1 (en) | 2019-12-24 |
| CN101119171A (en) | 2008-02-06 |
| WO2009033342A1 (en) | 2009-03-19 |
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