WO2004073221A1

WO2004073221A1 - Transmission system, particularly for optical fiber offset of x-dsl signals

Info

Publication number: WO2004073221A1
Application number: PCT/FR2004/000046
Authority: WO
Inventors: Lucien Pophillat
Original assignee: France Telecom
Priority date: 2003-01-16
Filing date: 2004-01-13
Publication date: 2004-08-26
Also published as: FR2850222A1

Abstract

The invention relates to an optical transmission signal for optical fiber offset of electric x-DSL signals. The electric signals (S1-Sn) are modulated and multiplexed and are then converted into an optical signal by an optical transmitters (9) in order to be transmitted on a fiber optic cable (5). Modulation-multiplexing means (7) are provided in order to provide a signal which has two voltage levels. The invention can be used to service zones that are remote from a network access node.

Description

OPTICAL TRANSMISSION SYSTEM, PARTICULARLY FOR FIBER OFFSET

X-DSL SIGNAL OPTICS

The present invention relates to an optical transmission system, in particular for the offset by optical fibers of electrical signals of x-DSL type. The invention relates to the field of x-DSL type broadband access systems, for example ADSL ("Asynchronous Digital Subscriber Line" in English terminology). It typically finds its application in serving remote areas of a network access node, also called a central office.

In the current context of the increase in transmission speed, and the explosion of Internet services, many broadband access systems have been introduced to subscribers. These broadband access systems use existing cabling, that is, cabling on twisted copper pair. However, for areas remote from the exchange, the throughput performance is greatly degraded due to the weakening of the copper pair. In order to allow the service of said remote areas in high-speed services, systems for offsetting electrical signals by means of one or more optical fibers are proposed. One of these systems is described in the article by asaru Fuse, Toshihiko Yasue, Mariko Nakaso, Hiroaki Yamamoto, Kuniaki Utsumi, and Susumu Morikura entitled "Proposai of Multi-channel xDSL Access System for Multi-d ellings using Optical SCM Technology "and published in" Proceedings of ECOC'02, paper 9.2.4 ". The system described in this article uses a known modulation-multiplexing technique, usually called "Optical SCM" (Optical Sub-Carrier Multiplexing in English). The invention will now be presented with reference to FIG. 1 which schematically represents a system similar to that which is described in the above-mentioned article.

Such a system comprises a center equipment 1 located near or inside a central and connected by copper pairs 2ι to 2 _n to an access equipment 3 which can be, for example, a DSLAM ("Digital Subscriber Line Access Multiplexer "in Anglo-Saxon terminology). It also includes remote equipment 4 located close to users Ul to Un. The center equipment 1 is connected to the remote equipment 4 by a fiber optic cable 5.

The elementary functions of the center 1 and remote 4 equipment are symmetrical. Thus, this equipment firstly comprises means 6 for separating the two directions of transmission. These means 6 can be, for example, diplexing filters or directional couplers. They also include modulation-multiplexing means 7 as well as demultiplexing-demodulation means 8. The modulation and multiplexing functions, as well as those of demultiplexing and demodulation, have been here voluntarily combined because, in practice, they are very often strongly intertwined. This equipment also includes optical transmitters 9 and optical receivers 10. Each optical transmitter 9 thus makes it possible to convert the frequency modulated and multiplexed signal, coming from a modulation - multiplexing means, into an optical signal which it transmits on the fiber optic cable 5. Each optical receiver 10 makes it possible to restore the multiplexed electrical signal from the received optical signal. One can use an optical fiber per direction of transmission or a single fiber for the two directions of transmission by implementing, for example, optical wavelength multiplexing. An important drawback of the "Optical SCM" technique is that it involves the use of an expensive optical transmitter 9 to allow optimal linearity to be obtained between the power of the optical signal and the voltage of the electrical signal. , in order to limit the level of intermodulation products between the sub-carriers and thus avoid problems of distortion of the signal conveyed. This can lead, in practice, to impose the use of a laser type DFB ("Distributed Feed Back" in English) more expensive than a laser type FP ("Fabry-Pérot") or type VCSEL (" Vertical Cavity Surface Emitting Laser ".

Another disadvantage lies in the fact that, to avoid the phenomenon of clipping, or "clipping" in English, as well as the phenomenon of underlying intermodulation distortion, phenomena both well known to those skilled in the art, the effective optical modulation index must not exceed a low value close to 25%. However, such an index value is not favorable in terms of signal-to-noise ratio at the output of the optical receiver and, consequently, it results in a high optical power required for reception.

Another drawback concerns the modulation-multiplexing and demultiplexing-demodulation functions which require, for their implementation, numerous circuits such as for example local oscillators, mixers and selective filters which are generally expensive, bulky or large consumers of 'energy.

Also, the technical problem to be solved by the object of the present invention is to propose an optical transmission system, in particular for the offset by optical fiber of electrical signals of x-DSL type, comprising center equipment connected to remote equipment. by means of at least one fiber optic cable, said center equipment and said remote equipment each comprising a modulation - multiplexing means connected to an optical transmitter equipment for converting said electrical signals into an optical signal intended to be conveyed on the fiber optic cable, and demultiplexing-demodulation means connected to an optical receiver for reproducing the signals electrical from said optical signal carried on said optical fiber cable, which would overcome constraints on the linearity between the power of the optical signal and the voltage of electrical signals, to allow the use of a cheaper optical transmitter , and which would also have an effective optical modulation index well above 25%, which would be favorable for obtaining an optical power required for low reception.

The solution to the technical problem is obtained, according to the present invention, by the fact that said modulation - multiplexing means is arranged to produce a signal at two voltage levels and that said demultiplexing - demodulation means is arranged to restore said electrical signals to starting from said signal at two voltage levels generated by said modulation - multiplexing means, the signal at two voltage levels (TM) consisting of periodic frames each comprising a synchronization cell (CEL0) followed by cells

(CEL1 - CELn) corresponding respectively to each of said electrical signals (SI - Sn) and each comprising a single voltage level transition whose time position is a function of the voltage of said electrical signal (Sl-Sn) corresponding to the instant of said transition.

Thus, the signal produced by the modulation means - -multiplexing being a binary type signal since it has two voltage levels, the clipping phenomena as well as the distortion phenomena intermodulation no longer appear. Consequently, the system makes it possible to overcome the constraints on the linearity and can therefore use a less expensive optical transmitter than those used until now. In addition, for such a signal, the clipping phenomenon being avoided, there is no longer any constraint on the effective optical modulation index which can therefore reach a value close to 100%.

On the other hand, thanks to the invention, the modulation functions - multiplexing on the one hand, and demultiplexing - demodulation on the other hand use inexpensive circuits, not bulky, and consuming little energy.

Other features and advantages of the invention will appear on reading the following description, given by way of illustrative but nonlimiting example, with reference to the appended figures which represent:

- Figure 1, already described, a functional diagram of an optical transmission system for the offset by optical fibers of electrical signals of x-DSL type, - Figure 2a, a functional diagram of a modulation-multiplexing means used in a system conforming to that of FIG. 1,

FIG. 2b, a timing diagram of the signals relating to the modulation-multiplexing means shown diagrammatically in FIG. 2a,

FIG. 3, a diagram of an embodiment of a means for generating voltage ramp signals used in the modulation means - multiplexing of FIG. 2a, - FIG. 4, a diagram of a mode of realization of a means for generating synchronization elements used in the modulation - multiplexing means of FIG. 2a, FIG. 5a, a functional diagram of a demultiplexing-demodulation means used in a system conforming to that of FIG. 1,

FIG. 5b, a timing diagram of the signals relating to the demultiplexing - demodulation diagram shown in FIG. 5a,

FIG. 6, a diagram of an embodiment of a synchronization recovery means used in the demultiplexing - demodulation means of FIG. 5a.

Figure 1 which has already been described to illustrate the prior art, also applies to an optical transmission system, for the offset by optical fibers of electrical signals of x-DSL type according to the invention. Indeed, the system includes the same elements as the system already described. The difference with the systems of the prior art essentially lies in the processing of the signals by the modulation - multiplexing 7 and demultiplexing - demodulation 8 means. The modulation - multiplexing 7 means in particular no longer processes the signals according to the SCM technique, but it is arranged to convert them into a signal with two voltage levels. The demultiplexing - demodulation means is, in turn, arranged to restore each of the electrical signals SI to Sn of the x-DSL type from the signal at two voltage levels generated by the mul iplexing modulation means.

A functional diagram of a modulation-multiplexing means 7 intended to produce a signal at two voltage levels is shown in FIG. 2a and it will be described, for a better understanding, with reference to the timing diagram of FIG. 2b.

The signal at two voltage levels which is produced consists of periodic frames each comprising a synchronization cell CEL0 followed by cells CEL1 to CELn corresponding respectively to each of the signals S1 to Sn to be multiplexed and each comprising a single voltage level transition whose temporal position is a function of the voltage of said electrical signal SI - Sn corresponding to the instant of said transition.

An oscillator 11 produces a clock signal CLK which controls a shift register 12. This shift register operates in a loop so as to periodically produce on its outputs control signals C0 to Cn corresponding to cells CELO to CELn. The control signal C0 is directed to a means for generating synchronization elements 13 while the control signals C1 to Cn control means for generating voltage ramps 14 _x to 14 _n intended to produce ramp signals RI to Rn. These ramp signals are compared, by means of comparators 15ι to 15 _n , to the electrical input signals SI to Sn of the modulation-multiplexing means 7 so as to produce the signals T1 to Tn of which each rising transition is produced when the voltages ramp RI - Rn and corresponding signal SI - Sn are equal.

Thus, each upward transition of the signals Tl to Tn has a time position in its cell CEL1 to CELn which is proportional to the instantaneous voltage of the input signal SI to Sn corresponding to the instant of said transition. For correct operation, the amplitude of the ramp signals must of course be greater than the maximum peak-to-peak amplitude of the input signals SI to Sn. The signals Tl to Tn are then time-multiplexed by means of a first "OR" logic gate 16a which receives the signals from the comparators 15 of rank of a first parity, for example of odd rank, and of a second gate "OR" logic 16b which receives the signals from the rank comparators 15 of the other parity, i.e. even rank in the example. The "OR" gate 16a, respectively 16b, is followed by a monostable flip-flop 17a, respectively 17b, which delivers a signal Ta, respectively Tb, comprising a short pulse for each rising transition of the signals Tl - Tn of odd rank, respectively even. The signals Ta and Tb are sent to the set and reset inputs of a flip-flop 18 which delivers on its output a time multiplex signal TM with two voltage levels capable of modulating an optical transmitter in light intensity.

It should be noted that the monostable flip-flops 17a and 17b are not functionally essential for the production of the signal TM. In fact, their presence is advantageous because they reduce the risk of malfunction of the flip-flop 18 caused by overlapping of the pulses on its set and reset inputs. Indeed, the ramp signals RI to Rn are represented in FIG. 2b in an ideal manner for reasons of simplicity, but, in practice, it is quite obvious that the rising edges of these signals do not have a zero rise time . For this reason, the falling edges of the signals Tl to Tn can encroach on the immediately next cell, which constitutes a risk of overlapping between two consecutive pulses Tl to Tn. In addition, since it is difficult, in practice, to produce a well-linear ramp in the areas close to its ends, it is possible to use a ramp whose duration is greater than the duration of a cell, but this further increases the risk of overlap between two consecutive pulses Tl to Tn.

It is interesting to note that the signals T1 to Tn correspond to a type of modulation well known under the name PWM ("Puise Width Modulation" in English).

PWM modulation is synchronous modulation with irregular sampling. Indeed, the samples of modulating signal voltages are not sampled regularly, but at times that depend on the value of these samples. For this reason, it is necessary to use an average sampling repetition frequency higher than the minimum frequency allowed by sampling theory. This minimum frequency is equal to twice the highest frequency contained in the signals S1 to Sn to be multiplexed. It should be noted that in the case of the present invention, the maximum amplitude of the variations in sampling instant is equal to the duration of a cell. For this reason, when the number of cells per frame is high, it can be considered that the sampling is almost regular which allows the use of a ramp repetition frequency close to the minimum frequency authorized by the theory of sampling.

For example, by way of illustration, in the case of an ADSL signal in downlink mode, for which it is recalled that the highest frequency is of the order of 1.1 MHz, a ramp repetition frequency of the order of 3 MHz is sufficient with a frame comprising 16 cells, one of which is reserved for synchronization and the other 15 for multiplexing 15 signals. The CLK clock frequency is then 3X16 = 48 MHz and the average frequency of the TM signal is 48/2 = 24 MHz. Note that in order to maintain good precision of the moments of transition of the TM signal, the high cutoff frequency of the optical transmission channel must be of the order of ten times the average frequency of the TM signal, ie 240 MHz.

An embodiment of one of the ramp generation means 14ι is shown in Figure 3. It comprises a first transistor 19 for supplying a capacitor 20 with constant current. To this end, this transistor 19 includes in its emitter circuit a resistor 21 connected to a potential -V and its base is connected to a reference potential Vref. Thus, the constant current is determined by the resistor 21 and the difference between Vref and -V. The ramp generation means also comprises a second transistor 22 for resetting the voltage ramp across the capacitor 20 and an adaptation means 23 intended to make the logic levels compatible, for example TTL (from the English "Transistor Transistor Logic ") or ECL (from the English" Emitter-Coupled Logic "), of the corresponding control signal C1 coming from the shift register 12 with the high and low voltages required on the basis of the transistor 22. This adaptation means 23 can be, for example, a simple bridge of resistances. The transistors shown in Figure 3 are bipolar transistors, but it is of course possible to use field effect transistors.

An embodiment of the means for generating synchronization elements 13, used in the modulation - multiplexing means of FIG. 2a, is shown in FIG. 4. It comprises a monostable flip-flop 24 receiving the control signal C0 and delivering a signal SY which comprises a short pulse for each rising transition of the signal C0. This signal SY is directed to three delay means, 25a, 25b and 25c, which provide a delay of%,%, and% respectively of the duration of the synchronization cell CEL0. The signal SYa from the delay means 25a is directed to an input of the "OR" logic gate 16a and the signals from the delay means 25b and 25c are applied to the inputs of another "OR" logic gate 26 which delivers a signal SYb directed to an input of the logic gate "OR" 16b.

A synchronization element thus produced is represented in FIG. 2b by the part of the signal TM situated inside the interior of the cell CEL0. It has of course the characteristic of not being able to be imitated by a particular position of the transitions located in cells CEL1 to CELn. It is centered in the CELO synchronization cell and is made up of three transitions spaced apart by a quarter of its duration. It should be noted that the circuits used in the modulation means - multiplexing and which have just been described, have the advantage of being inexpensive, not bulky and consuming little energy.

A functional diagram of a demultiplexing-demodulation means 8 intended to restore, from the signal TM produced by the modulation-multiplexing means 7, the electrical signals SI to Sn, is shown in FIG. 5a and will be described, for a better understanding, by referring to the timing diagram of figure 5b. The signal at two voltage levels TM from the optical receiver 10 is applied to the input of a comparison means 27 with symmetrical outputs. This comparator 27 thus produces the signal TM and the inverted signal TMinv. The demultiplexing - demodulation means 8 comprises as many "AND" logic gates 28χ to 28 _{n as} there are signals SI to Sn to be restored. The signal TM, coming from the comparator 27 is applied to an input of each AND gate 28 of rank of a first parity, for example of odd rank, while the inverted signal Tminv is applied to an input of each gate 28 of rank the other parity, that is to say of even rank in the example. The AND gates 28 _x to 28 _n also receive selection signals SEL1 to SELn produced by a shift register 29 which, like the shift register 12 of FIG. 2a, operates in a loop. This shift register 29 is controlled by an oscillator 30 whose frequency is controlled by a voltage from a synchronization recovery means 31 receiving on the one hand the signals TM and TMinv and on the other hand a synchronization selection signal SEL0 generated by the shift register 29. The timing diagram of FIG. 5b clearly shows that the signals PI to Pn obtained at the output of the AND gates 28 _x to 28 _n , respectively identical to the signals Tl to Tn of FIG. 2b, correspond to a PWM type modulation of the signals SI to Sn. According to a known property of PWM modulation, the signals PI to Pn include in their frequency spectrum the corresponding signals SI to Sn which can be isolated by simple low-pass filtering obtained by means of low-pass amplifiers 32χ to 32 _n . The synchronization recovery means 31, of the demultiplexing - demodulation means 8, intended to detect the presence of the synchronization elements produced by the generation means 13 of synchronization elements, of FIG. 4, is represented in FIG. 6. It includes a monostable flip-flop 33a, respectively 33b, producing a short pulse for each rising transition of the signal at two voltage levels TM, respectively of the inverted signal TMinv, a delay means 34a, respectively 34b, of a value of A, respectively y _{2 f} of the duration of the cell CEL0 and a logic gate "AND" with three inputs 35 which thus delivers a short pulse when the presence of a synchronization element is detected. The RSY signal formed by these short pulses is applied to an input of a phase comparator 36 which forms with the oscillator 30 and the shift register 29 a phase locked loop whose operation is well known to those skilled in the art. 'art. This phase comparator 36 also receives a signal SELOa which is obtained by delaying the synchronization selection signal SEL0 via a delay means 37. The phase comparator 36 is for example of the type producing at its output a zero error voltage when the pulses arriving on its inputs are centered between them. This configuration is represented on the timing diagram of FIG. 5b by the signals RSY and SELOa. Of course, the direction of the signals of the timing diagrams of FIGS. 2b and 5b is only an illustrative example because it is entirely possible to conceive an embodiment of the modulation-multiplexing means 7 and the demultiplexing-demodulation means 8 with reverse signals.

The circuits used in the modulation means - multiplexing 7 and in the demultiplexing - demodulation means 8 which have just been described have the advantage of being simple elements, inexpensive, not bulky and consuming little energy.

Claims

1. Optical transmission system, in particular for the offset by optical fibers of electrical signals

(SI-Sn) of x-DSL type, comprising center equipment (1) connected to remote equipment (4) by means of at least one fiber optic cable (5), said center equipment (1) and said remote equipment (4) each comprising a modulation-multiplexing means (7) connected to an optical transmitter (9) for converting said electrical signals (SI - Sn) into an optical signal intended to be conveyed on the cable (5) to optical fibers, and demultiplexing-demodulation means (8) connected to an optical receiver (10) for restoring the electrical signals (Sl-Sn) from said optical signal conveyed on said optical fiber cable, characterized in that the means modulation - multiplexing (7) is arranged to produce a signal at two voltage levels (TM) and in that the iplexer - demodulator demul (8) is arranged to restore each of the electrical signals (SI - Sn) from said signal at two voltage levels (TM) generated by said mo modulation yen - multiplexing, the signal at two voltage levels

(TM) consisting of periodic frames each comprising a synchronization cell

(CEL0) followed by cells (CEL1 - CELn) corresponding respectively to each of said electrical signals (SI - Sn) and each comprising a unique voltage level transition whose time position is a function of the voltage of said electrical signal (Sl-Sn) corresponding to the instant of said transition.

2. System according to claim 1, characterized in that the synchronization cell (CELO) comprises a synchronization element centered in said synchronization cell and composed of three transitions spaced apart from each other by a quarter of its duration.

3. System according to one of claims 1 or 2, characterized in that the multiplexing modulation means (7) comprises:

a means (13) for generating synchronization elements,

- means (14ι - 14 _n ) for generating voltage ramp signals (RI - Rn),

- Means (15χ - 15 _n ) for comparing the voltage ramp signals (RI - Rn) with the electrical signals (SI - Sn), intended to generate signals (Tl - Tn) each having a rising transition when the instantaneous voltage a corresponding ramp signal (RI - Rn) is equal to that of the corresponding signal (Sl-Sn),

- two "OR" logic gates (16a, 16b) each receiving the signals from the comparison means (15ι - 15 _n ) of rows of first and second parity respectively.

- a flip-flop (18) delivering said signal at two voltage levels (TM) from signals from said "OR" logic gates (16a, 16b).

4. System according to claim 3, characterized in that the modulation - multiplexing means (7) further comprises an oscillator (11) delivering a clock signal intended to drive a register at shift (12) operating in a loop to produce on the one hand a control signal (C0) of the means (13) for generating synchronization elements, and on the other hand control signals (Cl - Cn) of the means ( 14ι - 14 _n ) generation of ramp signals (RI - Rn).

5. System according to one of the preceding claims, characterized in that the means (13) for generating synchronization elements comprises a monostable rocker (24) receiving the control signal (C0), three delay means (25a, 25b and 25c) which provide a delay of Y ₂ respectively, and of the duration of the synchronization cell (CELO) and a logic "OR" gate (26) connected to two of the delay means (25b, 25c).

6. System according to one of the preceding claims, characterized in that each of the logic gates "or" (16a, 16b), of the multiplexing modulation means, is connected to a monostable rocker (17a, 17b) delivering a signal (Ta , Tb) to an input of the flip-flop (18), said signal (Ta, Tb) comprising a short pulse for each rising transition of the signals (Tl - Tn) of first and second parity ranks respectively.

7. System according to one of the preceding claims, characterized in that each means (14χ - 14 _n ) for generating ramp signals comprises: a first transistor (19) for supplying a capacitor (20) with constant current, said first transistor comprising in its emitter circuit a resistor (21), a second transistor (22) for resetting the voltage ramp across said capacitor (20), and an adaptation means (23).

8. System according to one of the preceding claims, characterized in that the demultiplexing-demodulation means (8) comprises: a comparator (27) receiving said signal at two voltage levels (TM) coming from the optical receiver (10), "AND" logic gates (28χ - 28 _n ) of rows of first parity each receiving the signal at two voltage levels (TM) from said comparator (27) and selection signals (SELl

- SELn) of rows of said first parity, "AND" logic gates (28 _x - 28 _n ) of rows of second parity each receiving a signal with two inverted voltage levels (TMinv) from said comparator (27) and signals selection (SELl - SELn) of rows of said second parity, and low-pass amplifiers (32χ to 32 _n ) delivering the electrical signals (SI to Sn).

9. System according to claim 8, characterized in that the demultiplexing-demodulation means (8) further comprises a shift register (29) controlled by an oscillator (30) and operating in a loop to produce on the one hand, the selection signals

(SEL 1 - SELn) and on the other hand, a synchronization selection signal (SEL0) intended to be supplied to a frame synchronization recovery means (31) producing a control voltage of the operating frequency of said oscillator (30).

10. System according to one of claims 8 or 9, characterized in that the synchronization recovery means (31) comprises two monostable flip-flops (33a and 33b) producing a short pulse for each rising transition of the signal at two voltage levels (TM), respectively of the inverted signal (Tminv), two delay means (34a and 34b) having the value and y ₂ of the duration of the synchronization cell (CEL0), a logic "AND" gate (35) followed by '' a phase comparator (36) which also receives a signal (SELOa) obtained by delaying the synchronization selection signal

(SEL0) via another delay means (37).