WO2004054332A3 - Strip-line topology for a high speed pcb with low dissipation - Google Patents

Strip-line topology for a high speed pcb with low dissipation Download PDF

Info

Publication number
WO2004054332A3
WO2004054332A3 PCT/RU2003/000529 RU0300529W WO2004054332A3 WO 2004054332 A3 WO2004054332 A3 WO 2004054332A3 RU 0300529 W RU0300529 W RU 0300529W WO 2004054332 A3 WO2004054332 A3 WO 2004054332A3
Authority
WO
WIPO (PCT)
Prior art keywords
strip
high speed
low dissipation
line topology
speed pcb
Prior art date
Application number
PCT/RU2003/000529
Other languages
French (fr)
Other versions
WO2004054332A2 (en
Inventor
Igor Anatolievich Abrosimov
Original Assignee
Igor Anatolievich Abrosimov
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Igor Anatolievich Abrosimov filed Critical Igor Anatolievich Abrosimov
Priority to AU2003287116A priority Critical patent/AU2003287116A1/en
Publication of WO2004054332A2 publication Critical patent/WO2004054332A2/en
Publication of WO2004054332A3 publication Critical patent/WO2004054332A3/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/0242—Structural details of individual signal conductors, e.g. related to the skin effect
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09218—Conductive traces
    • H05K2201/09236—Parallel layout
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09672—Superposed layout, i.e. in different planes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards

Abstract

A multilayer printed circuit board is provided, comprising a plurality of planar layers made of dielectric material, and a plurality of conductor traces secured with their rough surfaces to these dielectric material layers, their smooth surfaces looking outwards or facing each other in superposed laminar relation to form a coplanar structure, so that the skin effect losses in the circuit structure are reduced. The traces can be driven in parallel to form a single conductor line.
PCT/RU2003/000529 2002-12-06 2003-11-27 Strip-line topology for a high speed pcb with low dissipation WO2004054332A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2003287116A AU2003287116A1 (en) 2002-12-06 2003-11-27 Strip-line topology for a high speed pcb with low dissipation

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US43122602P 2002-12-06 2002-12-06
US60/431,226 2002-12-06

Publications (2)

Publication Number Publication Date
WO2004054332A2 WO2004054332A2 (en) 2004-06-24
WO2004054332A3 true WO2004054332A3 (en) 2004-11-18

Family

ID=32507683

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/RU2003/000529 WO2004054332A2 (en) 2002-12-06 2003-11-27 Strip-line topology for a high speed pcb with low dissipation

Country Status (2)

Country Link
AU (1) AU2003287116A1 (en)
WO (1) WO2004054332A2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9648723B2 (en) 2015-09-16 2017-05-09 International Business Machines Corporation Process of fabricating printed circuit board
JP2017112191A (en) * 2015-12-15 2017-06-22 富士電機株式会社 Printed wiring board
US10903543B2 (en) * 2016-12-06 2021-01-26 Hewlett Packard Enterprise Development Lp PCB transmission lines having reduced loss

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1915633A1 (en) * 1969-03-27 1970-10-08 Licentia Gmbh Low-loss strip line with specified wave - impedance
US5268064A (en) * 1992-02-04 1993-12-07 Trimble Navigation Limited Copper clad epoxy printed circuit board suitable for microwave frequencies encountered in GPS receivers
JPH11112113A (en) * 1997-09-30 1999-04-23 Hitachi Ltd Electronic device
US20010010272A1 (en) * 2000-01-27 2001-08-02 Kanji Otsuka Wiring substrate and process for producing the same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1915633A1 (en) * 1969-03-27 1970-10-08 Licentia Gmbh Low-loss strip line with specified wave - impedance
US5268064A (en) * 1992-02-04 1993-12-07 Trimble Navigation Limited Copper clad epoxy printed circuit board suitable for microwave frequencies encountered in GPS receivers
JPH11112113A (en) * 1997-09-30 1999-04-23 Hitachi Ltd Electronic device
US20010010272A1 (en) * 2000-01-27 2001-08-02 Kanji Otsuka Wiring substrate and process for producing the same

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 1999, no. 09 30 July 1999 (1999-07-30) *

Also Published As

Publication number Publication date
WO2004054332A2 (en) 2004-06-24
AU2003287116A1 (en) 2004-06-30
AU2003287116A8 (en) 2004-06-30

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