WO2004036859A1 - Method and device for signal amplitude detection - Google Patents
Method and device for signal amplitude detection Download PDFInfo
- Publication number
- WO2004036859A1 WO2004036859A1 PCT/IB2003/004229 IB0304229W WO2004036859A1 WO 2004036859 A1 WO2004036859 A1 WO 2004036859A1 IB 0304229 W IB0304229 W IB 0304229W WO 2004036859 A1 WO2004036859 A1 WO 2004036859A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- signal
- level
- circuit
- amplitude
- shift
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
- H04L25/061—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset
Definitions
- the present invention relates to a method and a device for signal amplitude detection. More in particular, the present invention relates to a method and a device for determining the amplitude of a signal having a first signal level and a second signal level, such as binary signals.
- Signals of this kind typically have an average signal level, which is halfway between the said first and second signal levels.
- the average signal level could be particularly zero volts when the first and the second levels are symmetrically to zero volt level i.e. they are +N and -N.
- the amplitude of the above mentioned signals is defined as the half difference between the first level and the second level. In many applications it is desirable or necessary to determine the amplitude of the signal in a simple manner.
- the average signal level determines a DC component in the signal. It is therefore an object of the present invention to provide a method for determining the amplitude of a signal having a first signal level and a second signal level, the method comprising the steps of:
- the average signal level is shifted by an amount equal to its amplitude.
- the amount of the signal shift represents the amplitude of the signal.
- the shift amount is determined on the basis of the shifted signal and the reference level. That is, the amount of the signal shift is obtained from the shifted signal itself and the reference level. This typically involves the use of feedback.
- the shift amount is continuously determined.
- the signal level is shifted by the correct amount, irrespective of any changing external circumstances, and a reliable amplitude measurement is obtained.
- the step of removing any DC component from the signal may be omitted.
- the present invention further provides a device for determining the amplitude of a signal having a first signal level and a second signal level, the device comprising:
- decoupling circuit for removing any DC component from the signal so as to produce an intermediate signal having an average level equal to a reference level
- a shift circuit for shifting the intermediate signal by a shift amount so as to produce a shifted signal having a first signal level equal to the reference level, and - an output terminal for providing said shift amount as an indication of the amplitude of the signal.
- Such a device employs the same inventive concept as the method described above: by shifting the signal level over an amount equal to its amplitude, the amplitude itself is obtained.
- the shift circuit is coupled to an output of a differential amplifier which is coupled to receive the reference level and an indication of the power of the shifted signal.
- a signal power determination circuit is coupled between the shift circuit and the differential amplifier. It will be understood that in situations where the original signal has a DC level equal to zero, the decoupling circuit may be omitted.
- the reference level is equal to a supply voltage, such as a positive supply voltage.
- a supply voltage such as a positive supply voltage.
- other reference levels such as those generated by dedicated circuits, may also be used.
- Fig. 1 schematically shows a circuit diagram of an amplitude detector according to the present invention
- Fig. 2 schematically shows input signals which may be applied to the circuit of Fig. 1;
- Fig. 3 schematically shows the signals of Fig. 2 as effected by the circuit of
- Fig. 4 schematically shows an embodiment of the amplitude detector of the present invention.
- the amplitude detector 1 shown merely by way of non-limiting example in Fig. 1 comprises a decoupling circuit 2, a shift circuit 3, an output terminal 4, a differential amplifier 5, a signal power determination circuit 6, input terminals 7 and a coupling circuit 8.
- the decoupling circuit 2 is constituted by two capacitors, which remove any DC component present in the signal supplied to the input terminals 7.
- the shift circuit 3 is known per se, however an advantageous embodiment will be discussed below with reference to Fig. 4.
- the output terminal 4 is connected to the output of differential amplifier 5.
- the input terminals of differential amplifier 5 are connected to the signal power determination circuit 6 and to the reference voltage N ref , respectively.
- the reference voltage may conveniently be a supply voltage of the circuit, or ground.
- Signal power determination circuit 6 is known per se, however an advantageous embodiment will be discussed below with reference to Fig. 4.
- Signal power determination circuit 6 rectifies the signal and preferably determines the so-called root mean square value of the signal, a well-known measure for the energy contained in the signal.
- Coupling circuit 8 constituted by two resistors, couples the intermediary signal i. e. the input signal from which the DC component has been removed) to the non-inverting input of differential amplifier 5.
- Fig. 1 The operation of the amplitude detector 1 of Fig. 1 will now be explained with reference to Figs. 2 and 3, which show exemplary signals.
- Fig. 2 shows an first signal A supplied to a first (e.g. top) input terminal 7 and a second signal B supplied to a second (e.g. bottom) input terminal 7. Together, these signals constitute the input signal Nj n .
- the second signal B is the inverse of the first signal A i.e. mutually in anti-phase with the first signal A.
- the average signal level (DC component) of the complimentary signals A and B is zero.
- the shift circuit 3 is, in this particular embodiment, arranged such that no signal shift is effected when the control signal N con which is inputted to the shift circuit is zero.
- the control signal N con is the output voltage of differential amplifier 5. Consequently, there will be no signal shift when the output signal V rms of the signal power determination circuit 6 is equal to the reference voltage N ref .
- Fig. 3 shows the progression of the signal levels when the control signal N con , after initially being interrupted, is fed to the shift circuit 3. Jth this particular example it is assumed that N ref has a lower value than N rm s- For example, N ref may be equal to zero volts (ground). In this example, the average signal value is initially equal to N ref . As N rms is greater than V ref , differential amplifier 5 produces a negative control signal N con . As shown in Fig. 3, this negative control signal N con is passed on to the shift circuit 3 after one period of the input signal Ni n (see also Fig. 2). This in turn causes a negative signal shift in the input signal, thus lowering its average value. This is shown in Fig. 3.
- the average value is stabilised at the level of the control signal N con , the absolute value of which is exactly the amplitude of the input signal Nj n .
- the signal at the output terminal 4 (see Fig. 1) is a reliable indication of the signal amplitude.
- the device of the present invention is relatively simple, while its feedback loop provides a continuous adjustment, thus allowing to follow any changes in the amplitude or to compensate any adverse environmental effects such as a temperature change.
- the embodiment of Fig. 4 contains all circuits of Fig. 1.
- the decoupling circuit 2 is again constituted by two capacitors Cl And C2 while resistors Rl and JR2 constitute coupling circuit 8.
- the shift circuit 3 involves transistors T3 and T4, which influence the base voltages of transistors Tl and T2, which in turn rectify the incoming signals.
- the RMS (Root Mean Square) value of the signal is achieved by means of a capacitor C3 and two resistors R3, R4 coupled to the differential amplifier ("gain") section of the circuit.
- Current sources which are well known in the art, are shown to provide suitable currents I.
- An output resistor R5 provides the output signal Namp at the output terminal 4.
- the amplitude detector 1 of Figs. 1 and 4 embodies the method of the present invention.
- the present invention is based upon the insight that shifting the average signal level (DC level) of a signal by such an amount that a maximum or minimum signal value equals a reference level (for example zero volts) produces an excellent indication of the signal amplitude.
- the present invention is based on the further insight that a very efficient way of realising this shifting of the average signal level is by using a feedback loop.
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Measurement Of Current Or Voltage (AREA)
- Radar Systems Or Details Thereof (AREA)
- Burglar Alarm Systems (AREA)
- Amplifiers (AREA)
- Dc Digital Transmission (AREA)
- Manipulation Of Pulses (AREA)
Abstract
Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004544548A JP4299785B2 (en) | 2002-10-17 | 2003-09-22 | Method and apparatus for detecting the amplitude of a signal |
DE60310250T DE60310250T2 (en) | 2002-10-17 | 2003-09-22 | METHOD AND DEVICE FOR SIGNAL AMPLITUDE DETECTION |
AU2003263508A AU2003263508A1 (en) | 2002-10-17 | 2003-09-22 | Method and device for signal amplitude detection |
EP03808806A EP1554850B1 (en) | 2002-10-17 | 2003-09-22 | Method and device for signal amplitude detection |
US10/531,400 US7235985B2 (en) | 2002-10-17 | 2003-09-22 | Method and device for signal amplitude detection |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP02079305 | 2002-10-17 | ||
EP02079305.5 | 2002-10-17 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2004036859A1 true WO2004036859A1 (en) | 2004-04-29 |
Family
ID=32103951
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/IB2003/004229 WO2004036859A1 (en) | 2002-10-17 | 2003-09-22 | Method and device for signal amplitude detection |
Country Status (8)
Country | Link |
---|---|
US (1) | US7235985B2 (en) |
EP (1) | EP1554850B1 (en) |
JP (1) | JP4299785B2 (en) |
CN (1) | CN100505716C (en) |
AT (1) | ATE347769T1 (en) |
AU (1) | AU2003263508A1 (en) |
DE (1) | DE60310250T2 (en) |
WO (1) | WO2004036859A1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI502443B (en) * | 2013-10-09 | 2015-10-01 | Ili Technology Corp | Rc delay detection circuit for baseline calibration of touch panel |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4363977A (en) * | 1980-02-20 | 1982-12-14 | Fujitsu Limited | Device for discriminating between two values of a signal with DC offset compensation |
EP0938215A2 (en) * | 1998-01-15 | 1999-08-25 | PC-Tel, Inc. | Adaptive DC-compensation |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2798198A (en) * | 1952-03-31 | 1957-07-02 | Ca Nat Research Council | Method and apparatus for comparing voltages |
FR2772923B1 (en) * | 1997-12-23 | 2000-03-17 | Sextant Avionique | ELECTRONIC ELECTRICAL VOLTAGE MONITORING CIRCUIT |
-
2003
- 2003-09-22 AU AU2003263508A patent/AU2003263508A1/en not_active Abandoned
- 2003-09-22 JP JP2004544548A patent/JP4299785B2/en not_active Expired - Fee Related
- 2003-09-22 WO PCT/IB2003/004229 patent/WO2004036859A1/en active IP Right Grant
- 2003-09-22 EP EP03808806A patent/EP1554850B1/en not_active Expired - Lifetime
- 2003-09-22 CN CNB03824277XA patent/CN100505716C/en not_active Expired - Fee Related
- 2003-09-22 AT AT03808806T patent/ATE347769T1/en not_active IP Right Cessation
- 2003-09-22 US US10/531,400 patent/US7235985B2/en not_active Expired - Fee Related
- 2003-09-22 DE DE60310250T patent/DE60310250T2/en not_active Expired - Lifetime
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4363977A (en) * | 1980-02-20 | 1982-12-14 | Fujitsu Limited | Device for discriminating between two values of a signal with DC offset compensation |
EP0938215A2 (en) * | 1998-01-15 | 1999-08-25 | PC-Tel, Inc. | Adaptive DC-compensation |
Also Published As
Publication number | Publication date |
---|---|
EP1554850B1 (en) | 2006-12-06 |
DE60310250D1 (en) | 2007-01-18 |
JP2006503473A (en) | 2006-01-26 |
CN1689294A (en) | 2005-10-26 |
CN100505716C (en) | 2009-06-24 |
US7235985B2 (en) | 2007-06-26 |
US20060012381A1 (en) | 2006-01-19 |
AU2003263508A1 (en) | 2004-05-04 |
ATE347769T1 (en) | 2006-12-15 |
DE60310250T2 (en) | 2007-06-28 |
EP1554850A1 (en) | 2005-07-20 |
JP4299785B2 (en) | 2009-07-22 |
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