WO2004026527A1 - Soldering filler metal, assembly method for semiconductor device using same, and semiconductor device - Google Patents

Soldering filler metal, assembly method for semiconductor device using same, and semiconductor device Download PDF

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Publication number
WO2004026527A1
WO2004026527A1 PCT/JP2003/011730 JP0311730W WO2004026527A1 WO 2004026527 A1 WO2004026527 A1 WO 2004026527A1 JP 0311730 W JP0311730 W JP 0311730W WO 2004026527 A1 WO2004026527 A1 WO 2004026527A1
Authority
WO
WIPO (PCT)
Prior art keywords
balance
filler metal
brazing filler
weight
good
Prior art date
Application number
PCT/JP2003/011730
Other languages
French (fr)
Inventor
Nobuki Mori
Kei Morimoto
Original Assignee
Sumitomo Metal Mining Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Metal Mining Co., Ltd. filed Critical Sumitomo Metal Mining Co., Ltd.
Priority to AU2003263597A priority Critical patent/AU2003263597A1/en
Priority to EP03797594A priority patent/EP2099580A1/en
Publication of WO2004026527A1 publication Critical patent/WO2004026527A1/en
Priority to US11/068,527 priority patent/US7644855B2/en

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Classifications

    • C—CHEMISTRY; METALLURGY
    • C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22C—ALLOYS
    • C22C13/00—Alloys based on tin
    • C22C13/02—Alloys based on tin with antimony or bismuth as the next major constituent
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24—Selection of soldering or welding materials proper
    • B23K35/26—Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/02—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
    • B23K35/0222—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape for use in soldering, brazing
    • B23K35/0227—Rods, wires
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24—Selection of soldering or welding materials proper
    • B23K35/26—Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
    • B23K35/262—Sn as the principal constituent
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2101/00—Articles made by soldering, welding or cutting
    • B23K2101/36—Electric or electronic devices
    • B23K2101/40—Semiconductor devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29301—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29311—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00013—Fully indexed content
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01051—Antimony [Sb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01052—Tellurium [Te]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01327—Intermediate phases, i.e. intermetallics compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]

Definitions

  • the present invention relates to a high-temperature brazing filler metal
  • Au-type brazing filler metals represented by Au/ 20 weight %
  • brazing filler metals are used so that the brazing filler metal used in a previous
  • step does not remelt at the time of step brazing (at 220 to 260°C) carried out in
  • the Au-type brazing filler metal has a problem of being
  • soldering material containing at least one kind of Fe and Ni in an amount of
  • semiconductor device is mounted by soldering on a printed board.
  • a multi-level metal layer such as Cr-Ni-Ag or Ti-Cu-Ag is
  • the second metallic coating is a coating containing tin or antimony
  • Patent Publication No. Tokukai 2001-196393 Especially, when the heat output of the semiconductor element is large,
  • an Sn-5 weight % Sb type solder is used in order to obtain high reliability.
  • metal layer comprising at least one kind of metal selected from the group
  • the melting point of the solder can be prevented, or generation of a hard
  • brazing filler metal comprise 5 to 20 weight % of Sb and 0.01 to 5 weight % of
  • At least one of the brazing filler metal in order to improve the thermal cyclicity of the brazing filler metal, at least one
  • member of Ag, Cu, Fe and Ni may be added in a total amount of from 0.01 to 5
  • semiconductor devices is provided in which semiconductor elements are
  • brazing filler metal is used as the brazing filler metal.
  • a semiconductor device According to a fourth aspect of the invention, a semiconductor device
  • brazing filler metal comprises 5 to 20 weight % of Sb and 0.01 to 5 weight %
  • Te is added for
  • concentration thereof is less than 0.01 weight %, a sufficient effect of refining the ⁇ ' phase cannot be obtained, and if the concentration thereof exceeds 5
  • phase temperature exceeds 320°C, and die bonding at 340°C becomes
  • the thermal cyclicity of the brazing filler metal is further improved.
  • P is added for further improving the wettability, so that voids are
  • brazing filler metal of the first aspect of the invention if at least one kind of Ag,
  • Cu, Fe and Ni is added in a total amount of from 0.01 to 5 weight % to the
  • brazing filler metal of the present invention have the same reliability as or
  • brazing filler metal made of a gold base alloy or a brazing filler
  • the wire was
  • the wire was slowly cooled in a nitrogen atmosphere. The slow
  • the size of the ⁇ ' phase was all not larger than 20 ⁇ m. This can be
  • the wire was
  • the wire was slowly cooled in a nitrogen atmosphere. The slow
  • the size of the ⁇ ' phase was all not larger than 20 ⁇ m, as in Examples 1
  • Example 21 balance 5 0.1 0.005 good
  • Example 22 balance 5 0.1 0.05 good
  • Example 23 balance 5 0.1 0.1 good
  • Example 25 balance 5 0.1 0.5 good
  • Example 27 balance 5 2.0 0.05 good
  • Example 31 balance 5 5.0 0.005 good
  • Example 32 balance 5 5.0 0.05 good
  • Example 33 balance 5 5.0 0.1 good
  • Example 34 balance 5 5.0 0.3 good
  • Example 42 balance 8 2.0 0.05 good
  • Example 51 balance 12 0.1 0.005 good
  • Example 52 balance 12 0.1 0.05 good
  • Example 53 balance 12 0.1 0.1 good
  • Example 54 balance 12 0.1 0.3 good
  • Example 55 balance 12 0.1 0.5 good
  • Example 58 balance 12 2.0 0.1 good
  • Example 59 balance 12 2.0 0.3 good
  • Example 62 balance 12 5.0 0.05 good
  • Example 66 balance 20 0.1 0.005 good
  • Example 68 balance 20 0.1 0.1 good
  • Example 71 balance 20 2.0 0.005 good
  • Example 72 balance 20 2.0 0.05 good
  • Example 73 balance 20 2.0 0.1 good
  • Example 74 balance 20 2.0 0.3 good
  • Example 75 balance 20 2.0 0.5 good
  • Example 78 balance 20 5.0 0.1 good
  • the wire was
  • the wire was slowly cooled in a nitrogen atmosphere. The slow
  • the size of the ⁇ ' phase was all not larger than 20 ⁇ m, as in Examples 1
  • the wire was
  • the wire was slowly cooled in a nitrogen atmosphere. The slow
  • the size of the ⁇ ' phase was all about 100 ⁇ m.
  • dummy chip was then molded by using an epoxy resin.
  • the molded articles were used to conduct temperature cycle tests at a temperature of from -50°C to
  • invention comprises 5 to 20 weight % of Sb and 0.01 to 5 weight % of Te, with
  • the thermal cyclicity of the brazing filler metal can be further improved.
  • the brazing filler metal of the second aspect of the invention comprises
  • At least one member of Ag, Cu, Fe and Ni is added in a total amount of from 0.01
  • the brazing filler metal can be further improved.
  • the semiconductor device becomes

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Die Bonding (AREA)

Abstract

In conventional Sn/Sb type brazing filler metals, there are disadvantages that large grains in a β' phase are likely to deposit and that cracks are likely to occur in the elements and the bonded portion, and that voids are formed when the above described special coating is provided on the die bonding plane of the semiconductor element. The brazing filler metal of the present invention comprises 5 to 20 weight % of Sb and 0.01 to 5 weight % of Te, with the balance being Sn and incidental impurities, or a brazing filler metal comprises 5 to 20 weight % of Sb, 0.01 to 5 weight % of Te, 0.001 to 0.5 weight % of P, with the balance being Sn and incidental impurities.

Description

SOLDERING FILLER METAL, ASSEMBLY METHOD FOR SEMICONDUCTOR DEVICE USING SAME, AND SEMICONDUCTOR
DEVICE
Description
Brazing Filler Metal, Assembly Method for Semiconductor Device
Using Same, and Semiconductor Device
Technical Field
The present invention relates to a high-temperature brazing filler metal,
used for die bonding of semiconductor elements and assembly of electronic
parts, and more specifically, relates to a high-temperature brazing filler metal
that does not contain Pb.
Background Art
When high-frequency elements or semiconductor elements are
die-bonded to a lead frame or the like to assemble a semiconductor device or
electronic parts, Au-type brazing filler metals represented by Au/ 20 weight %
Sn (20 weight % of Sn, and the remainder is Au), or a Pb-type brazing filler
metal represented by Pb/ 5 weight % Sn (5 weight % of Sn, and the remainder
is Pb), having a melting point of about 300°C, are used.
The reason why these brazing filler metals having a melting point of
about 300° C are used for die bonding is to prevent the brazing filler metal used
at the time of die bonding from remelting to cause performance deterioration, when the assembled semiconductor device is mounted on a printed board
under conditions of a temperature of from 240 to 260° C and a heating period of
10 seconds or less. Moreover, in the assembly of electronic parts, these
brazing filler metals are used so that the brazing filler metal used in a previous
step does not remelt at the time of step brazing (at 220 to 260°C) carried out in
a subsequent step.
However, the Au-type brazing filler metal has a problem of being
expensive, and the Pb-type brazing filler metal has a problem of environmental
pollution. Hence, there is a demand for a brazing filler metal that does not
contain Pb, is economical and capable of brazing at 300 to 340°C, with a
melting temperature thereof being 260° C or higher, and has excellent
wettability.
In order to respond to such a demand, there has been proposed a
soldering material containing at least one kind of Fe and Ni in an amount of
from 0.005 to 5.0 weight %, and preferably, 0.1 to 20 weight % of Ag, or 0.05
to 9 weight % of Cu, or 0.1 to 15 weight % of Ag, and 0.05 to 5 weight % of Cu,
and further containing 0.1 to 15 weight % of Sb, with the remainder being Sn
substantially (see Japanese Patent Publication No. Tokukai 2001-144111).
Moreover, there is another proposal for a soldering material for die
bonding, which contains 11.0 to 20.0 weight % of Sb, 0.01 to 0.2 weight % of P, and preferably, 0.005 to 5.0 weight % of at least one kind of Cu and Ni, with
the balance being Sn and incidental impurities (see Japanese Patent
Publication No. Tokukai 2001-284792).
These are proposed for resolving the disadvantage of Sn/Sb type solder
having poor performance against thermal fatigue, and reducing a resistance
change in a die-bonded portion which is placed at a high temperature when the
semiconductor device is mounted by soldering on a printed board.
Incidentally, a multi-level metal layer such as Cr-Ni-Ag or Ti-Cu-Ag is
provided on a bonding plane of the semiconductor element and the solder
(hereinafter referred to as a "die bonding plane of a semiconductor element"),
for improving the wettability with the solder. When an Sn/Sb type solder is
used as the die bonding solder, Ag on the outermost surface of the multi-metal
layer fuses with the soldering material to decrease the melting point of the
soldering material excessively (see Paragraph No. 0006 in Japanese Patent
Publication No. Tokukai 2001-196393). In order to solve this problem, there is
proposed a method in which a first metallic coating and a second metallic
coating are formed in this order on the die bonding plane of the semiconductor
device, the second metallic coating is a coating containing tin or antimony, and
an Sn/Sb type solder is used as a solder (see Paragraph No. 0008 in Japanese
Patent Publication No. Tokukai 2001-196393). Especially, when the heat output of the semiconductor element is large,
an Sn-5 weight % Sb type solder is used in order to obtain high reliability.
However, at this time there is a problem in that an intermediate metal layer
such as Ni and Cu in the multi-metal layer reacts with the solder due to the heat
at the time of operating the semiconductor device or application of stress, to
form a hard and brittle intermetallic compound layer, and fracture progresses
from this layer (see Paragraph Nos. 0005 to 0006, in Japanese Patent No.
3033378). In order to solve this problem there is described usage of an Sn/Sb
type solder, by forming the outermost layer of the die bonding plane of the
semiconductor element of Cr, Ti, Mo, W, Zr and Hf, or providing a surface
metal layer comprising at least one kind of metal selected from the group
consisting of Sn, Sb, Au, Ag, Pt, Ni, Cu, Zn, Al, Co, Fe and Pb on the metal
layer (see Paragraph Nos. 0010 to 0011, in Japanese Patent No. 3033378).
According to the above described two methods, an excessive drop in
the melting point of the solder can be prevented, or generation of a hard and
brittle intermetallic compound layer can be prevented. However, it has been
found that a new problem occurs in that a lot of voids are generated on the
semiconductor element side in the solder layer after the die bonding. The
presence of voids deteriorates the long-term reliability.
In the Sn/Sb type brazing filler metal heretofore provided, there are disadvantages that large grains in a β' phase are likely to deposit and that
cracks are likely to occur in the elements and the bonded portion, and
moreover that voids are formed when the above described special coating is
provided on the die bonding plane of the semiconductor element, and such
disadvantages have not yet been overcome. Hence, it cannot be said that the
Sn/Sb type brazing filler metal is adequate.
In view of the above situation, it is an object of the present invention to
provide a novel Sn/Sb type brazing filler metal which does not contain Pb and
is suitable for being used in die-bonding semiconductor elements or
assembling electronic parts.
Disclosure of the Invention
According to a first aspect of the invention for solving the problems, a
brazing filler metal comprise 5 to 20 weight % of Sb and 0.01 to 5 weight % of
Te, with the balance being Sn and incidental impurities. Moreover, in order to
improve the thermal cyclicity of the brazing filler metal, at least one member
of Ag, Cu, Fe and Ni may be added in a total amount of from 0.01 to 5
weight % to the brazing filler metal.
Accodring to a second aspect of the invention, a brazing filler metal
comprise 5 to 20 weight % of Sb, 0.01 to 5 weight % of Te, and 0.001 to 0.5 weight % of P, with the balance being Sn and incidental impurities. Moreover,
in order to improve the thermal cyclicity of the brazing filler metal, at least one
member of Ag, Cu, Fe and Ni may be added in a total amount of from 0.01 to 5
weight % to the brazing filler metal.
According to a third aspect of the invention, an assembly method for
semiconductor devices is provided in which semiconductor elements are
die-bonded by using a brazing filler metal to assemble a semiconductor device,
wherein a brazing filler metal according to the first or second aspects of the
invention is used as the brazing filler metal.
According to a fourth aspect of the invention, a semiconductor device
is assembled by using the brazing filler metal according to the first or second
aspects of the invention.
Best Mode for Carrying Out the Invention
According to a first aspect of the invention for solving the problems, a
brazing filler metal comprises 5 to 20 weight % of Sb and 0.01 to 5 weight %
of Te, with the balance being Sn and incidental impurities. Te is added for
refining the generated β' phase to prevent the occurrence of a crack. The
reason why the concentration of Te is set to 0.01 to 5 weight % is that if the
concentration thereof is less than 0.01 weight %, a sufficient effect of refining the β' phase cannot be obtained, and if the concentration thereof exceeds 5
weight %, further effect of refining the β' phase cannot be expected, and only
the cost increases.
The reason why the concentration of Sb is set to 5 to 20 weight % is
that if the concentration thereof is less than 5 weight %, the liquid phase
temperature becomes lower than 240° C, and the brazing filler metal cannot
endure the processing temperature at 260° C used in the subsequent step after
die bonding. If the concentration thereof exceeds 20 weight %, the liquid
phase temperature exceeds 320°C, and die bonding at 340°C becomes
insufficient. If at least one member of Ag, Cu, Fe and Ni is added in a total
amount of from 0.01 to 5 weight % to the brazing filler metal and dispersed,
the thermal cyclicity of the brazing filler metal is further improved.
According to a second aspect of the invention, a brazing filler metal
comprise 5 to 20 weight % of Sb, 0.01 to 5 weight % of Te, and 0.001 to 0.5
weight % of P, with the balance being Sn and incidental impurities. The reason
for the addition range of Sb and Te is the same as in the first aspect of the
invention. P is added for further improving the wettability, so that voids are
not likely to occur between the semiconductor elements and the brazing filler
metal at the time of die bonding. If the concentration of P is less than 0.001
weight , this effect cannot be obtained, and if P is added exceeding 0.5 weight %, casting at a low cost becomes difficult.
As a reason why the occurrence of voids is suppressed by adding P, the
present inventor presumes that when the brazing filler metal melts, oxygen
preferentially reacts with P, to prevent an oxide film from being formed on the
surface of the melting body, thereby improving the wettability. As in the
brazing filler metal of the first aspect of the invention, if at least one kind of Ag,
Cu, Fe and Ni is added in a total amount of from 0.01 to 5 weight % to the
brazing filler metal and dispersed, the thermal cyclicity of the brazing filler
metal is further improved.
At the time of using the brazing filler metal of the first and second
aspects of the invention, the conventional steps and conditions can be used
without any change. Semiconductor devices manufactured by using the
brazing filler metal of the present invention have the same reliability as or
better reliability than that of the semiconductor devices manufactured by using
a conventional brazing filler metal made of a gold base alloy or a brazing filler
metal made of a lead base alloy.
The present invention will be described in more detail by way of
examples.
Examples 1 to 20
Sn, Sb and Te respectively having a purity of 99.9% were used to obtain ingots of Sn alloy having compositions shown in Table 1, by an
atmospheric melting furnace. The ingots were then subjected to extruding to a
diameter of 1 mm to prepare samples in a wire form.
For evaluating the wettability of the obtained alloy, the wire was
pressed against a copper plate in a nitrogen gas stream at 340°C, and after
having melted, the wire was slowly cooled in a nitrogen atmosphere. The slow
cooling was conducted for evaluating the wettability under a severer condition
in which the β' phase becomes coarser.
A section of the portion pressed against the copper plate and slowly
cooled was ground and polished, to observe the size of the formed β' phase. As
a result, the size of the β' phase was all not larger than 20 μm. This can be
judged as an effect of adding Te.
For evaluating the bonding reliability, a dummy chip prepared by
depositing Au on a silicon die bonding plane, was die-bonded on a copper lead
frame by using the sample having a diameter of 1 mm and a die bonder. The
dummy chip was then molded by using an epoxy resin. The molded articles
were used to conduct temperature cycle tests at a temperature of from -50°C to
150°C for 500 cycles. Thereafter, the resin was opened, and the bonded
portion was observed. It was evaluated as "good", when there was no crack in
the chip or the bonded portion, or as "poor" when a crack occurred. The results are shown in Table 1.
Apart of the molded article was mounted on a mount board, to examine
if there was any abnormality in the mounted chip or in the bonded portion, and
if there was a void in the brazing filler metal. As a result, any abnormality was
not found in all samples, and any void was not confirmed.
Table 1
Composition (wt.%) Bonding Reliability
Sn Sb Te
Example 1 balance 5 0.05 good Example 2 balance 5 0.1 good Example 3 balance 5 0.5 good Example 4 balance 5 2.0 good Example 5 balance 5 5.0 good Example 6 balance 8 0.05 good Example 7 balance 8 0.1 good Example 8 balance 8 0.5 good Example 9 balance 8 2.0 good Example 10 balance 8 5.0 good Example 11 balance 12 0.05 good Example 12 balance 12 0.1 good Example 13 balance 12 0.5 good Example 14 balance 12 2.0 good Example 15 balance 12 5.0 good Example 16 balance 20 0.05 good Example 17 balance 20 0.1 good Example 18 balance 20 0.5 good Example 19 balance 20 2.0 good Example 20 balance 20 5.0 good
From Table 1, it is seen that the Sn alloy according to the present
invention has no problem in the bonding reliability.
Examples 21 to 80
Raw materials of Sn, Sb, Te and P respectively having a purity of 99.9% were used to obtain ingots of Sn alloy having compositions shown in
Tables 2 to 5, by an atmospheric melting furnace. The ingots were then
subjected to extruding to a diameter of 1 mm to prepare samples in a wire
form.
For evaluating the wettability of the obtained alloy, the wire was
pressed against a copper plate in a nitrogen gas stream at 340°C, and after
having melted, the wire was slowly cooled in a nitrogen atmosphere. The slow
cooling was conducted for evaluating the wettability under a severer condition
in which the β' phase becomes coarser.
A section of the portion pressed against the copper plate and slowly
cooled was ground and polished, to observe the size of the formed β' phase. As
a result, the size of the β' phase was all not larger than 20 μm, as in Examples 1
to 20. This can be judged as an effect of adding Te.
For evaluating the bonding reliability, a dummy chip prepared by
depositing Au on a silicon die bonding plane, was die-bonded on a copper lead
frame by using the sample having a diameter of 1 mm and a die bonder. The
dummy chip was then molded by using an epoxy resin. The molded articles
were used to conduct temperature cycle tests at a temperature of from -50°C to
150°C for 500 cycles. Thereafter, the resin was opened, and the bonded
portion was observed. It was evaluated as "good", when there was no crack in the chip or the bonded portion, or as "poor" when a crack occurred. The results
are shown in Tables 2 to 5.
Apart of the molded article was mounted on a mount board, to examine
if there was any abnormality in the mounted chip or in the bonded portion, and
if there was a void in the brazing filler metal. As a result, any abnormality was
not found in all samples, and any void was not confirmed.
Table 2
Composition (wt.%) Bonding R
Sn Sb Te P
Example 21 balance 5 0.1 0.005 good
Example 22 balance 5 0.1 0.05 good
Example 23 balance 5 0.1 0.1 good
Example 24 balance 5 0.1 0.3 good
Example 25 balance 5 0.1 0.5 good
Example 26 balance 5 2.0 0.005 good
Example 27 balance 5 2.0 0.05 good
Example 28 balance 5 2.0 0.1 good
Example 29 balance 5 2.0 0.3 good
Example 30 balance 5 2.0 0.5 good
Example 31 balance 5 5.0 0.005 good
Example 32 balance 5 5.0 0.05 good
Example 33 balance 5 5.0 0.1 good
Example 34 balance 5 5.0 0.3 good
Example 35 balance 5 5.0 0.5 good Table 3
Composition (wt.%) Bonding R
Sn Sb Te P
Example 36 balance 8 0.1 0.005 good
Example 37 balance 8 0.1 0.05 good
Example 38 balance 8 0.1 0.1 good
Example 39 balance 8 0.1 0.3 good
Example 40 balance 8 0.1 0.5 good
Example 41 balance 8 2.0 0.005 good
Example 42 balance 8 2.0 0.05 good
Example 43 balance 8 2.0 0.1 good
Example 44 balance 8 2.0 0.3 good
Example 45 balance 8 2.0 0.5 good
Example 46 balance 8 5.0 0.005 good
Example 47 balance 8 5.0 0.05 good
Example 48 balance 8 5.0 0.1 good
Example 49 balance 8 5.0 0.3 good
Example 50 balance 8 5.0 0.5 good
Table 4
Composition (wt.%) Bonding R
Sn Sb Te P
Example 51 balance 12 0.1 0.005 good
Example 52 balance 12 0.1 0.05 good
Example 53 balance 12 0.1 0.1 good
Example 54 balance 12 0.1 0.3 good
Example 55 balance 12 0.1 0.5 good
Example 56 balance 12 2.0 0.005 good
Example 57 balance 12 2.0 0.05 good
Example 58 balance 12 2.0 0.1 good
Example 59 balance 12 2.0 0.3 good
Example 60 balance 12 2.0 0.5 good
Example 61 balance 12 5.0 0.005 good
Example 62 balance 12 5.0 0.05 good
Example 63 balance 12 5.0 0.1 good
Example 64 balance 12 5.0 0.3 good
Example 65 balance 12 5.0 0.5 good
Table 5
Composition (wt.%) Bonding R
Sn Sb Te P
Example 66 balance 20 0.1 0.005 good
Example 67 balance 20 0.1 0.05 good
Example 68 balance 20 0.1 0.1 good
Example 69 balance 20 0.1 0.3 good
Example 70 balance 20 0.1 0.5 good
Example 71 balance 20 2.0 0.005 good
Example 72 balance 20 2.0 0.05 good
Example 73 balance 20 2.0 0.1 good
Example 74 balance 20 2.0 0.3 good
Example 75 balance 20 2.0 0.5 good
Example 76 balance 20 5.0 0.005 good
Example 77 balance 20 5.0 0.05 good
Example 78 balance 20 5.0 0.1 good
Example 79 balance 20 5.0 0.3 good
Example 80 balance 20 5.0 0.5 good
From Tables 2 to 5, it is seen that the Sn alloy according to the present
invention has no problem in the bonding reliability.
Examples 81 to 100
Raw materials of Sn, Sb, Te, P, Ag, Cu, Fe and Ni respectively having a
purity of 99.9% were used to obtain ingots of Sn alloy having compositions
shown in Table 6, by an atmospheric melting furnace. The ingots were then
subjected to extruding to a diameter of 1 mm to prepare samples in a wire form.
For evaluating the wettability of the obtained alloy, the wire was
pressed against a copper plate in a nitrogen gas stream at 340°C, and after
having melted, the wire was slowly cooled in a nitrogen atmosphere. The slow
cooling was conducted for evaluating the wettability under a severer condition
in which the β' phase becomes coarser.
A section of the portion pressed against the copper plate and slowly
cooled was ground and polished, to observe the size of the formed β' phase. As
a result, the size of the β' phase was all not larger than 20 μm, as in Examples 1
to 20. This can be judged as an effect of adding Te.
For evaluating the bonding reliability, a dummy chip with a metal film
prepared by depositing Ni and Sb in this order on a silicon die bonding plane,
was die-bonded on a copper lead frame by using the sample having a diameter
of 1 mm and a die bonder. The dummy chip was then molded by using an
epoxy resin. The molded articles were used to conduct temperature cycle tests
at a temperature of from -50°C to 150°C for 500 cycles. Thereafter, the resin
was opened, and the bonded portion was observed. It was evaluated as "good",
when there was no crack in the chip or the bonded portion, or as "poor" when a
crack occurred. The results are shown in Table 6.
Apart of the molded article was mounted on a mount board, to examine if there was any abnormality in the mounted chip or in the bonded portion, and
if there was a void in the brazing filler metal. As a result, any abnormality was
not found in all samples, and any void was not confirmed.
Table 6
( Itompo! sition ( wt.%) > Bonding Reliability
Sn Sb Te P Ag Cu Fe Ni
Ex-81 balance 8 0.5 0.0 0.5 - - - good
Ex-82 balance 8 0.5 0.0 - 0.5 - - good
Ex-83 balance 8 0.5 0.0 - - 0.5 - good
Ex-84 balance 8 0.5 0.0 - - - 0.5 good
Ex-85 balance 8 0.5 0.0 0.5 0.5 0.5 0.5 good
Ex-86 balance 12 0.5 0.0 0.5 - - - good
Ex-87 balance 12 0.5 0.0 - 0.5 - - good
Ex-88 balance 12 0.5 0.0 - - 0.5 - good
Ex-89 balance 12 0.5 0.0 - - - 0.5 good
Ex-90 balance 12 0.5 0.0 0.5 0.5 0.5 0.5 good
Ex-91 balance 8 0.5 0.1 0.5 - - - good
Ex-92 balance 8 0.5 0.1 - 0.5 - - good
Ex-93 balance 8 0.5 0.1 - - 0.5 - good
Ex-94 balance 8 0.5 0.1 - - - 0.5 good
Ex-95 balance 8 0.5 0.1 0.5 0.5 0.5 0.5 good
Ex-96 balance 12 0.5 0.1 0.5 - - - good
Ex-97 balance 12 0.5 0.1 - 0.5 - - good
Ex-98 balance 12 0.5 0.1 - - 0.5 - good
Ex-99 balance 12 0.5 0.1 - - - 0.5 good
Ex-lOObalance 12 0.5 0.1 0.5 0.5 0.5 0.5 good
(Ex=Example) From Table 6, it is seen that the Sn alloy according to the present
invention has no problem in the bonding reliability.
Comparative Examples 1 to 20
Raw materials of Sn, Sb, Te and P respectively having a purity of
99.9% were used to obtain ingots of Sn alloy having compositions shown in
Tables 7 and 8, by an atmospheric melting furnace. The ingots were then
subjected to extruding to a diameter of 1 mm to prepare samples in a wire
form.
For evaluating the wettability of the obtained alloy, the wire was
pressed against a copper plate in a nitrogen gas stream at 340°C, and after
having melted, the wire was slowly cooled in a nitrogen atmosphere. The slow
cooling was conducted for evaluating the wettability under a severer condition
in which the β' phase becomes coarser.
A section of the portion pressed against the copper plate and slowly
cooled was ground and polished, to observe the size of the formed β' phase. As
a result, the size of the β' phase was all about 100 μm.
For evaluating the bonding reliability, a dummy chip prepared by
depositing Au on a silicon die bonding plane, was die-bonded on a copper lead
frame by using the sample having a diameter of 1 mm and a die bonder. The
dummy chip was then molded by using an epoxy resin. The molded articles were used to conduct temperature cycle tests at a temperature of from -50°C to
150°C for 500 cycles. Thereafter, the resin was opened, and the bonded
portion was observed. It was evaluated as "good", when there was no crack in
the chip or the bonded portion, or as "poor" when a crack occurred. The results
are shown in Tables 7 and 8.
Table 7
Composition (wt.%) Bonding Re]
Sn Sb Te
C-Example 1 balance 5 0.0 poor
C-Example 2 balance 5 6.0 poor
C-Example 3 balance 8 0.0 poor
C-Example 4 balance 8 6.0 poor
C-Example 5 balance 12 0.0 poor
C-Example 6 balance 12 6.0 poor
C-Example 7 balance 20 0.0 poor
C-Example 8 balance 20 6.0 poor
C-Example 9 balance 3 0.5 poor
C-Example 10 balance 25 0.5 poor
(C=Comparative)
Table 8
Composition (wt.%) Bonding E
Sn Sb Te P
C-Example 11 balance 5 0.0 0.1 poor
C-Example 12 balance 5 6.0 0.3 poor
C-Example 13 balance 8 0.0 0.1 poor
C-Example 14 balance 8 6.0 0.3 poor
C-Example 15 balance 12 0.0 0.1 poor
C-Example 16 balance 12 6.0 0.3 poor
C-Example 17 balance 20 0.0 0.1 poor
C-Example 18 balance 20 6.0 0.3 poor
C-Example 19 balance 3 0.5 0.3 poor
C-Example 20 balance 25 0.5 0.3 poor
(C=Comparative)
From Tables 7 and 8, the usefulness of the Sn alloy of the present
invention can be substantiated.
As described above, the brazing filler metal of the first aspect of the
invention comprises 5 to 20 weight % of Sb and 0.01 to 5 weight % of Te, with
the balance being Sn and incidental impurities. As a result, the β' phase
generated at the time of die bonding can be refined, thereby preventing
occurrence of cracks. Moreover, if at least one member of Ag, Cu, Fe and Ni is
added in a total amount of from 0.01 to 5 weight % and dispersed in the brazing
filler metal, the thermal cyclicity of the brazing filler metal can be further improved.
The brazing filler metal of the second aspect of the invention comprises
5 to 20 weight % of Sb, 0.01 to 5 weight % of Te, and 0.001 to 0.5 weight % of
P, with the balance being Sn and incidental impurities. As a result, the
wettability is improved, and at the time of die bonding, voids are not likely to
occur between the semiconductor elements and the brazing filler metal. If at
least one member of Ag, Cu, Fe and Ni is added in a total amount of from 0.01
to 5 weight % and dispersed in the brazing filler metal, the thermal cyclicity of
the brazing filler metal can be further improved.
According to the third aspect of the invention, an assembly method for
semiconductor devices using the brazing filler metal according to the first or
second aspects of the invention. By using the brazing filler metal of the
present invention, highly reliable semiconductor devices can be obtained at a
low cost.
According to the fourth aspect of the invention, a semiconductor
device assembled is provided by using the brazing filler metal according to the
first or second aspects of the invention. The semiconductor device becomes
economical and highly reliable by using the brazing filler metal of the present
invention.

Claims

Claims
1. A brazing filler metal comprising 5 to 20 weight % of Sb and 0.01 to 5
weight % of Te, with the balance being Sn and incidental impurities.
2. A brazing filler metal, wherein at least one member of Ag, Cu, Fe and
Ni is added in a total amount of from 0.01 to 5 weight % to the brazing filler
metal of Claim 1.
3. A brazing filler metal containing 5 to 20 weight % of Sb, 0.01 to 5
weight % of Te, 0.001 to 0.5 weight % of P, with the remainder being Sn and
inevitable impurities.
4. A brazing filler metal, wherein at least one kind of Ag, Cu, Fe and Ni is
added in a total amount of from 0.01 to 5 weight % to the brazing filler metal of
Claim 3.
5. An assembly method for semiconductor devices in which
semiconductor elements are die-bonded by using a brazing filler metal to
assemble a semiconductor device, wherein the brazing filler metal according
to any one of claims 1 to 4 is used as the brazing filler metal.
6. A semiconductor device assembled by using the brazing filler metal
according to any one of Claims 1 to 4.
PCT/JP2003/011730 2002-09-19 2003-09-12 Soldering filler metal, assembly method for semiconductor device using same, and semiconductor device WO2004026527A1 (en)

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US11/068,527 US7644855B2 (en) 2002-09-19 2005-02-28 Brazing filler metal, assembly method for semiconductor device using same, and semiconductor device

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EP3401053A1 (en) * 2017-05-11 2018-11-14 Panasonic Intellectual Property Management Co., Ltd. Solder alloy and bonded structure using the same
EP3461580A1 (en) * 2017-09-29 2019-04-03 Panasonic Intellectual Property Management Co., Ltd. Solder alloy and junction structure using same

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WO2012077228A1 (en) * 2010-12-10 2012-06-14 三菱電機株式会社 Lead-free solder alloy, semiconductor device, and method for manufacturing semiconductor device
JP5878290B2 (en) * 2010-12-14 2016-03-08 株式会社日本スペリア社 Lead-free solder alloy
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CN108568613A (en) * 2017-03-07 2018-09-25 松下知识产权经营株式会社 Solder alloy and bonded structure
EP3401053A1 (en) * 2017-05-11 2018-11-14 Panasonic Intellectual Property Management Co., Ltd. Solder alloy and bonded structure using the same
EP3461580A1 (en) * 2017-09-29 2019-04-03 Panasonic Intellectual Property Management Co., Ltd. Solder alloy and junction structure using same
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JP2004106027A (en) 2004-04-08
AU2003263597A1 (en) 2004-04-08
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KR20050057490A (en) 2005-06-16

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