WO2004023563A1

WO2004023563A1 - Field-effect transistor

Info

Publication number: WO2004023563A1
Application number: PCT/JP2003/011300
Authority: WO
Inventors: Hidekazu Tanaka; Tomoji Kawai; Teruo Kanki; Young-Geun Park
Original assignee: Japan Science And Technology Agency
Priority date: 2002-09-05
Filing date: 2003-09-04
Publication date: 2004-03-18
Also published as: EP1548843A1; US20060017080A1; US20070007568A1; KR100731960B1; JPWO2004023563A1; KR20070048811A; EP1548843A4; KR100731959B1; KR20050083673A

Abstract

A field-effect transistor has a film thickness of 50 nm or less and comprises a ferromagnetic layer adhering to a dielectric layer. The ferromagnetic layer is composed of a Ba Mn oxide which shows ferromagnetism at 0 ˚C or higher, and the dielectric layer is composed of a dielectric material or a ferroelectric material. With this constitution, magnetism, electricity-transporting characteristics and/or magnetoresistive effect can be controlled at 0 ˚C or higher.

Description

Description Field-effect transistor Technical field

The present invention relates to a field-effect transistor, and more particularly to a field-effect transistor that can be used for a magnetic recording element that can be written by an electric field, a new-function semiconductor-magnetic integrated circuit, an electric-field control magnetic actuator, and the like. Background art

In addition to semiconductor devices that control the flow of electrons, spintronics that control spin, which is the source of magnetism, using a semiconductor method have been recently developed. The development of these spintronics has led to the development of new magnetic recording elements that enable ferromagnetic switching by using the change in carrier concentration in a magnetic semiconductor by applying a voltage, and that allow information to be written in an electric field. It is expected that new functional semiconductor-magnetic integrated circuits can be realized. As a field effect element that controls ferromagnetism by an electric field, for example, (1) a device using a diluted magnetic semiconductor has been reported (see Non-Patent Document 1). In this report, (I n, M n) As is used as a diluted magnetic material.

Other field effect devices using (2) Mn oxide / ferroelectric oxide have also been reported (for example, see Non-Patent Documents 2 to 4).

(Non-patent document 1)

H. Ohno et al., Nature 408, 944-946 (2000)

(Non-patent document 2) S. Mathews et al., Science 276 (1997) 238

(Non-Patent Document 3)

T. Wu et al., Phys. Rev. Lett. 86 (2001) 5998

(Non-patent document 4)

S.B Ogale et al., Phys. Rev. Lett. 77 (1996) 1159

However, the above-mentioned conventional field effect element has a problem that the magnetic transition temperature is low and a high electric field needs to be applied, or the magnetic transition temperature does not change.

Specifically, the field effect element using the diluted magnetic semiconductor of the above (1) has a very low magnetic transition temperature (22.5 K−−250 ° C.). At that time, a high electric field is required to obtain a change in the magnetic transition temperature. Specifically, the change in magnetic transition temperature (A Tc) is 1 K (ΔT c = 1 K) when a high electric field of 125 V is applied. Furthermore, the field effect element having the above configuration does not have a memory effect.

Also, in the case of using the Mn oxide ferroelectric oxide of (2), most of the field effect elements having the above configuration do not show a change in magnetic transition temperature. Further, even in the case of a compound exhibiting a change in magnetic transition temperature, its magnetic transition temperature is low, and the width of the change in magnetic transition temperature is small. Specifically, the group of Venkatesan (USA) (see Non-Patent Literatures 2 to 4) proposes (La, A) MnO3 (A = Sr, Ca, Nd) as a ferromagnetic layer. ) Is used. It is known that the magnetic transition temperature of the ferromagnetic layer having the above-described structure rapidly decreases when the ferromagnetic layer is formed into a thin film necessary for producing a depiice. Therefore, the field effect element having the above configuration cannot control the transition temperature near room temperature, for example. For example, (L a, C a) M n O 3 (50 nm) / S r T i Changes in the magnetic transition temperature of an example using an O 3 field-effect element have been reported. The change in the magnetic transition temperature is AT c = 150 K + 3 K when a voltage of 5 V is applied.

Therefore, a field effect transistor that can operate at 0 ° C. or higher and can operate at a lower voltage than before has been desired. Disclosure of the invention

The present inventors have conducted intensive studies on the above problems, and as a result, in order to obtain a sufficient electric field effect, a Ba-based M having an optimum film thickness, Ba atom content, and a flat interface at the atomic level. The present invention has been completed by combining an n-oxide and a dielectric or ferroelectric having an optimum remanent polarization value and insulating property.

That is, the field effect transistor according to the present invention is made of a Ba-based Mn oxide having a film thickness of 50 nm or less and exhibiting ferromagnetism at 0 ° C. or more in order to solve the above problems. It is characterized in that a ferromagnetic layer and a dielectric layer made of a dielectric or ferroelectric are joined.

According to the above configuration, the field-effect transistor according to the present invention includes a Ba-based Mri oxide exhibiting ferromagnetism at 0 ° C. or higher as a ferromagnetic layer, System Mn oxide is used. Then, by joining the ferromagnetic layer and the dielectric or ferroelectric layer, a field effect transistor having a magnetic transition temperature of 0 ° C. or more can be obtained. As a result, the transistor of the present invention has a very high temperature,

It can be operated above ° C. Specifically, the magnetic properties, the electric transport properties, and / or the magnetoresistive effect can be controlled at o ° C or higher. In addition, _Ba- based Mn oxide is a “strongly correlated electron system” in which the interaction between electrons is very strong as compared with, for example, a diluted magnetic semiconductor. Therefore, since the physical properties change with a slight change in the carrier concentration, control can be performed at a lower voltage than, for example, a dilute magnetic semiconductor.

As described above, the field-effect transistor of the present invention can be operated at a lower voltage and a higher temperature (0 ° C. or higher) than before.

More preferably, the field effect transistor of the present invention has a bottom gate structure.

The above-mentioned borate Tomuge preparative structure, a channel layer (ferromagnetic layer) (L a, B a) Mn 0 3 layers, not in contact with the substrate, and a structure in which one surface is bared is there. The yo Ri Specifically, a structure (L a, B a) Mn 0 3 layer is exposed.

According to the above structure, since they have volume Tomuge bets structure, (L a, B a) Mn_〇 ₃ layer is not in contact with the substrate. Thereby, the interaction between the substrate and the (La, Ba) MnO3 layer can be eliminated. Therefore, it is possible to exhibit ferromagnetism at 0 ° C. or higher and obtain a wider change in magnetic transition temperature.

Further objects, features, and advantages of the present invention will be made clear by the description below. Also, the advantages of the present invention will become apparent in the following description with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 is a cross-sectional view illustrating a schematic configuration of a field-effect transistor according to an embodiment of the present invention. FIG. 2 is a perspective view showing a schematic configuration of a field-effect transistor according to another embodiment of the present invention.

FIG. 3 is a graph showing a change in source-drain resistance when a top gate field-effect transistor is subjected to a Good-Pyase sweep. Figure 4 is a graph showing the change in source-to-drain resistance due to the temperature change of a top-gate field-effect transistor.

FIG. 5 is a graph showing a change in source-to-drain resistance due to a temperature change of a bottom-gate type field effect transistor. BEST MODE FOR CARRYING OUT THE INVENTION

[Embodiment 1]

One embodiment of the present invention is described below with reference to FIG.

As shown in FIG. 1, the field-effect transistor according to the present embodiment includes a ferromagnetic layer 2, a dielectric layer 1, a source electrode 4, a gate electrode 3, and a drain electrode 5. The ferromagnetic layer 2 is formed on a substrate.

Specifically, a ferromagnetic layer 2 is formed on a substrate, and a dielectric layer 1 is laminated on the surface of the substrate on which the ferromagnetic layer 2 is formed. That is, the substrate, the ferromagnetic layer 2 and the dielectric layer 1 are laminated in this order, and the ferromagnetic layer 2 and the dielectric layer 1 are joined (hetero junction). The gate electrode 3 is provided on the dielectric layer 1, and the source electrode 4 and the drain electrode 5 are provided on the ferromagnetic layer 2 with the dielectric layer 1 interposed therebetween. At this time, the area where the dielectric layer 1 and the ferromagnetic layer 2 are joined is the electric field effect transistor. Operating range.

The substrate is not particularly limited as long as it can form the ferromagnetic layer 2 uniformly and flat on the surface. Is a material constituting the substrate, specifically, for example, (but, 0≤ q ≤ 1. 0) (S r preparative _{_{q B a q) T i 0}} 3, or, such as M G_〇 Single crystals can be suitably used. Among the above-exemplified substrates, S r T i 0 ₃ is q = 0 is inexpensive and damage Chasse control electrical characteristics, for commonly are found using well as a standard substrate, good more preferable. In particular, if you forming a single crystal S r T i O ₃ substrate (0 0 1) l OO nm (1 0 0 0 A) ferromagnetic layer 2 with the following thickness on the surface, the Curie temperature, It is more preferable because the temperature tends to be higher than the Curie temperature in the bulk state. Further, by using the single crystal exemplified above, when the ferromagnetic layer 2 is formed on the substrate by, for example, a laser abrasion method, a thin film of the ferromagnetic layer 2 can be easily formed. it can.

The ferromagnetic layer 2 is composed of a Ba-based Mn oxide which is a ferromagnetic material. The Ba-based Mn oxide has a perovskite structure (L a, B a

) Shows MnO3.

The Ba-based Mn oxide according to the present embodiment has a thickness of 50 nm or less and exhibits ferromagnetism at 0 ° C or more.

Is a B a system M n oxide having the above properties, for _{example,.. (L & 1 -} X B a x) M n O 3 ( here, x is 0 0 5 rather x rather 0 3 relationships Satisfy

)). The lower limit of X is preferably larger than 0.05, more preferably larger than 0.1, and particularly preferably 0.15 or more. If the above X is less than 0.05, the carrier concentration becomes insufficient, so that good electric conduction cannot be obtained and the ferromagnetic material cannot be obtained. Also, When x is 0.1 or more, more preferably 0.15 or more, ferromagnetic properties can be exhibited at 0 ° C. or more, and a wider change in magnetic transition temperature can be obtained.

On the other hand, the upper limit value of X is preferably smaller than 0.3, and more preferably 0.2 or less. If the above X is 0.3 or more, when the film thickness is 50 nm or less, it does not show ferromagnetism at 0 ° C or more, so if it is a field effect transistor, operate at 0 ° C or more. It is not preferable because it cannot be done. In the composition of the Ba-based Mn oxide, there may be Mn deficiency and oxygen deficiency, but Mn deficiency or oxygen deficiency is a factor that lowers the temperature at which ferromagnetism is developed, As a ferromagnetic material exhibiting ferromagnetism at 0 ° C or higher, it is preferable that these defects are not present.

The ferromagnetic layer 2 composed of a Ba-based Mn oxide having the above composition has a characteristic that the thinner the thickness, the higher the ferromagnetic transition temperature. Therefore, the ferromagnetic layer 2 in the field-effect transistor according to the present embodiment is preferably thinner. Specifically, the thickness of the ferromagnetic layer 2 made of a Ba-based Mn oxide is preferably 50 nm or less, more preferably 10 nm or less, and particularly preferably 5 nm or less. By setting the thickness of the ferromagnetic layer 2 composed of Ba-based Mη oxide having the above composition to 50 nm or less, ferromagnetic properties can be exhibited at 0 ° C. or more. On the other hand, the lower limit of the thickness of the ferromagnetic layer 2 is more preferably greater than 0.8 nm. When the thickness is less than 0.8 nm, the ferromagnetism theoretically disappears.

Further, it is preferable that the temperature at which ferromagnetism is exhibited is higher. That is, the temperature exhibiting ferromagnetism is preferably 0 ° C. or higher, more preferably 25 ° C. or higher, and further preferably 40 ° C. or higher. The ferromagnetic temperature is high. Means that the magnetic transition temperature of the transistor can be increased. In other words, when the temperature at which ferromagnetism is exhibited is, for example, room temperature (25 ° C.), a field effect transistor can be operated at room temperature by using this ferromagnetic layer 2. Therefore, the field-effect transistor according to the present embodiment uses the Ba-based Mn oxide exhibiting ferromagnetism at 0 ° C. or higher as the ferromagnetic layer 2, and therefore, is to be operated at 0 ° C. or higher. Can be.

The dielectric layer 1 is made of a ferroelectric or a dielectric. The ferroelectric or dielectric constituting the dielectric layer 1 is not particularly limited, and various types can be used.

Is the above dielectric, _{specifically, S r T i O s,} A 1 2 0 3, M g

O and the like. Among the above-exemplified dielectric, the dielectric constant of the magnitude, and more preferably S r T i 〇 ₃ in terms of ease of availability.

Further, as the above ferroelectric, _{_{specifically, (B ai- y S r y}} ) T i O 3 ( however, y satisfy a relationship rather 0 rather y), P b T i _{O 3, P b (Z r} ! _ z T i z) T i O 3 ( provided that, z satisfies 0 <ζ <1 relationship), etc. B a T i O ₃ and the like. Among the above-exemplified ferroelectric, P b (Z r, T i) in terms of the magnitude of the dielectric polarization T i 〇 ₃ is more preferable. In the field-effect transistor according to the present embodiment, when the thickness of the ferromagnetic layer 2 is 5 nm or less, the upper limit of the thickness of the dielectric layer 1 is more preferably 400 nm or less. Preferably, it is less than 100 nm. As described above, the field-effect transistor according to the present embodiment has a ferromagnetic layer 2 made of Ba-based Mn oxide having a thickness of 50 nm or less and exhibiting ferromagnetism at 0 ° C. or more, This is a configuration in which a dielectric layer 1 made of a dielectric or a ferroelectric is joined. As a result, the transistor of the present invention In comparison, it can be operated at a very high temperature, that is, 0 ° C or higher. Specifically, the magnetic properties, the electric transport properties, and / or the magnetoresistance effect can be controlled at o ° c or more.

Also, Ba-based Mn oxide is a “strongly correlated electron system” in which the interaction between electrons is very strong as compared with, for example, a diluted magnetic semiconductor. Therefore, since the physical properties change with a slight change in the carrier concentration, control can be performed at a lower voltage than, for example, a dilute magnetic semiconductor.

Therefore, the field effect transistor of the present invention can be operated at a lower voltage and a higher temperature (0 ° C. or higher) than before.

In the present embodiment, as the ferromagnetic layer 2, (L _ai — _x B a _x ) M n O 3 (where x satisfies the relationship of 0.05 to x x 0.3) using a B a system Mn◦ _3, and the dielectric layer 1, a dielectric (e.g., S r T i 〇 ₃₎ in the case of using the electric field effect transistor that acts as a switcher switching element can do.

On the other hand, in the present embodiment, as the ferromagnetic layer 2, (L _{3 l} — _x B a _x ) M n O 3 (where x is a relation of 0.05 <x <0.3) with B a system Mn O ₃ of satisfying), and a dielectric layer 1, a ferroelectric (e.g., P b (Z r, T i) in the case of using the T i O a) is applied a voltage Since the modulation is maintained even in a state where it is not performed, it has a memory effect. In addition, when an electric field is applied to the field effect transistor having the above configuration, the carrier (hole) concentration near the junction interface between the dielectric layer 1 and the ferromagnetic layer 2 is higher than when no electric field is applied. Layers or lower layers are formed. This part with a high carrier concentration is called the accumulate layer. The field effect transistor having the above configuration utilizes the above accumulate layer, and has a paramagnetism (having no magnetization). This makes it possible to switch from a high state to a ferromagnetic state (a state with large magnetization), which is advantageous for direct magnetic detection compared to, for example, a p-n type diode. In the method of manufacturing a field-effect transistor according to the present invention, to manufacture the ferromagnetic layer 2, specifically, for example, a film can be formed by a laser abrasion method. In addition to the above, for example, a film can be formed by MBE (Molecular Beam Epitaxy), laser MBE, sputtering, CVD, or the like. Also, when the dielectric layer 1 or the ferroelectric layer 1 is manufactured, the film can be formed by the method exemplified above. For example, Rezaa Buresho is a film-forming conditions in the case of down method using a substrate temperature range 6 5 0~ 7 3 5 0 ° C, 1. 1 0 X 1 0- 1 ~ 5. 0 X 1 0 1 O in the range of P a

_Two gas pressure atmospheres are preferred. In the case of the ferromagnetic layer 2, in order to form a film thickness of 50 nm or less, for example, it is necessary to form a film at a film forming speed of about 10 nm (100 A) / 20 min. Is more preferred.

In particular, the (L a, B a) in making a thin film of ferromagnetic layer 2 made of M n O ₃ in the substrate is likely to show ferromagnetism as performing thinning with髙酸Moto圧, at low oxygen pressure The thinner the film, the harder it becomes to exhibit ferromagnetism. This is because the carrier (hole) concentration is increased by increasing the amount of oxygen in the ferromagnetic layer 2, and the temperature of the carrier is increased as the carrier concentration is increased. ]

Another embodiment of the present invention is described below with reference to FIG. For convenience of explanation, members having the same functions as the members described in the first embodiment will be denoted by the same reference numerals, and description thereof will be omitted. The field effect transistor according to the present embodiment has a bottom gate structure (bottom gate type). It said a bottom gate type field effect transistor is the channel layer (L a B a) Mn 0 3 is not in contact with the substrate, one surface is exposed. That is, in the field-effect transistor according to the present embodiment, (L a, B a) Μη〇 ₃ which is the channel layer can receive light. Therefore, the field effect transistor according to the present embodiment can be used as an optical modulator that controls the polarization plane of incident light by the electric field as a result of controlling the magnetism by the electric field. Further, in the field effect transistor, since one surface of (L a B a) Mn 〇 ₃ which is a channel layer is exposed, light can be advantageously transmitted and received.

The field effect transistor according to this embodiment, Remind as in FIG. 2, (L a B a between P b (Z r, T i ) T i 0 3 is a substrate and the gate layer ) Mn 0 ₃ or S r R u 0 ₃ made of an oxide gate electrode is formed. In other words, a bottom-gate field-effect transistor has an oxide gate electrode, a gate layer (dielectric layer), and a channel layer (ferromagnetic layer) stacked in this order on a substrate (substrate and oxide gate). Contact with the electrode). Then, the field effect transistor, which is the channel layer (L a B a) Mn_〇 _third surface, is provided with drain and source electrodes, the oxide gate electrode, a gate electrode provided ing.

The field effect transistor according to the present embodiment is a bottom gate type. That is, the top gate type in the first embodiment, i.e., with both the (L a, B a) Mn_〇 ₃ substrate and the gate layer (P b (Z r, T i) T i 0 3) compared with the configuration in contact, (L a B a) Mn 0 3 is tangent to the substrate Not in contact with the gate layer only. Generally, at the substrate interface, there is a layer called a dead layer, which is difficult to control. Since the field-effect transistor according to the present embodiment is not in contact with the substrate, a larger change in magnetic transition temperature can be expected.

The bottom-gate type field-effect transistor is the same as the method of manufacturing the top-gate type (gate electrode at the top) in the first embodiment, and a detailed description is omitted.

Further, the oxide gate electrode, (L a, B a) if consists M N_〇 ₃ Rereru is, in the yarn且成ratio of L a and B a, of the channel layer More preferably, it is the same as the composition ratio.

The present invention is not limited to the embodiments described above, and various modifications are possible within the scope set forth in the claims. Implementations obtained by appropriately combining the technical means disclosed in the different embodiments are appropriate. The form is also included in the technical scope of the present invention.

As described above, the field effect transistor according to the present invention has a thickness of 50 nm or less, a ferromagnetic layer of Ba-based Mn oxide exhibiting ferromagnetic properties at 0 ° C. or more, and a dielectric layer. It is characterized by being bonded to a dielectric layer made of a body or a ferroelectric.

According to the above configuration, the field-effect transistor according to the present invention includes a Ba-based Mn oxide exhibiting ferromagnetism at 0 ° C. or higher as a ferromagnetic layer, for example, a Ba having a specific composition. System Mn oxide is used. Then, by joining the ferromagnetic layer and the dielectric or ferroelectric layer, a field effect transistor having a magnetic transition temperature of 0 ° C. or more can be obtained. As a result, the transistor of the present invention has a very high temperature, that is, 0 It can be operated above ° C. Specifically, at 0 ° C. or higher, the magnetism, electric transport characteristics, and / or magnetoresistance effect can be controlled.

In addition, the: 6 & system ^ 111 oxide is a "strongly correlated electron system" in which the interaction between electrons is much stronger than that of a dilute magnetic semiconductor, for example. Therefore, since the physical properties change with a slight change in the carrier concentration, control can be performed at a lower voltage as compared with, for example, a diluted magnetic semiconductor.

Structure represented by the field effect transistor of the present invention, the ferromagnetic layer _{_{_{(L ai _ x B a x}}} ) M n O 3 ( here, x satisfies the relation of 0.0 5 rather x rather 0.3) More preferably, it is a Ba-based Mn oxide consisting of

According to the above configuration, of (L _ai — _x B a _x ) Mn〇 ₃ , by setting x to be in the range of 0.05 <x <0.3, the ferromagnetic property becomes 0 ° C or more. Can be shown. Therefore, by using a Ba-based Mn oxide having the above specific composition, a field-effect transistor that can be operated at 0 ° C. or higher can be provided.

Field effect transistor of the present invention, the ferromagnetic layer _{_{(L a _ x B a x}} ) M n O 3 ( here, x is 0.1 0 <satisfy the relationship x <0. 3) B indicated by More preferably, it is an a-type Mn oxide.

That is, of (L a, — _x B a _x ) Mn〇 ₃ , X is 0.10

By setting it in the range of 0.3, ferromagnetic properties can be exhibited at 0 ° C. or higher, and a wider change in magnetic transition temperature can be obtained.

Field effect transistor of the present invention, the dielectric or ferroelectric material, B a T i 〇 _3, S r T i 〇 _3, (B a one _{_y} S r _y) T i O © (however, y A is 0 rather than meet the y rather than one _{relationship), P b T i 0 3} , P b (Z r! _ Z T i z) T i O 3 ( where, _Z is 0 rather than _Z rather than one relationship Meet) or

The configuration is A 1 2_Rei ₃ is more preferable.

The field effect transistor of the present invention, the dielectric or ferroelectric material, B a T i 〇 _{_{3, S r T i 0 3}} , (B ai - y S r y) T i 〇 ₃ (however, y 0 <satisfy y <1 _{relationship), P b T i O 3} , or, a 1 ₂ 〇 is preferably Ri good _3.

By using a dielectric or a ferroelectric as any of the compounds exemplified above, it is possible to provide a field effect transistor having a more efficient magnetic transition temperature change.

The above-mentioned borate Tomuge preparative structure, a channel layer (ferromagnetic layer) (L a, B a) Mn 0 3 layers, not in contact with the substrate, and a structure in which one surface is bared is there. More specifically, (L a, B a) Mn 0 3 layers, a structure that is exposed. 'According to the above structure, since they have Botomuge bets structure, (L a, B a) Mn_〇 ₃ layer is not in contact with the substrate. This ensures that it is possible to eliminate the interaction of the substrate and the (L a, B a) Mn O 3 layer. Therefore, it is possible to exhibit ferromagnetism at 0 ° C. or higher and obtain a wider change in magnetic transition temperature.

〔Example〕

(Example 1)

The field effect transistor according to the present invention is formed by a laser abrasion method. An example of the production will be described below.

First, when _{_{(L a 0. 87 B a}} 0. 13) to produce the M n O _3, Ri bets on L a _₂ 0 _3, Mn ₂ 〇 _3, B a O qs mixing ratio Pauda, combined mix, After sintering at 900 ° C. for 40 hours, main sintering was performed at 130 ° C. for 24 hours.

Then, using the laser ablation over to down method, A r F excimer laser (λ = 1 9 3 nm) a _{_{(L a 0. 87 B a}} 0. 13) irradiating the Mn 0 _3, the temperature of the substrate 7 0 0 ° C, an oxygen gas pressure 1. 0 X 1 0- conditions, S r T i 〇 ₃ (0 0 1) surface on a single crystal substrate _{_{(L a 0. 87 B a}} 0. 13 ) thin films have been prepared of M n O ₃ (thickness 3. 6 nm). Thus, a ferromagnetic layer was formed. Then, on the ferromagnetic layer, the laser § play to down method to produce a P b (Z r, T i ) thin film made of O ₃ (thickness 3 0 nm). Thus, a dielectric layer was formed. That is, a substrate, a ferromagnetic layer, and a dielectric layer are sequentially stacked. Also, the dielectric layer is not in contact with the substrate.

Next, a gate electrode was provided on the dielectric layer, and a source electrode and a drain electrode were formed on the ferromagnetic layer. Specifically, the source electrode and the drain electrode were formed so as to sandwich the dielectric layer formed on the ferromagnetic layer. At this time, the source electrode and the drain electrode may be brought into contact with the dielectric layer, or may not be brought into contact.

As described above, the field-effect transistor according to the present example was manufactured.

. The depth operation range of the field-effect transistor obtained by the above manufacturing method was 200 μ μηΧ200 0ππι.

Next, by using the obtained field-effect transistor and performing a gate bias sweep at 290 °, the source-drain resistance is reduced by the dielectric layer. Then, it was confirmed whether the carrier concentration of the ferromagnetic layer was effectively changed or not. Figure 3 shows the results. As shown in Fig. 3, it was confirmed that the carrier concentration of the ferromagnetic layer could be changed effectively.

Next, the source-drain resistance was measured when the temperature of the field-effect transistor was changed with a 5 V electric field applied as the gate bias. Fig. 4 shows the results. As can be seen from Fig. 4, the ferromagnetic transition temperature (metal-insulator transition temperature) reaches 280 K.

In addition, as can be seen from FIG. 4, a magnetic transition temperature change of 1.5 K was confirmed at 28 OK (Balta 270 K) with an electric field of 5 V applied as a gate bias. This means that a ferromagnetic-paramagnetic switch is being performed. Therefore, the field effect transistor of the present invention can be operated at a lower voltage and at a higher temperature (0 ° C. or higher) than before [Example 2]

_{(L a o. 87 B a} o. 1 3) M n 〇 composition of _{_{_{3 (L a 0. 85 B}}} a 0. 15) was replaced with M n 0 _3, the same procedure as in Example 1, Field effect transistors were fabricated.

Next, by performing a gate bias sweep at 290 K using the obtained field-effect transistor, the source-drain resistance is polarized by the dielectric layer and the ferromagnetic layer is carried. It was confirmed whether the carrier concentration of the ferromagnetic layer was effectively changed, as in Example 1, when it was confirmed whether or not the carrier concentration was effectively changed.

Then, the source-to-drain resistance was measured when the temperature of the field effect transistor was changed with a 5 V electric field applied as the gate bias. did. As a result, a magnetic transition temperature change of 3.0 K was confirmed at 282 K with an electric field of 5 V applied as a gate bias.

(Example 3)

Using a material having the same composition as in Example 2, a bottom gate type field effect transistor was manufactured by a laser application method. At this time, a Chiyane Le layer _{_{(L a 0 85 B a 0}} . 15) Mn O 3 layer thickness (film thickness), was 1 5 nm. Incidentally, S r T and i O ₃ (0 0 1) plane of the single crystal substrate, between the P b (Z r, T i ) 0 3 is a dielectric layer (gate layer), (L a, to form an oxide gate electrode made of B a) Mn O _3.

Then, the source-to-drain resistance was measured when the temperature of the field-effect transistor was changed with a 5 V electric field applied as a gate bias. As a result, a magnetic transition temperature change of 3.0 K was confirmed at 282 K with an electric field of 5 V applied as a gate bias.

Next, using the obtained field-effect transistor, the source-to-drain resistance was measured when the temperature of the field-effect transistor was changed in a state where a 5 V electric field was applied as a gate bias. Figure 5 shows the results. As can be seen from Fig. 5, the ferromagnetic transition temperature (metal-insulator transition temperature) reaches 313 K.

In addition, as can be seen from FIG. 5, a magnetic transition temperature change of 160 K was confirmed at 313 K with an electric field of 5 V applied as a gate bias. This means that a ferromagnetic-paramagnetic switch is being performed. Therefore, the field effect transistor of the present invention can be operated at a lower voltage and a higher temperature (0.1 C 'or more) than ever before.

It should be noted that specific examples made in the section of the best mode for carrying out the invention have been made. The embodiments or examples are merely for clarifying the technical contents of the present invention, and should not be construed as being limited to only such specific examples. The present invention can be embodied with various modifications within the scope of the appended claims. Industrial potential

The field-effect transistor according to the present invention can be used, for example, for a magnetic recording element that can be written by an electric field, a new-function semiconductor-magnetic integrated circuit, an electric-field control magnetic actuator, and the like.

Claims

The scope of the claims

A ferromagnetic layer made of Ba-based Mn oxide having a thickness of 1.5 nm or less and exhibiting ferromagnetism at 0 ° C or more,

A field effect transistor characterized by being joined to a dielectric layer made of a dielectric or ferroelectric.

2. The above ferromagnetic layer

(L a! _ _X B a _x ) M n O ₃

(However, x satisfies the relationship 0.05 <x <0.3)

2. The field-effect transistor according to claim 1, wherein the field-effect transistor is made of a Ba-based Mn oxide.

3. The above ferromagnetic layer

(L a! _ _X B a _x ) M n O ₃

(However, x satisfies the relationship 0.10 <x <0.3)

4. The dielectric or ferroelectric _{material, B a T i O 3,} S r T i O 3, (B a! _ Y S r y) T i O 3 ( where, y is, rather than 0 rather than y 1 of relationship to _{meet), P b T i 0 3} , P b (Z r! _ z T i z) T i O 3 ( where, z satisfies the 0 <z <1 relationship), or, a 4. The field effect transistor according to claim 1, wherein the field effect transistor is 1 ₂ O ₃ .

5. The above dielectrics or ferroelectrics are represented by B a T i O ₃ , S r T i O ₃ , (B a! _ _Y S r _y ) T i O a (where y is 0 and y claims relationship satisfying _{the), P b T i 0 3} , or, characterized in that it is a a 1 ₂ O ₃ The field-effect transistor according to 1, 2, or 3.

6. The field effect transistor according to any one of claims 1 to 5, wherein the field effect transistor has a bottom gate structure.