WO2004008125A1

WO2004008125A1 - Detection of metal contaminants on a surface of an as-cleaned semiconductor structure based on photoluminescence measurements

Info

Publication number: WO2004008125A1
Application number: PCT/GB2003/003071
Authority: WO
Inventors: Victor Higgs
Original assignee: Aoti Operating Company, Inc.
Priority date: 2002-07-17
Filing date: 2003-07-14
Publication date: 2004-01-22
Also published as: TW200408806A; GB0216620D0; AU2003255718A1

Abstract

A method of quality control of cleaning processes for semiconductors such as silicon during device fabrication comprises taking an as-cleaned semiconductor structure following a critical cleaning process step; exposing the surface of the semiconductor structure to at least one high-intensity beam of light from a suitable light source, preferably a laser, and in particular a high-intensity laser, and collecting photoluminescence (PL) produced by excitation of the semiconductor structure by the light beam; making an analysis of the collected photoluminescence signal and using that analysis as the basis for a quality classification of the cleanliness of the semiconductor, in particular by: determining an average photoluminescence intensity emitted across the area of the structure; comparing the average with a predetermined acceptable specification range of photoluminescence; making a quality classification of the cleanliness of the semiconductor structure based thereon, and in particular rejecting or selecting for remedial action such as further cleaning semiconductor structures exhibiting a photoluminescence response outside the said predetermined acceptable specification range. In a preferred embodiment the method is applied as part of a quality control metric during device cleaning and processing. In a refinement of the method a spatially resolved PL map is also collected. An apparatus for performing the method is also described.

Description

^DET^ECT^ION ^OF METAL CONTAMINANTS ON A SURFACE OF AN AS-CLEANED S_EMIC_OND_UCTOR ST^RUC^TURE BASED ON PHOTOLUMINESCENCE MEASUREMENTS

The invention relates to a non-destructive method and apparatus for detecting surface layer metal contamination in semiconductors such as silicon, in 5 particular as introduced by wet cleaning of semiconductor wafers prior to and during device fabrication thereupon. The invention in particular provides for an improved quality control metric to wet cleaning processes during device fabrication.

10 Advances in silicon technology in the last 50 years have produced dramatic improvements in chip performance, and an explosive growth in the technology. The success of the semiconductor industry has been unparalleled, because of its accelerating effect on advances in technology and the resulting effect on the world economy. During the 1990s the semiconductor industry

15 drove high technology to become the leading source of economics and job creation. This has been sustained due to its ability to double the number of transistors on a chip and increase its performance at no extra cost. Thirty years ago there were a few thousand transistor per chip. Now there are 100 million per chip.

20

Making the chip's features smaller meant they become faster and allowed higher levels of integration. To maintain this trend, there are more stringent requirements on the quality of the starting materials and cleanliness of the device fabrication process. The concentration of surface metals should be less ²⁵ than ∞lxlO¹⁰ atoms/cm², otherwise yield loss can occur in the fabricated device (International Semiconductor Roadmap for Semiconductor Materials 2001, SEMATECH, 3101 Industrial Terrace Suite 106, Austin TX 78758).

As a consequence future IC designs will require more efficient cleaning 30 processes to remove metal ions and particles. This area of research is receiving increased attention as they can modify the silicon surface and impact IC performance. Surface metal contamination is likely to be introduced on the wafer surface during wafer preparation for IC fabrication. These surface metals diffuse into the wafer bulk during device processing. Then complications often arise due to metals because they can precipitate during IC process cool down. The metals can then decorate defects and be present as precipitates. This can results in loss of oxide quality, increased junction leakage and subsequent degradation of IC performance.

Although an extensive methodology has been developed for the removal of surface metals by cleaning with high purity chemicals, as with any semiconductor processing step control of surface cleaning and wet etching processes is critical. Fabrication of state of the art devices involves approximately 50 critical cleaning steps. Accurate assessment of the effectiveness of these cleaning processes is highly desirable. New cleaning technology for large wafers uses single wafer cleaning chambers. This allows faster cleaning time than conventional batch technologies reducing time and cost. However, when cleaning such large area wafers it can also become important to know how effective the cleaning is over the whole wafer surface.

The most common technique for analysing metal contaminants is Total X-Ray Reflection Fluorescence (TXRF). Detection limits for TXRF vary for different metals, and are mostly ofthe order of 10 atoms/cm . Only a small area ofthe wafer is analysed (∞l cm²) and the technique takes approximately one hour to make a measurement. It is possible to measure accurately the spatial variation of metals across a wafer surface. However the process can be slow.

Another more time consuming approach to monitor surface metals is using bulk lifetime methods. After surface cleaning the wafers must be thermally treated to drive any residue surface metals into the bulk. Then the wafers can be analysed for bulk impurities. This assumes that no additional contamination is introduced during the drive-in step.

For all these reasons prior art techniques are often limited to representative batch sampling only, and/or to observations across a sample wafer area rather than a whole wafer, since timescales are impractical to allow a full area test of every unit in a given batch.

It is an object of the present invention to provide a method and apparatus for quality control of cleaning processes for semiconductors such as silicon during device fabrication by detection of surface layer metal contamination which mitigates some or all ofthe above disadvantages.

It is a particular object of the present invention to provide a method and apparatus which provides for a more rapid assessment of the effectiveness of cleaning processes for semiconductors such as silicon during device fabrication.

It is a particular object of the present invention to provide a method and apparatus of effectiveness assessment which offers enhanced throughput rates, and in particular enables an improved quality control metric for the cleaning process in which it becomes practical to test all samples and/or to carry out spatially resolved testing across sample areas at each critical cleaning stage.

Thus, in accordance with the present invention in its first aspect a method of quality control of cleaning processes for semiconductors such as silicon during device fabrication comprises the steps of: taking an as-cleaned semiconductor structure following a critical cleaning process step; exposing the surface of the semiconductor structure to at least one high- intensity beam of light from a suitable light source, preferably a laser, and in particular a high-intensity laser, and collecting photoluminescence (PL) produced by excitation ofthe semiconductor structure by the light beam; making an analysis of the collected photoluminescence signal and using that analysis as the basis for a quality classification of the cleanliness of the semiconductor, in particular by: determining an average photoluminescence intensity; comparing the average with a predetermined acceptable specification range of photoluminescence; making a quality classification of the cleanliness of the semiconductor structure based thereon, and in particular rejecting or selecting for remedial action such as further cleaning semiconductor structures exhibiting a photoluminescence response outside the said predetermined acceptable specification range.

It is established in the literature that photoluminescence can be used as a means to detect impurities introduced into a semiconductor structure during device fabrication by thermal processing. However, in accordance with the invention, it has been surprisingly found that the photoluminescence technique will also detect metal impurities in an as-cleaned semiconductor structure immediately following wet chemical cleaning and prior to further heat treatment. It is thus found to be surprisingly effective in characterising the efficiency of such wet chemical cleaning during processing, and of allowing quality control decisions to be taken at each critical step.

The quality classification step comprises performing a numerical analysis of the collected photoluminescence signal, comparing the result of that numerical analysis with a predetermined acceptable photoluminescence specification such as a predetermined range of photoluminescence lαiown to be associated with satisfactory quality, and making a quality classification of the semiconductor structure based thereon.

In one simple alternative the method comprises determining an average photoluminescence intensity, comparing the average with a predetermined acceptable specification range of photoluminescence, and making a quality classification ofthe semiconductor structure as above based thereon.

The average may be a whole area average based on mean photoluminescence intensity emitted across the area of the structure, or local area average wherein the area of the structure is divided into a two dimensional array of subregions, a mean photoluminescence intensity is determined for each subregion, the mean for each subregion is compared with a predetermined acceptable photoluminescence specification, and a quality classification as above is based thereon. This can be advantageous since the response attributable to an isolated defect could be swamped in a whole area average even though that defect was sufficiently serious to justify a quality rejection. At an appropriate subregion size it is possible to ensure that such a response can still be detected.

Use of a predetermined photoluminescence specification based on the mean is an example only. In the alternative, especially if the subregion approach is followed, other numerical parameters could be applied to the analysis of the photoluminescence signal, such as standard deviation, local maxima and/or minima, deviation from a predetermined baseline, or other numerical analysis method to determine, either on a local or whole area basis, a deviation of the photoluminescence response from predetermined parameters known to be associated with a semiconductor structure of satisfactory quality. Where reference is made below to numerical analysis based on average luminescence it will be appreciated that this is for exemplification only and that the precise numerical parameters chosen for the comparison between observed and predetermined acceptable response is not critical to the invention.

The photoluminescence technique produces a much more rapid response than prior art TXRF techniques. In its preferred basic form described above it samples across the whole wafer area and produces an average result based upon that whole wafer and is accordingly much more reliable than the TXRF technique where sampling is in effect concentrated on specific arbitrary sample areas. Its speed and accuracy make it a much more effective and practical quality control method than prior art techniques.

In particular it becomes reasonable to test all semiconductor structures after each critical processing step. This allows for much improved quality control during wet chemical cleaning. In a preferred further aspect the invention thus comprises a quality control metric for wet chemical cleaning of incoming structures of semiconductors such as silicon during device fabrication thereupon, to be incorporated as part of a device fabrication process, comprising the steps of wet chemical cleaning such a structure in conventional manner, subjecting the as-cleaned structure to a test in accordance with the foregoing first aspect of the invention, passing a structure exhibiting a photoluminescence response within the predetermined acceptable specification range of photoluminescence onto the next device fabrication stage, rejecting a structure exhibiting a photoluminescence response outside the predetermined acceptable specification range of photoluminescence from the next device fabrication stage, and preferably passing such a structure for remedial treatment, for example by further cleaning, optionally followed by retest and accept/reject as above.

In accordance with this preferred aspect all structures may be tested after each critical cleaning stage device fabrication. Potential problems are identified early, prior to expensive fabrication processes. Remedial action can generally be taken, and samples more fully cleaned. The number of rejects necessary at the end of fabrication should be reduced significantly since the method of the invention enables accurate diagnosis and rectification of inefficient cleaning at each stage in fabrication in a rapid and convenient manner.

The photoluminescence technique produces a spatially resolved PL map at a resolution determined by the characteristics of the high-intensity beam of light. This can be exploited by further preferred features of the present method, but for the fundamental objective of the invention as a simple and rapid quality test for a whole wafer during processing an average PL intensity result over the whole wafer area is obtained. This can be related to a predetermined acceptable specification range developed in association with studies using slower analysis methods (eg TXRF or bulk methods). It has been surprisingly found, as described in detail below, that a close correlation can be demonstrated between contamination data obtained from the near-surface- based PL technique of the present invention and prior art methods conventionally used.

The light beam is so controlled, and in particular beam power and/or wavelength and/or spot size so controlled, as to identify contamination at a selective depth in said semiconductor structure, so as to collect PL information from a suitable at- or near-surface depth, for example from the upper 12 μm of the semiconductor structure. For certain materials and devices, smaller depths may be appropriate, down to for example 5 μm or even 1 μm.

The present invention is a contamination and defect monitoring tool that can be used to monitor surface contamination and other surface structural defects such as stacking faults and edge slip. Because this technique measures the surface region it will detect near-surface defects and contamination accurately. These defects are most determinative in their impact on device quality and performance. This further enhances the accuracy and reliability of the technique.

In accordance with the invention in its preferred basic embodiment, a predetermined acceptable specification range of average photoluminescence is first detemiined and then used as a reference for the results for any given as- cleaned wafer for quality control purposes. The predetermined specification range will include a minimum and/or maximum photoluminescence value. In particular, it is known that the photoluminescence signal can be affected in different ways depending upon the particular chemical species comprised in the impurity. Accordingly, the specification range will preferably comprise a minimum and a maximum photoluminescence value.

A quality control decision is taken depending upon whether the measured result lies within the predetermined specification range to accept structures for device fabrication when within the range, and to reject when outside the range. Rejected items may be discarded or subjected to remedial action such as additional cleaning etc. The predetermined acceptable PL range will vary in accordance with the particular material and process involved and will be determined initially from existing quality control specification ranges by relating the PL responses produced by the present invention with responses in accordance with existing prior art measuring techniques.

Once such a specification range has been established, the present invention provides very high throughput relative to prior art methods. For example, for a 12 inch (300 mm) wafer equivalent results can be obtained in around five minutes which would take around an hour with existing methods. Photoluminescence spectroscopy is a very sensitive technique for investigating both intrinsic and extrinsic electronic transitions at impurities and defects in semiconductors. When silicon is excited at low temperatures with laser irradiation above the band-gap of the material, electron hole pairs are produced. These carriers can recombine in various different ways, some of which give rise to luminescence. The electron hole pairs formed at low temperature can be trapped at impurities in silicon and they emit photons characteristic of this interaction, thereby giving impurity specific information in the photoluminescence spectra. There are a significant number of applications of PL spectroscopy to silicon including characterisation of silicon after different processing steps, characteristic of device fabrication for example implantation, oxidation, plasma etching, the detection of point defect complexes and the presence of dislocations. One of the most important applications includes the non-destructive measurement of shallow donors and acceptors such as arsenic, boron and phosphorous. Notably, this technique enables the measurement of the concentration of these shallow donors and acceptors. However, in conventional applications in order to obtain this spectral information and unambiguous chemical identification of the optical centres, measurements need to be carried out at liquid helium temperatures. It is known throughout the industry that at room temperature the PL signal is significantly weakened and very little useful spectral information can be obtained.

A room temperature technique is accordingly preferred, such as in particular that described by International patent application W098/11425, which describes a non-destructive technique which makes practical the detection of electrically active defects in semi-conductor structures based on room temperature PL. The patent application discloses a PL technique which has industrial application in that it enables the image to be produced within minutes and which has a further added advantage in producing micro imaging of small individual defects particularly near to the surface of the wafer, where the device is fabricated. The technique provides information concerning defects in a semiconductor or silicon structure at a rate appropriate to industrial use and in particular enables us to visualise defects in the upper regions of the semiconductor or silicon structure and in particular near to the surface of same.

The technique exploits enhanced non-radiative recombination of electron hole pairs at defects in a semiconductor or silicon structure with a view to enhancing contrast in a PL image of said semiconductor or silicon structure so as to enhance the viewing of defects in same. The preferred PL technique for use in the present invention is therefore that in WO98/11425, incorporated herein by reference. The present invention exploits the fact that contamination can be detected at the surface even in as-cleaned samples which have not been subjected to further heat treatment.

The success of the room temperature PL method disclosed therein is, in part, due to the probing volume probed by the laser being small, spatial resolution preferably 0.1 to 20 μm, ideally 2 to 5 μm, and with a peak or average power density of between 10⁴ to 10⁹ watts/cm², so that localised defects have much greater effect on the measured PL intensity and is also believed, in part, because since the excitation is focused the injected carrier density is high. This greatly increases the probability of non-radiated recombination at the defect and hence physical location of the defect. The present invention in certain preferred embodiments described in more detail below exploits this by preparing a spatial map, and more preferably still a spatial image, of the defects of which the PL response is representative. Reference herein to a high-intensity laser is meant to include, without limitation, a high power density laser i.e. where regardless of the power of the laser the emittance is focused.

In a preferred method of the invention a pulsed laser excitation source is used and ideally luminescence data is measured and/or the luminescence images collected as a function of time. This means that both depth and spatial resolution are improved and can be used to obtain information on the carrier capture cross sections of the defects. Time resolved measurements can also be used to measure the effective carrier lifetime and obtain lifetime maps.

The PL technique of the present invention generates a spatially resolved PL map across the area of the wafer. In the primary method of the invention, this data map is then processed to provide an average PL level across the whole wafer, which is compared with the reference to make the quality control decision. If the method is to be used for a simple accept/ reject and reclean quality control decision as a test prior to passing structures on for the next stage of manufacture then only the averaged PL level is of concern, and the resolution of the map produced by the method is immaterial. Resolutions of the order of 7 mm are adequate. At this level of resolution, processing times are reduced, and test throughput rates maximised. For example it can take just five minutes to obtain a satisfactory accept/ reject result from a 12 inch (300 mm) wafer.

Nevertheless, it is a particular advantage of the preferred photoluminescence technique of the present invention that it can additionally be used to generate a spatially resolved map of PL signals across the surface of the semiconductor structure under test, and in particular to generate a spatially resolved image of those signals. Such a spatially resolved map is simply not practical over practical timescales with prior art TXRF techniques. Accordingly, in a preferred embodiment, the method further comprises the step of generating such a map and/or such an image. In these circumstances, it can be appropriate to work to mapping/imaging resolutions of 0.5 mm or less.

Conveniently, the method further comprises storing the spatially resolved PL map on suitable data storage means and/or transmitting digitised data derived from the spatially resolved map through suitable processing means for onward processing and/or displaying the spatially resolved image on suitable display means.

The basic technique identifies an averaged PL intensity on which to base the accept/ reject or reclean decision. Spatially resolved information is especially useful in relation to rejected structures. A preferred more developed quality control strategy might therefore be to process each unit using the more rapid, basic technique, and to generate spatially resolved data for rejected structures only. In one embodiment, taking full advantage of the ability of the technique to produce spatially resolved data on the PL response of a semiconductor structure under test, it might be appropriate, as indicated, to work at higher resolutions. Accordingly, throughput will be slower than where the technique is used as a basis for basic accept/ reject quality control decisions only. A preferred more developed quality control strategy might therefore be to process each unit using the more rapid, basic technique, and to reprocess rejected structures at higher resolution using the additional functionality offered by the collection of spatially resolved data.

The ability to generate a map or image allows defect location to be generally identified. This can be exploited in a preferred embodiment of the invention in that the method as hereinbefore described can be used to rapidly screen semiconductor structures (5 minutes for a 300 mm wafer) and identify specimens for a full chemical analysis. This embodiment of the method comprises subjecting a semiconductor structure to the test as hereinbefore described to generate a spatially resolved map of PL signals across the surface of the semiconductor structure and, at least in the case of rejected structures, using the spatially resolved map to identify the general location of contamination, and further analysing the semiconductor structure in the identified location using a specific analysis technique such as TXRF to identify the impurity.

Moreover, the ability to generate spatially resolved structures can be of assistance in diagnosing and rectifying cleaning problems. A plurality of samples are sequentially tested after a given critical cleaning stage, the test results are stored as above and compared, and systematic inefficiencies in the particular cleaning process can thus be identified.

The method is suitable for any basic semiconductor structure on which devices are fabricated by thermal processing in familiar manner. In particular, the method is suitable for structures based on wafers of silicon and silicon alloys. The devices may be fabricated from simple single layer wafers or from multilayer wafers, for example formed in an epitaxial layer on a basic silicon wafer.

In accordance with a further aspect of the invention an apparatus for quality controlled cleaning of structures of semiconductors such as silicon during device fabrication thereupon comprises a cleaning device to subject the semiconductor structure to wet chemical cleaning, and a test device to detect impurities on the surface of the as-cleaned structure, wherein the test device comprises a high intensity light source, preferably a laser, and in particular a high-intensity laser; means to focus a high intensity beam of light from the light source onto a surface of the semiconductor structure under test; collection means to collect photoluminescence data from across the surface of the semiconductor structure under test produced by excitation of the semiconductor structure by the light beam; analysis means to process and numerically analyse the collected data; a comparator to compare the results of the analysis with predetermined acceptable specification parameters, and to accept or reject the structure detemrined by whether the photoluminescence signal falls within the predetermined acceptable specification range.

The apparatus may form part of a production line and include transfer means adapted to transfer the structure to a particular further processing stage determined by whether the photoluminescence signal falls within the predetermined acceptable specification range.

In particular the transfer means is adapted to transfer a structure exhibiting a photoluminescence response within the predetermined acceptable specification range of photoluminescence on to the next device fabrication stage, and to transfer a structure exhibiting a photoluminescence response outside the predetermined acceptable specification range of photoluminescence back to the cleaner for further cleaning.

The apparatus to perform the basic method generates data based on a numerical analysis of the PL response, for example an average PL signal across the whole area or a set of local area data as described. This is compared with predetermined acceptable specification parameters.

However, to perform the refined alternatives of the method described above, the apparatus preferably further comprises means to resolve the collected PL data into a spatially resolved PL map across the area of the semiconductor structure, and optionally further comprises means to convert the resolved data into a PL image and/or image/data storage means to store the map/image, and i particular to store successive map/images for future comparison, and/or means to transmit the map/image to a suitable remote data processor and/or image display means such as a visual display screen to display an image and/or related data to a user.

In a further aspect of the invention, there is provided a computer program and/or a suitably programmed computer for performing some or all of the steps ofthe method as hereinbefore described, and in particular for performing data processing steps on collected PL data, for example to determine average PL across the wafer area and/or to spatially resolve a PL map from collected PL data and/or to compare the average with a predetermined acceptable specification range.

The invention will now be described by way of example only with reference to

Figures 1 to 8 ofthe accompanying drawings in which:

Figure 1 is an illustration of a suitable apparatus for obtaining the PL data;

Figure 2 is a schematic illustration of how data is processed;

Figure 3 illustrates PL signals recorded in accordance with the invention for an as-cleaned and three deliberately contaminated wafers;

Figure 4 illustrates PL signals recorded in accordance with the invention for Fe contaminated wafers in as-cleaned, contaminated and recleaned states;

Figure 5 illustrates correlation of PL data to a basic quality control accept/ reject decision;

Figure 6 illustrates a spatially resolved PL image of a wafer; Figures 7 and 8 illustrate a possible numerical analysis technique in accordance with the invention.

The apparatus illustrated in Figure 1 essentially comprises a PL imaging 5 microscope which: towards the right hand side, comprises a bank of lasers (3- 8); towards the bottom comprises a sample stage such as an X-Y table or R- table; towards the left hand side comprises a microprocessor (40) and a display screen (39) and in the centre of the figure there are shown various optical components for directing light through the system. 1.0

In the embodiment shown in Figure 1, six lasers are provided with a view to probing different depths in the sample. However, it is within the scope of the invention to use only one laser, or indeed to use a greater number of lasers. In any event, at least one of the lasers is a high intensity laser and ideally has a 15 spot size of between 0.1 mm and 0.5 micron and a power density of between 10⁴ to 10⁹ watts/cm². A laser selector (16) coupled with said bank of lasers is provided so as to select one or more lasers for use and further also to select the frequency and wavelength ofthe lasers.

0 Conventional optics, such as optical fibres (9) are used to direct light towards the collimator to (10) and laser beam expander (11). An apodization plate (12) is positioned between laser beam expander (11) and beam splitter (31). Beam splitter (31) directs a fraction of light from the aforementioned lasers towards sample (2) via objective (34). 5

An automatic focus controller (30) is provided and coupled to a piezo driven focusing stage (33). The microscope is equipped with a conventional rotating turret (36) which is provided with at least one high numerical aperture objective for micro examination and one low numerical aperture objective for macro examination (34, 35) respectively. In addition, also coupled to turret (36) there is provided an optical displacement measuring system (38).

Cabling is provided so as to connect the automatic focusing controller (30) to microprocessor (40) and also a microscope objective indexing arrangement (32) to microprocessor (40).

Downstream of beam splitter (31) there is provided as filter wheel (13) for laser notch filters, down stream thereof there is provided a swing-aside folding mirror (14) whose function will be described hereinafter. Aligned with said mirror (14) there is provided a filter wheel (27) for wavelength selection, and rearward thereof there is provided a zoom lenses attached to a suitable CCD 2- D array detector (29).

Infinity system compensating lens (37) is provided in the optical path foremost of cold mirror (17) which reflects light towards a further filter wheel (23) for wavelength selection and a focusing lenses (24) which is foremost of a detector (25) for UV and visible light. Detector (25) is coupled to lock-in amplifier (26). This is used to obtain a reflected image ofthe surfaces.

Rearmost of cold mirror (17) is provided a further filter wheel (18) again for wavelength selection, and rearmost thereof a focusing lens (22) and a further aperture wheel (19) for pinhole selection which is provided foremost of a detector (21) for detecting the luminescence.

Both the UV and visible region detector (25) and infrared detector (21) are coupled to lock-in amplifier (26).

Operation ofthe system is explained having regard to the following. A range of wavelengths to probe different planes in the sample is provided by several lasers (3-8). The lasers can be modulated by a frequency generator (16) so that the signal emitted from the sample (2) can be isolated from background radiation by means of the detectors being synchronised to the laser modulation frequency by the lock-in amplifier (26). In a further embodiment, the range of wavelengths could be produced by using a tuneable laser and/or an Optical Parametric Oscillator. Each laser is connected to, and aligned with, a Multi-branch optical fibre (9) so that any or all ofthe lasers can illuminate the sample (2). The common end of the Multi-branch optical fibre terminates in an optical system (10) which collimates the emerging light. This optical system is aligned with a beam expander (11) which matches the laser beam's diameter to that required by the microscope objectives (34,35) above the sample (2). The expanded beam then passes through an apodization plate (12) which distributes the optical energy evenly over the beam area.

The expanded and apodized beam is reflected by a beamsplitter (31) and passes to the microscope objectives (34 and 35). The beam is focused by a microscope objective (34 or 35) on to the sample. In the micro mode this objective is selected to focus the beam to a diffraction limited spot size. A rotating turret (36), operated by an indexing mechanism (32), permits the objective to be changed for the macro mode where a larger area of the sample can be illuminated. In a further embodiment the apodization plate (12) can be removed so that the spot for the micro mode can be made smaller to allow higher injection levels.

An optical displacement sensor (38) measures the distance to the sample and, by means of a feedback loop through the autofocus controller (30), maintains the correct spacing by means ofthe piezo actuated focusing stage (33). The Photoluminescence signal from the sample is collected by the microscope objective (34) (in the micro mode) and transported back through the beamsplitter (31) and a notch filter in the filter wheel (13) which contains notch filters matched to the range of laser wavelengths. The notch filter removes any reflected laser light, passing only the Photoluminescence signal.

The folding mirror (14) is swung out of the beam allowing the signal to pass to the tube lens (37), which may be incorporated to compensate for any infinity microscope objectives which may be used, and on to the cold mirror (17). This component reflects those wavelengths below a selected cut off point (approximately 700 nm) to the focusing lens (24) which focuses the signal into the detector (25). A filter wheel (23) in front of the detector focusing lens (24) contains filters to isolate selected wavelength bands.

The portion of the Photoluminescence signal lying in the wavelength range above the cut-off point passes through the cold mirror (17) and is similarly focused by the lens (22) into the detector (21). This signal also passes through a filter wheel (18) containing filters to isolate selected wavelength bands.

A series of pinholes of different diameters are contained in an aperture wheel (19) positioned in front of the detector (21). This aperture wheel can be moved axially by the piezo actuator (20) so that the pinholes can be positioned confocally with the desired image plane. By this means, planes at different depths in the sample (2) can be imaged to provide accurate depths information.

The electrical signal from the detectors (21, 25) is fed to the lock-in amplifier

(26) where it is synchronised with the modulation frequency of the laser (3-8) by means of a reference signal from the frequency generator (15). The electric signal is then fed to the central processor (40) for analysis. The PL image is obtained by raster scanning the stage. Alternatively optical scanning using galvo mirrors may be employed.

In an alternative micro mode of operation, the folding mirror (14) is swung into the beam of the Photoluminescence signal. The diverted signal passes through a filter wheel (27), which contains filters to isolate selected wavelength bands, and into the zoom lens (28). The zoom lens allows different magnifications to be used in imaging the illuminated spot on the sample (2) on to the CCD two dimensional array (29). This allows the illuminated area of the sample (2) to be imaged at different resolutions. The electrical signal from the CCD array is fed to the central processor (40) for analysis.

The processing of data is illustrated schematically in Figure 2. A sample (101) having been subjected to a standard wet chemical cleaning stage in the single wafer cleaning chamber (100) is transferred by a handling arm (102) onto a sampling base (103) for testing by the device of Figure 1 to generate a PL signal. This is collected by the collection apparatus of Figure 1 (shown in simplified schematic form as the device 105).

The figure further illustrates processing of data. In a first processing path, in accordance with the main aspect ofthe invention, the PL map data is passed to a processor (107) which processes the data to determine an average PL intensity across the whole area ofthe sample (101).

The resulting average is passed to a comparator (108) which relates the average PL intensity data to a predetermined stored specification range within the data store (109), and based on that comparison passes a quality control decision onto the control unit (110). In the embodiment the control unit (110) acts directly upon the handling arm (102) which then transfers the sample (101) on to a device fabrication processing line or to a reject line for remedial action as appropriate. In an alternative mode of operation, the control unit (110) could for example be a display means giving an indication to an operator, who could then operate the arm (102) by separate control means for example to make an acceptable/reject choice, to divert the sample under test for remedial processing etc.

A secondary processing route, shown by the broken line, reflects the optional second aspect of the invention. In this optional aspect, data corresponding to the PL intensity map across the surface of the sample (101) is also passed to a secondary processing unit (111) which is able to resolve the data into a digitised spatially resolved map of intensity across the surface of the sample (101). The resulting map is passed to a data store (112) and to a visual display screen (113). The resolved data may be used to identify defect locations. In this way the basic apparatus could be used to rapidly screen wafers. The location of contamination may be identified from the wafer map, and then the wafers could be further analysed using TXRF to identify the impurity.

An illustration that the technique can be used to contamination after cleaning is provided in Figure 3. A selection of control wafers (12 inch diameter) were measured first on the apparatus of Figure 1, then intentionally contaminated with Cu, Al and Co («lxl0 atoms/cm ). The wafers were then re-measured. The results are shown in Figure 3.

After contamination a clear difference in the average PL signal is obtained, in all cases the average PL value has increased, indicating variations in the surface defect density of surface contamination level. Although these results were surprising, because this experiment was done at room temperature (to replicate normal cleaning conditions). Although sources such as WO97/09649 describes the use of such a technique to identify contamination after thermal processing these prior sources suggest that to activate metal contamination the wafers have to be thermally processed. However it is established in accordance with the invention that the average PL value can be used as a metric to determine the presence of surface metal contamination for monitoring of surface cleanliness.

Further experiments were carried out to investigate the effect of Fe contamination (∞lxlO¹² atoms/cm²). Figure 4a shows the wafer map before contamination (average PL value =3.97) and the corresponding map after Fe contamination (Figure 4b average PL value =11.19), clearly the average PL value has increased. This confirms that the PL value can also be used to detect surface Fe contamination.

To evaluate the effect of cleaning, the Fe contaminated wafer was surface cleaned using a commercial single wafer chamber. The cleaned wafer map is shown in Figure 4c (average PL value =3.50). It is important to note that with the removal of the Fe by the cleaning process, the average PL signal has dropped back to a same level comparable to that before cleaning, supporting the idea that the PL average level is an indicator ofthe surface cleanliness.

Moreover, on close inspection of this wafer map, there was an observable difference in the PL average level across the wafer. It was found to be higher at the wafer edge (Figure 4d ∞4.0) compared to the wafer centre (Figure 4d «3.1). This clearly indicates a difference in the cleaning performance across the wafer surface. Also TXRF showed that the surface contamination levels were less the #1x10 atoms/cm on this wafer. This clearly shows that the average PL value is a very sensitive measure ofthe surface cleanliness.

The PL map would be recorded and the average PL value calculated and then compared against a pre-determined value. This specified range would used to determine the as-cleaned quality and therefore a go-no go process control procedure created, in which satisfactorily cleaned specimens could be passed for the next fabrication stage, and contaminated specimens submitted for further cleaning. This procedure is illustrated graphically in Figure 5.

By setting up the specified range it is possible then to associate this range to any colour or grey-scale pattern and prepare a corresponding image. An example is illustrated in Figure 6. In the example wafer map the dark areas show areas outside the specified range. This simple coding can be used to illustrate the variation in the wafer quality.

After the wafer quality has been investigated using the average PL signal level, further measurements can be recorded with higher resolution on wafers that have failed the specification. This will allow one to determine the type of contaminant or other defect present, also to inspect the spatial variation in more detail, which may give a clearer indication of the source of the contamination (e.g. a particular process step or incomplete cleaning).

To identify the source of contamination on the front surface the back surface ofthe wafer can be recorded as well. By comparison ofthe wafer maps, it will be apparent if the contamination originated on the wafer back surface. Then further action can be taken to prevent cross contamination to other process equipment of metrology tools.

Thus in accordance with the invention the photoluminescence tool is used as a rapid process control tool to determine wafer quality. Wafer maps are obtained and the measured PL response numerically analysed to provide a quality metric, in that a deviation of the photoluminescence response from predetermined parameters known to be associated with a semiconductor structure of satisfactory quality is used as the basis of a quality control decision.

In the basic example given this can simply be a comparison of mean response over the whole area. However in general contamination can be a very localised and the average PL signal (averaged over all measured pixels in the wafer map) may not a reliable indication of such contamination. If wafer map is sub-divided using a 2D grid, then analysed using average PL, very localised signals could be detected.

After a wafer map has been recorded a virtual grid may be applied and displayed on top of the wafer map using suitable software. This can be used to perform the analysis. A local area analysis also allows better location of problem sites in the structure. For example the grid elements that have failed may be indicated, a micro scan can be launched at the same location as the grid element to allows the area of interest to be inspected in more detail, and a report of the failed elements in the wafer map analysis can be exported in suitable format.

The local grid method is not restricted to a numerical analysis based on mean values. Any suitable pre-defined parameters, including average intensity, PL min, Max, Standard deviation and baseline) can be used to determine regions of contamination. The PL signal baseline method can be a more useful parameter to use because the variation in signal across is not uniform wafer. This technique is explained below.

A typical wafer map is shown in figure 7a with an associated histogram of PL intensity in Figure 7b. Contamination is detected in the wafer map by the deviation from the baseline value and limits can be set. However, the PL average value in this wafer map is modified by the contamination. Whereas the value to be used should represent the signal level for an uncontaminated wafer. The peak value shown in Figure 8 represents the true PL value of a non-contaminated wafer. Modifying the baseline function to have a peak value would allow the customer to accurately track the contamination and with more sensitivity.

A suitable algorithm involves the following steps: 1. To define peak value as maximum value in histogram and use this for baseline

2. Search data for peak value.

3. Then calculate ±70% of maximum value (user defined) then re-define the peak maximum as the center position of these points. 4. Then calculate precise value of peak maximum and then define PL level. 5. Also allow user to input typical baseline value form uncontaminated wafer, this will help if there are two peaks of equal intensity.

The baseline of the wafer is the PL value that corresponds to the maximum number of points .

The baseline variation is defined by the following relationship: Baseline variation = PL value - baseline

The PL value is the AVG PL of each element of the grid. The baseline variation must be measured for each element.

Claims

1. A method of quality control of cleaning processes for semiconductors such as silicon during device fabrication comprising the steps of: taking an as-cleaned semiconductor structure following a critical cleaning process step; exposing the surface ofthe semiconductor structure to at least one high- intensity beam of light from a suitable light source, and collecting photoluminescence (PL) produced by excitation of the semiconductor structure by the light beam; making an analysis ofthe collected photoluminescence signal and using that analysis as the basis for a quality classification ofthe cleanliness of the semiconductor.

2. A method in accordance with claim 1 wherein the quality classification step comprises: determining an average photoluminescence intensity emitted across the area ofthe structure or subregions thereof; comparing the average with a predetermined acceptable specification range of photoluminescence; making a quality classification of the cleanliness of the semiconductor structure based thereon.

3. A method in accordance with claim 1 or claim 2 wherein the quality classification step comprises rejecting or selecting for remedial action semiconductor structures exhibiting a photoluminescence response outside a predetermined acceptable specification range.

4. A method in accordance with any preceding claim applied as a quality control metric for wet chemical cleaning of incoming structures of semiconductors such as silicon during device fabrication thereupon, to be incorporated as part of a device fabrication process, comprising the steps of wet chemical cleaning such a structure in conventional manner, subjecting the as-cleaned structure to a test in accordance with claim 3, passing a structure exhibiting a photoluminescence response within the predetermined acceptable specification range of photoluminescence onto the next device fabrication stage, rejecting a structure exhibiting a photoluminescence response outside the predetermined acceptable specification range of photoluminescence from the next device fabrication stage.

5. A method in accordance with claim 4 wherein rejected structures are then passed for further cleaning followed by a retest and repeat of the accept/reject step of claim 4.

A method in accordance with any preceding claim wherein the beam power and/or wavelength and/or spot size of the light beam is so controlled as to collect near-surface PL information from the upper 12 μm ofthe semiconductor structure.

A method in accordance with claim 6 wherein the light beam is so controlled as to collect near-surface PL information from the upper 1 μm ofthe semiconductor structure.

8. A method in accordance with any preceding claim wherein the PL response is obtained at around room temperature.

9. A method in accordance with any preceding claim wherein the light source is a high-intensity laser.

10. A method in accordance with claim 9 wherein the laser has a small probing volume with spot size 0.1 to 20 μm, ideally 2 to 5μm, and with a peak or average power density of between 10⁴ to 10⁹ watts/cm².

11. A method in accordance with claim 9 or 10 wherein a pulsed laser excitation source is used and luminescence data is measured and/or the luminescence images collected as a function of time.

12. A method in accordance with any preceding claim further comprising the step of using the collected PL signals to generate a spatially resolved map of PL signals across the surface of the semiconductor under test, and in particular to generate a spatially resolved image of those signals.

13. A method in accordance with claim 12 further comprising the step of storing the spatially resolved PL map on suitable data storage means and/or transmitting digitised data derived from the spatially resolved map through suitable processing means for onward processing.

14. A method in accordance with claim 12 or 13 further comprising the step of displaying any generated PL image on suitable display means.

15. A method in accordance with one of claims 12 to 14 further comprising the steps of using the spatially resolved map to identify the general location of contamination, and further analysing the semiconductor structure in the identified location using a specific analysis technique such as TXRF to identify the contaminant.

16. A method to identify and/or characterise cleaning contamination in a succession of as-cleaned structures of semiconductors such as silicon comprising performing the method of one of claims 1 to 11 on each of the succession of structures after a given critical cleaning stage, performing the additional steps of one of claims 12 to 15 only on those structures rejected as exhibiting a photoluminescence response outside the said predetermined acceptable specification range to generate spatially resolved data for rejected structures only.

17. A method to assist in diagnosing and rectifying cleaning problems comprising sequentially testing a plurality of structures after a given critical cleaning stage in accordance with the method of any preceding claim, storing and comparing the sequential test results, and using the comparison to identify systematic faults in the cleaning process.

18. An apparatus for quality controlled cleaning of structures of semiconductors such as silicon during device fabrication thereupon comprises a cleaning device to subject the semiconductor structure to wet chemical cleaning, and a test device to detect impurities on the surface of the as-cleaned structure, wherein the test device comprises a high intensity light source; means to focus a high intensity beam of light from the light source onto a surface ofthe semiconductor structure under test; collection means to collect photoluminescence data from across the surface of the semiconductor structure under test produced by excitation ofthe semiconductor structure by the light beam; analysis means to process and numerically analyse the collected data; a comparator to compare the results of the analysis with predetermined acceptable specification parameters, and to accept or reject the structure determined by whether the photoluminescence signal falls within the predetermined acceptable specification.

19. An apparatus in accordance with claim 18 incorporated into a production line and including transfer means adapted to transfer the structure to a particular further processing stage determined by whether the photoluminescence signal falls within the predetermined acceptable specification.

20. An apparatus in accordance with claim 19 wherein the transfer means is adapted to transfer a structure exhibiting a photoluminescence response within the predetermined acceptable specification on to the next device fabrication stage, and to transfer a structure exhibiting a photoluminescence response outside the predetermined acceptable specification range of photoluminescence back to the cleaner for further cleaning.

21. An apparatus in accordance with one of claims 18 to 20 wherein the beam power and/or wavelength and/or spot size of the light beam is so controlled that the apparatus is adapted to generate and collect near- surface PL information from the upper 12 μm of the semiconductor structure.

22. An apparatus in accordance with claim 21 wherein the beam power and/or wavelength and/or spot size of the light beam is so controlled that the apparatus is adapted to generate and collect near-surface PL information from the upper 1 μm ofthe semiconductor structure.

23. An apparatus in accordance with one of claims 18 to 22 wherein the light source is a high-intensity laser.

24. An apparatus in accordance with claim 23 wherein the laser has a small probing volume with spot size 0.1 to 20μm, ideally 2 to 5μm, and with a peak or average power density of between 10⁴ to 10⁹ watts/cm².

25. An apparatus in accordance with one of claims 18 to 24 further comprising means to resolve the collected PL data into a spatially resolved PL map across the area ofthe semiconductor structure.

26. An apparatus in accordance with claim 25 further comprising means to resolve the collected PL data into a spatially resolved PL map across the area of the semiconductor structure, and optionally further comprises means to convert the resolved data into a PL image and/or image/data storage means to store the map/image, and in particular to store successive map/images for future comparison, and/or means to transmit the map/image to a suitable remote data processor and/or image display means such as a visual display screen to display an image and/or related data to a user.