WO2003098804A2

WO2003098804A2 - Overcurrent detection circuit

Info

Publication number: WO2003098804A2
Application number: PCT/IB2003/001551
Authority: WO
Inventors: Marco Berkhout
Original assignee: Koninklijke Philips Electronics N.V.
Priority date: 2002-05-16
Filing date: 2003-04-17
Publication date: 2003-11-27
Also published as: AU2003216675A8; WO2003098804A3; AU2003216675A1

Abstract

An overcurrent detection circuit (10, 11, 12) for a power transistor (Mp) contains a reference transistor (Mrl), the control electrode of which is coupled to the control electrode of the power transistor. The voltages at a first terminal of each transistor are compared to provide an overcurrent detection signal. The current passing through the reference transistor can be reduced by additional reference transistors (Mr2, Mr3) connected in series with the original reference transistor (Mrl).

Description

Overcurrent detection circuit

The present invention relates to an overcurrent detection circuit. More in particular, the present invention relates to an overcurrent detection circuit for a power transistor, the detection circuit comprising a reference transistor connected in parallel to the power transistor and a comparator coupled to the reference transistor.

Detection circuits of this type are disclosed in, for example, European Patent Application EP 0425 035 (Philips).

Overcurrent detection devices are designed to detect and prevent excess current through the power transistor which may lead to damage to or even the destruction of the power transistor. Such excess currents may for example be caused by a short-circuit between a supply voltage and an output of the circuit the power transistor is part of. It is obviously desirable that the current passing through the reference transistor is much smaller than any current passing through the associated power transistor. The ratio (N) of those currents depends on the physical dimensions of the transistors, such as the gate width in FET transistors. To achieve a high value of the ratio N (that is, the power transistor currents are high relative to the reference transistor currents) the width of the reference transistor gate should be 1/N times the width of the power transistor gate. Physical and design constraints, however, impose a lower limit on the physical dimensions of the reference transistor and hence on the ratio N. For large power transistors this implies that the current passing through the reference transistor is undesirably high, especially when a short-circuit occurs.

It is an object of the present invention to solve these and other problems associated with the Prior Art and to provide an overcurrent detection circuit which allows a much smaller reference current to be used. Accordingly, the present invention provides an overcurrent detection circuit for a power transistor, the detection circuit comprising: - a first reference transistor connected in parallel to the power transistor, the control terminal of the first reference transistor being coupled to the control terminal of the power transistor, and - a comparator coupled to a first terminal of the power transistor and a first terminal of the first reference transistor, wherein additional reference transistors are connected in series with the first reference transistor, the control terminal of each additional reference transistor being coupled to the control terminal of the first reference transistor.

By using additional reference transistors, the voltage drop over the reference transistors is increased at the same current, or conversely, the current is reduced at the same voltage drop. For example, one additional reference transistor will cause the reference current to be halved at the same voltage drop. As a consequence the current ratio N effectively has doubled. The current ratio N can be further increased by increasing the number of reference transistors. A total number of four reference transistors is preferred, although other numbers, such as three, five, eight or ten are also possible.

In a first embodiment of the invention, the first terminal is the drain, the source of the power transistor being connected to a negative supply voltage. In a second embodiment, the first terminal is the source, the drain of the power transistor being connected to a positive supply voltage. Both embodiments can advantageously be combined by connecting them in series so as to form an end stage of an amplifier, for example a class D amplifier.

Class D amplifiers are typically used to switch substantial currents at relatively high voltages. As a result, the voltage swing at the input terminals of the comparator may be several tens of volts within a few tens of ns (nanoseconds). However, the comparator has to operate both quickly and accurately to effectively detect overcurrent situations. This puts severe constraints on the design of the comparator. In a preferred embodiment of the present invention this further problem is solved by providing a coupling stage between the power transistor and the comparator for selectively coupling the comparator to the power transistor. Advantageously, the comparator is only coupled to the power transistor when the power transistor is conducting.

The constraints imposed on the design of the comparator can be further relaxed when the coupling stage comprises a voltage divider for dividing the voltage of the first terminal of the power transistor. Preferably, the voltage divider is constituted by a first transistor and a second transistor, the control electrode of the first transistor being connected to the control electrode of the power transistor. The invention further provides a amplifier, in particular a class D amplifier, provided with an overcurrent detection circuit as defined above. The invention additionally provides a method of detecting overcurrents.

The present invention will further be explained below with reference to exemplary embodiments illustrated in the accompanying drawings, in which:

Fig. 1 shows a schematic diagram of an overcurrent detection circuit according to the Prior Art;

Fig. 2 shows a schematic diagram of an overcurrent detection circuit according to the present invention;

Fig. 3 shows a schematic diagram of a first embodiment of an overcurrent detection circuit according to the present invention;

Fig. 4 shows a schematic diagram of a second embodiment of an overcurrent detection circuit according to the present invention; Fig. 5 shows a schematic diagram of a modification of the second embodiment of an overcurrent detection circuit according to the present invention; and

Fig. 6 shows a schematic diagram of an amplifier embodying the present invention.

The Prior Art circuit 9 shown in Fig. 1 comprises a power (FET) transistor M_p and a reference (FET) transistor M_r connected in parallel. The drains of the transistors are each connected to a current source (known per se) supplying a current I_out and Iii_m respectively. The reference current Iπ_m is equal to I_out/N, where N is the current ratio mentioned above. The sources of the transistors are connected to a common (negative) supply voltage V_ssp. The drain voltages V_sense and Nij_m, which are indicative of the currents passing through the transistors, are fed to a comparator (not shown in Fig. 1). A common gate voltage Ngate is supplied to the interconnected gates of the transistors M_p and M_r. An overcurrent will cause N_sen_se to be greater than N_Hm and a corresponding detection signal will be generated by the comparator. As a result, the power transistor will be switched off, for example by applying a suitable gate voltage V_gate.

The circuit 10 of the present invention shown merely by way of non-limiting example in Fig. 2 comprises essentially the same components as the circuit of Fig. 1, with the exception of the number of reference transistors. Instead of a single reference transistor M_r as in Fig. 1, the circuit shown in Fig. 2 comprises four reference transistors labeled M_rι ... M_r4, the gates of which are all connected to the gate of the power transistor. These reference transistors are connected in series, as a result of which their total resistance is the sum of the resistances of the individual reference transistors. As a group, they behave as a single transistor four times smaller (i.e. having a four times smaller gate width) than their actual size. Thus the current Iij_m passing through the reference transistors can be four times smaller than in the Prior Art arrangement of Fig. 1. However, this does not affect the accuracy of the overcurrent measurement and a proper matching is achieved.

It will be understood that the total number of reference transistors is not limited to four but could also be equal to two, six or any other suitable number, and that the reference transistors are preferably biased to operate in their linear operating range. The circuit of Fig. 2 is suitable for use in the "low side" of a power amplifier.

A preferred embodiment of a circuit according to the invention is shown in Fig. 3. This circuit 11, which is particularly suitable for use in the "low side" of a class D amplifier, corresponds largely to the circuit of Fig. 2: a power transistor M_p and a series of four reference transistors M_rι ... M_r4 are each connected to a current source on the one hand and to a common (negative) supply voltage V_ssp on the other hand. In contrast to Fig. 2, however, the reference transistors are not directly coupled to the gate of the power transistor M_p. Instead, a coupling stage comprising a first transistor Mi and a second transistor M₂ is arranged between the power transistor and the reference transistors. The gate of the first transistor Mi is directly connected to the gate of the power transistor, while the gate of the second transistor M₂ is connected to an (auxiliary) supply voltage N _d which is equal to the gate voltage V_gate of the power transistor when the latter is switched on. The first and second transistors Mi and M₂ constitute a voltage divider, the comparator being connected to the branch point of this voltage divider. As a result, the voltage N_s-_nse at the non-inverting input of the comparator is reduced and preferably halved when the first and second transistors have equal resistance values when conducting. This provides a first level of protection against large voltage swings. In addition, the first transistor Mj is switched off when the power transistor M_p is switched off, thus limiting the (positive) voltage at the comparator input. This provides a second level of protection against large voltage swings. In addition, the voltage divider effectively doubles the value of the current ratio Ν, thus further reducing the current (Iij_m) in the reference transistors.

The circuit 12 shown in Fig. 4 is particularly suitable for use in the "high side" in class D amplifiers. This circuit is in essence the "high side" counterpart of the circuit 11 shown in Fig. 3, the reference transistors M_rι ...M_r4 and the power transistor M_p being connected to a (positive) supply voltage N_d . The gate of Mi is again coupled to the gate of the power transistor, while the gate of M₂ is connected to an auxiliary (positive) supply voltage V_boot- In contrast to Fig.3, the gates of the reference transistors are directly coupled to the gate of the power transistor. This modification merely serves to better control the comparator input voltage N_sense during a transition of the output voltage N_out-

The circuit 13 of Fig. 5 shows how the comparator of Fig. 4 may be isolated from large voltage swings by using switching transistors M₃ and M₄ in series with the comparator input terminals. The gates of the switching transistors M₃ and M₄ are coupled to the gate of the power transistor M_p (Fig. 4) so as to receive gate voltage Ngate. This causes the switching transistors M₃ and t to only conduct, and therefore to only pass on the voltages V_sense and Nii_m, when the power transistor M_p is conducting. Any voltage swings occurring when the power transistor M_p is not conducting are therefore not passed on to the comparator. When the power transistor M_p is switched off (low N_gate) the clamping transistors M₅ and M₆ causes the input voltages of the comparator to be close to the supply voltage N_ddP, a first clamping diode Di causing a suitable voltage difference between the input terminals of the comparator (non-inverting input at lowest voltage). A second clamping diode D₂ serves to clamp the comparator input voltage at the non-inverting input terminal to the (positive) supply voltage V dp- It can be seen that the circuit of Fig. 5 provides an additional level of protection, again facilitating the design of the comparator. It will be understood that the circuit of Fig. 5 can also be used independently of the circuits of Figs. 2-4 and that the feature of a switching stage selective coupling the comparator may be implemented without implementing the stacking of reference transistors described above. An amplifier 100 comprising an overcurrent detection circuit of the present invention may further comprise a pulse width modulator 20, a level shifter 30, and a low-pass output filter 40. Such an amplifier is schematically depicted in Fig. 6.

Advantageously, the circuit of the present invention is incorporated in an integrated circuit (IC). As illustrated above, the present invention reduces the current through the reference transistor by stacking several reference transistors and by optionally providing an additional voltage divider. In addition, the comparator may be protected against excess voltage swings by providing selective coupling of the detection voltages. As a result, the current flowing through the overcurrent detection circuit is significantly decreased while less constraints are imposed on the comparator.

It is noted that any terms used in this documents should not be construed so as limit the scope of the present invention. In particular, the words "comρrise(s)" and "comprising" are not meant to exclude any elements not specifically stated. Single (circuit) elements may be substituted with multiple (circuit) elements or with their equivalents. It will therefore be understood by those skilled in the art that the present invention is not limited to the embodiments illustrated above and that many modifications and additions may be made without departing from the scope of the invention as defined in the appending claims.

Claims

CLAIMS:

1. An overcurrent detection circuit for a power transistor, the detection circuit comprising:

- a first reference transistor connected in parallel to the power transistor, the control terminal of the first reference transistor being coupled to the control terminal of the power transistor, and

- a comparator coupled to a first terminal of the power transistor and a first terminal of the first reference transistor, wherein additional reference transistors are connected in series with the first reference transistor, the control terminal of each additional reference transistor being coupled to the control terminal of the first reference transistor.

2. A detection circuit according to claim 1, wherein the total number of reference transistors equals four.

3. A detection circuit according to claim 1 or 2, wherein the first terminal is the drain and wherein the source of the power transistor is connected to a negative supply voltage.

4. A detection circuit according to claim 1 or 2, wherein the first terminal is the source and wherein the drain of the power transistor is connected to a positive supply voltage.

5. A detection circuit according to any of the preceding claims, provided with a coupling stage between the power transistor and the comparator for selectively coupling the comparator to the power transistor.

6. A detection circuit according to claim 5, wherein the coupling stage comprises a voltage divider for dividing the voltage of the first terminal of the power transistor.

7. A detection circuit according to claim 6, wherein the voltage divider is constituted by a first transistor and a second transistor, the control electrode of the first transistor being connected to the control electrode of the power transistor.

8. A detection circuit according to any of the preceding claims, provided with a switching stage for connecting the comparator to the first terminals in dependence upon a control voltage causing the power transistor to conduct.

9. An overcurrent detection circuit for a power transistor, the detection circuit comprising: a first reference transistor connected in parallel to the power transistor, the control terminal of the first reference transistor being coupled to the control terminal of the power transistor, and

- a comparator coupled to a first terminal of the power transistor and a first terminal of the first reference transistor, and

- a switching stage for connecting the comparator to the first terminals in dependence upon a control voltage causing the power transistor to conduct.

10. A power amplifier, comprising an overcurrent detection circuit according to any of the preceding claims.

11. A method of detecting an overcurrent in a power transistor, the method comprising the steps of:

- providing a first reference transistor in parallel to the power transistor and coupling the control terminal of the first reference transistor to the control terminal of the power transistor,

- comparing a first current indication voltage at a first terminal of the power transistor and a second current indication signal at a first terminal of the first reference transistor, and

- generating an overcurrent indication signal if the first current indication signal exceeds the second current indication signal, wherein additional reference transistors are provided in series with the first reference transistor, the control terminal of each additional reference transistor being coupled to the control terminal of the first reference transistor.