WO2003075428A1 - Alimentation ininterrompue et procede de commande de ses convertisseurs - Google Patents

Alimentation ininterrompue et procede de commande de ses convertisseurs Download PDF

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Publication number
WO2003075428A1
WO2003075428A1 PCT/CN2003/000092 CN0300092W WO03075428A1 WO 2003075428 A1 WO2003075428 A1 WO 2003075428A1 CN 0300092 W CN0300092 W CN 0300092W WO 03075428 A1 WO03075428 A1 WO 03075428A1
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WO
WIPO (PCT)
Prior art keywords
factor correction
positive
power factor
negative
driving
Prior art date
Application number
PCT/CN2003/000092
Other languages
English (en)
French (fr)
Inventor
Gege Yang
Original Assignee
Emerson Network Power Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Emerson Network Power Co., Ltd. filed Critical Emerson Network Power Co., Ltd.
Priority to US10/502,917 priority Critical patent/US7130202B2/en
Priority to AU2003248812A priority patent/AU2003248812A1/en
Priority to EP03743279A priority patent/EP1478077A4/en
Publication of WO2003075428A1 publication Critical patent/WO2003075428A1/zh

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H02M1/4216—Arrangements for improving power factor of AC input operating from a three-phase input voltage
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J9/00—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
    • H02J9/04—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source
    • H02J9/06—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P80/00—Climate change mitigation technologies for sector-wide applications
    • Y02P80/10—Efficient use of energy, e.g. using compressed air or pressurized fluid as energy carrier

Definitions

  • the present invention relates to a method for driving an uninterruptible power supply (UPS) and a converter thereof, and more particularly to a method for driving an uninterruptible power supply including a symmetrical parallel converter with a power factor correction circuit (PFC).
  • UPS uninterruptible power supply
  • PFC power factor correction circuit
  • Figure 1 shows an uninterruptible power supply system using average value injection control, including AC input terminals U, V, W, rectifier circuit, battery branch, power factor correction branch, inverter branch, and rectifier circuit inputs.
  • the terminals are connected to the AC input terminals U, V, and W.
  • the input of the inverter branch is connected in parallel to the positive and negative ends of the DC side of the power factor correction branch.
  • the output is a single-phase AC output.
  • the power factor correction branch is located on the battery branch.
  • the inverter branch includes a positive-negative boost converter circuit, a power factor correction drive signal generating circuit, and positive-negative DC bus capacitors Cl, C2;
  • the positive-negative boost converter includes inductors L1, L2, respectively L4, L5, forward diodes D1, D4 and positive and negative boost converter switches Q9-Q12, the inductances of the positive and negative boost converters Ll, L2, L4, L5 and diodes Dl-D4 are connected in series in that order Positive and negative DC bus, positive DC bus capacitor C1 and positive boost converter switch Q9 and Q10 are respectively connected across the positive DC bus and the neutral line, and are located behind and in front of the diode D1 of the positive boost converter.
  • the negative DC bus capacitor C2 and the negative boost converter switch Q1 K Q12 are respectively connected across the negative DC.
  • the bus and neutral lines are located behind and in front of the diode D4 of the negative boost converter; the input terminals of the power factor correction drive signal generation circuit are connected to the positive and negative voltage output sampling signals REC1, REC2, and positive and negative DC bus capacitors after the input voltage is rectified, respectively.
  • the voltage feedback signals VI, V2, the inductor current sample signals of the positive and negative boost converters, and II and 12, the output terminals are respectively connected to the control terminals of the switches Q9 and Q11 of the positive and negative boost converters.
  • the positive and negative boost converters are formed by connecting two symmetrical boost converter circuits in parallel, each including an inductor (L1 or L2, L4 or L5), a forward diode (D1 or D2 or D3 or D4), and Switch tube (Q9 or Q10 or Q11 or Q12); a drive shift circuit is provided after the power factor correction drive signal generation circuit, which adjusts the phase of the drive signal, and the signals at its input and output are sent to the first A positive boost converter switch (Q9), a first negative boost converter switch (Q11), a second positive boost converter switch (Q10), a second negative boost converter switch (Q12) Control side.
  • the purpose of the present invention is to solve the above problems, provide an uninterruptible power supply including a symmetric parallel converter and a driving method of the converter, and improve the parallel current sharing problem of the system.
  • Another object of the present invention is to improve the dynamic response performance of the system.
  • Another object of the present invention is to increase the input voltage range.
  • the present invention provides an uninterruptible power supply including a symmetric parallel converter and a driving method of the converter.
  • An uninterruptible power supply includes an AC input terminal, a rectifier circuit, a battery branch, a power factor correction branch, and an inverter branch, wherein the rectifier circuit One input terminal is connected to the AC input terminal.
  • the battery branch is connected in parallel to the positive and negative ends of the DC output side of the rectifier circuit.
  • the input of the inverter branch is connected to the positive and negative ends of the DC output side of the power factor correction branch.
  • the output end of the inverter branch is a single-phase AC output.
  • the power factor correction branch is located between the battery branch and the inverter branch. It is characterized in that the power factor correction branch includes two parallel positive boost converters.
  • the holding shift circuit is after the power factor correction driving signal generating circuit, and the signals at its input end and output end are respectively connected to the control terminal of the switch tube of the positive boost converter or the switch tube of the negative boost converter.
  • a driving method for an uninterruptible power supply converter which is suitable for an uninterruptible power supply system using two symmetrical parallel positive and negative boost converters in a power factor correction branch, and is characterized by: a driving signal generating circuit of the power factor correction branch Generate two driving signals for the first and second switching tubes in the driving positive and negative power factor correction branches respectively, and a driving pulse width maintaining shift circuit after the power factor correction driving signal generating circuit.
  • the driving signal is maintained and shifted in pulse width, and is used to drive the third and fourth switching tubes in parallel with the first and second switching tubes in the positive and negative power factor correction branches, respectively.
  • the positive-boost converter circuits in parallel with each other in the power factor correction branch include an inductor, one of which is inductive with the power factor.
  • the current input terminal of the factor correction driving signal generating circuit Are connected, and the negative boost converter circuits in the positive and negative power factor correction branches each include an inductor, and one of the inductors is connected to a current input terminal of the power factor correction driving signal generating circuit.
  • a DC power supply and a pair of switching switches are further included, the switching switch is located between the power factor correction driving signal generating circuit and the output terminal of the positive and negative voltages after the input voltage is rectified, and is respectively connected with the power Factor correction drive signal generates electricity
  • the voltage input terminal of the circuit is connected to the output terminal of the positive and negative voltage after rectification and the DC current output terminal.
  • the present invention adopts the above scheme and adds a pulse width maintaining circuit, the switching tube currents of two boost converters connected in parallel can be kept substantially the same, and system reliability is improved.
  • the positive and negative boost converter inductor current sampling signals in the power factor correction branch are respectively taken from one of the inductors in the positive boost converter circuit and one of the inductors in the negative boost converter circuit. Instead of sampling the total current of two parallel inductors, this makes the current loop work in a single boost converter state, which increases the bandwidth of the control system and significantly improves the output voltage transient response. If the DC power supply and the switch are set again, the input voltage range can be increased.
  • Figure 1 is a schematic diagram of a prior art circuit.
  • Fig. 2 is a schematic circuit diagram of an embodiment of the present invention.
  • FIG. 3 is a block diagram of a pulse width holding shift circuit according to an embodiment of the present invention.
  • FIG. 4 is a circuit diagram of a pulse width holding shift circuit according to an embodiment of the present invention. detailed description
  • FIG. 2 is an embodiment of the present invention, and its basic principle is similar to that of FIG. 1, by detecting an inductor current signal, and feeding forward the voltage waveform after the rectifier bridge (that is, the positive and negative voltage output sampling signals (REC1, REC2) after voltage rectification, In order to achieve a high-quality input current waveform and reduce the input harmonic current.
  • Its circuit structure is similar to the traditional average value control technology and can be called the average value current injection control method. This method can be a single-phase average value current.
  • the input control may also be a three-phase average current injection control of a three-phase four-wire system for the rectifier circuit and the AC input terminal.
  • the present invention takes the case where the AC input terminal is three-phase.
  • a power factor correction driving signal generation circuit taking the form of an average value control circuit as an example (other control circuits can also be used)
  • two driving signals (DRV1, DRV2) are generated, which are respectively used to drive positive and negative boost conversion Device.
  • the uninterruptible power supply of the present invention uses two symmetrical boost circuits in parallel on the basis of FIG. 1, and the control circuit includes a pulse width maintaining and shifting circuit for driving signals, and the two driving signals (DRV1 , DRV2) to maintain and shift the pulse width, that is, adjust the phases of the two driving signals (DRV1, DRV2) and maintain their pulse widths. Therefore, not only the switching frequency multiplication is cleverly achieved, the ripple current of the DC bus capacitor is significantly reduced, but also the switching tube currents of the two boost converters connected in parallel can be kept substantially the same, thereby improving system reliability.
  • a driving pulse width maintaining shift circuit is provided after the power factor correction driving signal generating circuit, and the circuit is shown in Figs. 3 and 4, which maintains the pulse width of the driving signal and Its phase is adjusted, and the signals at its input and output are sent to the first positive boost converter switch (Q9), the first negative boost converter switch (Q11) and the second positive boost converter switch. (Q10), the control terminal of the second negative boost converter switch tube (Q12).
  • 3854 refers to UC3854, which is an average control chip in the average control circuit.
  • 4557 refers to MC14557, which is a shift register for the pulse width holding shift circuit of the drive signal, and 4013 refers to CD4013, which is a D flip-flop.
  • Another invention of the present invention is that the feedforward voltage form of the average value control circuit is not directly connected to the three-phase mains rectified waveform, that is, the positive and negative voltage output sampling signals (REC1, REC2) after the input voltage is rectified. The phase-to-phase power is switched between rectified waveform and DC.
  • the switches (S1 and S2) are switched to the feedforward DC voltage.
  • the input current is a rectangular wave current.
  • the harmonic current is relatively large, But this method can greatly increase the input voltage range.
  • Another invention of the present invention and the prior art is that the inductor current sampling signals (11, 12) of the positive and negative boost converters no longer take the entire inductor current, but instead take one of the inductor currents (L1 and L2 take one of them). First, take one of L3 and L4). This can reduce the current loop amplification factor, thereby increasing the current loop bandwidth and improving the transient response time of the system.
  • the switching tubes (Q13, Q14) and the inductor (L3) constitute an inverter, which completes the (DC / AC) conversion to generate a regulated AC output voltage (V3).
  • the driving signal (DRV5) is used for Drive the inverter switch (Q13)
  • the drive signal (DRV6) is used to drive the inverter switch (Q14)
  • V3 is the inverter output voltage feedback
  • 13 is the inverter inductor current sampling.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Rectifiers (AREA)
  • Dc-Dc Converters (AREA)

Description

不间断电源及其变换器的驱动方法 技术领域
本发明涉及一种不间断电源 (UPS)及其变换器的驱动方法， 尤其 是带有功率因数校正电路 (PFC)的含有对称并联变换器的不间断电源 及其变换器的驱动方法。 背景技术
近几年， 三相四线制高频链 UPS已有一些控制方案相继提出， 它们是峰值电流控制、平均值电流控制等。采用这些改进的控制策略 后， 能大大减小 5次， 7次等谐波含量， 尽管这些控制策略都能有效 地实现输入功率因数的提高， 但各有缺点。 其中峰值电流控制方案， 它的三相输入电流波形不同， 总谐波电流较大； 平均值电流控制应用 较为广泛， 相对与平均值控制总谐波电流小， 但是其缺点是输入电压 范围受限、 在大功率应用场合开关频率不能超过 20KHz。
图 1 所示是一种采用平均值注入控制的不间断电源系统， 包括 交流输入端 U、 V、 W、 整流电路、 电池支路、 功率因数校正支路、 逆变支路、 整流电路的输入端与交流输入端 U、 V、 W相连， 逆变支 路的输入端并联于功率因数校正支路直流侧正负两端，输出端为单相 交流输出； 功率因数校正支路位于电池支路和逆变支路之间， 它包括 正负升压变换器电路、功率因数校正驱动信号产生电路以及正负直流 母线电容 Cl、 C2; 所述正负升压变换器分别包括电感 Ll、 L2、 L4、 L5、 正向二极管 Dl、 D4和正负升压变换器开关管 Q9--Q12, 所述正 负升压变换器的电感 Ll， L2， L4， L5和二极管 Dl- D4分别依次串 联于正负直流母线上， 正直流母线电容 C1 和正升压变换器开关管 Q9、 Q10 分别跨接于正直流母线和中线上， 位于正升压变换器的二 极管 D1的后面和前面， 负直流母线电容 C2和负升压变换器开关管 Q1 K Q12分别跨接于负直流母线和中线上， 位于负升压变换器的二 极管 D4的后面和前面； 功率因数校正驱动信号产生电路的输入端分 别接输入电压整流后正负电压输出采样信号 REC1、 REC2、 正负直流 母线电容电压反馈信号 VI、 V2、 正负升压变换器电感电流釆样信号 、 II、 12，其输出端分别接正负升压变换器的开关管 Q9， Q11的控制端。
所述正负升压变换器均由两个对称的升压变换器电路并联而成，每路 均包括电感 (L1或 L2 L4或 L5)、 正向二极管 (D1或 D2或 D3或 D4)和开关管 (Q9或 Q10或 Q11或 Q12);在功率因数校正驱动信号产 生电路之后还设有驱动移位电路， 该电路将驱动信号的相位进行调 整， 其输入端和输出端的信号分别送到第一正升压变换器开关管 (Q9), 第一负升压变换器开关管 (Q11)和第二正升压变换器开关管 (Q10)、 第二负升压变换器开关管 (Q12)的控制端。
但是， 由于只有移位没有保持， 这样就会导致并联的两个升压 变换器不均流， 系统可靠性低。 发明内容
本发明的目的就是为了解决以上问题， 提供含有对称并联变换 器的不间断电源及其变换器的驱动方法， 改善系统并联均流问题。
本发明的另一目的是提高系统的动态响应性能。
本发明的又一目的是提高输入电压范围。
为实现上述目的， 本发明提出含有对称并联变换器的不间断电 源及其变换器的驱动方法。
一种不间断电源， 包括一个交流输入端， 一个整流电路、 一个 电池支路、 一个功率因数校正支路、和一个逆变支路， 其中整流电路 的一输入端与交流输入端相连，电池支路并联于整流电路的直流输出 侧的正负两端，逆变支路的输入端并联于功率因数校正支路的直流输 出侧的正负两端， 逆变支路的输出端为单相交流输出， 功率因数校正 支路位于电池支路和逆变支路之间， 其特征在于， 功率因数校正支路 包括两个并联的正升压变换器， 两个并联的负升压变换器，一个功率 因数校正驱动信号产生电路， 和一个驱动脉宽保持移位电路， 其中， 所述正、负升压变换器各自包括一个开关管， 驱动脉宽保持移位电路 在功率因数校正驱动信号产生电路之后，并且其输入端和输出端的信 号分别与正升压变换器的开关管或负升压变换器的开关管的控制端 相连接。
一种不间断电源变换器的驱动方法， 适用于功率因数校正支路 采用两个对称并联正负升压变换器的不间断电源系统， 其特征在于： 功率因数校正支路的一个驱动信号产生电路产生两路驱动信号，分别 用于该驱动正负功率因数校正支路中的第一和第二开关管，功率因数 校正驱动信号产生电路之后的一个驱动脉宽保持移位电路，对这两路 驱动信号进行脉宽保持和移位，并且分别用于驱动正负功率因数校正 支路中与第一和第二开关管并联的第三和第四开关管。 在本发明的不间断电源中， 功率因数校正支路中的相互并联的 正升压变换器电路分别包括一个电感，其中的一个电感与所述功率因 . 数校正驱动信号产生电路的电流输入端相连接，并且所述正负功率因 数校正支路中的负升压变换器电路分别包括一个电感，其中的一个电 感与所述功率因数校正驱动信号产生电路的电流输入端相连接。
在本发明中， 还进一步包括一个直流电源和一对切换幵关， 所 述切换开关位于功率因数校正驱动信号产生电路和输入电压整流后 正负电压的输出端之间，并分别与所述功率因数校正驱动信号产生电 路的电压输入端， 整流后正负电压的输出端和直流电流输出端相连 接。
由于本发明采用了以上的方案， 增加了脉宽保持电路， 就可以 使并联的两个升压变换器的开关管电流保持基本一致，提高系统可靠 性。
同时， 所述功率因数校正支路中的正负升压变换器电感电流采 样信号分别取自相互并联的正升压变换器电路中电感中的一个和负 升压变换器电路中电感中的一个， 而不是采样两个并联电感的总电 流，这样使得电流环工作在单一升压变换器状态，提高控制系统带宽， 可明显提高输出电压瞬态响应。 而如果再设置直流电源和切换开关， 则能提高输入电压的范围。 附图说明
图 1是现有技术电路示意图。
图 2是本发明实施方案电路示意图。
图 3是根据本发明实施方案的脉宽保持移位电路方框示意图。 图 4是根据本发明实施方案的脉宽保持移位电路的电路示意图。 具体实施方式
下面通过具体的实施方案并结合附图对本发明作进一步详细的 描述。
图 2是本发明的一个实施方案， 其基本原理与图 1相似， 是通过 检测电感电流信号， 并且前馈整流桥后电压波形 (即电压整流后正负 电压输出采样信号 (REC1、 REC2), 以实现高质量的输入电流波形， 降低输入谐波电流。其电路结构与传统的平均值控制技术相类似， 可 称为平均值值电流注入控制方法。该方法可以是单相平均值值电流注 入控制，也可以是整流电路和交流输入端为三相四线制的三相平均值 值电流注入控制， 本发明以交流输入端为三相时为例。 图 2所示， 正 负升压变换器电感电流采样信号 (11、 12)、 输入电压整流后正负电压 输出采样信号 ( EC1、 REC2)、 正负直流母线电容电压反馈信号 (Vl、 V2)， 通过功率因数校正驱动信号产生电路， 以平均值控制电路的形 式为例（也可以采用其他形式的控制电路），产生两路驱动信号 (DRV1、 DRV2), 分别用于驱动正负升压变换器。
如图 2所示， 本发明的不间断电源， 在图 1 的基础上采用两个 对称的 boost电路并联， 控制电路包括驱动信号的脉宽保持和移位电 路， 对上述两路驱动信号 (DRV1、 DRV2)进行脉宽保持和移位， 艮卩， 对这两路驱动信号 (DRV1、 DRV2)的相位进行调整， 并且保持其脉宽。 因此， 不但巧妙的实现了开关频率倍频， 显著的降低了直流母线电容 的纹波电流，而且可以使并联的两个升压变换器的开关管电流保持基 本一致， 提高系统可靠性。 它是将两路驱动信号 (DRV1， DRV2)送入 驱动脉宽保持移位电路，产生另外两路脉宽相同但是相位可调整的驱 动信号 (DRV3， DRV4), 此两路信号分别用于驱动分别与上述正负升 压变换器对称并联的另两路升压变换器。 它是用如下具体电路实现 的：在功率因数校正驱动信号产生电路之后还设有驱动脉宽保持移位 电路， 该电路如图 3、 4所示， 它将驱动信号的脉宽进行保持并将其 相位进行调整，其输入端和输出端的信号分别送到第一正升压变换器 开关管 (Q9)、 第一负升压变换器开关管 (Q11)和第二正升压变换器开 关管 (Q10)、 第二负升压变换器开关管 (Q12)的控制端。
现参照图 4， 3854是指 UC3854, 它是平均值控制电路中的一个 平均值控制芯片。 4557是指 MC14557, 是驱动信号的脉宽保持移位 电路的一个移位寄存器， 而 4013是指 CD4013, 它是 D触发器。 本发明的另一个发明点是， 其中平均值控制电路前馈电压形式 不是直接接三相市电整流后波形，即输入电压整流后正负电压输出采 样信号 (REC1、 REC2), 而是在三相市电整流后波形和直流之间切换， 它是通过如图 2中所示的下述电路实现的：增设直流电源 (DC)和切换 开关 (Sl， S2)， 所述切换开关 (SI， S2)分别有一端可在输入电压整流 后正电压输出采样信号 (REC1， REC2)和直流电源 (DC)之间切换， 另 一端为共同端， 它与功率因数校正驱动信号产生电路的输入端相连。 其优点是： 当三相市电均正常时， 控制电路前馈市电整流电压， 使得 输入电流波形跟随整流电压波形， 此时可使输入谐波电流最小； 当输 入电压过低或者缺相 (缺一相或缺二相)时平均值控制电路开始工作不 稳定， 此时将开关 (S1和 S2)切换到前馈直流电压，此时输入电流为矩 形波电流， 虽然谐波电流比较大， 但是此种方法却可以大大提高输入 电压范围。本发明与现有技术的另一个发明点是， 正负升压变换器的 电感电流采样信号 (11、 12)不再取全部电感电流， 而是取自其中一个 电感电流 (L1与 L2取其一， L3与 L4取其一)。 这样可减少电流环放 大倍数， 从而电流环带宽增加， 可提高系统的瞬态响应时间。
图 2中，开关管 (Q13、 Q14)和电感 (L3)构成逆变器，完成 (DC/AC) 的变换， 产生稳压稳频的交流输出电压 (V3)， 驱动信号 (DRV5)用于 驱动逆变器开关管 (Q13)， 驱动信号 (DRV6)用于驱动逆变器开关管 (Q14), V3是逆变输出电压反馈， 13是逆变器电感电流采样。
虽然以上通过具体实施方案对本发明进行了说明，但本领域普通 技术人员在不偏离本发明的范围和实质精神下，仍可对本发明进行种 种修改或改动。

Claims

权利要求
1、 一种不间断电源， 包括一个交流输入端， 一个整流电路、 一个 电池支路、 一个功率因数校正支路、 和一个逆变支路， 其中所说整流 电路的一输入端与所说交流输入端相连，所说电池支路并联于所说整 流电路的直流输出侧的正负两端，所说逆变支路的输入端并联于所说 功率因数校正支路的直流输出侧的正负两端，所说逆变支路的输出端 为单相交流输出，所说功率因数校正支路位于所说电池支路和所说逆 变支路之间， 其特征在于， 所说功率因数校正支路包括两个并联的正 升压变换器， 两个并联的负升压变换器， 一个功率因数校正驱动信号 产生电路， 和一个驱动脉宽保持移位电路， 其中， 所述正、 负升压变 换器各自包括一个开关管，所述驱动脉宽保持移位电路在所述功率因 数校正驱动信号产生电路之后，并且其输入端和输出端的信号分别与 所述正升压变换器的开关管或负升压变换器的开关管的控制端相连 接。
2、 如权利要求 1所述的不间断电源， 其特征在于， 所述功率因数 校正支路中的相互并联的正升压变换器电路分别包括一个电感，其中 的一个电感与所述功率因数校正驱动信号产生电路的电流输入端相 连接，并且所述功率因数校正支路中的负升压变换器电路分别包括一 个电感，其中的一个电感与所述功率因数校正驱动信号产生电路的电 流输入端相连接。
3、 如权利要求 1或 2所述的不间断电源，还进一步包括一个直流 电源和一对切换开关，所述切换幵关位于功率因数校正驱动信号产生 电路和输入电压整流后正负电压的输出端之间，并分别与所述功率因 数校正驱动信号产生电路的电压输入端，整流后正负电压的输出端和 直流电流输出端相连接。
4、 如权利要求 3所述的不间断电源， 其特征在于， 所述功率因数 校正驱动信号产生电路的电压输入端， 在输入电压正常时， 通过所述 切换开关， 与整流后正负电压的输出端相连接， 而在输入电压过低或 缺相时， 通过所述切换开关， 切换到与所述直流电源相连接。
5、 一种不间断电源变换器的驱动方法，适用于功率因数校正支路 采用两个对称并联正负升压变换器的不间断电源系统， 其特征在于： 所说功率因数校正支路的一个驱动信号产生电路产生两路驱动信号， 分别用于该驱动正负功率因数校正支路中的第一和第二开关管，所说 功率因数校正驱动信号产生电路之后的一个驱动脉宽保持移位电路， 对这两路驱动信号进行脉宽保持和移位，并且分别用于所说驱动正负 功率因数校正支路中与所述第一和第二开关管并联的第三和第四开 关管。
6、 如权利要求 5的不间断电源变换器的驱动方法， 其特征在于， 所述正负功率因数校正支路中的正负升压变换器的电感电流采样信 号分别取自相互并联的所说正升压变换器电路中的两个电感中的一 个， 和所说负升压变换器电路中的两个电感中的一个。
7、 如权利要求 5或 6的不间断电源变换器的驱动方法，其特征在 于：所说功率因数校正驱动信号产生电路的电压输入信号可在输入电 压整流后正负电压输出采样信号和直流电源之间切换。
8、 如权利要求 7的不间断电流变换器的驱支方法， 其特征在于： 当输入电压正常时，所说功率因数校正驱动信号产生电路的电压输入 信号分别取自输入电压整流后正负电压输出采样信号；而当输入电压 过低或缺相时，所说功率因数校正驱动信号产生电路的电压输入端切 换到所述直流电源。
PCT/CN2003/000092 2002-01-28 2003-01-28 Alimentation ininterrompue et procede de commande de ses convertisseurs WO2003075428A1 (fr)

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