WO2003046965A1 - Substrats specialises destines a etre utilises dans des processus de solidification laterale sequentielle - Google Patents

Substrats specialises destines a etre utilises dans des processus de solidification laterale sequentielle Download PDF

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Publication number
WO2003046965A1
WO2003046965A1 PCT/US2001/044563 US0144563W WO03046965A1 WO 2003046965 A1 WO2003046965 A1 WO 2003046965A1 US 0144563 W US0144563 W US 0144563W WO 03046965 A1 WO03046965 A1 WO 03046965A1
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WO
WIPO (PCT)
Prior art keywords
layer
conductivity
substrate
silicon compound
melting
Prior art date
Application number
PCT/US2001/044563
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English (en)
Inventor
James S. Im
Original Assignee
The Trustees Of Columbia University In The City Of New York
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by The Trustees Of Columbia University In The City Of New York filed Critical The Trustees Of Columbia University In The City Of New York
Priority to AU2002219913A priority Critical patent/AU2002219913A1/en
Priority to PCT/US2001/044563 priority patent/WO2003046965A1/fr
Publication of WO2003046965A1 publication Critical patent/WO2003046965A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02422—Non-crystalline insulating materials, e.g. glass, polymers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02488—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02491—Conductive materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

Substrats possédant une conductivité thermique effective modifiée, destinés à être utilisés dans le processus de solidification latérale séquentielle. Dans un mode de réalisation, un substrat comporte une couche de base en verre, une couche à faible conductivité formée adjacente à une surface de la couche de base, une couche à conductivité élevée formée adjacente à la couche à faible conductivité, une couche de composé de silicium formée adjacente à la couche à conductivité élevée et une couche de silicium formée sur la couche de composé de silicium. Dans un autre mode de réalisation, ledit substrat comporte une couche de fusion interne, située sous la surface, destinée à servir de réservoir de chaleur pendant le processus de solidification latérale séquentielle subséquent.
PCT/US2001/044563 2001-11-28 2001-11-28 Substrats specialises destines a etre utilises dans des processus de solidification laterale sequentielle WO2003046965A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
AU2002219913A AU2002219913A1 (en) 2001-11-28 2001-11-28 Specialized substrates for use in sequential lateral solidification processing
PCT/US2001/044563 WO2003046965A1 (fr) 2001-11-28 2001-11-28 Substrats specialises destines a etre utilises dans des processus de solidification laterale sequentielle

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2001/044563 WO2003046965A1 (fr) 2001-11-28 2001-11-28 Substrats specialises destines a etre utilises dans des processus de solidification laterale sequentielle

Publications (1)

Publication Number Publication Date
WO2003046965A1 true WO2003046965A1 (fr) 2003-06-05

Family

ID=21743030

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2001/044563 WO2003046965A1 (fr) 2001-11-28 2001-11-28 Substrats specialises destines a etre utilises dans des processus de solidification laterale sequentielle

Country Status (2)

Country Link
AU (1) AU2002219913A1 (fr)
WO (1) WO2003046965A1 (fr)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1301535C (zh) * 2003-07-25 2007-02-21 友达光电股份有限公司 于基板上形成多晶硅层的方法
US8859436B2 (en) 1996-05-28 2014-10-14 The Trustees Of Columbia University In The City Of New York Uniform large-grained and grain boundary location manipulated polycrystalline thin film semiconductors formed using sequential lateral solidification and devices formed thereon
US8871022B2 (en) 2007-11-21 2014-10-28 The Trustees Of Columbia University In The City Of New York Systems and methods for preparation of epitaxially textured thick films
US8883656B2 (en) 2002-08-19 2014-11-11 The Trustees Of Columbia University In The City Of New York Single-shot semiconductor processing system and method having various irradiation patterns
US8889569B2 (en) 2009-11-24 2014-11-18 The Trustees Of Columbia University In The City Of New York Systems and methods for non-periodic pulse sequential lateral soldification
US9012309B2 (en) 2007-09-21 2015-04-21 The Trustees Of Columbia University In The City Of New York Collections of laterally crystallized semiconductor islands for use in thin film transistors
US9087696B2 (en) 2009-11-03 2015-07-21 The Trustees Of Columbia University In The City Of New York Systems and methods for non-periodic pulse partial melt film processing
US9466402B2 (en) 2003-09-16 2016-10-11 The Trustees Of Columbia University In The City Of New York Processes and systems for laser crystallization processing of film regions on a substrate utilizing a line-type beam, and structures of such film regions
US9646831B2 (en) 2009-11-03 2017-05-09 The Trustees Of Columbia University In The City Of New York Advanced excimer laser annealing for thin films

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4639277A (en) * 1984-07-02 1987-01-27 Eastman Kodak Company Semiconductor material on a substrate, said substrate comprising, in order, a layer of organic polymer, a layer of metal or metal alloy and a layer of dielectric material
JPS62181419A (ja) * 1986-02-05 1987-08-08 Nec Corp 多結晶シリコンの再結晶化法
JPH0350720A (ja) * 1989-07-18 1991-03-05 Seiko Epson Corp 多結晶シリコン再結晶化法
JPH0433327A (ja) * 1990-05-30 1992-02-04 Kyocera Corp 半導体結晶化膜の形成方法
US6130455A (en) * 1996-03-21 2000-10-10 Sharp Kabushiki Kaisha Semiconductor device, thin film transistor having an active crystal layer formed by a line containing a catalyst element
WO2001039258A1 (fr) * 1999-11-22 2001-05-31 Sony Corporation Dispositif fonctionnel et procede de fabrication de ce dispositif
US20010039103A1 (en) * 2000-04-10 2001-11-08 Shinichi Muramatsu Process for producing crystalline silicon thin film

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4639277A (en) * 1984-07-02 1987-01-27 Eastman Kodak Company Semiconductor material on a substrate, said substrate comprising, in order, a layer of organic polymer, a layer of metal or metal alloy and a layer of dielectric material
JPS62181419A (ja) * 1986-02-05 1987-08-08 Nec Corp 多結晶シリコンの再結晶化法
JPH0350720A (ja) * 1989-07-18 1991-03-05 Seiko Epson Corp 多結晶シリコン再結晶化法
JPH0433327A (ja) * 1990-05-30 1992-02-04 Kyocera Corp 半導体結晶化膜の形成方法
US6130455A (en) * 1996-03-21 2000-10-10 Sharp Kabushiki Kaisha Semiconductor device, thin film transistor having an active crystal layer formed by a line containing a catalyst element
WO2001039258A1 (fr) * 1999-11-22 2001-05-31 Sony Corporation Dispositif fonctionnel et procede de fabrication de ce dispositif
US20010039103A1 (en) * 2000-04-10 2001-11-08 Shinichi Muramatsu Process for producing crystalline silicon thin film

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 012, no. 024 (E - 576) 23 January 1988 (1988-01-23) *
PATENT ABSTRACTS OF JAPAN vol. 015, no. 191 (E - 1068) 16 May 1991 (1991-05-16) *
PATENT ABSTRACTS OF JAPAN vol. 016, no. 204 (E - 1202) 15 May 1992 (1992-05-15) *

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8859436B2 (en) 1996-05-28 2014-10-14 The Trustees Of Columbia University In The City Of New York Uniform large-grained and grain boundary location manipulated polycrystalline thin film semiconductors formed using sequential lateral solidification and devices formed thereon
US8883656B2 (en) 2002-08-19 2014-11-11 The Trustees Of Columbia University In The City Of New York Single-shot semiconductor processing system and method having various irradiation patterns
CN1301535C (zh) * 2003-07-25 2007-02-21 友达光电股份有限公司 于基板上形成多晶硅层的方法
US9466402B2 (en) 2003-09-16 2016-10-11 The Trustees Of Columbia University In The City Of New York Processes and systems for laser crystallization processing of film regions on a substrate utilizing a line-type beam, and structures of such film regions
US9012309B2 (en) 2007-09-21 2015-04-21 The Trustees Of Columbia University In The City Of New York Collections of laterally crystallized semiconductor islands for use in thin film transistors
US8871022B2 (en) 2007-11-21 2014-10-28 The Trustees Of Columbia University In The City Of New York Systems and methods for preparation of epitaxially textured thick films
US9087696B2 (en) 2009-11-03 2015-07-21 The Trustees Of Columbia University In The City Of New York Systems and methods for non-periodic pulse partial melt film processing
US9646831B2 (en) 2009-11-03 2017-05-09 The Trustees Of Columbia University In The City Of New York Advanced excimer laser annealing for thin films
US8889569B2 (en) 2009-11-24 2014-11-18 The Trustees Of Columbia University In The City Of New York Systems and methods for non-periodic pulse sequential lateral soldification

Also Published As

Publication number Publication date
AU2002219913A1 (en) 2003-06-10

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