WO2003040902A1 - Circuit integre a semi-conducteur, systeme et procede d'emission de signaux - Google Patents

Circuit integre a semi-conducteur, systeme et procede d'emission de signaux Download PDF

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Publication number
WO2003040902A1
WO2003040902A1 PCT/JP2001/009731 JP0109731W WO03040902A1 WO 2003040902 A1 WO2003040902 A1 WO 2003040902A1 JP 0109731 W JP0109731 W JP 0109731W WO 03040902 A1 WO03040902 A1 WO 03040902A1
Authority
WO
WIPO (PCT)
Prior art keywords
circuit
integrated circuit
signal transmission
semiconductor integrated
transmission method
Prior art date
Application number
PCT/JP2001/009731
Other languages
English (en)
Japanese (ja)
Inventor
Takashi Sato
Peter Lee
Goichi Yokomizo
Toshio Shinmi
Shigenori Otake
Original Assignee
Renesas Technology Corp.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Technology Corp. filed Critical Renesas Technology Corp.
Priority to PCT/JP2001/009731 priority Critical patent/WO2003040902A1/fr
Priority to JP2003542465A priority patent/JPWO2003040902A1/ja
Priority to TW091104185A priority patent/TW589792B/zh
Publication of WO2003040902A1 publication Critical patent/WO2003040902A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0995—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
    • H03L7/0998—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator using phase interpolation

Abstract

L'invention concerne un circuit à constante de temps ménagé au niveau de la borne d'entrée d'un second circuit, qui peut être réglé de sorte que la période (bruit T) d'un bruit devant survenir sur la ligne d'alimentation électrique d'un premier circuit puisse correspondre soit à des périodes (Te1 à Te8) de signaux d'horloge, soit à leurs multiples entiers, lorsqu'un signal de plusieurs bits devant être transmis en synchronisation avec le signal d'horloge est émis du circuit de sortie du premier circuit et capté par la borne d'entrée du second circuit.
PCT/JP2001/009731 2001-11-07 2001-11-07 Circuit integre a semi-conducteur, systeme et procede d'emission de signaux WO2003040902A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
PCT/JP2001/009731 WO2003040902A1 (fr) 2001-11-07 2001-11-07 Circuit integre a semi-conducteur, systeme et procede d'emission de signaux
JP2003542465A JPWO2003040902A1 (ja) 2001-11-07 2001-11-07 半導体集積回路装置とシステム及び信号伝送方法
TW091104185A TW589792B (en) 2001-11-07 2002-03-06 Semiconductor integrated circuit device and system, and signal transmission method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2001/009731 WO2003040902A1 (fr) 2001-11-07 2001-11-07 Circuit integre a semi-conducteur, systeme et procede d'emission de signaux

Publications (1)

Publication Number Publication Date
WO2003040902A1 true WO2003040902A1 (fr) 2003-05-15

Family

ID=11737915

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2001/009731 WO2003040902A1 (fr) 2001-11-07 2001-11-07 Circuit integre a semi-conducteur, systeme et procede d'emission de signaux

Country Status (3)

Country Link
JP (1) JPWO2003040902A1 (fr)
TW (1) TW589792B (fr)
WO (1) WO2003040902A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE202005021861U1 (de) 2004-02-27 2010-09-23 Neuhofer Jun., Franz Vorrichtung zum Überbrücken eines Höhenunterschiedes zwischen zwei Fußbodenflächen

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8014476B2 (en) 2005-11-07 2011-09-06 Qualcomm, Incorporated Wireless device with a non-compensated crystal oscillator

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0443711A (ja) * 1990-06-08 1992-02-13 Nec Corp 入力バッファ回路
JPH10126453A (ja) * 1996-10-15 1998-05-15 Hitachi Ltd インターフェース回路

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0443711A (ja) * 1990-06-08 1992-02-13 Nec Corp 入力バッファ回路
JPH10126453A (ja) * 1996-10-15 1998-05-15 Hitachi Ltd インターフェース回路

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE202005021861U1 (de) 2004-02-27 2010-09-23 Neuhofer Jun., Franz Vorrichtung zum Überbrücken eines Höhenunterschiedes zwischen zwei Fußbodenflächen

Also Published As

Publication number Publication date
JPWO2003040902A1 (ja) 2005-06-09
TW589792B (en) 2004-06-01

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