WO2003038644A3 - Rekonfigurierbare digitale logikeinheit - Google Patents
Rekonfigurierbare digitale logikeinheit Download PDFInfo
- Publication number
- WO2003038644A3 WO2003038644A3 PCT/DE2002/004019 DE0204019W WO03038644A3 WO 2003038644 A3 WO2003038644 A3 WO 2003038644A3 DE 0204019 W DE0204019 W DE 0204019W WO 03038644 A3 WO03038644 A3 WO 03038644A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- logic unit
- reconfigured
- digital logic
- logic
- microprograms
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Logic Circuits (AREA)
Abstract
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003540837A JP3857691B2 (ja) | 2001-10-29 | 2002-10-25 | 再構成可能なディジタル論理ユニット |
US10/494,052 US7225321B2 (en) | 2001-10-29 | 2002-10-25 | Reprogrammable microprogram based reconfigurable multi-cell logic concurrently processing configuration and data signals |
EP02776857A EP1506496A2 (de) | 2001-10-29 | 2002-10-25 | Rekonfigurierbare digitale logikeinheit |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10153349.7 | 2001-10-29 | ||
DE10153349 | 2001-10-29 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2003038644A2 WO2003038644A2 (de) | 2003-05-08 |
WO2003038644A3 true WO2003038644A3 (de) | 2004-12-23 |
Family
ID=7704099
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE2002/004019 WO2003038644A2 (de) | 2001-10-29 | 2002-10-25 | Rekonfigurierbare digitale logikeinheit |
Country Status (5)
Country | Link |
---|---|
US (1) | US7225321B2 (de) |
EP (1) | EP1506496A2 (de) |
JP (1) | JP3857691B2 (de) |
DE (1) | DE10249204A1 (de) |
WO (1) | WO2003038644A2 (de) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102004045527B4 (de) * | 2003-10-08 | 2009-12-03 | Siemens Ag | Konfigurierbare Logikschaltungsanordnung |
US7745685B2 (en) * | 2005-10-31 | 2010-06-29 | Kimberly-Clark Worldwide, Inc. | Absorbent articles with improved odor control |
US7847586B2 (en) * | 2007-08-20 | 2010-12-07 | Northern Lights Semiconductor Corp. | Integrate circuit chip with magnetic devices |
CN101578768A (zh) * | 2007-11-12 | 2009-11-11 | 松下电器产业株式会社 | 可重构电路、复位方法及结构信息生成装置 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0497029A2 (de) * | 1991-01-29 | 1992-08-05 | Analogic Corporation | Rekonfigurierbarer, séquentiel arbeitender Prozessor |
US5712578A (en) * | 1995-12-27 | 1998-01-27 | Intel Corporation | PLA architecture having improved clock signal to output timing using a type-I domino and plane |
EP0833244A1 (de) * | 1996-09-26 | 1998-04-01 | Hewlett-Packard Company | Arithmetikzelle für anwenderprogrammierbare Anordnungen |
WO2000019441A2 (de) * | 1998-09-30 | 2000-04-06 | Infineon Technologies Ag | Magnetoresistiver speicher mit erhöhter störsicherheit |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4870302A (en) * | 1984-03-12 | 1989-09-26 | Xilinx, Inc. | Configurable electrical circuit having configurable logic elements and configurable interconnects |
US4791603A (en) | 1986-07-18 | 1988-12-13 | Honeywell Inc. | Dynamically reconfigurable array logic |
GB8906145D0 (en) * | 1989-03-17 | 1989-05-04 | Algotronix Ltd | Configurable cellular array |
US5794062A (en) | 1995-04-17 | 1998-08-11 | Ricoh Company Ltd. | System and method for dynamically reconfigurable computing using a processing unit having changeable internal hardware organization |
US6173434B1 (en) * | 1996-04-22 | 2001-01-09 | Brigham Young University | Dynamically-configurable digital processor using method for relocating logic array modules |
US5828858A (en) * | 1996-09-16 | 1998-10-27 | Virginia Tech Intellectual Properties, Inc. | Worm-hole run-time reconfigurable processor field programmable gate array (FPGA) |
US6047115A (en) * | 1997-05-29 | 2000-04-04 | Xilinx, Inc. | Method for configuring FPGA memory planes for virtual hardware computation |
WO2000049496A1 (en) * | 1999-02-15 | 2000-08-24 | Koninklijke Philips Electronics N.V. | Data processor with a configurable functional unit and method using such a data processor |
US6507214B1 (en) * | 2000-10-26 | 2003-01-14 | Cypress Semiconductor Corporation | Digital configurable macro architecture |
US6779168B2 (en) * | 2002-02-01 | 2004-08-17 | Lsi Logic Corporation | Magnetoresistive memory for a complex programmable logic device |
-
2002
- 2002-10-22 DE DE10249204A patent/DE10249204A1/de not_active Ceased
- 2002-10-25 WO PCT/DE2002/004019 patent/WO2003038644A2/de active Application Filing
- 2002-10-25 US US10/494,052 patent/US7225321B2/en not_active Expired - Fee Related
- 2002-10-25 JP JP2003540837A patent/JP3857691B2/ja not_active Expired - Fee Related
- 2002-10-25 EP EP02776857A patent/EP1506496A2/de not_active Withdrawn
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0497029A2 (de) * | 1991-01-29 | 1992-08-05 | Analogic Corporation | Rekonfigurierbarer, séquentiel arbeitender Prozessor |
US5712578A (en) * | 1995-12-27 | 1998-01-27 | Intel Corporation | PLA architecture having improved clock signal to output timing using a type-I domino and plane |
EP0833244A1 (de) * | 1996-09-26 | 1998-04-01 | Hewlett-Packard Company | Arithmetikzelle für anwenderprogrammierbare Anordnungen |
WO2000019441A2 (de) * | 1998-09-30 | 2000-04-06 | Infineon Technologies Ag | Magnetoresistiver speicher mit erhöhter störsicherheit |
Non-Patent Citations (1)
Title |
---|
GUANGMING LU ET AL: "The MorphoSys dynamically reconfigurable system-on-chip", EVOLVABLE HARDWARE, 1999. PROCEEDINGS OF THE FIRST NASA/DOD WORKSHOP ON PASADENA, CA, USA 19-21 JULY 1999, LOS ALAMITOS, CA, USA,IEEE COMPUT. SOC, US, 19 July 1999 (1999-07-19), pages 152 - 160, XP010346235, ISBN: 0-7695-0256-3 * |
Also Published As
Publication number | Publication date |
---|---|
EP1506496A2 (de) | 2005-02-16 |
US7225321B2 (en) | 2007-05-29 |
US20040250052A1 (en) | 2004-12-09 |
DE10249204A1 (de) | 2003-05-28 |
WO2003038644A2 (de) | 2003-05-08 |
JP3857691B2 (ja) | 2006-12-13 |
JP2005510901A (ja) | 2005-04-21 |
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