WO2002103799A3 - Method for producing a memory component - Google Patents

Method for producing a memory component Download PDF

Info

Publication number
WO2002103799A3
WO2002103799A3 PCT/EP2002/006512 EP0206512W WO02103799A3 WO 2002103799 A3 WO2002103799 A3 WO 2002103799A3 EP 0206512 W EP0206512 W EP 0206512W WO 02103799 A3 WO02103799 A3 WO 02103799A3
Authority
WO
WIPO (PCT)
Prior art keywords
control electrode
electrode strips
producing
memory component
memory
Prior art date
Application number
PCT/EP2002/006512
Other languages
German (de)
French (fr)
Other versions
WO2002103799A2 (en
Inventor
Dirk Toebben
Original Assignee
Infineon Technologies Ag
Dirk Toebben
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag, Dirk Toebben filed Critical Infineon Technologies Ag
Priority to US10/480,999 priority Critical patent/US7012003B2/en
Priority to KR1020037016505A priority patent/KR100571773B1/en
Publication of WO2002103799A2 publication Critical patent/WO2002103799A2/en
Publication of WO2002103799A3 publication Critical patent/WO2002103799A3/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/09—Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/50—Peripheral circuit region structures

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)

Abstract

The invention relates to a method for producing a memory component comprising a memory location (104) having memory cells and first control electrode strips (162) for controlling the individual memory cells, and a peripheral area (106) having peripheral elements and second control electrode strips (164) for controlling said peripheral elements. The inventive method enables the expansion of the second control electrode strips (164) in the peripheral area (106) to be approximately randomly adjusted to minimum line widths, without influencing or changing the expansion of the first control electrode strips (162) in the memory location (104).
PCT/EP2002/006512 2001-06-18 2002-06-13 Method for producing a memory component WO2002103799A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US10/480,999 US7012003B2 (en) 2001-06-18 2002-06-13 Memory for producing a memory component
KR1020037016505A KR100571773B1 (en) 2001-06-18 2002-06-13 Method for producing a memory component

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10128933A DE10128933A1 (en) 2001-06-18 2001-06-18 Method of manufacturing a memory device
DE10128933.2 2001-06-18

Publications (2)

Publication Number Publication Date
WO2002103799A2 WO2002103799A2 (en) 2002-12-27
WO2002103799A3 true WO2002103799A3 (en) 2003-05-01

Family

ID=7688312

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2002/006512 WO2002103799A2 (en) 2001-06-18 2002-06-13 Method for producing a memory component

Country Status (5)

Country Link
US (1) US7012003B2 (en)
KR (1) KR100571773B1 (en)
DE (1) DE10128933A1 (en)
TW (1) TW571399B (en)
WO (1) WO2002103799A2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI304633B (en) * 2003-08-25 2008-12-21 Promos Technologies Inc Semiconductor device and fabricating method thereof
KR100954107B1 (en) * 2006-12-27 2010-04-23 주식회사 하이닉스반도체 Method for manufacturing semiconductor device
US8440569B2 (en) * 2007-12-07 2013-05-14 Cadence Design Systems, Inc. Method of eliminating a lithography operation
US8399347B2 (en) * 2010-08-23 2013-03-19 Micron Technology, Inc. Integrated circuits and methods of forming conductive lines and conductive pads therefor
CN113745228B (en) * 2020-05-29 2024-03-29 中芯国际集成电路制造(上海)有限公司 Semiconductor structure and forming method thereof

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5289422A (en) * 1990-11-01 1994-02-22 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having dummy wiring pattern therein and manufacturing method thereof

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5661053A (en) * 1994-05-25 1997-08-26 Sandisk Corporation Method of making dense flash EEPROM cell array and peripheral supporting circuits formed in deposited field oxide with the use of spacers

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5289422A (en) * 1990-11-01 1994-02-22 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having dummy wiring pattern therein and manufacturing method thereof

Also Published As

Publication number Publication date
KR20040012941A (en) 2004-02-11
TW571399B (en) 2004-01-11
US7012003B2 (en) 2006-03-14
KR100571773B1 (en) 2006-04-17
US20050020009A1 (en) 2005-01-27
WO2002103799A2 (en) 2002-12-27
DE10128933A1 (en) 2003-01-02

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