WO2002060064A2 - A phase-locked loop - Google Patents
A phase-locked loop Download PDFInfo
- Publication number
- WO2002060064A2 WO2002060064A2 PCT/GB2001/005610 GB0105610W WO02060064A2 WO 2002060064 A2 WO2002060064 A2 WO 2002060064A2 GB 0105610 W GB0105610 W GB 0105610W WO 02060064 A2 WO02060064 A2 WO 02060064A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- pll
- phase
- configuration
- locked loop
- data
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
- H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
- H03L7/1077—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the phase or frequency detection means
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/095—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector
Abstract
Description
Claims
Priority Applications (9)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/466,788 US6965271B2 (en) | 2001-01-25 | 2001-12-18 | Phase-locked loop |
IL15697201A IL156972A0 (en) | 2001-01-25 | 2001-12-18 | A phase-locked loop |
DE60120490T DE60120490T2 (en) | 2001-01-25 | 2001-12-18 | PHASE CONTROL LOOP |
CA002435705A CA2435705C (en) | 2001-01-25 | 2001-12-18 | A phase-locked loop |
EP01273456A EP1354407B1 (en) | 2001-01-25 | 2001-12-18 | A phase-locked loop |
JP2002560281A JP3836794B2 (en) | 2001-01-25 | 2001-12-18 | Phase-locked loop |
BR0116823-1A BR0116823A (en) | 2001-01-25 | 2001-12-18 | Circuit locked in phase |
IL156972A IL156972A (en) | 2001-01-25 | 2003-07-16 | Phase-locked loop |
HK04105078A HK1062087A1 (en) | 2001-01-25 | 2004-07-13 | A phase-locked loop |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0101954.6 | 2001-01-25 | ||
GBGB0101954.6A GB0101954D0 (en) | 2001-01-25 | 2001-01-25 | Phase-locked loop |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2002060064A2 true WO2002060064A2 (en) | 2002-08-01 |
WO2002060064A3 WO2002060064A3 (en) | 2002-11-14 |
Family
ID=9907507
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/GB2001/005610 WO2002060064A2 (en) | 2001-01-25 | 2001-12-18 | A phase-locked loop |
Country Status (14)
Country | Link |
---|---|
US (1) | US6965271B2 (en) |
EP (1) | EP1354407B1 (en) |
JP (1) | JP3836794B2 (en) |
CN (1) | CN1242556C (en) |
AT (1) | ATE329409T1 (en) |
BR (1) | BR0116823A (en) |
CA (1) | CA2435705C (en) |
DE (1) | DE60120490T2 (en) |
DK (1) | DK1354407T3 (en) |
ES (1) | ES2269308T3 (en) |
GB (1) | GB0101954D0 (en) |
HK (1) | HK1062087A1 (en) |
IL (2) | IL156972A0 (en) |
WO (1) | WO2002060064A2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7508897B2 (en) | 2004-06-15 | 2009-03-24 | Sharp Kabushiki Kaisha | PLL circuit and high-frequency receiving device |
US7561645B2 (en) | 2002-09-26 | 2009-07-14 | Qualcomm Incorporated | Method and apparatus for reducing frequency errors associated with an inter-system scan |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1518325A1 (en) * | 2002-06-28 | 2005-03-30 | Advanced Micro Devices, Inc. | Phase-locked loop with automatic frequency tuning |
US8811915B2 (en) * | 2005-03-04 | 2014-08-19 | Psion Inc. | Digital wireless narrow band radio |
US8041972B2 (en) * | 2006-04-04 | 2011-10-18 | Qualcomm Incorporated | Apparatus and method for setting wakeup times in a communication device based on estimated lock on time of frequency synthesizer |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0755120A1 (en) * | 1995-07-18 | 1997-01-22 | Nec Corporation | Phase-locked loop circuit |
US6150891A (en) * | 1998-05-29 | 2000-11-21 | Silicon Laboratories, Inc. | PLL synthesizer having phase shifted control signals |
EP1067693A1 (en) * | 1999-06-30 | 2001-01-10 | Infineon Technologies AG | PLL synthesizer |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3042374B2 (en) | 1995-06-29 | 2000-05-15 | 日本電気株式会社 | Frequency synthesizer |
US6111807A (en) * | 1998-07-17 | 2000-08-29 | Mitsubishi Denki Kabushiki Kaisha | Synchronous semiconductor memory device allowing easy and fast text |
US6718473B1 (en) * | 2000-09-26 | 2004-04-06 | Sun Microsystems, Inc. | Method and apparatus for reducing power consumption |
-
2001
- 2001-01-25 GB GBGB0101954.6A patent/GB0101954D0/en not_active Ceased
- 2001-12-18 WO PCT/GB2001/005610 patent/WO2002060064A2/en active IP Right Grant
- 2001-12-18 BR BR0116823-1A patent/BR0116823A/en not_active IP Right Cessation
- 2001-12-18 AT AT01273456T patent/ATE329409T1/en not_active IP Right Cessation
- 2001-12-18 CN CNB018222617A patent/CN1242556C/en not_active Expired - Fee Related
- 2001-12-18 JP JP2002560281A patent/JP3836794B2/en not_active Expired - Fee Related
- 2001-12-18 EP EP01273456A patent/EP1354407B1/en not_active Expired - Lifetime
- 2001-12-18 CA CA002435705A patent/CA2435705C/en not_active Expired - Fee Related
- 2001-12-18 IL IL15697201A patent/IL156972A0/en active IP Right Grant
- 2001-12-18 ES ES01273456T patent/ES2269308T3/en not_active Expired - Lifetime
- 2001-12-18 DK DK01273456T patent/DK1354407T3/en active
- 2001-12-18 DE DE60120490T patent/DE60120490T2/en not_active Expired - Lifetime
- 2001-12-18 US US10/466,788 patent/US6965271B2/en not_active Expired - Fee Related
-
2003
- 2003-07-16 IL IL156972A patent/IL156972A/en not_active IP Right Cessation
-
2004
- 2004-07-13 HK HK04105078A patent/HK1062087A1/en not_active IP Right Cessation
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0755120A1 (en) * | 1995-07-18 | 1997-01-22 | Nec Corporation | Phase-locked loop circuit |
US6150891A (en) * | 1998-05-29 | 2000-11-21 | Silicon Laboratories, Inc. | PLL synthesizer having phase shifted control signals |
EP1067693A1 (en) * | 1999-06-30 | 2001-01-10 | Infineon Technologies AG | PLL synthesizer |
Non-Patent Citations (1)
Title |
---|
PATENT ABSTRACTS OF JAPAN vol. 1997, no. 05, 30 May 1997 (1997-05-30) -& JP 09 018337 A (NEC CORP), 17 January 1997 (1997-01-17) * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7561645B2 (en) | 2002-09-26 | 2009-07-14 | Qualcomm Incorporated | Method and apparatus for reducing frequency errors associated with an inter-system scan |
US7508897B2 (en) | 2004-06-15 | 2009-03-24 | Sharp Kabushiki Kaisha | PLL circuit and high-frequency receiving device |
Also Published As
Publication number | Publication date |
---|---|
CN1242556C (en) | 2006-02-15 |
EP1354407B1 (en) | 2006-06-07 |
GB0101954D0 (en) | 2001-03-14 |
ATE329409T1 (en) | 2006-06-15 |
DK1354407T3 (en) | 2006-10-09 |
IL156972A0 (en) | 2004-02-08 |
JP2004527936A (en) | 2004-09-09 |
JP3836794B2 (en) | 2006-10-25 |
CN1488194A (en) | 2004-04-07 |
CA2435705C (en) | 2006-05-30 |
US20040113703A1 (en) | 2004-06-17 |
DE60120490T2 (en) | 2007-01-11 |
CA2435705A1 (en) | 2002-08-01 |
BR0116823A (en) | 2004-01-27 |
EP1354407A2 (en) | 2003-10-22 |
IL156972A (en) | 2007-12-03 |
WO2002060064A3 (en) | 2002-11-14 |
DE60120490D1 (en) | 2006-07-20 |
ES2269308T3 (en) | 2007-04-01 |
US6965271B2 (en) | 2005-11-15 |
HK1062087A1 (en) | 2004-10-15 |
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