WO2002043149A1

WO2002043149A1 - Semiconductor device

Info

Publication number: WO2002043149A1
Application number: PCT/JP2001/010098
Authority: WO
Inventors: Takeshi Ikeda; Hiroshi Miyagi
Original assignee: Niigata Seimitsu Co., Ltd.
Priority date: 2000-11-22
Filing date: 2001-11-19
Publication date: 2002-05-30
Also published as: TW511137B; JP2002164507A

Abstract

A semiconductor chip (1) comprises function blocks (2-1, 2-1) including serial/parallel converting sections (4-1, 4-2) for converting serial data to parallel data and vice versa. Only serial data is inputted/outputted into/from the functional blocks (2-1, 2-1). Hence, only lines the number of which can be the one required to transmit serial data are provided, thus reducing the number of lines in the chip.

Description

Description Semiconductor device technology

The present invention relates to a semiconductor device, in particular, a semiconductor device including a semiconductor chip having a plurality of functional blocks as an internal logic circuit, or a plurality of semiconductor chips or a semiconductor chip and another electronic circuit arranged in a short distance. It is suitable for use in a manufactured semiconductor device or the like. Background art

Recent semiconductor integrated circuits represented by the system LSI are often configured by mounting a plurality of function blocks on one chip. The function referred to here is, for example, the whole processing to be realized by one semiconductor chip divided into coherent and small functional units.

In addition, there are roughly two forms of mounting such a semiconductor chip on a substrate. The first mode is a mode in which a semiconductor chip is assembled into a semiconductor package and mounted on a substrate of an electronic device or a module via a lead frame of the semiconductor package by soldering or the like. The second mode is a mode in which a semiconductor chip is directly mounted on a motherboard main body or a module substrate of an electronic device by soldering or the like without being housed in a semiconductor package.

The second mode is a mounting mode called COB (chip on board). In this COB, the semiconductor chip and the circuit pattern on the substrate are electrically connected using wire-pound connection technology, TAB (tape automated bonding) connection technology, or flip-chip connection technology. Which connection technique In this technique, an electrode pad on the surface of a semiconductor chip is electrically connected to an electrode pad of a circuit pattern formed on a substrate or one end of a plurality of leads formed on a tape carrier.

A conventional semiconductor chip having a plurality of functional blocks is configured to transmit digital data in parallel through a plurality of wires in order to exchange digital data at high speed between the functional blocks. Therefore, many wirings are provided between a plurality of functional blocks in a semiconductor chip.

As a result, there has been a problem that wiring that is not a logic circuit itself takes up a very large area in the semiconductor chip, and the size of the semiconductor chip increases accordingly. Recently, attempts have been made to reduce the line width of individual wiring and the pitch between wirings in order to reduce the size of semiconductor chips, but there is a limit to miniaturization.

In addition, conventional COB-based semiconductor chips use digital electrodes via multiple electrode pads to exchange digital data with external electronic circuits or other semiconductor chips at high speed via circuit patterns on the substrate. It is designed to transmit data in parallel. Therefore, many electrode pads are provided on a semiconductor chip.

However, each of the electrode pads only serves as an input / output terminal of the semiconductor chip, but each one requires a relatively large area. Therefore, there is a problem that the size of the semiconductor chip is increased by providing a large number of electrode pads irrelevant to the original function of the semiconductor chip.

When an electrode pad is provided on a semiconductor chip, a protection circuit is often provided for each electrode pad so that an integrated circuit in the semiconductor chip is not destroyed by externally applied static electricity or noise. . Toko However, in this case, the ratio of the area of the buffer region around the chip including the electrode pad and the protection circuit to the area of the integrated circuit that realizes the necessary functions in the semiconductor chip becomes very large. As a result, there was a problem that the area of the entire chip could not be effectively utilized.

Also, in order to transmit digital data in parallel, multiple wirings between the semiconductor chip and external electronic circuits or other semiconductor chips are required, which is extremely complicated, and reduces the COB substrate area. It was a network in planning.

In addition, since conventional semiconductor chips have many electrode pads, when testing manufactured semiconductor chips, probe needles should be applied to all the pad electrodes of wafer chips. Testing must be performed. Therefore, there is a problem that the test work becomes complicated and the test time becomes very long.

The present invention has been made to solve such a problem, and reduces the number of wirings inside and outside the semiconductor chip and the number of electrode pads required for the semiconductor chip, thereby reducing the chip size and COB substrate size. An object of the present invention is to reduce the size of the chip and increase the ratio of the effective area of the chip, and to simplify the test operation. Disclosure of the invention

A semiconductor device according to the present invention is a semiconductor device having a plurality of functional blocks in a semiconductor chip, wherein the semiconductor chip includes a serial / parallel conversion circuit that converts serial data and parallel data to each other. A feature is provided for each block, and data input / output between the plurality of functional blocks is performed using the serial data.

In another embodiment of the present invention, the serial / parallel conversion circuit includes The serial novel parallel conversion is performed according to an operating frequency higher than the operating frequency of the active block.

According to another aspect of the present invention, there is provided a semiconductor device in which a plurality of semiconductor chips or a semiconductor chip and another electronic circuit are arranged on the same substrate, wherein the semiconductor chip stores serial data and parallel data. A serial-to-parallel conversion circuit for mutually converting is provided, and the serial data is input to and output from the outside of the semiconductor chip. In another aspect of the present invention, the serial / parallel conversion circuit performs serial / parallel conversion in accordance with an operation frequency higher than an operation frequency of an electronic device including the semiconductor chip.

According to another aspect of the present invention, there is provided a serial / parallel conversion circuit for converting serial data and parallel data into and out, and a semiconductor chip for inputting / outputting the serial data to / from the outside. It shall be.

According to another aspect of the present invention, there is provided a semiconductor device in which a plurality of semiconductor chips or a semiconductor chip and another electronic circuit are arranged on the same substrate, wherein the semiconductor chip stores serial data and parallel data. A serial-to-parallel converter that converts each other, a transmitter that modulates and transmits the serial data converted by the serial-to-parallel converter, and a demodulated serial that receives and demodulates the serial data modulation signal. A receiving circuit for outputting data to the serial / parallel conversion circuit to convert the data to the parallel data; and an antenna circuit for transmitting / receiving a modulation signal of the serial data. It is characterized in that input / output is made to the outside of the chip.

According to another aspect of the present invention, there is provided a serial / parallel conversion circuit for converting serial data and parallel data into and out of each other; A transmission circuit that modulates and transmits the serial data converted by the conversion circuit; and receives and demodulates the modulated signal of the serial data, and converts the demodulated serial data into the parallel data to convert the demodulated serial data into the parallel data. A semiconductor chip having therein a receiving circuit for outputting to a parallel conversion circuit, an antenna circuit for transmitting and receiving the modulated signal of the serial data, and an antenna circuit for transmitting and receiving the modulated signal.

According to the present invention configured as described above, parallel data processed by a certain functional block in a semiconductor chip is converted into serial data and output to another functional block. As a result, the wiring for data input / output between each functional block in the semiconductor chip only needs to be provided as many as necessary for serial data transmission. The number of wires between them can be significantly reduced. Therefore, the wiring area in the semiconductor chip can be reduced, the chip size can be reduced, or the degree of integration can be improved while keeping the chip size the same.

According to another feature of the present invention, the parallel processing performed inside the semiconductor chip is converted into serial data and output to the outside of the semiconductor chip. Also, serial data input from outside the semiconductor chip is converted into parallel data and processed inside the semiconductor chip. As a result, the number of electrode pads on the semiconductor chip need only be set to the number required for serial data transmission, and the number of electrode pads used is greatly reduced compared to conventional parallel data transmission. be able to.

Therefore, it is possible to reduce the size of the semiconductor chip or to improve the degree of integration while keeping the chip size the same. In addition, wiring for data transmission between semiconductor chips or external electronic circuits requires only a small number of wirings required for serial data transmission, simplifying wiring. can do. In addition, since the number of electrode pads is small, a semiconductor chip having good resistance to static electricity and noise can be provided. Further, the test operation performed on the manufactured semiconductor chip can be simplified, and the test time can be significantly reduced.

According to another feature of the present invention, the serial data converted from the parallel data inside the semiconductor chip is further modulated and transmitted outside the semiconductor chip by radio. Also, a modulation signal of serial data received from outside the semiconductor chip by radio is demodulated, further converted into parallel data, and processed inside the semiconductor chip. As a result, an electrode pad for transmitting data to the outside of the semiconductor chip is not required, and the number of electrode pads used can be further reduced.

Therefore, the size of the semiconductor chip can be further reduced, or the degree of integration can be further improved with the same chip size. In addition, wiring for data transmission between semiconductor chips or an external electronic circuit is not required, and the wiring can be further simplified. Further, a semiconductor chip having better resistance to static electricity and noise can be provided. Further, the test of the manufactured semiconductor chip can be performed in a non-contact manner, so that the test operation can be further simplified and the test time can be greatly reduced. BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 is a diagram showing an example of a configuration of a main part of a semiconductor chip according to a first embodiment which implements a semiconductor device according to the present invention.

FIG. 2 is a diagram showing a configuration example of a main part of a semiconductor chip according to a second embodiment in which a semiconductor device according to the present invention is implemented.

FIG. 3 is a diagram showing a configuration example of a semiconductor device configured by mounting the semiconductor chip shown in FIG. 2 on a substrate. FIG. 4 is a diagram showing a configuration example of a main part of a semiconductor chip according to a third embodiment in which a semiconductor device according to the present invention is implemented. BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a diagram showing an example of a configuration of a main part of a semiconductor chip according to a first embodiment which implements a semiconductor device according to the present invention. Note that FIG. 1 shows the components existing in the semiconductor chip as blocks, and does not faithfully represent the size of the circuit layout.

In Figure 1, the semiconductor chip 1 of this embodiment, a plurality of functional blocks 2 as a circuit for performing as a whole the desired processing - and a I 2 _ _2. These functional blocks 2 - I 2 _ _2, each include an integrated circuit portion 3 have _3-2 for realizing a specific function. The integrated circuit portion 3, _3-2 is similar to that conventional semiconductor chip is provided, exchange of digital data between the outside is performed in parallel form. The semiconductor chip 1 of the present embodiment further respective functional blocks 2 -丄, serial within 2 _ ₂ Z parallel conversion section 4 _! , 4 ₂ are provided. These serial-parallel conversion unit 4, 4 _ ₂ and the integrated circuit portion 3 _〗, is between 3 _ _2, are wired to be able to transmit and receive digital data at a parallel format.

Further, during the serial Z parallel converter 4, 4 _ ₂ it is wired so as to be able to transmit and receive digital data Te into serial form. Figure 1 shows the serial / parallel converter 4! , 4 the wiring is shown only one of between _2, the serial interconnection of digital data input and output, in fact, wiring for and for data output the data input is provided one by one. Parallel conversion section 4 4 _2, the integrated circuit portion 3, _3-2 or Et the inputted parallel data to serial data conversion to functional block 2 _ J, the process of outputting the _2-2 to the outside performed. The serial Z parallel varying section 4 _ ,, 4 _ ₂ converts the serial data input from the outside of the functional block 2 _ i, 2 ₂ to the parallel data integrated circuit portion 3 _, 3- ₂ It also performs processing to output to.

Serial Roh parallel converter 4, the operating frequency of the serial / Parallel conversion performed at 4 _ _2, and the integrated circuit portion 3 i, 3 _ _2, the operating frequency of the entire including electronic devices or modules of the semiconductor chip 1 Use a higher frequency than. For example, in a case where the integrated circuit unit 3 3 _ ₂ operates at the operating frequency of 5 0 0 MH z, the integrated circuit portion 3 have _3-2 serial Roh parallel converter 4 _! , When the parallel wiring between the 4 _ ₂ is 1 six performs serial / parallel conversion by 8 GH z (= 1 6 X 5 0 0 MH z) above the operating frequency.

Thus, the transmission speed of the serial data is set to a predetermined multiple of the transmission speed of the parallel data. By doing so, even when digital data is transmitted in a serial format, data transmission can be performed in the same or shorter time as in the case of transmitting in a parallel format. There is no loss of operating speed.

As described above, according to the first embodiment, the functional blocks of the semiconductor chip 1 2, the serial Roh parallel converter 4-t, 4 ₂ provided in the 2 _2, each function in the semiconductor chip 1 block 2 _ i, 2-spear collected since to carry out at rehearsal serial data between the _two, is possible to significantly reduce the wiring for digital data input and output between the functional blocks 2 _ i, 2 _ ₂ Thus, the wiring area in the semiconductor chip 1 can be reduced.

In the case is shown an interconnection between FIG 1 of the two functional blocks 2-i, 2 _ _2, that implements three or more functional blocks in the same semiconductor chip 1 Also, a serial-to-parallel conversion unit is built in each functional block, and data exchange between each functional block is performed by serial data. Next, a second embodiment of the present invention will be described.

FIG. 2 is a diagram showing a configuration example of a main part of a semiconductor chip according to a second embodiment in which a semiconductor device according to the present invention is implemented. Note that FIG. 2 illustrates the components existing in the semiconductor chip as blocks, and does not faithfully represent the circuit layout size.

In FIG. 2, a semiconductor chip 11 of the present embodiment includes an integrated circuit section 12 that performs processing for realizing a desired function. The integrated circuit section 12 is similar to that provided in a conventional semiconductor chip, and exchange of digital data with the outside of the circuit is performed in a parallel format. The semiconductor chip 11 of the present embodiment further includes a serial / parallel converter 13. The serial Z-parallel converter 13 and the integrated circuit 12 are wired so that digital data can be transmitted and received in a parallel format.

The integrated circuit section 12 and the serial / parallel conversion section 13 receive power from an electrode pad 14 provided for a power supply Vcc and an electrode pad 15 provided for grounding. Operate.

The serial / Z-parallel converter 13 converts the parallel data input from the integrated circuit 12 into serial data and outputs the serial data to the data input / output electrode pad 16. Further, the serial / parallel converter 13 converts the serial data input from the data input / output electrode pad 16 into parallel data, and outputs the parallel data to the integrated circuit 12.

The electrode pad for data input / output is connected to the serial / parallel converter. Is arranged in the vicinity of. Although FIG. 2 shows only one wire between the serial / parallel conversion unit 13 and the electrode pad 16, actually, one wire for data input and one wire for data output are provided. There are also two electrode pads.

The operating frequency of the serial / parallel conversion performed by the serial / parallel converter 13 uses a higher frequency than the operating frequency of the electronic device including the integrated circuit unit 12 and the semiconductor chip 11 or the entire module. For example, when the integrated circuit section 12 operates at an operating frequency of 500 MHz and there are 16 parallel wirings between the integrated circuit section 12 and the serial / parallel conversion section 13 In this case, serial-to-parallel conversion is performed at an operating frequency of 8 GHz (= 16 × 500 MHz) or higher.

With this, the transmission speed of the serial data is set to be a predetermined multiple or more of the transmission speed of the parallel data. By doing so, even when digital data is transmitted in the serial format, data transmission can be performed in the same or shorter time as in the case of transmitting in the parallel format. There is no loss of operating speed.

FIG. 3 is a diagram showing a configuration example of a COB semiconductor device configured by mounting the semiconductor chip 11 shown in FIG. 2 on a substrate.

As shown in FIG. 3, for example, when a plurality of semiconductor chips 1 1 _ ぃ 1 1 — ₂ are mounted on the same module substrate 2 1 to form a functional module, each semiconductor chip 1 1 _ i , 1 1 _ ₂ configured as in FIG. 2, is built serial / Parallel conversion unit 1 s 3 1 3 ₂ in each chip. This ensures that the semiconductor chip 1 1 _ t, 1 1 - exchange of data between the _two, as performed by the serial data via the electrode pad 1 6- i, 1 6 _ ₂ for serial data input and output I do. Although the wiring between the _two semiconductor chips 11 1-i and 1 12 is shown here, three or more semiconductor chips 11 are connected to the same base. Even when mounted on the board 21, the serial-to-parallel converter 13 is built into each semiconductor chip 11, and data exchange between the semiconductor chips 11 is performed by serial data. .

Also, when an electronic circuit other than a semiconductor chip is mounted on the same module substrate 21 as a semiconductor chip: L 1 _ ぃ 11 1 _ ₂ , the electronic circuit is equivalent to the serial Z-parallel converter 13. Built-in configuration. The exchange of data between the semiconductor chip 1 1 1 1 _ ₂ and the electronic circuits to perform at serial data.

As described above, according to the second embodiment, the serial Z-parallel converter 13 is provided in the semiconductor chip 11, and the exchange between the semiconductor chip 11 and its external circuit is performed by serial data. Therefore, as electrode pads for digital data input / output, only electrode pads 16 for serial data input / output need be provided in addition to electrode pads 14 and 15 for power supply. Can significantly reduce the number of nodes used.

As a result, the size of the semiconductor chip 11 can be reduced. Alternatively, the buffer area around the chip, which was conventionally used as an electrode pad, can be effectively used as an area for an integrated circuit, and the degree of integration can be improved with the same chip size. In particular, since a protection circuit is usually provided for each electrode pad in a semiconductor chip, the number of protection circuits can be reduced together with the electrode pad, and the chip is used for an integrated circuit in the chip. The possible effective area can be increased. Also, the wiring between the semiconductor chip 11 of the present embodiment and an external electronic circuit or another semiconductor chip can be reduced by a small number required for serial data transmission. Only wiring. Thus, for example, wiring between a plurality of semiconductor chips arranged on the same substrate, or a connection between the semiconductor chip 11 and another electronic circuit. The wiring between them can be simplified, and the wiring area can be greatly reduced.

Further, since the number of electrode pads to which static electricity or noise is externally applied is reduced, a semiconductor chip having good resistance to static electricity or noise can be provided, and reliability can be improved.

Furthermore, even when performing a probe test on a manufactured semiconductor chip, the number of electrode pads to which the probe needle must be applied is very small, so that the test operation can be simplified and the test time can be greatly reduced. It also has the advantage that it can be shortened. Next, a third embodiment of the present invention will be described.

FIG. 4 is a diagram showing a configuration example of a main part of a semiconductor chip according to the third embodiment. In FIG. 4, the same components as those shown in FIG. 2 are denoted by the same reference numerals. Also, FIG. 4 shows the components existing in the semiconductor chip as blocks, similarly to FIG. 2, and does not faithfully represent the layout size of the circuit.

As shown in FIG. 4, a semiconductor chip 31 according to the third embodiment has an integrated circuit section 12, a serial Z-parallel conversion section 13 and a power supply electrode pad 1 similar to the one shown in FIG. 4, 15 are provided. Further, the semiconductor chip 31 includes a transmission circuit 32, a reception circuit 33, and an antenna circuit 34.

The transmission circuit 32 includes an oscillation circuit and a modulation circuit, modulates the serial data supplied from the serial / parallel conversion unit 13, and wirelessly transmits the data to the outside of the chip via the antenna circuit 34. Perform the following processing. The transmission circuit 32 of the present embodiment has a capability of directly modulating high-speed serial data converted at a high frequency in the serial / parallel conversion unit 13. The receiving circuit 33 includes an RF (radio frequency) filter, an IF (intermed iate frequency) filter, a demodulation circuit, and the like, and demodulates data received from outside the chip via the antenna circuit 34. The obtained serial data is output to the serial / parallel converter # 3.

The antenna circuit 34 is a circuit for transmitting and receiving data wirelessly using devices such as radio waves, light, and magnetic fields. In the present embodiment, for example, in order to wirelessly transmit and receive data between a plurality of semiconductor chips 31 mounted on the same substrate, sufficient power is necessary to wirelessly couple short-range chips. A small antenna circuit for transmitting and receiving data is used. Since the antenna circuit 34 is for performing high-frequency, short-range wireless communication, it is possible to form the antenna circuit 34 with a circuit pattern made of aluminum, for example.

Also in the present embodiment, when a functional module is configured by mounting a plurality of semiconductor chips on the same substrate, each semiconductor chip is configured as shown in FIG. 4, and the serial Z-parallel conversion unit 13 and the transmission circuit 32. The receiving circuit 33 and the antenna circuit 34 are built in each chip. As a result, in the exchange between the semiconductor chips, the serial data is transmitted wirelessly via the antenna circuit 34.

As described above, according to the third embodiment, the serial-to-parallel conversion unit 13 is provided in the semiconductor chip 31 to exchange data with an external circuit using serial data, Since a serial transmission / reception circuit is provided to transmit the serial data wirelessly, only the semiconductor chip 31 needs to be provided with the electrode pads 14 and 15 for power supply (the second embodiment). The electrode pad 16 for serial data input / output described in (1) is also unnecessary), and the number of electrode pads used can be significantly reduced.

As a result, the size of the semiconductor chip 31 can be reduced, The usable area available for the integrated circuit can be increased. In addition, since a protection circuit is usually provided for each electrode pad in a semiconductor chip, the number of protection circuits can be reduced together with the electrode pad, and the degree of integration is significantly improved with the same chip size. Can be improved. In addition, since data is transmitted wirelessly, wiring between semiconductor chips is not required, and wiring between semiconductor chips can be simplified. In addition, since there are almost no electrode pads, soldering work is hardly required in the manufacturing process of the semiconductor chip 31, so that the manufacturing process can be simplified and the manufacturing cost can be reduced.

Furthermore, when testing a manufactured semiconductor chip, the test can be performed by sending a test message wirelessly, and it is not a contact test such as applying a probe needle but a non-contact test. Can be realized. As a result, the test work can be greatly simplified and the test time can be significantly reduced.

Here, the case where a plurality of semiconductor chips 31 are mounted on the same substrate has been described. However, if short-range communication is performed, as in the second embodiment, the same semiconductor substrate 31 is mounted on the same substrate. It can also be applied to semiconductor chips mounted on semiconductor devices and other electronic circuits. Furthermore, the present invention can be applied to a plurality of semiconductor chips mounted on different substrates or a semiconductor chip and other electronic circuits.

In addition, each of the above-described embodiments is merely an example of a specific embodiment for carrying out the present invention, and the technical scope of the present invention is interpreted in a limited manner. It must not be. That is, Ming can be implemented in various forms without departing from its spirit or its key features. Industrial applicability

The present invention can reduce the number of wirings inside and outside a semiconductor chip and the number of electrode pads required for the semiconductor chip, reduce the chip size and COB substrate size, and increase the effective area of the chip. This is useful for simplifying the test work.

Claims

The scope of the claims

1. A semiconductor device having a plurality of functional blocks in a semiconductor chip, wherein the semiconductor chip includes a serial-to-parallel conversion circuit for mutually converting serial data and parallel data for each of the plurality of functional blocks. A semiconductor device wherein data input / output between a plurality of functional blocks is performed by the serial data.

2. The semiconductor device according to claim 1, wherein the serial / parallel conversion circuit performs a serial / parallel conversion in accordance with an operation frequency higher than an operation frequency of the functional block.

3. A semiconductor device in which a plurality of semiconductor chips or a semiconductor chip and another electronic circuit are arranged on the same substrate,

The semiconductor chip includes a serial Z-parallel conversion circuit that converts serial data and parallel data into and out, and inputs and outputs the serial data to and from the outside of the semiconductor chip. Conductor device.

4. The semiconductor device according to claim 3, wherein the serial / parallel conversion circuit performs a serial / parallel conversion in accordance with an operating frequency higher than an operating frequency of an electronic device that can obtain the semiconductor chip.

5. A semiconductor device including a serial / parallel conversion circuit for converting serial data and parallel data into and out, and a semiconductor chip for inputting and outputting the serial data to and from the outside.

6. A semiconductor device in which a plurality of semiconductor chips, or a semiconductor chip and another electronic circuit are arranged on the same substrate, wherein the semiconductor chip converts serial data and parallel data to each other. A rel conversion circuit,

A transmission circuit for modulating and transmitting the serial data converted by the serial-parallel conversion circuit;

A receiving circuit for receiving and demodulating the modulated signal of the serial data and outputting the demodulated serial data to the serial / parallel conversion circuit to convert the demodulated serial data into the parallel data;

An antenna circuit for transmitting and receiving the serial data modulated signal,

A semiconductor device, wherein the serial data modulation signal is input / output to / from the outside of the semiconductor chip.

7. A serial Z parallel conversion circuit that converts between serial data and parallel data,

A transmission circuit for modulating and transmitting the serial data converted by the serial / parallel conversion circuit;

A receiving circuit for receiving and demodulating the modulated signal of the serial data, and outputting the demodulated serial data to the serial / parallel conversion circuit to convert the demodulated serial data to the parallel data;

A semiconductor device, comprising: an antenna circuit for transmitting and receiving the serial data modulation signal; and a semiconductor chip provided therein.