WO2002035897A9 - Use of metallic treatment on copper foil to produce fine lines and replace oxide process in printed circuit board production - Google Patents
Use of metallic treatment on copper foil to produce fine lines and replace oxide process in printed circuit board productionInfo
- Publication number
- WO2002035897A9 WO2002035897A9 PCT/US2001/032400 US0132400W WO0235897A9 WO 2002035897 A9 WO2002035897 A9 WO 2002035897A9 US 0132400 W US0132400 W US 0132400W WO 0235897 A9 WO0235897 A9 WO 0235897A9
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- conductive layer
- layer
- electrically conductive
- metal layer
- printed circuit
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
- H05K3/064—Photoresists
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
- H05K3/384—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal by plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0302—Properties and characteristics in general
- H05K2201/0317—Thin film conductor layer; Thin film passive component
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0338—Layered conductor, e.g. layered metal substrate, layered finish layer, layered thin film adhesion layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0355—Metal foils
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/072—Electroless plating, e.g. finish plating or initial plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/0723—Electroplating, e.g. finish plating
Definitions
- the present invention relates to the manufacture of printed circuit boards having enhanced etch uniformity and resolution.
- the process of this invention eliminates the need for a black oxide treatment to improve adhesion and improves the ability to optically inspect the printed circuit boards.
- Printed circuit boards have wide application in the field of electronics. They are useful for large scale applications, such as in missiles and industrial control equipment, as well as in small scale devices, such as telephones, radios and personal computers. In particular, when utilizing printed circuits it is important that a high degree of accuracy and resolution is attained for very small line and space widths (on the order of one hundred microns or less) to ensure good performance of the circuit.
- a matte side of a foil is laminated onto the substrate, mainly because the matte side of the foil is rougher and has better adhesion to the substrate than the shiny side of the foil.
- U.S. patent 5,679,230 provides a copper foil for use in the manufacture of printed circuit boards.
- This copper foil can be used to make multilayer circuit boards without requiring the conventional black oxide treatment to improve adhesion.
- the present invention provides an approach to solving the problems of the prior art wherein a thin metal layer is deposited onto a conductive layer on a substrate. This metal layer acts as an etch mask during etching of the conductive layer, and improves etch accuracy and resolution. After etching, this thin metal layer remains on the conductive layer obviating the need for an oxide layer.
- the metal layers employed in this process are also highly uniform and reflective, making the printed circuits formed thereby more compatible with automatic optical inspection equipment than printed circuits of the prior art. Further, the metal layers used herein have high mechanical strength, and are highly resistant to mechanical damage, such as surface scratches and scuff marks.
- the invention provides a process for producing a printed circuit layer comprising conducting steps (a) and (b) in either order: a) depositing a first surface of an electrically conductive layer onto a substrate, which electrically conductive layer has a roughened second surface opposite to the first surface; b) depositing a thin metal layer onto the roughened second surface of the electrically conductive layer, which metal layer comprises a material having a different etch resistance property than that of the electrically conductive layer; and then c) depositing a photoresist onto the metal layer; d) imagewise exposing and developing the photoresist, thereby revealing underlying portions of the metal layer; e) removing the revealed underlying portions of the metal layer, thereby revealing underlying portions of the conductive layer; and f) removing the revealed underlying portions of the conductive layer, to thereby produce a printed circuit layer.
- the invention also provides a printed circuit layer produced by the process of conducting steps a) and b) in either order: a) depositing a first surface of an electrically conductive layer onto a substrate, which electrically conductive layer has a roughened second surface opposite to the first surface; b) depositing a thin metal layer onto the roughened second surface of the electrically conductive layer, which metal layer comprises a material having a different etch resistance property than that of the electrically conductive layer; and then c) depositing a photoresist onto the metal layer; d) imagewise exposing and developing the photoresist, thereby revealing underlying portions of the metal layer; e) removing the revealed underlying portions of the metal layer, thereby revealing underlying portions of the conductive layer; and f) removing the revealed underlying portions of the conductive layer.
- the invention broadly provides a process for producing a printed circuit layer and printed circuit board.
- the first step in conducting the process of the present invention is to deposit a layer of an electrically conductive material onto a suitable substrate.
- Typical substrates are those suitable to be processed into a printed circuit or other microelectronic device.
- Suitable substrates for the present invention non- exclusively include polymers reinforced with materials such as fiberglass, aramid (Kevlar), aramid paper (Thermount), polybenzoxolate paper or combinations thereof. Of these epoxy with fiberglass reinforcement is the most preferred substrate.
- semiconductor materials such as gallium arsenide (GaAs), silicon and compositions containing silicon such as crystalline silicon, polysilicon, amorphous silicon, epitaxial silicon, and silicon dioxide (SiO 2 ) and mixtures thereof.
- the preferred thickness of the substrate is of from about 10 to about 200 microns, more preferably from about 10 to about 50 microns.
- the conductive layer preferably comprises a material such as copper, zinc, brass, chrome, , nickel, aluminum, stainless steel, iron, gold, silver, titanium and combinations and alloys thereof. Most preferably, the conductive layer is a copper foil.
- Copper foils are preferably produced by electrodepositing copper from solution onto a rotating metal drum.
- the side of the foil next to the drum is typically the smooth or shiny side, while the other side has a relatively rough surface, also known as the matte side.
- This drum is usually made of stainless steel or titanium which acts as a cathode and receives the copper as it is deposited from solution.
- An anode is generally constructed from a lead alloy. A cell voltage of about 5 to 10 volts is applied between the anode and the cathode to cause the copper to be deposited, while oxygen is evolved at the anode.
- This copper foil is then removed from the drum, cut to the required size, and laminated onto the substrate.
- Lamination is preferably conducted in a press at a minimum of about 175°C, for about 30 minutes.
- the press is under a vacuum of at least 28 inches of mercury, and maintained at a pressure of about 150 psi.
- the conductive foil is preferably, but not necessarily, electrolytically treated on the shiny side to form a roughening copper deposit, and electrolytically treated on the matte side to deposit micro nodules of a metal or alloy.
- These nodules are preferably copper or a copper alloy, and do not add roughness to the surface, but do increase adhesion to a substrate.
- the surface microstructure of the foil is measured by a profilometer, such as a Perthometer model M4P or S5P which is commercially available from Mahr Feinpruef Corporation of Cincinnati, Ohio.
- Topography measurements of the surface grain structure of peaks and valleys are made according to industry standard IPC-TM-650 Section 2.2.17 of the Institute for Interconnecting and Packaging Circuits of 21 15 Sanders Road, Northbrook, Illinois 60062.
- a measurement length Im over the sample surface is selected.
- Rz defined as the average maximum peak to valley height of five consecutive sampling lengths within the measurement length Im (where lo is Im/5).
- Rt is the maximum roughness depth and is the greatest perpendicular distance between the highest peak and the lowest valley within the measurement length Im.
- Rp is the maximum leveling depth and is the height of the highest peak within the measuring length Im.
- Ra, or average roughness is defined as the arithmetic average value of all absolute distances of the roughness profile from the center line within the measuring length Im.
- the parameters of importance for this invention are Rz and Ra.
- the surface treatments carried out produce a surface structure having peaks and valleys, which produce roughness parameters wherein Ra ranges from about 1 to about 10 microns and Rz ranges from about 2 to about 10 microns.
- the surface treatments carried out produce a surface structure having peaks and valleys, on the shiny side, which produce roughness parameters wherein Ra ranges from about 1 to about 4 microns, preferably from about 2 to about 4 microns, and most preferably from about 3 to about 4 microns.
- the Rz value ranges from about 2 to about 4.5 microns, preferably from about 2.5 to about 4.5 microns, and more preferably from about 3 to about 4.5 microns.
- the surface treatments carried out produce a surface structure having peaks and valleys, on the matte side, which produce roughness parameters wherein Ra ranges from about 4 to about 10 microns, preferably from about 4.5 to about 8 microns, and most preferably from about 5 to about 7.5 microns.
- the Rz value ranges from about 4 to about 10 microns, preferably from about 4 to about 9 microns, and more preferably from about 4 to about 7.5 microns.
- the shiny side has a copper deposit about 2 to 4.5 ⁇ m thick to produce an average roughness (Rz) of 2 ⁇ m or greater.
- the matte side preferably will have a roughness Rz as made of about 4-7.5 ⁇ m.
- the micro nodules of metal or alloy will have a size of about 0.5 ⁇ m.
- Other metals may be deposited as micro nodules if desired, for example, zinc, indium, tin, cobalt, brass, bronze and the like. This process is more thoroughly described in U.S. patent 5,679,230, which is incorporated herein by reference.
- the shiny surface has a peel strength ranging from about .7 kg/linear cm to about 1.6 kg/linear, preferably from about .9 kg/linear cm to about 1.6 kg/linear.
- the matte surface has a peel strength ranging from about .9 kg/linear cm to about 2 kg/linear, preferably from about 1.1 kg/linear cm to about 2 kg/linear. Peel strength is measured according to industry standard IPC-TM-650 Section 2.4.8 Revision C.
- the conductive layer preferably has a thickness of from about 0.5 to about 200 microns, more preferably from about 9 to about 70 microns.
- the conductive layer may also be applied using any other well known method of metal deposition such as electroless deposition, coating, sputtering, evaporation or by lamination onto the substrate.
- the foil is preferably, but not necessarily, electrolytically treated on either side with, a thin metal layer.
- This metal layer is preferably electrolytically deposited onto the conductive layer.
- the metal layer may also be deposited onto the conductive layer (after laminating to the substrate) by coating, sputtering, evaporation or by lamination onto the conductive layer.
- the metal layer is a thin film and comprises a material selected such as nickel, tin, palladium platinum, chromium, titanium, molybdenum or alloys thereof. Most preferably the metal layer comprises nickel or tin.
- the metal layer preferably has a thickness of from about .01 to about 10 microns, more preferably from about .2 to about 3 microns. This metal layer will serve as an etch mask to define a pattern of circuit lines and spaces to be etched into the conductive layer.
- the next step is to selectively etch away portions of the metal layer, forming an etched pattern in the metal layer.
- This etched pattern is formed by well known photolithographic techniques using a photoresist composition.
- a photoresist deposited directly onto the thin metal layer.
- the photoresist composition may be positive working or negative working and is generally commercially available.
- the resist can be very thin (5 to 20 microns) since it's main function is to only define the thin metal layer and does not need to withstand severe etch conditions. This allows much greater resolution.
- Suitable positive working photoresists are well known in the art and may comprise an o-quinone diazide radiation sensitizer.
- the o-quinone diazide sensitizers include the o-quinone-4-or-5-sulfonyl-diazides disclosed in U. S. Patents Nos. 2,797,213; 3,106,465; 3,148,983; 3,130,047; 3,201,329; 3,785,825; and 3,802,885.
- preferred binding resins include a water insoluble, aqueous alkaline soluble or swellable binding resin, which is preferably a novolak.
- Suitable positive photodielectric resins may be obtained commercially, for example, under the trade name of AZ-P4620 from Clariant Corporation of Somerville, New Jersey as well as Shipley I-line photoresist. Negative photoresists are also widely commercially available.
- the photoresist is then imagewise exposed to actinic radiation such as light in the visible, ultraviolet or infrared regions of the spectrum through a mask, or scanned by an electron beam, ion or neutron beam or X-ray radiation.
- actinic radiation may be in the form of incoherent light or coherent light, for example, light from a laser.
- the photoresist is then imagewise developed using a suitable solvent, such as an aqueous alkaline solution, thereby revealing underlying portions of the metal layer.
- etchants non-exclusively include acidic solutions, such as cupric chloride (preferable for etching of nickel) or nitric acid (preferable for etching of tin). Also preferred are ferric chloride or sulfuric peroxide (hydrogen peroxide with sulfuric acid).
- acidic solutions such as cupric chloride (preferable for etching of nickel) or nitric acid (preferable for etching of tin).
- ferric chloride or sulfuric peroxide hydroogen peroxide with sulfuric acid.
- Suitable etchants for removing the conductive layer non-exclusively include alkaline solutions, such as ammonium chloride/ammonium hydroxide.
- This circuit board may then be rinsed and dried. The result is a printed circuit board having excellent resolution and uniformity, and having excellent performance.
- a one pass etching process may be conducted.
- each of the revealed portions of the metal layer and the underlying electrically conductive layer may be etched in a cupric chloride etcher.
- the appropriate etchant is unable to properly etch the underlying conductive foil and a second etching step is still required.
- This single etching step is preferred for etching lines or spaces of greater than about 3 mils.
- the remaining photoresist can optionally be removed from the metal layer surface either by stripping with a suitable solvent or by ashing by well known ashing techniques.
- the photoresist may also be removed after etching the metal layer, but prior to etching the conductive foil.
- plasma is generated in a microwave plasma generator located upstream of a stripping chamber and stripping gases pass through this generator so that reactive species produced from the gases in the plasma enter the stripping chamber.
- Plasma ions are removed such as by filtering from plasma radicals.
- the term "radical”, as used herein is intended to define uncharged particles such as atoms or molecular fragments which are generated by the upstream plasma generator.
- the plasma generator may comprise any plasma generator known in the art. Plasma generators which are capable of providing a source of radicals, substantially without ions or electrons, are described, for example, in U.S. patent 5,174,856 and U.S. patent 5,200,031 , the disclosures of which are hereby incorporated by reference.
- the plasma used is generated by a microwave plasma generator such as, for example, a Model AURA plasma generator commercially available from the GaSonics of San Jose, Calif.
- a microwave plasma generator such as, for example, a Model AURA plasma generator commercially available from the GaSonics of San Jose, Calif.
- Another upstream plasma generator which is capable of supplying a source of radicals in the substantial absence of electrons and/or ions is commercially available from Applied Materials, Inc. as an Advanced Strip Passivation (ASP) Chamber.
- Plasma ashers are also commercially available from Mattson Technology of Fremont, California. Ashing may also be performed in an anisotropic method through the use of in situ ashing in an etch chamber such as a TEL DRM 85, available from Tokyo Electron Ltd.
- another insulating substrate may be laminated over the circuit without an additional roughening step and without black oxide treatment of the matte side of the foil.
- the thin metal layer does not need to be removed after etching and acts as an oxide replacement and supplies enough adhesion to form a multilayer structure.
- the metal layer is more uniform and reflective than a conductive foil alone and is easily inspected using well known automatic optical inspection (AOI) equipment.
- AOI automatic optical inspection
- a copper foil is treated on the shiny with copper nodules and a Zn-Cr barrier layer is applied.
- the matte side is also treated with nodules but is subsequently treated with nickel.
- the foil is laminated to an epoxy impregnated fiberglass (with the shiny side against the material) to form a substrate.
- a liquid photoresist is applied to the substrate to a thickness of 12 microns and exposed with UV light through a mask to from an image.
- the photoresist is developed using potassium carbonate, exposing the nickel surface.
- the nickel is removed using a cupric chloride etch, exposing the copper underneath.
- the copper is etched using an ammonia based system to define the traces.
- the photoresist removed using a sodium hydroxide solution.
- Example 1 is repeated except the matte side of the laminate is against the substrate and is treated with Zn-Cr.
- the shiny side has nodules plated as in Example 1 but is treated with nickel.
- Example 2 is repeated except the shiny surface is roughened by microetching prior to the nickel treatment.
- EXAMPLE 4 is repeated except the shiny surface is roughened by microetching prior to the nickel treatment.
- Example 2 is repeated except the shiny side is roughened by pumice scrubbing prior to nickel treatment.
- Example 1 is repeated except the photoresist is of a permanent nature and is not removed after etching.
- Example 1 is repeated except etching is done in one step with cupric chloride.
- Example 1 is repeated except the photoresist is exposed using a direct laser imaging system.
- Example 1 is repeated except tin is plated in place of nickel and etching is done using nitric acid.
- Copper foils are produced by electrodepositing copper from solution onto a rotating metal drum according to Example I of U.S. patent 3,293,109. Copper is dissolved in sulfuric acid and then electrodeposited in a solution of 70-105 g/L of copper as copper sulfate, 80-160 g/L of free sulfuric acid, at 40 -60 degrees C. The solution is brought into contact with a rotating metal dram, usually of titanium, which acts as a cathode and receives the copper as it is deposited from solution. The anode is constructed from a lead alloy. A cell voltage of about 5 to 10 volts is applied between the anode and the cathode to cause the copper to be deposited, while oxygen is evolved at the anode.
- Copper builds up a continuous film of copper on the drum at a thickness of from about 18 to 70 ⁇ m, which is removed, slit to the required width and finally wound in rolls.
- the side of the foil next to the drum is smooth (the “shiny side") while the other side has a relatively rough surface (the “matte side”).
- Samples of the copper foil are treated on either of the shiny or matte sides to produce surface nodules according to U.S. patent 5,679,230. Other samples of the copper foil are microetched with cupric chloride on either of the shiny or matte sides. Samples of the copper are measured for surface roughness and peel strength. Surface roughness is measured according to IPC-TM-650 Section 2.2.17 and peel strength is measured according to IPC-TM-650 Section 2.4.8 Revision C. The following results are noted:
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020037005804A KR100899588B1 (en) | 2000-10-26 | 2001-10-17 | Use of metallic treatment on copper foil to produce fine lines and replace oxide process in printed circuit board production |
CA002426124A CA2426124A1 (en) | 2000-10-26 | 2001-10-17 | Use of metallic treatment on copper foil to produce fine lines and replace oxide process in printed circuit board production |
AU2002211790A AU2002211790A1 (en) | 2000-10-26 | 2001-10-17 | Use of metallic treatment on copper foil to produce fine lines and replace oxide process in printed circuit board production |
EP01979868A EP1332653A1 (en) | 2000-10-26 | 2001-10-17 | Use of metallic treatment on copper foil to produce fine lines and replace oxide process in printed circuit board production |
JP2002538728A JP2004512698A (en) | 2000-10-26 | 2001-10-17 | Use of metallization on copper foil for fine line formation instead of oxidation process in printed circuit board manufacturing |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US69761400A | 2000-10-26 | 2000-10-26 | |
US09/697,614 | 2000-10-26 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2002035897A1 WO2002035897A1 (en) | 2002-05-02 |
WO2002035897A9 true WO2002035897A9 (en) | 2003-02-20 |
Family
ID=24801816
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2001/032400 WO2002035897A1 (en) | 2000-10-26 | 2001-10-17 | Use of metallic treatment on copper foil to produce fine lines and replace oxide process in printed circuit board production |
Country Status (9)
Country | Link |
---|---|
EP (1) | EP1332653A1 (en) |
JP (1) | JP2004512698A (en) |
KR (1) | KR100899588B1 (en) |
CN (1) | CN1299546C (en) |
AU (1) | AU2002211790A1 (en) |
CA (1) | CA2426124A1 (en) |
MY (1) | MY156961A (en) |
TW (1) | TW592009B (en) |
WO (1) | WO2002035897A1 (en) |
Families Citing this family (10)
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US6703252B2 (en) * | 2002-01-31 | 2004-03-09 | Hewlett-Packard Development Company, L.P. | Method of manufacturing an emitter |
JP2005285946A (en) * | 2004-03-29 | 2005-10-13 | Nippon Mektron Ltd | Manufacturing method of circuit board |
CN100446640C (en) * | 2004-09-09 | 2008-12-24 | 广东东硕科技有限公司 | An after-treatment fluid for copper surface black oxidation |
KR101229617B1 (en) | 2008-12-26 | 2013-02-04 | 제이엑스 닛코 닛세키 킨조쿠 가부시키가이샤 | Method for forming electronic circuit |
KR101269708B1 (en) * | 2008-12-26 | 2013-05-30 | 제이엑스 닛코 닛세키 킨조쿠 가부시키가이샤 | Rolled copper foil or electrolytic copper foil for electronic circuit, method for forming electronic circuit and printed substrate using the rolled copper foil or electrolytic copper foil |
EP2373133A1 (en) | 2008-12-26 | 2011-10-05 | JX Nippon Mining & Metals Corporation | Rolled copper foil or electrolytic copper foil for electronic circuit, and method for forming electronic circuit using the rolled copper foil or electrolytic copper foil |
JP5935163B2 (en) * | 2012-03-30 | 2016-06-15 | ナガセケムテックス株式会社 | Resist adhesion improver and copper wiring manufacturing method |
JP7055049B2 (en) * | 2017-03-31 | 2022-04-15 | Jx金属株式会社 | Surface-treated copper foil and laminated boards using it, copper foil with carriers, printed wiring boards, electronic devices, and methods for manufacturing printed wiring boards. |
CN109693080B (en) * | 2018-12-24 | 2020-12-29 | 江苏弘信华印电路科技有限公司 | Burr-free milling process for rigid-flex printed circuit board |
TWI781818B (en) * | 2021-11-05 | 2022-10-21 | 長春石油化學股份有限公司 | Surface-treated copper foil and copper clad laminate |
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JPH08222857A (en) * | 1995-02-16 | 1996-08-30 | Mitsui Mining & Smelting Co Ltd | Copper foil and high-density multilayered printed circuit board using the foil for its internal-layer circuit |
US6132887A (en) * | 1995-06-16 | 2000-10-17 | Gould Electronics Inc. | High fatigue ductility electrodeposited copper foil |
US5679230A (en) * | 1995-08-21 | 1997-10-21 | Oak-Mitsui, Inc. | Copper foil for printed circuit boards |
US6117300A (en) * | 1996-05-01 | 2000-09-12 | Honeywell International Inc. | Method for forming conductive traces and printed circuits made thereby |
US5895581A (en) * | 1997-04-03 | 1999-04-20 | J.G. Systems Inc. | Laser imaging of printed circuit patterns without using phototools |
US5989727A (en) * | 1998-03-04 | 1999-11-23 | Circuit Foil U.S.A., Inc. | Electrolytic copper foil having a modified shiny side |
US6117250A (en) * | 1999-02-25 | 2000-09-12 | Morton International Inc. | Thiazole and thiocarbamide based chemicals for use with oxidative etchant solutions |
-
2001
- 2001-10-17 WO PCT/US2001/032400 patent/WO2002035897A1/en active Application Filing
- 2001-10-17 JP JP2002538728A patent/JP2004512698A/en active Pending
- 2001-10-17 CA CA002426124A patent/CA2426124A1/en not_active Abandoned
- 2001-10-17 KR KR1020037005804A patent/KR100899588B1/en not_active IP Right Cessation
- 2001-10-17 CN CNB018213170A patent/CN1299546C/en not_active Expired - Fee Related
- 2001-10-17 AU AU2002211790A patent/AU2002211790A1/en not_active Abandoned
- 2001-10-17 EP EP01979868A patent/EP1332653A1/en not_active Withdrawn
- 2001-10-25 TW TW090126408A patent/TW592009B/en not_active IP Right Cessation
- 2001-10-25 MY MYPI20014947A patent/MY156961A/en unknown
Also Published As
Publication number | Publication date |
---|---|
WO2002035897A1 (en) | 2002-05-02 |
JP2004512698A (en) | 2004-04-22 |
EP1332653A1 (en) | 2003-08-06 |
KR100899588B1 (en) | 2009-05-27 |
CN1299546C (en) | 2007-02-07 |
CN1483303A (en) | 2004-03-17 |
MY156961A (en) | 2016-04-15 |
AU2002211790A1 (en) | 2002-05-06 |
TW592009B (en) | 2004-06-11 |
CA2426124A1 (en) | 2002-05-02 |
KR20030044046A (en) | 2003-06-02 |
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