WO2002027782A3 - Fault detection method and apparatus using multiple dimension measurements - Google Patents

Fault detection method and apparatus using multiple dimension measurements Download PDF

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Publication number
WO2002027782A3
WO2002027782A3 PCT/US2001/024685 US0124685W WO0227782A3 WO 2002027782 A3 WO2002027782 A3 WO 2002027782A3 US 0124685 W US0124685 W US 0124685W WO 0227782 A3 WO0227782 A3 WO 0227782A3
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WO
WIPO (PCT)
Prior art keywords
dimension
manufactured items
feature
items
identify
Prior art date
Application number
PCT/US2001/024685
Other languages
French (fr)
Other versions
WO2002027782A2 (en
Inventor
Richard J Markle
Matthew A Purdy
Naomi M Jenkins
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Priority to AU2001281127A priority Critical patent/AU2001281127A1/en
Publication of WO2002027782A2 publication Critical patent/WO2002027782A2/en
Publication of WO2002027782A3 publication Critical patent/WO2002027782A3/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps

Abstract

A method for identifying faults includes processing a plurality of manufacturedd items (210) in a process flow (10); measuring a first dimension of a feature (300, 360) formed on the manufactured items (210) at a first position; measuring at least a second dimension of the feature (300, 360) at a second position proximate the first position; calculating a dimension metric based on the first and second measured dimensions; and comparing dimension metrics for a set of the manufactured items (210) to identify a drift condition. A manufacturing system includes a plurality of tools (30-80, 220) for processing manufactured items (210) to identify a drift condition. A manufacturing system includes a plurality of tools (30-80, 220) for processing manufactured items (210) in a process flow (10), a metrology tool (220), and a fault monitor (130). The metrology tool (220) is adapted to measure a first dimension of a feature (300, 360) formed on the manufactured items (210) at a first position and measure at least a second dimension of a feature (300, 360) formed on the manufactured items (210) at a first position and measure at least a second dimension of the feature (300, 360) at a second position proximate the first position. The fault monitor (130) is adapted to calculate a dimension metric based on the first and second measured dimension and compare dimension metrics for a set of the manufactured items (210) to identify a drift condition.
PCT/US2001/024685 2000-09-27 2001-08-07 Fault detection method and apparatus using multiple dimension measurements WO2002027782A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2001281127A AU2001281127A1 (en) 2000-09-27 2001-08-07 Fault detection method and apparatus using multiple dimension measurements

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US67184800A 2000-09-27 2000-09-27
US09/671,848 2000-09-27

Publications (2)

Publication Number Publication Date
WO2002027782A2 WO2002027782A2 (en) 2002-04-04
WO2002027782A3 true WO2002027782A3 (en) 2003-09-04

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2001/024685 WO2002027782A2 (en) 2000-09-27 2001-08-07 Fault detection method and apparatus using multiple dimension measurements

Country Status (2)

Country Link
AU (1) AU2001281127A1 (en)
WO (1) WO2002027782A2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FI20041525A (en) 2004-11-26 2006-03-17 Imbera Electronics Oy Electronics module and manufacturing process
US10290088B2 (en) * 2014-02-14 2019-05-14 Kla-Tencor Corporation Wafer and lot based hierarchical method combining customized metrics with a global classification methodology to monitor process tool condition at extremely high throughput
CN113042599A (en) * 2021-03-29 2021-06-29 成都腾达模具有限公司 Processing method of qualified grid cell tube

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4571685A (en) * 1982-06-23 1986-02-18 Nec Corporation Production system for manufacturing semiconductor devices
US5385629A (en) * 1993-10-14 1995-01-31 Micron Semiconductor, Inc. After etch test method and apparatus
EP0720216A2 (en) * 1994-12-29 1996-07-03 AT&T Corp. Linewidth metrology of integrated circuit structures
US5715181A (en) * 1995-04-03 1998-02-03 Horst; Robert L. Isogrammetric analysis method for high-yield processes
US5991699A (en) * 1995-05-04 1999-11-23 Kla Instruments Corporation Detecting groups of defects in semiconductor feature space
WO2000045424A1 (en) * 1999-01-29 2000-08-03 Unaxis Usa Inc. Morphed processing of semiconductor devices

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4571685A (en) * 1982-06-23 1986-02-18 Nec Corporation Production system for manufacturing semiconductor devices
US5385629A (en) * 1993-10-14 1995-01-31 Micron Semiconductor, Inc. After etch test method and apparatus
EP0720216A2 (en) * 1994-12-29 1996-07-03 AT&T Corp. Linewidth metrology of integrated circuit structures
US5715181A (en) * 1995-04-03 1998-02-03 Horst; Robert L. Isogrammetric analysis method for high-yield processes
US5991699A (en) * 1995-05-04 1999-11-23 Kla Instruments Corporation Detecting groups of defects in semiconductor feature space
WO2000045424A1 (en) * 1999-01-29 2000-08-03 Unaxis Usa Inc. Morphed processing of semiconductor devices

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
JOHN R. TAYLOR: "Fehleranalyse", 1988, VCH VERLAGSGESELLSCHAFT, WEINHEIM, XP002223636 *

Also Published As

Publication number Publication date
AU2001281127A1 (en) 2002-04-08
WO2002027782A2 (en) 2002-04-04

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